Q67000-A9295 [INFINEON]
5-A DC Motor Driver with Inhibit; 5 -A直流电动机驱动器，带有禁止
| 型号： | Q67000-A9295 |
| 厂家： | 
Infineon |
| 描述： | 5-A DC Motor Driver with Inhibit |
| 文件： | 总16页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5-A DC Motor Driver with Inhibit
Overview
TLE 5207
Features
• Output current ± 4 A (peak 5 A)
• Inhibit with very low quiescent current (typ. 20 µA)
• I/O error diagnostics
• Short-circuit proof
• Four-quadrant operation
• Integrated free-wheeling diodes
• Wide temperature range
P-TO220-7-1
P-TO220-7-8
Type
Ordering Code
Q67000-A9295
Q67006-A9296
Package
TLE 5207
TLE 5207G
P-TO220-7-1
P-TO220-7-8
Description
TLE 5207 is an integrated power bridge with inhibit feature and DMOS output stages for
driving DC motors.
This motor bridge is optimized for driving DC motors in reversible operation. The internal
protective circuitry in particular ensures that no crossover currents can occur.
Because the free-wheeling diodes are integrated, the external circuitry that is necessary
is restricted to the capacitors on the supply voltage.
The two control inputs have TTL/CMOS-compatible levels.
Semiconductor Group
1
1998-02-01
TLE 5207
TLE 5207
TLE 5207G
1
2
3
4
5
6
7
EF
GND
VS
Q1
Ι1
Ι2
Q2
AEP01224
Figure 1 Pin Configuration (top view)
Pin Definitions and Functions
Pin
Symbol Function
1
Q1
Output of channel 1; short-circuit proof, free-wheeling diodes
integrated for inductive loads
2
EF
Error flag; TTL/CMOS-compatible output for error detection
(open drain)
3
4
5
6
7
I1
Control input 1; TTL/CMOS-compatible
Ground; connected internally to cooling fin
Control input 2; TTL/CMOS-compatible
Supply voltage; wire with capacitor matching load
GND
I2
VS
Q2
Output of channel 2; Short-circuit proof, free-wheeling diodes
integrated for inductive loads
Semiconductor Group
2
1998-02-01
TLE 5207
Circuit Description
Input Circuit
The control inputs consist of TTL/CMOS-compatible Schmitt triggers with hysteresis.
Buffer amplifiers are driven by these stages and convert the logic signal into the
necessary form for driving the power output stages.In case of low potential at both inputs
the device is switched in inhibit-condition with very low current consumption.
Output Stages
The output stages from a switched H-bridge. Protective circuits make the outputs short-
circuit proof from ground up to a supply voltage of 16 V. Positive and negative voltage
spikes, which occur when switching inductive loads, are limited by integrated power
diodes.
Monitoring and Protective Functions
An internal circuit ensures that all output transistors are turned-OFF if the supply voltage
is below the operating range.
Functional Truth Table
I1
I2
Q1 Q2
Comments
L
L
Z
Z
Device in inhibit condition with very low current
consumption; outputs in tristate condition (high impedance)
L
H
L
L
H
L
Motor turns clockwise
H
H
H
H
Motor turns counterclockwise
H
H
Motor brake; both high side transistors turned-ON
Notes for Output Stage
Symbol
Value
L
Low side transistor is turned-ON; High side transistor is turned-OFF
High side transistor is turned-ON; Low side transistor is turned-OFF
High side transistor and Low side transistor are turned-OFF
H
Z
A monitoring circuit for each output transistor detects whether the particular transistor is
active and in this case prevents the corresponding source transistor (sink transistor) from
conducting in sink operation (source operation). This effectively guards against
crossover currents. Pulse-width operation is possible up to a maximum switching
frequency of 1 kHz for any load.
Depending on the load current higher frequencies are possible.
Semiconductor Group
3
1998-02-01
TLE 5207
Protective Function
Various errors like short-circuit to + VS, ground or across the load are detected. All faults
result in turn-OFF of the output stages after a delay of 40 µs and setting of the error flag
EF to ground. Changing the inputs resets the error flag.
Output Shorted to Ground Detection
If a high side transistor is switched on and its output is shorted to ground, the output
current is limited to typ 11 A. After a delay of 40 µs all outputs will be switched off and
the error flag EF is set to ground.
Output Shorted to + VS and Overload Detection
An internal circuit detects if the current through the low side transistor is higher than 4 A
typ. In this case all outputs are turned-OFF after 40 µs and the error flag is set to ground.
At a junction temperature higher than 160 °C the thermal shutdown turns-OFF, all four
output stages commonly and the error flag is set without a delay.
Diagnosis
Input
Output
Diagnosis
EF
I1
L
I2
L
Q1 Q2
Shorted to GND Shorted to VS Overload
Z
L
Z
H
L
Q1, Q2
Q2
Q1, Q2
Q1
–
X
X
–
H
L
L
L
L
H
L
H
H
H
H
Q1
Q2
H
H
Q1, Q2
–
Semiconductor Group
4
1998-02-01
TLE 5207
Error Flag
2
VS
6
Error
Flag
Protection
Circuit 1
3
5
1
Output 1
Control Input 1
Control Input 2
7
Output 2
Protection
Circuit 1
4
GND
AEB01225
Figure 2 Block Diagram
Semiconductor Group
5
1998-02-01
TLE 5207
Electrical Characteristics
Absolute Maximum Ratings
Tj = – 40 to 150 °C
Parameter
Symbol
Limit Values Unit
Remarks
min.
max.
Voltage
VS
Supply voltage
Supply voltage
Logic input voltage
Diagnostics output voltage
– 0.3
– 1
– 0.3
– 0.3
40
–
6
V
V
V
V
–
VS
t < 500 ms; IS < 5 A
VS = 0 – 40 V
–
VI1 , 2
VEF
6
Current
Free-wheeling current
Output current1)
Output current
IF
IQ
IQ
– 4
– 4
– 5
4
4
5
A
A
A
Tj ≤ 150 °C
–
t < 2 ms
Junction temperature
Storage temperature
Tj
Tstg
– 40
– 50
150
150
°C
°C
–
–
Thermal Resistance
Junction-case
Junction-ambient
Rth jC
Rth jA
–
–
4
65
K/W
K/W
–
–
1)
During overload condition currrents higher than 5 A can dynamically occur, before the device shuts off, without
any damage to the device.
Note: Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Operating Range
Parameter
Symbol
Limit Values Unit
Remarks
min.
max.
VS
VI1 , 2
f
Supply voltage
6
– 0.3
–
24
6
1
V
V
kHz
°C
–
–
–
–
Logic input voltage
Switching frequency1)
Junction temperature
Tj
– 40
150
1)
Depending on load, higher frequencies are possible.
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group
6
1998-02-01
TLE 5207
Characteristics
VS = 6 to 18 V; Tj = – 40 to 150 °C
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
General
Quiescent current
Quiescent current
Iq
Iq
–
–
5
mA
IL = 0 A
20
40
µA
Tj = 25 °C
VI1 = VI2 = 0 V;
VS = 12 V
Quiescent current
Iq
80
µA
VI1 = VI2 = 0 V;
VS = 12 V
Turn-ON delay
Turn-OFF delay
Turn-ON time
Turn-OFF time
td1
td2
tr
–
–
–
–
–
–
–
–
20
20
20
20
µs
µs
µs
µs
Input to Output
Input to Output
IQ = 2.5 A; cf diagram
IQ = 2.5 A; cf diagram
tf
IC ON
IC OFF
Undervoltage
Undervoltage
VS
VS
–
–
5.5
4.5
5.9
5.5
V
V
Logic
Control inputs
H-input voltage
L-input voltage
VIH
VIL
2.8
–
–
–
–
1.2
V
V
–
–
Hysteresis of input
voltage
∆VI
0.8
V
–
H-input current
L-input current
II
II
0
– 2
25
0
50
2
µA
µA
VI = VIH = 2.8 V
VI = VIL
Diagnostics output
Delay time
L-output voltage
Leakage current
td
VFF
IRD
20
–
–
40
–
–
75
0.4
10
µs
V
µA
–
I = 3 mA
–
Error detection
Switching threshold VEU
3.5
5
4.5
4.5
7
6
5.5
10
9
V
A
A
Overcurrent
IF1
Tj ≤ 25 °C
25 °C < Tj ≤ 150 °C
Overcurrent
IF1
Semiconductor Group
7
1998-02-01
TLE 5207
Characteristics (cont’d)
VS = 6 to 18 V; Tj = – 40 to 150 °C
Parameter
Symbol
Limit Values
min. typ. max.
Unit Test Condition
Outputs
RDSON (Source)
RDSON (Source)
RDSON (Source)
RDSON (Source)
–
–
–
–
–
–
–
–
–
–
–
–
0.4
0.65
0.4
Ω
Ω
Ω
Ω
VS > 6 V; Tj = 25 °C1)
VS > 6 V; Tj = 150 °C1)
VS > 6 V; Tj = 25 °C1)
VS > 6 V; Tj = 150 °C1)
0.65
Diode forward
voltage
Diode forward
voltage
VFU
VFL
–
–
–
–
1.5
1.5
V
V
IF = 3 A
IF = 3 A
1)
Values for RDSON are for t > 100 µs after applying + VS and t > 400 µs after changing from VI1 = VI2 = L to VI1
or VI2 = H.
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at Tj = 25 °C and
the given supply voltage.
Semiconductor Group
8
1998-02-01
TLE 5207
4700 µF
63 V
Ιq
Ι
S
,
470 nF
6
2
ΙΙ1
Ι Q1
ΙQ2
VQ2
VS
3
5
1
RL
TLE 5207
VEF
ΙΙ2
VΙ1
7
4
VΙ2
VQ1
ΙM
AES01569
Figure 3 Test Circuit
Figure 4 Timing Diagram
Semiconductor Group
9
1998-02-01
TLE 5207
+
VS = 12 V
*
220 nF
5 V
2 k
Ω
6
Error
Flag
2
3
5
1
7
TLE 5207
M
Control
Inputs
4
AES01570
*)Necessary for isolating supply voltage or interruption (eg 470 µF).
Figure 5 Application Circuit
Semiconductor Group
10
1998-02-01
TLE 5207
Diagrams
RON Resistance of Output Stage over
Temperature
Output Voltage on Diagnostics Output
versus Current
AED01305
AED01306
800
300
VEF
R ON
6 V<VS<18 V
mV
m
Ω
250
T j
VS =12 V
= 150 ˚C
600
400
200
0
max
typ
200
150
100
50
Tj
= 25 ˚C
0
0
25
50
75
100
˚C
Tj
150
0
1
2
3
4
mA
6
Forward Current of Upper Free-
Wheeling Diode versus Voltage
Forward Current of Lower
Free-Wheeling Diode versus Voltage
AED01304
AED01303
4
4
Ι F
Ι F
A
A
3
2
3
Tj = 150 ˚C
Tj = 25 ˚C
Tj
= 150 ˚C
2
Tj
= 25 ˚C
1
1
0
0.2
0
0.2
0.6
1
V
1.4
0.6
1
V
1.4
VF
VF
Semiconductor Group
11
1998-02-01
TLE 5207
Overcurrent Threshold
versus Temperature
Quiescent Current (device active)
versus Temperature
AED01681
AED01682
10
5
Ι Q
Ι S
A
mA
8
4
typ
typ
6
3
2
1
0
min
4
2
0
-40
0
40
80
120 ˚C 160
-40
0
40
80
120 ˚C 160
Tj
Tj
Input Threshold
Switching Threshold VEU
versus Temperature
versus Temperature
AED01683
AED01684
3.5
5.5
VΙ
V
VF
V
3.0
5.0
VΙ
H
typ
2.5
2.0
1.5
1.0
4.5
typ
4.0
3.5
3.0
VΙ
L
typ
-40
0
40
80
120 ˚C 160
-40
0
40
80
120 ˚C 160
Tj
Tj
Semiconductor Group
12
1998-02-01
TLE 5207
E2
E1 = Low
11 A
Ι Q2
VQ2
RShort x 11 A
VFL
40 µ s
EF
AED01689
Figure 6 Timing Diagram for Output Shorted to Ground (E1 = High)
E2
E1 = Low
20 A
Ι Q1
VS
R Short x 20 A
VFU
VQ1
40 µ s
EF
AED01686
Figure 7 Timing Diagram for Output Shorted to VS (E1 = High)
Semiconductor Group
13
1998-02-01
TLE 5207
E2
E1 = Low
Ι F1
Overcurrent
Switching
Threshold
Ι Load
40 µ s
VS
VF
VQ1
RON x Ι Load
VS
RON x Ι Load
VQ2
VF
EF
AED01687
Figure 8 Timing Diagram for Overcurrent and E1 = E2 Inverted (Device not
inhibited)
Semiconductor Group
14
1998-02-01
TLE 5207
Package Outlines
P-TO220-7-1
(Plastic Transistor Single Outline Package)
10+0.4
4.6-0.2
10.2 -0.2
1 x 45˚
3.75+0.1
1.27 +0.1
2.6
0.4 +0.1
1
7
1.27
1)
0.6 +0.1
±0.4
4.5
M
0.6
7x
±0.4
8.4
1) 0.75 -0.15 at dam bar (max 1.8 from body)
1) 0.75 -0.15 im Dichtstegbereich (max 1.8 vom Körper)
GPT05108
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Dimensions in mm
Data Book “Package Information”.
Semiconductor Group
15
1998-02-01
TLE 5207
P-TO220-7-8
(Plastic Transistor Single Outline Package)
4.6
1.27
0.2
10.2
8.0
2.6
1)
0.6
1.27
6 x 1.27 = 7.62
GPT05874
1) shear and punch direction burr free surface
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
SMD = Surface Mounted Device
Semiconductor Group
16
1998-02-01
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