TLD5190QV [INFINEON]
H-Bridge DC/DC Controller;
| 型号： | TLD5190QV |
| 厂家： | 
Infineon |
| 描述： | H-Bridge DC/DC Controller |
| 文件： | 总59页 (文件大小：2436K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLD5190
H-Bridge DC/DC Controller
Infineon® LITIX™ Power
Package
Marking
PG-VQFN-48-31
TLD5190QV
PG-TQFP-48-9
TLD5190QU
TLD5190QU
Sales Name TLD5190QV
1
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Single Inductor high power Buck-Boost controller
Wide LED forward voltage Range (2 V up to 55 V)
Wide VIN Range (IC 4.5 V to 40 V, Power 4.5 V to 55 V)
Switching Frequency Range from 200 kHz to 700 kHz
Maximum Efficiency in every condition (up to 96%)
Constant Current (LED) and Constant Voltage Regulation
EMC optimized device: Features an auto Spread Spectrum
Open Load, Overvoltages, Shorted LED fault and Overtemperature Diagnostic Outputs
LED and Input current sense with dedicated monitor Outputs
Advanced protection features for device and load
Enhanced Dimming features: Analog and PWM dimming
LED current accuracy +/- 3%
Available in a small thermally enhanced PG-VQFN-48-31 or PG-TQFP-48-9 package
Automotive AEC Qualified
CIN2
VIN
RIIN
Alternative
external
VREG supply
CIVCC
IVCC_ext
IVCC
VIN
IIN2
CIN1
D2
D1
COUT2
COUT3
BST1
BST2
RFB
Rfilter
Cfilter
CBST1 CBST2
COUT1
M1
M2
M4
IIN1
EN/INUVLO
HSGD1
SWN1
LOUT
INOVLO
M3
CCOMP
LSGD1
SWCS
RCOMP
COMP
CSOFT_START
SOFT_START
High
Power
LED Load
RFREQ
FREQ
SGND
SYNC of other DCDC
CLKOUT
SYNC
PGND1
PGND2
LSGD2
SWN2
HSGD2
VFB
µC SYNC signal
RSYNC
Spread Spectrum ON/OFF
Digital dimminig
Spread_spectrum
PWMI
RPWMI
IVCC_ext
VREF
SET
CREF
FBH
FBL
RSET
Analog dimminig
RSENSE
RSENSE
IINMON
IOUTMON
Advanced monitoring
EF1
EF2
Errorflag monitoring
VSS AGND
Figure 1
Application Drawing - TLD5190 as current regulator
Datasheet
www.infineon.com
1
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Overview
Description
The TLD5190 is a synchronous MOSFET H-Bridge DC/DC controller with built in protection features. This
concept is beneficial for driving high power LEDs with maximum system efficiency and minimum number of
external components. The TLD5190 offers both analog and digital (PWM) dimming.The switching frequency is
adjustable in the range of 200 kHz to 700 kHz. It can be synchronized to an external clock source. A built in
Spread Spectrum switching frequency modulation and the forced continuous current regulation mode
improve the overall EMC behavior. Furthermore the current mode regulation scheme provides a stable
regulation loop maintained by small external compensation components. The adjustable soft start feature
limits the current peak as well as voltage overshoot at start-up. The TLD5190 is suitable for use in the harsh
automotive environment.
Table 1
Product Summary
Power Stage input voltage range
Device Input supply voltage range
VPOW
4.5 V … 55 V
4.5 V … 40 V
VVIN
Maximum output voltage (depending by the
application conditions)
VOUT(max)
55 V as LED Driver Boost Mode
50 V as LED Driver Buck Mode
50 V as Voltage regulator
Switching Frequency range
fSW
200 kHz... 700 kHz
Typical NMOS driver on-state resistance at
RDS(ON_PU)
2.3 Ω
Tj = 25°C (Gate Pull Up)
Typical NMOS driver on-state resistance at
RDS(ON_PD)
1.2 Ω
Tj = 25°C (Gate Pull Down)
Protective Functions
•
•
•
•
•
Over load protection of external MOSFETs
Shorted load, open load, output overvoltage protection
Input overvoltage and undervoltage protection
Thermal shutdown of device with autorestart behavior
Electrostatic discharge protection (ESD)
Diagnostic Functions
•
•
•
•
Diagnostic information via Error Flags
Open load detection in ON-state
Device Overtemperature shutdown
Advanced diagnostic functions provide ILED and IIN information
Applications
•
•
Especially designed for driving high power LEDs in automotive applications
Automotive Exterior Lighting: full LED headlamp assemblies (Low Beam, High Beam, Matrix Beam, Pixel
Light)
•
General purpose current/voltage controlled DC/DC LED driver
Datasheet
2
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Block Diagram
2
Block Diagram
Figure 2
Block Diagram - TLD5190
Datasheet
3
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 3
Pin Configuration - TLD5190
Datasheet
4
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Pin Configuration
3.2
Pin Definitions and Functions
1)
Pin
Symbol
I/O
-
Function
Power Supply
1, 12,
15, 45,
48
n.c.
Not connected, tie to AGND on the Layout;
44
VIN
-
I
Power Supply Voltage;
Supply for internal biasing.
47
IVCC_EXT
PD External LDO input;
Input to alternatively supply internal Gate Drivers via an external LDO.
Connect to IVCC pin to use internal LDO to supply gate drivers. Must not
be left open.
5, 8
26
40
-
PGND1, 2
VSS
-
-
-
-
Power Ground;
Ground for power potential. Connect externally close to the chip.
Digital GPIO Ground;
Ground for GPIO pins.
AGND
EP
Analog Ground;
Ground Reference
Exposed Pad;
Connect to external heatspreading Cu area (e.g. inner GND layer of
multilayer PCB with thermal vias).
Gate Driver Stages
2
HSGD1
O
O
Highside Gate Driver Output 1;
Drives the top n-channel MOSFET with a voltage equal to VIVCC_EXT
superimposed on the switch node voltage SWN1. Connect to gate of
external switching MOSFET.
11
HSGD2
Highside Gate Driver Output 2;
Drives the top n-channel MOSFET with a voltage equal to VIVCC_EXT
superimposed on the switch node voltage SWN2. Connect to gate of
external switching MOSFET.
6
7
LSGD1
LSGD2
O
O
Lowside Gate Driver Output 1;
Drives the lowside n-channel MOSFET between GND and VIVCC_EXT
Connect to gate of external switching MOSFET.
.
.
Lowside Gate Driver Output 2;
Drives the lowside n-channel MOSFET between GND and VIVCC_EXT
Connect to gate of external switching MOSFET.
4
SWN1
SWN2
IVCC
IO
IO
O
Switch Node 1;
SWN1 pin swings from a diode voltage drop below ground up to VIN.
9
Switch Node 2;
SWN2 pin swings from ground up to a diode voltage drop above VOUT
.
46
Internal LDO output;
Used for internal biasing and gate driver supply. Bypass with external
capacitor close to the pin. Pin must not be left open.
Datasheet
5
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Pin Configuration
1)
Pin
Symbol
I/O
Function
Inputs and Outputs
23
25
28
29
30
31
41
TEST1
-
-
-
-
-
-
I
Test Pin;
Used for Infineon end of line test, connect to GND in application.
TEST2
Test Pin;
Used for Infineon end of line test, connect to GND in application.
TEST3
Test Pin;
Used for Infineon end of line test, connect to GND in application.
TEST4
Test Pin;
Used for Infineon end of line test, connect to GND in application.
TEST5
Test Pin;
Used for Infineon end of line test, connect to GND in application.
TEST6
Test Pin;
Used for Infineon end of line test, connect to GND in application.
EN/INUVLO
PD Enable/Input Under Voltage Lock Out;
Used to put the device in a low current consumption mode, with
additional capability to fix an undervoltage threshold via external
components. Pin must not be left open.
35
34
FREQ
SYNC
I
I
Frequency Select Input;
Connect external resistor to GND to set frequency.
PD Synchronization Input;
Apply external clock signal for synchronization.
24
13
PWMI
FBH
I
I
PD Control Input; Digital input 5 V or 3.3 V.
Output current Feedback Positive;
Non inverting Input (+).
14
3
FBL
I
Output current Feedback Negative;
Inverting Input (-).
BST1
IO
Bootstrap capacitor;
Used for internal biasing and to drive the Highside Switch HSGD1.
Bypass to SWN1 with external capacitor close to the pin. Pin must not be
left open.
10
BST2
IO
Bootstrap capacitor;
Used for internal biasing and to drive the Highside Switch HSGD2.
Bypass to SWN2 with external capacitor close to the pin. Pin must not be
left open.
17
18
SWCS
SGND
I
I
Current Sense Input;
Inductor current measurement - Non Inverting Input (+).
Current Sense Ground;
Inductor current sense - Inverting Input (-).
Route as Differential net with SWCS on the Layout.
42
IIN1
IIN2
I
I
Input Current Monitor Positive;
Non Inverting Input (+), connect to VIN if input current monitor is not
needed.
43
Input Current Monitor Negative;
Inverting Input (-), connect to VIN if input current monitor is not needed.
Datasheet
6
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Pin Configuration
1)
Pin
19
Symbol
COMP
I/O
O
Function
Compensation Network Pin;
Connect R and C network to pin for stability phase margin adjustment.
38
36
SOFT_START
INOVLO
O
I
Softstart configuration Pin;
Connect a capacitor CSOFT_START to GND to fix a soft start ramp default
time.
Input Overvoltage Protection Pin;
Define an upper voltage threshold and switches OFF the device in case
of overvoltages on the VIN supply. Must not be left open.
20
22
VFB
SET
I
I
Voltage Loop Feedback Pin;
VFB is intended to set output protection functions.
Analog current sense adjustment Pin;
A voltage VSET between 0.2 V and 1.5 V will adjust the ILED or VOUT in a
linear relation.
37
39
16
21
SPREAD_SPECTR
UM
I
PD Spread Spectrum Pin;
This pin is enabling and disabling the SPREAD SPECTRUM function. This
feature is beneficial to improve the EMC performance.
IINMON
IOUTMON
VREF
O
O
O
Input current monitor output;
Monitor pin that produces a voltage that is 20 times the voltage VIN1-IN2
IINMON will be equal 1 V when VIIN1-VIIN2 = 50 mV.
.
Output current monitor output;
Monitor pin that produces a voltage that is 200 mV + 8 times the voltage
VFBH-FBL. IOUTMON will be equal 1.4 V when VFBH-FBL = 150 mV.
PD Voltage Reference Output Pin;
Supplies an accurate 2 V output voltage for standalone analog dimming
and LED temperature compensation via external resistors. Bypass with
an external 100nF capacitor close to the pin. Pin must not be left open.
Logic Outputs
27
33
32
CLKOUT
O
O
O
Clock Output Pin;
Switching Oscillator output signal to supply additional SYNC Inputs of
other DCDC devices (beneficial for standalone operations without µC).
EF1
EF2
Error Flag 1;
An open drain output which is pulled to LOW when an output Short to
GND or Overtemperature occurs.
Error Flag 2;
An open drain output which is pulled to LOW when an OPEN load,
Overvoltages or Overtemperature occurs.
1) O: Output, I: Input,
PD: pull-down circuit integrated,
PU: pull-up circuit integrated
Datasheet
7
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 2
Absolute Maximum Ratings1)
TJ = -40°C to +150°C; all voltages with respect to AGND, (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
Typ. Max.
Supply Voltages
VIN
Supply Input
VVIN
-0.3
-0.3
–
–
60
6
V
V
–
P_4.1.1
P_4.1.3
IVCC
VIVCC
–
–
–
Internal Linear Voltage Regulator
Output voltage
IVCC_EXT
VIVCC_EXT -0.3
–
–
6
V
V
P_4.1.4
P_4.1.5
External Linear Voltage Regulator Input
voltage
VREF
VREF
-0.3
3.6
Voltage reference output
Gate Driver Stages
LSGD1,2 - PGND1,2
Lowside Gatedriver voltage
VLSGD1,2- -0.3
–
–
–
–
–
–
–
–
5.5
5.5
60
6
V
V
V
V
V
V
V
V
–
–
–
–
–
–
–
–
P_4.1.54
P_4.1.55
P_4.1.6
P_4.1.7
P_4.1.8
P_4.1.9
P_4.1.10
P_4.1.11
PGND1,2
HSGD1,2 - SWN1,2
Highside Gatedriver voltage
VHSGD1,2- -0.3
SWN1,2
SWN1, SWN2
switching node voltage
VSWN1, 2
-1
(BST1-SWN1), (BST2-SWN2)
Boostrap voltage
VBST1,2-
-0.3
-0.3
-0.3
-0.3
-0.5
SWN1,2
BST1, BST2
Boostrap voltage related to GND
VBST1, 2
65
0.3
0.3
0.5
SWCS
VSWCS
VSGND
Switch Current Sense Input voltage
SGND
Switch Current Sense GND voltage
SWCS-SGND
VSWCS-
Switch Current Sense differential
voltage
SGND
PGND1,2
Power GND voltage
VPGND1,2
-0.3
–
–
0.3
60
V
V
–
–
P_4.1.28
P_4.1.12
High voltage Pins
IIN1, IIN2
VIIN1, 2
-0.3
Input Current monitor voltage
Datasheet
8
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
General Product Characteristics
Table 2
Absolute Maximum Ratings1) (cont’d)
TJ = -40°C to +150°C; all voltages with respect to AGND, (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
P_4.1.13
Min.
-0.5
Typ. Max.
IIN1-IIN2
VIIN1-IIN2
–
0.5
V
–
Input Current monitor differential
voltage
FBH, FBL
Feedback Error Amplifier voltage
VFBH, FBL -0.3
VFBH-FBL -0.5
–
–
60
V
V
–
–
P_4.1.14
P_4.1.15
FBH-FBL
0.5
Feedback Error Amplifier differential
voltage
EN/INUVLO
VEN/INUVLO -0.3
–
60
V
–
P_4.1.16
Device enable/input undervoltage
lockout
Digital (I/O) Pins
PWMI
Digital Input voltage
VPWMI
-0.3
-0.3
-0.3
–
–
–
–
5.5
5.5
5.5
5.5
V
V
V
V
–
–
–
–
P_4.1.17
P_4.1.22
P_4.1.23
P_4.1.24
SYNC
VSYNC
Synchronization Input voltage
CLKOUT
Clock Output voltage
VCLKOUT
SPREAD_SPECTRUM
VSPREAD_SP -0.3
Spread Spectrum Input voltage
ECTRUM
Analog Pins
VFB
VVFB
-0.3
-0.3
-0.3
-0.3
-0.3
–
–
–
–
–
–
–
–
–
5.5
5.5
5.5
5.5
3.6
3.6
3.6
3.6
5.5
V
V
V
V
V
V
V
V
V
–
–
–
–
–
–
–
–
–
P_4.1.25
P_4.1.26
P_4.1.27
P_4.1.29
P_4.1.30
P_4.1.31
P_4.1.32
P_4.1.33
P_4.1.34
Loop Input voltage
INOVLO
Input overvoltage lockout
VINOVLO
VEF1,2
VSET
EF1, 2
Error Flags output voltage
SET
Analog dimming Input voltage
COMP
VCOMP
Compensation Input voltage
SOFT_START
Softstart Voltage
VSOFT_STAR -0.3
T
FREQ
VFREQ
-0.3
-0.3
Voltage at frequency selection pin
IINMON
Voltage at input monitor pin
VIINMON
IOUTMON
VIOUTMON -0.3
Voltage at output monitor pin
Temperatures
Datasheet
9
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
General Product Characteristics
Table 2
Absolute Maximum Ratings1) (cont’d)
TJ = -40°C to +150°C; all voltages with respect to AGND, (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
-40
Typ. Max.
Junction Temperature
Storage Temperature
Tj
–
–
150
150
°C
°C
–
P_4.1.35
P_4.1.36
Tstg
-55
–
ESD Susceptibility
ESD Resistivity of all Pins
ESD Resistivity to GND
ESD Resistivity of corner Pins to GND
VESD,HBM -2
VESD,CDM -500
VESD,CDM_c -750
orner
–
–
–
2
kV HBM2)
P_4.1.37
P_4.1.38
P_4.1.39
500
750
V
V
CDM3)
CDM3)
1) Not subject to production test, specified by design.
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
Note:
Stresses above the ones listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the datasheet. Fault conditions are considered as “outside” normal operating range.
Protection functions are not designed for continuous repetitive operation.
4.2
Functional Range
Table 3
Functional Range
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
4.5
Typ. Max.
1)
Device Extended Supply Voltage
Range
VVIN
VVIN
–
40
V
P_4.2.1
P_4.2.2
Device Nominal Supply Voltage
Range
8
–
36
V
–
1)
Power Stage Voltage Range
Junction Temperature
VPOW
Tj
4.5
-40
–
–
55
V
P_4.2.5
P_4.2.4
150
°C
–
1) Not subject to production test, specified by design.
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
4.3
Thermal Resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, go to www.jedec.org.
Datasheet
10
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
General Product Characteristics
Table 4
Parameter
Symbol
Values
Typ.
0.9
Unit Note or
Test Condition
Number
Min.
Max.
1) 2)
Junction to Case
RthJC
RthJA
–
–
–
K/W
K/W 3) 2s2p
P_4.3.1
P_4.3.2
Junction to Ambient
–
25
1) Not subject to production test, specified by design.
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed
to ambient temperature). Ta = 25°C; The IC is dissipating 1 W.
3) Specified RthJA value is according to JEDEC 2s2p (JESD 51-7) + (JESD 51-5) and JEDEC 1s0p (JESD 51-3) + heatsink area
at natural convection on FR4 board; The device was simulated on a 76.2 x 114.3 x 1.5 mm board. The 2s2p board has
2 outer copper layers (2 x 70 µm Cu) and 2 inner copper layers (2 x 35 µm Cu). A thermal via (diameter = 0.3 mm and
25 µm plating) array was applied under the exposed pad and connected the first outer layer (top) to the first inner
layer and second outer layer (bottom) of the JEDEC PCB. Ta = 25°C; The IC is dissipating 1 W.
Datasheet
11
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Power Supply
5
Power Supply
The TLD5190 is supplied by the following pins:
•
•
VIN (main supply voltage)
IVCC_EXT (supply for internal gate driver stages)
The VIN supply provides internal supply voltages for the analog and digital blocks.
IVCC_EXT is the supply for the low side driver stages. This supply is used also to charge, through external
Schottky diodes, the bootstrap capacitors which provide supply voltages to the high side driver stages. If no
external voltage is available this pin must be shorted to IVCC, which is the output of an internal 5 V LDO.
The supply pins VIN and IVCC_EXT have undervoltage detections.
Undervoltage on IVCC_EXT or IVCC voltages forces a deactivation of the driver stages, thus stopping the
switching activity.
Moreover the double function pin EN/INUVLO can be used as an input undervoltage protection by placing a
resistor divider from VIN to GND (refer to Chapter 10.3).
If EN/INUVLO undervoltage is detected, it will turn-off the IVCC voltage regulator and stop switching.
Figure 4 shows a basic concept drawing of the supply domains and interactions among pins VIN and
IVCC/IVCC_EXT.
VIN
VREG (5V)
R1
IVCC
Internal pre-regulated
EN/INUVLO
voltage Supply
Undervoltage
detection
R2
IVCC_EXT
VREG
digital
VREG
analog
LS - Drivers
HS - Drivers
PGND
BSTx
Bandgap
Reference
LOGIC
SWNx
Figure 4
Power Supply Concept Drawing
Datasheet
12
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Power Supply
Usage of EN/INUVLO pin in different applications
The pin EN/INUVLO is a double function pin and can be used to put the device into a low current consumption
mode. An undervoltage threshold should be fixed by placing an external resistor divider (A) in order to avoid
low voltage operating conditions. This pin can be driven by a µC-port as shown in (B) .
A
B
Vin
Vin
VIN
VIN
R1
R2
R1
R2
EN/INUVLO
GND
EN/INUVLO
GND
µC Port
Figure 5
Usage of EN/INUVLO pin in different applications
Datasheet
13
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Power Supply
5.1
Different Power States
TLD5190 has the following power states:
•
•
•
SLEEP state
IDLE state
ACTIVE state
The transition between the power states is determined according to these variables after a filter time of max.
3 clock cycles:
•
•
•
•
VIN level
EN/INUVLO level
IVCC level
IVCC_EXT level
The state diagram including the possible transitions is shown in Figure 6.
The Power-up condition is entered when the supply voltage VVIN exceeds its minimum supply voltage
threshold VVIN(ON)
.
SLEEP
When the TLD5190 is in the SLEEP state, all outputs are OFF, independently from the supply voltages VIN, IVCC
and IVCC_EXT. The current consumption is low. Refer to parameter: IVIN(SLEEP)
.
The transition from SLEEP to ACTIVE state requires a specified time: tACTIVE
.
IDLE
In IDLE state the internal voltage regulator is working. Diagnosis functions are not available. The output
drivers are switched OFF, independently from the supply voltages VIN, IVCC and IVCC_EXT.
ACTIVE
In active state the device will start switching activity to provide power at the output only when PWMI = HIGH.
To start the Highside gate drivers HSGD1,2 the voltage level VBST1,2 - VSWN1,2 needs to be above the threshold
VBST1,2 - VSWN1,2_UVth. In ACTIVE state the device current consumption via VIN is dependent on the external
MOSFET used and the switching frequency fSW
.
Power-up
SLEEP
EN/INUVLO = HIGH
EN/INUVLO = LOW
EN/INUVLO = LOW
EN/INUVLO = LOW
ACTIVE
IDLE
VIN = LOW
or IVCC = LOW
or IVCC_EXT = LOW
VIN = HIGH
& IVCC = HIGH
& IVCC_EXT = HIGH
Figure 6
Simplified State Diagram
Datasheet
14
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Power Supply
5.2
Electrical Characteristics
Table 5
EC Power Supply
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Power Supply VIN
Input Voltage Startup
VVIN(ON)
–
–
–
–
–
4.7
4.5
6
V
V
VIN increasing;
EN/INUVLO = HIGH;
IVCC = IVCC_EXT =
10 mA;
P_5.3.1
V
Input Undervoltage switch OFF VVIN(OFF)
–
VIN decreasing;
VEN/INUVLO = HIGH;
IVCC = IVCC_EXT =
10 mA;
P_5.3.14
P_5.3.2
P_5.3.3
Device operating current
IVIN(ACTIVE)
4.4
–
mA 1)ACTIVE mode;
CLKOUT freq.
300 KHz;
VPWMI = 0 V;
VIN Sleep mode supply current IVIN(SLEEP)
1.5
µA
VEN/INUVLO = 0 V;
VIN = 13.5 V;
VIVCC = VIVCC_EXT= 0 V;
EN/INUVLO Pin characteristics
Input Undervoltage falling
Threshold
VEN/INUVLOth 1.6
1.75 1.9
90
V
–
P_5.3.7
P_5.3.8
P_5.3.9
P_5.3.10
1)
EN/INUVLO Rising Hysteresis
VEN/INUVLO(hy
–
–
mV
st)
EN/INUVLO input Current LOW IEN/INUVLO(LO 0.45 0.89 1.34 µA
VEN/INUVLO = 0.8 V;
VEN/INUVLO = 2 V;
W)
EN/INUVLO input Current HIGH IEN/INUVLO(HI 1.1
2.2
–
3.3
0.7
µA
GH)
Timings
1)
SLEEP mode to ACTIVE time
tACTIVE
–
ms
P_5.3.11
VIVCC = VIVCC_EXT
IVCC = 10 µF;
VIN = 13.5 V;
;
C
1) Not subject to production test, specified by design.
Datasheet
15
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
6
Regulator Description
The TLD5190 includes all of the functions necessary to provide constant current to the output as usually
required to drive LEDs. A voltage mode regulation can also be implemented (Refer to Chapter 6.6).
It is designed to control 4 gate driver outputs in a H-Bridge topology by using only one inductor and 4 external
MOSFETs. This topology is able to operate in high power BOOST, BUCK-BOOST and BUCK mode applications
with maximum efficiency.
The transition between the different regulation modes is done automatically by the device itself, with respect
to the application boundary conditions.
The transition phase between modes is seamless.
6.1
Regulator Diagram Description
The TLD5190 includes two analog current control inputs (IIN1, IIN2) to limit the maximum Input current (Block
A1 and A7 in Figure 7).
A second analog current control loop (A5, A6 with complessive gain = IFBxgm) connected to the sensing pins
FBL, FBH regulates the output current.
The regulator function is implemented by a pulse width modulated (PWM) current mode controller. The error
in the output current loop is used to determine the appropriate duty cycle to get a constant output current.
An external compensation network (RCOMP, CCOMP) is used to adjust the control loop to various application
boundary conditions.
The inductor current for the current mode loop is sensed by the RSWCS resistor.
RSWCS is used also to limit the maximum external switches / inductor current.
If the Voltage across RSWCS exceeds its overcurrent threshold (VSWCS_buck or VSWCS_boost for buck or boost
operation respectively) the device reduces the duty cycle in order to bring the switches current below the
imposed limit.
The current mode controller has a built-in slope compensation as well to prevent sub-harmonic oscillations.
The control loop logic block (LOGIC) provides a PWM signal to four internal gate drivers. The gate drivers
(HSGD1,2 and LSGD1,2) are used to drive external MOSFETs in an H-Bridge setup . Once the soft start expires
a forced CCM regulation mode is performed.
The control loop block diagram displayed in Figure 7 shows a typical constant current application. The voltage
across RFB sets the output current. RIN is used to fix the maximum input current.
Datasheet
16
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
RIN
IIN
RFB
IOUT
VIN
Rfilter
M4
M3
M1
COUT
HSGD2
LSGD2
HSGD1
FBH
FBL
VOUT
Cfilter
LOUT
+
-
M2
A5
LSGD1
IIN1
IIN2
ISWCSx
SWCS
SGND
BOOST
+
-
A2
A1
A8
A9
HSGD1
HSGD2
RSWCS
SLOPE SELECTION
& Compensation
LOGIC
CLK
LSGD1
LSGD2
A3
BUCK
A6
A7
SET
Vi_REF
COMP
RCOMP
CCOMP
VCOMP
Figure 7
Regulator Block Diagram - TLD5190
Datasheet
17
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
6.2
Adjustable Soft Start Ramp
The soft start routine limits the current through the inductor and the external MOSFET switches during
initialization to minimize potential overshoots at the output.
The soft start routine is applied:
•
•
•
At first turn on (first PWM rise after EN = High)
After Output Short to GND or Open Load detection
After Input Overvoltage detection
The soft start rising edge gradually increases the current of the inductor (LOUT) over tSOFT_START by clamping the
COMP voltage . The soft start ramp is defined by a capacitor placed at the SOFT_START pin.
Selection of the SOFT_START capacitor (CSOFT_START) can be done according to the approximate formula
described in Equation (6.1):
Vss _ th _ eff
(6.1)
tSOFT _ START
=
⋅CSOFT _ START
ISOFT _ START(PU )
Note:
Vss_th_eff is the soft start effectiveness threshold, that depends on load condition. Its value is about
0.7 V for the buck mode and 1.4 V for the boost mode
The SOFT START pin is also used to implement a fault mask and wait-before-retry time, on rising and falling
edge respectively, see and chapter Chapter 10.2 for details.
If an open load or a short on the output is detected, a pull-down current source ISOFT_START_PD (P_6.4.20) is
activated. Through a pull-up resistor connected from VREF to the SOFT START pin it is possible to source a
current higher than ISOFT_START_PD, the TLD5190 will latch OFF until the EN/INUVLO pin is toggled. Without any
resistor to VREF the pull-down current decreases until VSOFT_START_RESET (P_6.4.22) is reached (the pull-up
current source turns on again). If the fault condition hasn’t been removed until VSOFT_START_LOFF (P_6.4.21) is
reached, the pull-down current source ISOFT_START_PD turns on again initiating a new cycle. This will continue
until the fault is removed.
If an input overvoltage is detected the soft start is kept low as long as the overvoltage remains.
At first PWMI rise after EN = High, the internal PWM is extended till one of the 2 following condition is reached:
•
•
Until VSOFT_START exceeds VSoft_Start1,2_LOFF
Until VFBH-FBL exceeds VFBH_FBL_OL
Datasheet
18
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
8 clock cycles
VFB1
VVFB_S2G
SWN
SHORT
DETECTION
I
SOFT_START_PU
SOFT_START_PD
ISOFT_START
VSOFT_START
I
V
soft_Start_reg
V
soft_Start_LOFF
Vsoft_Start_RESET
Application
Status
Normal
Operation
Normal
Operation
Vout shorted to GND
Event
Vout short to GND
applied
Event
Vout short to GND
removed
Figure 8
Soft Start timing diagram on a short to ground detected by the VFB pin
6.3
Switching Frequency setup
The switching frequency can be set from 200 kHz to 700 kHz by an external resistor connected from the FREQ
pin to GND or by supplying a sync signal as specified in chapter Chapter 11.2. Select the switching frequency
with an external resistor according to the graph in Figure 9 or the following approximate formulas.
fSW [kHz] = 5375*(RFREQ[kΩ])−0.8
RFREQ[kΩ]= 46023*(fSW[kHz])−1.25
(6.2)
(6.3)
Figure 9
Switching Frequency fSW versus Frequency Select Resistor to GND RFREQ
Datasheet
19
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
6.4
Operation of 4 switches H-Bridge architecture
Inductor LOUT connects in an H-Bridge configuration with 4 external N channel MOSFETs (M1, M2, M3 & M4)
•
•
•
Transistor M1 and M3 provides a path between VIN and ground through LOUT in one direction (Driven by top
and bottom gate drivers HSGD1 and LSGD2)
Transistor M2 and M4 provides a path between VOUT and ground through LOUT in the other direction
(Driven by top and bottom gate drivers HSGD2 and LSGD1)
Nodes SWN1, SWN2, voltage across RSWCS, input and load currents are also monitored by the TLD5190
BOOST
BUCK-BOOST
BUCK
MODE
MODE
MODE
M1
M2
M3
M4
ON
PWM
PWM
PWM
PWM
PWM
PWM
OFF
ON
OFF
PWM
PWM
Figure 10 4 switches H-Bridge architecture Transistor Status summary
VIN
VOUT
M1
M4
M3
HSGD2
LSGD2
HSGD1
LSGD1
LOUT
SWN1
SWN2
M2
RSWCS
Figure 11 4 switches H-Bridge architecture overview
6.4.1
Boost mode (VIN < VOUT)
•
•
•
M1 is always ON, M2 is always OFF
Every cycle M3 turns ON first and inductor current is sensed (peak current control)
M3 stays ON until the upper reference threshold is reached across RSWCS (Energizing)
Datasheet
20
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
•
•
M3 turns OFF, M4 turns ON until the end of the cycle (Recirculation)
Switches M3 and M4 alternate, behaving like a typical synchronous boost Regulator (see Figure 12)
VIN
VOUT
ON
M1
M4
(2) Recirculation
ILOUT
HSGD2
LSGD2
HSGD1
LSGD1
LOUT
SWN1
SWN2
(1) Energizing
OFF
M2
M3
t
M1
+
M4
M1
+
M4
M1
+
M4
M1+M3
M1+M3
M1+M3
RSWCS
Figure 12 4 switches H-Bridge architecture in BOOST mode
Simplified comparison of 4 switches H-Bridge architecture to traditional asynchronous Boost approach.
•
•
•
M2 is always OFF in this mode (open)
M1 is always ON in this mode (closed connection of inductor to VIN)
M4 acts as a synchronous diode, with significantly lower conduction power losses (I2 x RDSON vs. 0.7 V x I)
Note:
Diode is source of losses and lower system efficiency!
LOUT
LOUT
D1
M1 (ON)
M4
VIN
VOUT
VOUT
VIN
M2
(OFF)
HSGD2
LSGD2
HSGD1
M3
M3
LSGD1
RSWCS
RSWCS
b) standard asynchronous BOOSTER
a) 4 switch architecture BOOSTER
Figure 13 4 switches H-Bridge architecture in BOOST mode compared to standard async Booster
6.4.2
Buck mode (VIN > VOUT)
•
•
•
M4 is always ON, M3 is always OFF
Every cycle M2 turns ON and inductor current is sensed (valley current control)
M2 stays ON until the lower reference threshold is reached across RSWCS (Recirculation)
Datasheet
21
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
•
•
M2 turns OFF, M1 turns ON until the end of the cycle (Energizing)
Switches M1 and M2 alternate, behaving like a typical synchronous BUCK Regulator (see Figure 14)
VIN
VOUT
ILOUT
ON
M1
M4
(3) Energizing
HSGD2
LSGD2
HSGD1
LSGD1
LOUT
SWN1
SWN2
(4) Recirculation
t
OFF
M1
+
M4
M1
+
M4
M1
+
M4
M2
M3
M2+M4
M2+M4
M2+M4
RSWCS
Figure 14 4 switches H-Bridge architecture in BUCK mode
Simplified comparison of 4 switches architecture to traditional asynchronous Buck approach.
•
•
•
M3 is always OFF in this mode (open).
M4 is always ON in this mode (closed connection inductor to VOUT).
M2 acts as a synchronous diode, with significantly lower conduction losses (I2 x RDSON vs. 0.7 V x I)
LOUT
M4
(ON)
LOUT
M1
M1
VIN
VOUT
VIN
VOUT
HSGD1
LSGD1
M3
(OFF)
HSGD1
HSGD2
M2
LSGD2
D1
RSWCS
b) standard asynchronous BUCK
a) 4 switch architecture BUCK
Figure 15 4 switches H-Bridge architecture in BUCK mode compared to standard async BUCK
6.4.3
Buck-Boost mode (VIN ~ VOUT)
•
•
When VIN is close to VOUT the controller is in Buck-Boost operation
All switches are switching in buck-boost operation. The direct energy transfer from the Input to the output
(M1+M4 = ON) is beneficial to reduce ripple current and improves the energy efficiency of the Buck-Boost
control scheme
•
The two buck boost waveforms and switching behaviors are displayed in Figure 16 below
Datasheet
22
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
VIN ≤ VOUT
ILOUT
VIN
VOUT
M1
M4
(2) Direct Transfer
HSGD2
LSGD2
HSGD1
LSGD1
(4) Direct Transfer
M1
+
M3
M1
+
M4
M1
+
M4
M1
+
M3
M1
+
M4
M1
+
M4
M1
+
M3
M1
+
M4
M1
+
M4
t
SWN1
SWN2
LOUT
(3) Recirculation
(1) Energizing
VIN ≥ VOUT
ILOUT
M2
M3
RSWCS
M2
+
M1
+
M1
+
M2
+
M1
+
M1
+
M2
+
M1
+
M1
+
t
M4
M4
M4
M4
M4
M4
M4
M4
M4
Figure 16 4 switches H-Bridge architecture in BUCK-BOOST mode
6.5
Flexible current sense
The flexible current sense implementation enables highside and lowside current sensing.
The Figure 17 displays the application examples for the highside and lowside current sense concept.
VIN
VIN
Highside
Sensing
Lowside
Sensing
FBH
FBL
FBH
FBL
Figure 17 Highside and lowside current sensing - TLD5190
Datasheet
23
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
6.6
Programming Output Voltage (Constant Voltage Regulation)
For a voltage regulator, the output voltage can be set by selecting the values RFB1, RFB2 and RFB3 according to
the following Equation (6.4):
⎛
⎞
⎛
⎞
VFBH − FBL
VFBH − FBL
⎜
⎟
⎟
⎜
⎜
⎟
VOUT = IFBH
+
⋅ RFB1
+
− IFBL ⋅ RFB 3 + VFBH − FBL
(6.4)
⎜
⎝
⎟
⎠
RFB 2
RFB 2
⎠
⎝
If Analog dimming is performed, due to the variations on the IFBL (IFBL_HSS (P_6.4.9) and IFBL_LSS (P_6.4.40))
current on the entire voltage spanning, a non linearity on the output voltage may be observed. To minimize
this effect RFBx resistors should be properly dimensioned.
VOUT
RFB1
IFBH
FBH
RFB2
IFBL
FBL
RFB3
Figure 18 Programming Output Voltage (Constant Voltage Regulation)
Datasheet
24
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
6.7
Electrical Characteristics
Table 6
EC Regulator
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Regulator:
V
(FBH-FBL) threshold
V(FBH-FBL) 145.5 150
154.5 mV VSET = 2 V;
P_6.4.1
P_6.4.6
V(FBH-FBL) threshold @ analog
dimming 10%
V(FBH-
10
65
17
-7.5
-45
-
15
20
155
43
-2.5
-20
-
mV VSET = 0.32 V;
FBL)_10
1)
FBH Bias current @ highside
sensing setup
IFBH_HSS
110
30
µA
µA
µA
µA
V
V
= 7 V;
P_6.4.8
P_6.4.9
P_6.4.39
P_6.4.40
P_6.9.1
P_6.9.2
FBL
VFBH - FBL = 150 mV;
1)
FBL Bias current @ highside
sensing setup
IFBL_HSS
IFBH_LSS
IFBL_LSS
V
= 7 V;
FBL
VFBH - FBL = 150 mV;
1)
FBH Bias current @ lowside
sensing setup
-4
V
= 0 V;
FBL
VFBH - FBL = 150 mV;
1)
FBL Bias current @ lowside
sensing setup
-30
2
V
= 0 V;
FBL
VFBH - FBL = 150 mV;
1)
FBH-FBL High Side sensing
entry threshold
VFBH_HSS_in
V
V
increasing;
FBH1
c
1)
FBH-FBL High Side sensing exit VFBH_HSS_d
-
1.75
-
V
decreasing;
FBH
threshold
ec
1)
OUT Current sense Amplifier gm IFBxgm
–
890
1.4
91
–
µS
V
P_6.4.10
P_6.4.11
P_6.4.12
Output Monitor Voltage
VIOUTMON 1.33
1.47
93
VFBH - FBL = 150 mV;
1)
Maximum BOOST Duty Cycle
DBOOST_MA 89
%
f = 300 kHZ;
sw
X
Input Current Sense threshold VIIN1-IIN2
VIIN1-IIN2
46
–
50
54
mV
mS
V
–
P_6.4.13
P_6.4.14
P_6.4.15
1)
Input Current sense Amplifier IIN_gm
gm
2.12
1
–
1)
Input current Monitor Voltage VIINMON
0.95
1.05
60
V
= 50 mV;
IIN1 - IIN2
V
1)
IIN1 = VVIN(ON) to 55 V;
Switch Peak Over Current
Threshold - BOOST
VSWCS_boost 40
VSWCS_buck -60
50
mV
mV
P_10.8.1
5
1)
Switch Peak Over Current
Threshold - BUCK
-50
-40
P_10.8.1
6
Soft Start
Soft Start pull up current
ISoft_Start_P 22
26
32
µA
µA
VSoft_Start = 1 V;
VSoft_Start = 1 V;
P_6.4.19
P_6.4.20
U
Soft Start pull down current
ISoft_Start_P 2.2
2.6
3.2
D
Datasheet
25
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
Table 6
EC Regulator (cont’d)
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
1.85
Soft Start Latch-OFF Threshold VSoft_Start_L 1.65
1.75
V
V
V
–
P_6.4.21
P_6.4.22
P_6.9.3
OFF
Soft Start Reset Threshold
VSoft_Start_R 0.1
0.2
2
0.3
2.1
–
ESET
Soft Start Voltage during
regulation
VSoft_Start_r 1.9
1)No Faults
eg
Oscillator
Switching Frequency
fSW
285
300
315
kHz Tj = 25°C;
P_6.4.23
RFREQ= 37.4 kΩ;
SYNC Frequency
fSYNC
200
2
–
–
700
–
kHz
V
–
–
P_6.4.24
P_6.4.25
SYNC
VSYNC,ON
Turn On Threshold
SYNC
Turn Off Threshold
VSYNC,OFF
ISYNC,H
–
–
0.8
45
18
V
–
P_6.4.26
P_6.4.62
P_6.4.63
SYNC
High Input Current
15
6
30
12
µA
µA
VSYNC = 2.0 V;
VSYNC = 0.8 V;
SYNC
ISYNC,L
Low Input Current
Gate Driver for external Switch
Gate Driver undervoltage
threshold VBST1,2-
VSWN1,2_UVth
VBST1,2
VSWN1,2_UVt
-
3.4
–
4
V
VBST1,2 - VSWN1,2
decreasing;
P_6.4.64
h
HSGD1,2 NMOS driver on-state RDS(ON_PU) 1.4
2.3
1.2
2.3
1.2
–
3.7
2.2
3.7
1.8
–
Ω
VBST1,2 - VSWN1,2 = 5 V; P_6.4.28
source = 100 mA;
VBST1,2 - VSWN1,2 = 5 V; P_6.4.29
Isink = 100 mA;
resistance (Gate Pull Up)
I
HS
HSGD1,2 NMOS driver on-state RDS(ON_PD) 0.6
Ω
resistance (Gate Pull Down)
HS
LSGD1,2 NMOS driver on-state RDS(ON_PU) 1.4
Ω
VIVCC_EXT = 5 V;
Isource = 100 mA;
P_6.4.30
P_6.4.31
P_6.4.32
resistance (Gate Pull Up)
LS
LSGD1,2 NMOS driver on-state RDS(ON_PD)L 0.4
Ω
VIVCC_EXT = 5 V;
Isink = 100 mA;
1)
resistance (Gate Pull Down)
S
HSGD1,2 Gate Driver peak
sourcing current
IHSGD1,2_SR 380
mA
VHSGD1,2 - VSWN1,2 = 1 V
C
to 4 V;
V
BST1,2 - VSWN1,2 = 5 V
1)
HSGD1,2 Gate Driver peak
sinking current
IHSGD1,2_SN 410
–
–
mA
P_6.4.33
VHSGD1,2 - VSWN1,2 = 4 V
K
to 1 V;
VBST1,2 - VSWN1,2 = 5 V
Datasheet
26
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Regulator Description
Table 6
EC Regulator (cont’d)
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND (unless otherwise specified)
Parameter
Symbol
Values
Typ.
–
Unit Note or
Test Condition
Number
P_6.4.34
Min.
Max.
–
1)
LSGD1,2 Gate Driver peak
sourcing current
ILSGD1,2_SRC 370
mA
VLSGD1,2 = 1 V to 4 V;
V
IVCC_EXT = 5 V;
1)
LSGD1,2 Gate Driver peak
sinking current
ILSGD1,2_SN 550
–
–
mA
P_6.4.35
VLSGD1,2 = 4 V to 1 V;
K
V
IVCC_EXT = 5 V;
1)
LSGD1,2 OFF to HSGD1,2 ON
delay
tLSOFF-
15
35
30
60
40
75
ns
ns
P_6.4.36
P_6.4.37
HSON_delay
1)
HSGD1,2 OFF to LSGD1,2 ON
delay
tHSOFF-
LSON_delay
1) Not subject to production test, specified by design
Datasheet
27
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Digital Dimming Function
7
Digital Dimming Function
PWM dimming is adopted to vary LEDs brightness with greatly reduced chromaticity shift. PWM dimming
achieves brightness reduction by varying the duty cycle of a constant current in the LED string.
7.1
Description
A PWM signal can be transmitted to the TLD5190 as described below.
PWM via direct interface
The PWMI pin can be fed with a pulse width modulated (PWM) signals, this enables when HIGH and disables
when LOW the gate drivers of the main switches.
µC
PWM
Digital dimming
PWMI
VSS AGND
Figure 19 Digital Dimming Overview
To avoid unwanted output overshoots due to not soft start assisted startups, PWM dimming in LOW state
should not be used to suspend the output current for long time intervals. To stop in a safe manner
EN/INUVLO=LOW can be used.
Datasheet
28
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Digital Dimming Function
tACTIVE
VEN/INUVLO
VEN/INUVLOth
t
t
VIVCC_EXT_RTH,d
+VIVCCX_HYST
tPWMI,H
TPWMI
VPWMI
VPWMI,ON
VPWMI,OFF
t
Switching
activity
t
t
ILED
VIOUTMON
200mV
t
Softstart
Normal
Gate ON
Diag ON
Normal
Gate ON
Dim
Normal
Gate ON
Diag ON
Dim
Dim
Power ON
Gate OFF
Diag OFF
Gate OFF
Diag OFF
Gate OFF
Diag OFF
Diagnosis ON
Figure 20 Timing Diagram LED Dimming and Start up behavior example ( VVIN stable in the functional range
and not during startup)
Datasheet
29
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Digital Dimming Function
7.2
Electrical Characteristics
Table 7
EC Digital Dimming
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or Test Condition Number
Min.
Max.
PWMI Input:
PWMI
Turn On Threshold
VPWMI,ON
VPWMI,OFF
IPWMI,H
2
–
–
V
–
P_7.2.1
P_7.2.2
P_7.2.4
P_7.2.5
PWMI
Turn Off Threshold
–
–
0.8
45
18
V
–
PWMI
High Input Current
15
6
30
12
µA
µA
VPWMI = 2.0 V;
VPWMI = 0.8 V;
PWMI
IPWMI,L
Low Input Current
Datasheet
30
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Analog Dimming
8
Analog Dimming
The analog dimming feature allows further control of the output current. This approach is used to:
•
•
Reduce the default current in a narrow range to adjust to different binning classes of the used LEDs.
Adjust the load current to enable the usage of one hardware for several LED types where different current
levels are required.
•
•
Reduce the current at high temperatures (protect LEDs from overtemperature).
Reduce the current at low input voltages (for example, cranking-pulse breakdown of the supply or power
derating).
8.1
Description
The analog dimming feature is adjusting the average load current level via the control of the feedback error
Amplifier voltage (VFBH-FBL).
The SET pin is used to adjust the mean output current/voltage. The VSET range where analog dimming is
enabled is from 200 mV to 1.5 V. Different application scenarios are described in Figure 22.
Using the SET pin to adjust the output current:
For the calculation of the output current IOUT the following Equation (8.1) is used:
VFBH − VFBL
IOUT
=
(8.1)
RFB
A decrease of the average output current can be achieved by controlling the voltage at the SET pin (VSET
between 0.2 V and 1.4 V. The mathematical relation is given in the Equation (8.2) below:
)
V SET − 200 mV
I OUT
=
(8.2)
R FB ⋅ 8
If VSET is 200 mV (typ.) the LED current is only determined by the internal offset voltages of the comparators.
To assure the switching activity is stopped and IOUT = 0, VSET has to be < 100 mV, see Figure 21.
VFBH-FBL
150mV
100mV
0mV
VSET
200mV
1.4V 1.5V
Analog Dimming
Disabled
Analog Dimming Enabled
Figure 21 Analog Dimming Overview
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Analog Dimming
Multi-purpose usage of the Analog dimming feature
1) A μC integrated digital analog converter (DAC) output or a stand alone DAC can be used to supply the SET
pin of the TLD5190.
2) The usage of an external resistor divider connected between VREF (accurate regulated supply output) SET
and GND can be chosen for systems without μC on board. The concept allows control of the LED current by
placing low power resistors.
3) Furthermore a temperature sensitive resistor (Thermistor) to protect the LED loads from thermal
destruction can be connected.
4) If the analog dimming feature is not needed, the SET pin should be connected to the VREF pin.
5) Instead of a DAC, the μC can provide a PWM signal and an external R-C filter to produce a constant voltage
for the analog dimming. The voltage level depends on the PWM frequency (fPWM) and duty cycle which can be
controlled by the μc software after reading the coding resistor placed on the LED module.
µC_supply
1
2
D/A-Output
µC
SET
VREF
SET
CREF
RSET2
VSET
GND
RSET1
GND
VSET
Cfilter
3
4
VREF
SET
VREF
SET
CREF
CREF
Rthermistor
Rfilter
RSET1
GND
VSET
GND
Cfilter
VSET ~ VREF
Cfilter
µC_supply
PWM output
5
PWM
SET
Rfilter
µC
(e.g. XC2000)
Cfilter
VSET
GND
Figure 22 Different use cases for analog dimming pin SET
8.2
Electrical Characteristics
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Analog Dimming
Table 8
EC Analog Dimming
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Source current on SET Pin
ISET_source
–
–
1
µA
V
= 0.2 V to 1.4 V; P_8.3.4
SET
1) Specified by design: not subject to production test.
Datasheet
33
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Linear Regulator
9
Linear Regulator
The TLD5190 features an integrated voltage regulator for the supply of the internal gate driver stages.
Furthermore an external voltage regulator can be connected to the IVCC_EXT pin to achieve an alternative
gate driver supply if required.
9.1
IVCC Description
When the IVCC pin is connected to the IVCC_EXT pin, the internal linear voltage regulator supplies the internal
gate drivers with a typical voltage of 5 V and current up to ILIM (P_9.2.2). An external output capacitor with low
ESR is required on pin IVCC for stability and buffering transient load currents. During normal operation the
external MOSFET switches will draw transient currents from the linear regulator and its output capacitor
(Figure 23, drawing A). Proper sizing of the output capacitor must be considered to supply sufficient peak
current to the gate of the external MOSFET switches. A minimum capacitance value is given in parameter CIVCC
(P_9.2.4).
Alternative IVCC_EXT Supply Concept:
The IVCC_EXT pin can be used for an external voltage supply to alternatively supply the MOSFET Gate drivers.
This concept is beneficial in the high input voltage range to avoid power losses in the IC (Figure 23, drawing B).
Integrated undervoltage protection for the external switching MOSFET:
An integrated undervoltage reset threshold circuit monitors the linear regulator output voltage. This
undervoltage reset threshold circuit will turn OFF the gate drivers in case the IVCC or IVCC_EXT voltage falls
below their undervoltage Reset switch OFF Thresholds VIVCC_RTH,d (P_9.2.9) and VIVCC_EXT_RTH,d (P_9.2.5).
The Undervoltage Reset threshold for the IVCC and the IVCC_EXT pins help to protect the external switches
from excessive power dissipation by ensuring the gate drive voltage is sufficient to enhance the gate of the
external logic level N-channel MOSFETs.
A
B
IVCC
Power
IVCC
Internal
VREG
Internal
VREG
VIN
VIN
Power
On Reset
On Reset
External
VREG
IVCC_EXT
IVCC_EXT
Gate Drivers
Gate Drivers
Figure 23 Voltage Regulator Configurations
Datasheet
34
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Linear Regulator
9.2
Electrical Characteristics
Table 9
EC Line Regulator
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or Test Condition Number
Min.
Max.
IVCC
Output Voltage
VIVCC
ILIM
4.8
70
–
5
5.2
V
VIN= 13.5 V;
0.1 mA ≤ IIVCC ≤ 50 mA;
1)
P_9.2.1
P_9.2.2
P_9.2.3
Output Current
Limitation
90
200
110
350
mA
mV
VIVCC = 4 V;
VIN = 5 V;
Drop out Voltage (VIN -
VDR
VIVCC
)
IIVCC = 10 mA;
1) 2)
IVCC Buffer Capacitor
CIVCC
10
–
–
µF
V
P_9.2.4
P_9.2.5
3)
IVCC_EXT Undervoltage VIVCC_EXT_R 3.7
3.9
4.1
Reset switch OFF
VIVCC_EXT decreasing;
TH,d
Threshold
3)
IVCC Undervoltage Reset VIVCC_RTH,d 3.7
switch OFF Threshold
3.9
0.33
2
4.1
V
V
V
P_9.2.9
P_9.2.6
P_9.2.8
VIVCC decreasing;
VIVCC increasing;
IVCC and IVCC_EXT
Undervoltage Hysterisis
VIVCCX_HYST 0.3
0.36
2.06
V
IVCC_EXT increasing;
VREF voltage
VREF
1.94
0 ≤ IVREF ≤ 200 µA;
1) Not subject to production test, specified by design
2) Minimum value given is needed for regulator stability; application might need higher capacitance than the minimum.
Use capacitors with LOW ESR.
3) Selection of external switching MOSFET is crucial. VIVCC_EXT_RTH,d and VIVCC_RTH,d min. as worst case VGS must be
considered.
Datasheet
35
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
10
Protection and Diagnostic Functions
10.1
Description
The TLD5190 has integrated circuits to diagnose and protect against overvoltage, open load, short circuits of
the load and overtemperature faults.
In IDLE state, only the Over temperature Shut Down, Over Temperature Warning, IVCC or IVCC_EXT
Undervoltage Monitor or VEN/INUVLO Undervoltage Monitor are reported according to specifications.
In Figure 24 a summary of the protection, diagnostic and monitor functions is displayed.
Protection and Diagnostic
Overvoltages
EF1, EF2
Open Load
No output current
OR
Short at the Load
Linear Regulators
OFF
(only IVCC disabled
Device
Overtemperature
OR
in case of
Input
overtemperature)
Undervoltage
Monitoring
IOUTMON
IINMON
IOUT
IIN
KILIS Factor 8
KILIS Factor 20
Figure 24 Protection, Diagnostic and Monitoring Overview - TLD5190
Input
Condition
Open Load /
Overvoltages
Output
Level*
False
True
EF1
H
H
EF2
H
L
Gate Drivers
IVCC
Active
Active
Sw*
L
False
True
False
True
H
L
H
L
H
H
H
L
Sw*
L
Sw*
L
Active
Active
Active
Shutdown
Shorted LED fault
Overtemperature
*Note:
Sw = Switching
False = Condition does not exist
True = Condition does exist
Figure 25 Diagnostic Truth Table - TLD5190
Note:
A device Overtemperature event overrules all other fault events!
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
10.2
Output Overvoltage, Open Load, Short circuit protection
The VFB pin measures the voltage on the application output and in accordance with the populated resistor
divider, short to ground, open load and output overvoltage thresholds are set. Refer to Figure 26 for more
details.
VIN
CIVCC
IVCC
D2
D1
VOUT
RFB
BST1
BST2
CBST1 CBST2
M1
M2
M4
VVFB_OVTH
VVFB_OL,rise
RVFBH
COUT
HSGD1
SWN1
LOUT
M3
LSGD1
SWCS
RVFBL
VVFB_S2G
RSWCS
SGND
PGND
LSGD2
SWN2
HSGD2
VFB
FBH
FBL
Figure 26 VFB Protection Pin - Overview
10.2.1
Short Circuit protection
The device detects a short circuit at the output if this condition is verified:
The pin VFB falls below the threshold voltage VVFB_S2G for at least 8 clock cycles
•
During the rising edge of the Soft Start the short circuit detection via VFB is ignored until VSOFT_START_LOFF (see
Figure 8).
A voltage divider between VOUT, VFB pin and AGND is used to adjust the application short circuit thresholds
following Equation (10.1).
RVFBH + RVFBL
Vshort
= VVFB
⋅
(10.1)
_ led
_ S 2 G
RVFBL
The TLD5190 provides an open-drain status pin, EF1, which pulls low when the short circuit is detected. The
only time the FB pin will be below VVFB_S2G is during start-up or if the LEDs are shorted. During start-up the
TLD5190 ignores the detection of a short circuit or an open load until the soft-start capacitor reaches 1.75 V.
To prevent false tripping after startup, a large enough soft-start capacitor must be used to allow the output to
get up to approximately 50% of the final value.
Note:
If the short circuit condition disappears, the device will re-start with the soft start routine as
described in Chapter 6.2.
10.2.2
Overvoltage Protection
A voltage divider between VOUT, VFB pin and AGND is used to adjust the overvoltage protection threshold (refer
to Figure 26).
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
To fix the overvoltage protection threshold the following Equation (10.2) is used:
RVFBH + RVFBL
VOUT _ OV _ protected =VVFB _ OVTH
⋅
(10.2)
RVFBL
In case of overvoltage event at the output, the open-drain status pin EF2 will toggle to LOW, while EF1 will stay
at HIGH. After the overvoltage event disappeared the device will auto restart and the status pin EF2 will toggle
to HIGH.
10.2.3
Open Load Protection
To reliably detect an open load event, two conditions need to be observed:
1) Voltage threshold: VVFB > VVFB_OL,rise
2) Output current information: V(FBH-FBL) < VFBH_FBL_OL
During the rising edge of the Soft Start the open load detection is ignored until VSOFT_START_LOFF
.
The TLD5190 provides an open-drain status pin, EF2, which pulls low when the VFB pin is above VVFB_OL,rise
threshold and the voltage across V(FBH-FBL) is less than VFBH_FBL_OL. If the open LED clamp voltage is programmed
correctly using the VFB pin, then the VFB pin should never exceed 1.28 V (VVFBOL,fall when the LEDs are
connected.
After an Open Load error the TLD5190 is autorestarting the output control accordingly to the implemented
Softstart routine. An Open Load error causes an increase of the output voltage as well. An Overvoltage
condition could be reported in combination with an Open Load error (in general, multiple error detection may
happen if more error detection thresholds are reached during the autorestart funcion, as possible
consequence of reactive behavior at the output node during open load).
The COMP capacitor is discharged during an Open Load condition to prevent spikes if load reconnects. This
measure could artificially generate Short Circuit detections after open loads events.
10.3
Input voltage monitoring, protection and power derating
Input overvoltage and undervoltage shutdown levels can both be defined through an external resistor divider,
as shown in Figure 27.
Both INOVLO and EN/INUVLO pin voltages are internally compared to their respective thresholds by means of
hysteretic comparators.
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
Neglecting the hysteresis, the following equations hold:
⎛
⎞
R1
⎜
⎟
⎟
UVth = 1 +
⋅ EN / INUVLO th
(10.3)
(10.4)
⎜
⎝
R2 + R3
⎠
⎛
⎞
R1 + R2
⎜
⎟
⎟
OVth = 1 +
⋅ INOVLO
th
⎜
⎝
R3
⎠
VOUT ⋅ IOUT
PIN
=
(10.5)
η
⎛
⎞
VOUT ⋅ IOUT
⎜
⎜
⎟
⎟
I IN
⎝
⎠
(10.6)
(10.7)
(10.8)
VIN _ boundary
=
η
V IN 1− IN 2
I IN
=
R IN
VFBH −FBL
IOUT
=
RFB
Figure 27 Input Voltage Protection
In case of overvoltage event at the input, the open-drain status pin EF2 will toggle to LOW, while EF1 will stay
at HIGH. The softstart capacitor will be discharged by an internal pull down switch.
After the overvoltage event disappeared the device will auto restart with the softstart function, and the status
pin EF2 will toggle to HIGH.
10.4
Input current Monitoring and Limiter
The two inputs (IIN1, IIN2) can be used to limit and monitor the Input current (Block A1 and A7 in Figure 7).
Datasheet
39
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
The control loop reduces the Comp voltage when the voltage accross the pins reaches Input Current Sense
threshold VIIN1-IIN2 to keep the input current below IINMax Equation (10.9)
(10.9)
VIIN1 – IIN2
IINMax = ---------------------------
RIIN
The IINMON pin provides a linear indication of the current flowing through the input. The following
Equation (10.10) is applicable:
VIINMON = I IN ⋅ RIN ⋅ 20
(10.10)
Note:
If the RIN value is choosen in a way that the current limitiation is much bigger than the nominal input
current during the application the current measurement becomes inaccurate. Best results for an
accurate current measurement via the VIINMON pin is to set the current limit only slightly above the
specific application related nominal input current.
10.5
Output current Monitoring
The IOUTMON pin provides a linear indication of the current flowing through the LEDs. The following
Equation (10.11) is applicable:
(10.11)
VIOUTMON = 200 mV + IOUT ⋅ RFB ⋅ 8
Datasheet
40
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
10.6
Device Temperature Monitoring
A temperature sensor is integrated on the chip. The temperature monitoring circuit compares the measured
temperature to the shutdown threshold.
If the internal temperature sensor reaches the shut-down temperature, the Gate Drivers plus the IVCC
regulator are shut down as described in Figure 28.
The CLKOUT function is disabled during an overtemperature event and will autorestart when the device
cooled down and IVCC is present again.
Note:
The Device will start up with a soft start routine after a overtemperature condition disappear.
Tj
T
jSD
ΔΤ
TjSO
t
Ta
xSGDx
t
LED
current
t
EF1, EF2
and IVCC
5V
t
Device
OFF
Overtemp
Fault
Overtemp
Fault
Overtemp Overtemp
ON
Fault Fault
Normal Operation
ON
ON
Figure 28 Device Overtemperature Protection Behavior
Datasheet
41
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Protection and Diagnostic Functions
10.7
Electrical Characteristics
Table 10
EC Protection and Diagnosis
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition Number
Min.
0.53
Max.
0.59
Short Circuit Protection
Short to GND threshold
Temperature Protection:
VVFB_S2G
0.563
V
VVFB decreasing;
P_10.8.1
1)
1)
Over Temperature
Shutdown
Tj,SD
160
–
175
10
190
–
°C
°C
P_10.8.4
P_10.8.5
Over Temperature
Tj,SD,hyst
Shutdown Hysteresis
Overvoltage Protection:
VFB Over Voltage
Feedback Threshold
VVFB_OVTH 1.42
1.46
40
1.50
58
V
P_10.8.6
P_10.8.7
Output Over Voltage
Feedback Hysteresis
VVFB_OVTH, 25
mV
Output Voltage
decreasing;
HYS
Open Load and Open Feedback Diagnostics
Open Load rising
Threshold
VVFB_OL,rise 1.29
1.34
15
1.39
22.5
1.33
V
VFBH-FBL = 0 V;
VFB = 1.4 V;
P_10.8.9
P_10.8.10
P_10.8.11
Open Load reference
Voltage VFBH-FBL
VFBH_FBL_O
–
mV
V
L
Open Load falling
Threshold
VVFB_OL,fall 1.23
1.28
VFBH-FBL = 0 V;
Input Overvoltage protection
Input Overvoltage rising VINOVLOth 1.9
Threshold
2
2.1
62
V
–
–
P_10.8.12
P_10.8.13
Input Overvoltage
VINOVLO(hys 18
40
mV
Threshold Hysteresis
t)
Error Flags
EF1,2 Pin Output
Impedance
REF12
–
2.1
–
kΩ
1)Fault Condition
I=100uA
P_10.8.14
1) Specified by design; not subject to production test.
Note:
Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the datasheet. Fault conditions are considered as “outside” normal operating range.
Protection functions are not designed for continuous repetitive operation.
Datasheet
42
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Infineon FLAT SPECTRUM Feature set
11
Infineon FLAT SPECTRUM Feature set
11.1
Description
The Infineon FLAT SPECTRUM feature set has the target to minimize external additional filter circuits. The goal
is to provide several beneficial concepts to provide easy adjustments for EMC improvements after the layout
is already done and the HW designed.
11.2
Synchronization Function
The TLD5190 features a SYNC input pin which can be used by a µC pin to define an oscillator switching
frequency. The µC is responsible to synchronize with various devices by applying appropriate SYNC signals to
the dedicated DC/DC devices in the system. Refer to Figure 29
Note:
The Synchronization function can not be used when the Spread Spectrum is active.
H-Bridge DCDC
MASTER
BUCK-
BOOST
SYNC
GATE
LOGIC
CONTROL
e.g. 400kHz
Phaseshift A
H-Bridge DCDC
Slave
BUCK-
BOOST
GATE
SYNC1
SYNC2
defined phase shift between
Outputs of different devices
SYNC
µC
LOGIC
INPUT
e.g. 400kHz
Phaseshift B
CONTROL
Figure 29 Synchronization Overview
11.3
CLKOUT Function
The CLKOUT pin provides an in-phase clock signal provided by the internal oscillator. This signal can be used
to synchronize two devices for extending output power capability.
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Infineon FLAT SPECTRUM Feature set
DCDC
MASTER
BUCK-
BOOST
GATE
OUTPUT
LOGIC
CONTROL
CLKOUT
DCDC
Slave
BUCK-
BOOST
GATE
SYNC
LOGIC
INPUT
CONTROL
Figure 30 CLKOUT Overview
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Infineon FLAT SPECTRUM Feature set
11.4
Spread Spectrum
The Spread Spectrum modulation technique significantly improves the lower frequency range of the
spectrum (f < 30 MHz).
By using the spread spectrum technique, it is possible to optimize the input filter only for the peak limits, and
also pass the average limits (average emission limits are -20dB lower than the peak emission limits). By using
spread spectrum, the need for low ESR input capacitors is relaxed because the input capacitor series resistor
is important for the low frequency filter characteristic. This can be an economic benefit if there is a strong
requirement for average limits.
The TLD5190 features a built in Spread Spectrum function which can be enabled via an external Pin
(SPREAD_SPECTRUM = HIGH). The modulation frequency fFM, P_11.6.3 and the deviation frequency fdev
,
P_11.6.2 are internally fixed. Refer to Figure 31 for more details.
Note:
The Spread Spectrum function can not be used when the synchronization pin is used.
fSW
fdev
t
1
f
FM
Figure 31 Spread Spectrum Overview
Datasheet
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Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Infineon FLAT SPECTRUM Feature set
11.5
EMC optimized schematic
Figure 32 below displays the Application circuit with additional external components for improved EMC
behavior.
LPI
CIN2
VIN
RIIN
DVS
Alternative
external
VREG supply
CPI1 CPI2
CPI3 CPI4
IVCC_EXT
IVCC
CIVCC
VIN
IIN2
CIN1
D1
LPO
D2
RFB
Rfilter
Cfilter
RM4
BST1
BST2
COUT
DHSG1
RM1
CBST2
R1
R2
R3
M4
IIN1
EN/INUVLO
M1
RVFBH
CBST1
HSGD1
SWN1
CM1
RM2
CM4
RHSG1
CPO1 CPO2
CPO3 CPO4
LOUT
RHSG2
M3
RVFBL
DLSG1
INOVLO
COMP
RM3
CM3
M2
CCOMP
RCOMP
LSGD1
SWCS
CM2
RLSG1
CSOFT_START
RFREQ
DLSG2
RLSG2
DHSG2
SOFT_START
FREQ
RSWCS
4LED in
series /
1A
SGND
PGND1
PGND2
µC SYNC signal
Digital dimminig
SYNC
PWMI
LSGD2
IINMON
IOUTMON
CLKOUT
Spread Spectrum
Advanced monitoring via µC
SYNC of other DCDC
SWN2
HSGD2
VFB
Spread Spectrum ON /OFF
VREF
SET
EF1
FBH
FBL
CREF
CFBH-FBL
CFBH
Analog dimminig
Errorflag monitoring
VSS AGND
EF2
CFBL
Figure 32 Application Drawing Including Additional Components for an Improved EMC Behavior
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
Datasheet
46
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Infineon FLAT SPECTRUM Feature set
11.6
Electrical Characteristics
Table 11
EC Spread Spectrum
VIN = 8 V to 36 V, TJ = -40°C to +150°C, all voltages with respect to AGND; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
–
Max.
–
Spread Spectrum Parameters
Frequency Deviation
1)
fdev
±16
12
%
P_11.6.2
P_11.6.3
SPREAD_SPECT
RUM = HIGH;;
1)
Frequency Modulation
fFM
–
–
kHz
SPREAD_SPECT
RUM = HIGH;
Input Characteristics (SPREAD_SPECTRUM)
SPREAD_SPECTRUM
Turn On Threshold
VSPREAD_SPECT
2
–
–
–
V
–
–
P_11.6.5
P_11.6.6
RUM,ON
SPREAD_SPECTRUM
Turn Off Threshold
VSPREAD_SPECT
–
0.8
45
18
V
RUM,OFF
SPREAD_SPECTRUM
High Input Current
ISPREAD_SPECT 15
30
12
µA
µA
VSPREAD_SPECTRUM = P_11.6.8
2.0 V;
RUM,H
SPREAD_SPECTRUM
Low Input Current
ISPREAD_SPECT
6
0
VSPREAD_SPECTRUM = P_11.6.9
0.8 V;
RUM,L
Output Characteristics (CLKOUT)
L level output voltage
VCLKOUT(L)
VCLKOUT(H)
–
–
0.4
V
V
ICLKOUT = -2 mA;
ICLKOUT = 2 mA;
P_11.6.10
P_11.6.11
H level output voltage
VIVCC
-
VIVCC
0.4 V
1) Specified by design; not subject to production test.
Datasheet
47
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
12
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
CIN2
VIN
RIIN
Alternative
external
VREG supply
CIVCC
IVCC_ext
IVCC
VIN
IIN2
CIN1
D2
D1
COUT2
COUT3
BST1
BST2
RFB
Rfilter
Cfilter
CBST1 CBST2
COUT1
M1
M2
M4
IIN1
EN/INUVLO
HSGD1
SWN1
LOUT
INOVLO
M3
CCOMP
LSGD1
SWCS
RCOMP
COMP
CSOFT_START
SOFT_START
High
Power
LED Load
RFREQ
FREQ
SGND
SYNC of other DCDC
CLKOUT
SYNC
PGND1
PGND2
LSGD2
SWN2
HSGD2
VFB
µC SYNC signal
RSYNC
Spread Spectrum ON/OFF
Digital dimminig
Spread_spectrum
PWMI
RPWMI
IVCC_ext
VREF
SET
CREF
FBH
FBL
RSET
Analog dimminig
RSENSE
RSENSE
IINMON
IOUTMON
Advanced monitoring
EF1
EF2
Errorflag monitoring
VSS AGND
Figure 33 Application Drawing - TLD5190 as current regulator
Table 12
BOM - TLD5190 as current regulator (IOUT = 1 A, fSW = 300 kHz)
Reference Designator
Value
Manufacturer
--
Part Number
BAT46WJ
X7R
Type
D1 , D2
BAT46WJ
1 µF, 100 V
4.7 µF, 100 V
470 nF, 6.3 V
22 nF, 16 V
22 nF, 16 V
4.7 µF, 100 V
100 nF, 100 V
10 µF , 10 V
100 nF, 16 V
--
Diode
CIN1
TDK
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
IC
CIN2
TDK
X7R
Cfilter
TDK
X7R
CCOMP
TDK
X7R
CSOFT_START
COUT1
COUT2 , COUT3 , CREF
CIV
BST1 , CBST2
TDK
X7R
TDK
X7R
TDK
X7R
TDK
X7R
C
TDK
X7R
IC1
Infineon
Coilcraft
Panasonic
Panasonic
Panasonic
TLD5190
LOUT
Rfilter
RFB
10 µH
XAL1010-103MEC
Inductor
Resistor
Resistor
Resistor
50 Ω, 1%
--
--
--
0.150 Ω, 1%
0.003 Ω, 1%
RIN
Datasheet
48
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
Table 12
BOM - TLD5190 as current regulator (IOUT = 1 A, fSW = 300 kHz)
Reference Designator
R1 , R2 , R3 , REN , RPWMI
Value
Manufacturer
Panasonic
Part Number
--
Type
,
XX kΩ, 1%
Resistor
RSense1 , RSense2 , RSYNC
,
REF1 , REF2 , RSET
R
VFBL , RVFBH
1.5 kΩ, 56 kΩ, 1%
0 Ω
Panasonic
Panasonic
Panasonic
Panasonic
Infineon
--
Resistor
Resistor
Resistor
Resistor
Transistor
RCOMP
--
RFREQ
37.4 kΩ, 1%
0.005 Ω, 1%
--
RSWCS
ERJB1CFRO5U
IPG20N10S4L-35
M1 , M2 , M3 , M4
Dual MOSFET:
100 V / 35 mΩ, N-ch
CIN2
VIN
RIIN
Alternative
external
VREG supply
CIVCC
IVCC_ext
VIN
IIN2
CIN1
IVCC
D2
D1
COUT3
COUT2
BST1
BST2
Rfilter
Cfilter
CBST1 CBST2
COUT1
VOUT
M1
M2
M4
IIN1
EN/INUVLO
HSGD1
SWN1
LOUT
INOVLO
M3
CCOMP
LSGD1
SWCS
RCOMP
CSS
COMP
SS
RFREQ
FREQ
SGND
PGND1
PGND2
SYNC of other DCDC
CLKOUT
SYNC
CFF
µC SYNC signal
RSYNC
Spread Spectrum ON/OFF
Digital dimminig
Spread_spectrum
PWMI
LSGD2
SWN2
HSGD2
VFB
RPWMI
IVCC_ext
VREF
SET
CREF
FBH
RSET
Analog dimminig
RSENSE
RSENSE
IINMON
IOUTMON
Advanced monitoring
FBL
EF1
EF2
Errorflag monitoring
VSS AGND
Figure 34 Application Drawing - TLD5190 as 10V voltage regulator
Table 13
BOM - TLD5190 as voltage regulator (IOUT = 1 A, fSW = 300 kHz)
Reference Designator
Value
Manufacturer
--
Part Number
BAT46WJ
X7R
Type
D1 , D2
CIN1
BAT46WJ
Diode
1 µF, 100 V
4.7 µF, 100 V
470 nF, 6.3 V
22 nF, 16 V
10 nF, 50 V
22 nF, 16 V
4.7 µF, 100 V
TDK
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
CIN2
TDK
X7R
Cfilter
TDK
X7R
CCOMP
CFF
TDK
X7R
TDK
X7R
CSOFT_START
COUT1
TDK
X7R
TDK
X7R
Datasheet
49
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
Table 13
BOM - TLD5190 as voltage regulator (IOUT = 1 A, fSW = 300 kHz)
Reference Designator
COUT2 , COUT3 , CREF
CIVCC
Value
Manufacturer
TDK
Part Number
Type
100 nF, 100 V
10 µF , 10 V
100 nF, 16 V
--
X7R
Capacitor
Capacitor
Capacitor
IC
TDK
X7R
CBST1 , CBST2
TDK
X7R
IC1
Infineon
Coilcraft
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
TLD5190
LOUT
10 µH
XAL1010-103MEC
Inductor
Resistor
Resistor
Resistor
Resistor
Resistor
Rfilter
50 Ω, 1%
--
--
--
--
--
RFB2 , RFB3
150Ω, 10.1kΩ, 1%
1.5 kΩ, 1%
0.003 Ω, 1%
XX kΩ, 1%
RFF
RIN
R1 , R2 , R3 , REN , RPWMI
,
RSense1 , RSense2 , RSYNC
,
REF1 , REF2 , RSET
R
VFBL , RVFBH
1.5 kΩ, 56 kΩ, 1%
0 Ω
Panasonic
Panasonic
Panasonic
Panasonic
Infineon
--
Resistor
Resistor
Resistor
Resistor
Transistor
RCOMP
--
RFREQ
37.4 kΩ, 1%
0.005 Ω, 1%
--
RSWCS
ERJB1CFRO5U
IPG20N10S4L-35
M1 , M2 , M3 , M4
Dual MOSFET:
100 V / 35 mΩ, N-ch
Datasheet
50
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
12.1
Further Application Information
Typical Performance Characteristics of Device
TJꢁ=ꢁ25°C,ꢁVIN=12Vꢁunlessꢁotherwiseꢁspecified
IVCCꢁDropoutꢁvsꢁCurrentꢁ
IVCCꢁVoltageꢁvsꢁTemperature
5,20
5,15
5,10
5,05
5,00
4,95
4,90
4,85
4,80
2,5
2
IIVCC=10mA
Tj=ꢀ40°C
Tj=150°C
Tj=25°C
1,5
1
0,5
0
0
10
20
30
40
50
ꢀ40
10
60
110
LDOꢁcurrentꢁ[mA]
Temperatureꢁ[°C]
IVCCꢁLoadꢁregulationꢁ
V(FBHꢀFBL)ꢁThresholdꢁvsꢁVFBH
5,2
154
153
152
151
150
149
148
147
146
5,15
5,1
AnalogꢁDim.ꢁ=ꢁ100%
5,05
5
4,95
4,9
4,85
4,8
0
10
20
30
40
50
0
10
20
30
40
50
60
IIVCC[mA]
VFBHꢁ[V]
V(FBHꢀFBL)ꢁThresholdꢁvsꢁTemp
IOUTMONꢁVoltageꢁvsꢁTemp
1,44
1,43
1,42
1,41
1,4
154
153
152
151
150
149
148
147
146
AnalogꢁDim.=100%,ꢁFBH=0,15V
AnalogꢁDim.=100%,ꢁFBH=12V
AnalogꢁDim.=100%,ꢁFBH=60V
V(FBHꢀFBL) =ꢁꢁ150mV
1,39
1,38
1,37
1,36
ꢀ40
10
60
110
ꢀ40
10
60
110
Temperatureꢁ[°C]
Temperatureꢁ[°C]
Figure 35 Characterization Diagrams 1
Datasheet
51
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
TJꢁ=ꢁ25°C,ꢁVIN=12Vꢁunlessꢁotherwiseꢁspecified
IOUTMONꢁVoltageꢁvsꢁV(FBHꢀFBL)
V(IIN1ꢀIIN2)ꢁThresholdꢁvsꢁTemp
1,4
1,2
1
53
52
51
50
49
48
47
VIIN1=8V
VIIN1=13.5V
VIIN1=55V
0,8
0,6
0,4
0,2
0
0
20
40
60
80
100
120
140
ꢀ40
10
60
110
V(FBHꢀFBL) [mV]
Temperatureꢁ[°C]
IINMONꢁVoltageꢁvsꢁTemp
IFBH ,ꢁIFBL vsꢁVFBH
120
100
80
1,04
1,03
1,02
1,01
1
I_FBLꢁ[uA]
I_FBHꢁ[uA]
V(IIN1ꢀIIN2)ꢁ=ꢁ50mV
V(FBHꢀFBL) =ꢁꢁ150mV
60
40
20
0,99
0,98
0,97
0,96
0
ꢀ20
ꢀ40
0
5
10 15 20 25 30 35 40 45 50 55 60
ꢀ40
10
60
110
VFBHꢁ[V]
Temperatureꢁ[°C]
OscillatorꢁFrequencyꢁvsꢁTemp
V(BSTxꢀSWNx)ꢁvsꢁTemp
800
700
600
500
400
300
200
100
4
3,9
3,8
3,7
3,6
3,5
3,4
3,3
3,2
3,1
R_FREQ=61.9ꢁkOhm
R_FREQ=37.4ꢁkOhm
R_FREQ=12.7ꢁkOhm
VBSTxꢀVSWNx_decꢁ[V]
VBSTxꢀVSWNx_incꢁ[V]
ꢀ40
10
60
110
ꢀ40
10
60
110
Temperatureꢁ[°C]
Temperatureꢁ[°C]
Figure 36 Characterization Diagrams 2
Datasheet
52
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Application Information
TJ = 25°C, VIN=12V unless otherwise specified
VREF Voltage vs Temperature
VREF Load Regulation
2,04
2,03
2,02
2,01
2
2,06
2,04
2,02
2
VIN=8V
VIN=13.5V
VIN=40V
Iref = 100uA
1,99
1,98
1,97
1,96
1,98
1,96
1,94
-40
10
60
110
0
50
100
150
200
Temperature [°C]
IREF [uA]
LSGDx on-state resistance vs Temp
HSGDx on resistance vs Temp
4,5
4
4,5
4
HSGDx_Pull-up
3,5
3
3,5
3
HSGDx_Pull-down
LSGDx_Pull-Up
2,5
2
2,5
2
LSGDx_Pull-down
1,5
1
1,5
1
0,5
0
0,5
0
-40
10
60
110
-40
10
60
110
Temperature [°C]
Temperature [°C]
VCOMP Voltage vs LSGD Duty Cycle
V(SWCS-SGND) Treshold vs Temp
120
100
80
60
40
20
0
60
40
Boost
Buck
LSGD1_Buck [%]
LSGD2_Boost [%]
20
0
V(SWCS-SGND) =0
fsw=300kHz
-20
-40
-60
0,6
0,8
1
1,2
1,4
1,6
-40
10
60
110
VCOMP [V]
Temperature [°C]
Figure 37 Characterization Diagrams 3
For further information you may contact http://www.infineon.com/
•
Datasheet
53
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Package Outlines
13
Package Outlines
0ꢀ9 MAXꢀ
(0ꢀ65)
11 x 0ꢀ5 = 5ꢀ5
0ꢀ1
7
A
0ꢀ5
0ꢀ26
0ꢀ03
6ꢀ8
0ꢀ1
+0ꢀ031)
2)
37
B
0ꢀ05
36
25
0ꢀ13
24
48x
0ꢀ08
48
13
1
12
Index Marking
48x
0ꢀ1
0ꢀ4 x 45°
0ꢀ05
Index Marking
0ꢀ23
(0ꢀ35)
M
A B C
(0ꢀ2)
0ꢀ05 MAXꢀ
(5ꢀ2)
(6)
C
1) Vertical burr 0ꢀ03 maxꢀ, all sides
2) These four metal areas have exposed diepad potential
PG-VQFN-48-29, -31-PO V05
Figure 38 PG-VQFN-48-31 (with LTI)
Datasheet
54
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Package Outlines
H
C
0.6±0.15
SEATING
PLANE
0.08
48x
C
COPLANARITY
9
0.2 A-B D
48x
BOTTOMVIEW
1)
7
2)
0.2 A-B D H
4x
5
EXPOSEDDIEPAD
D
A
B
48
1
48
1
INDEXMARKING
0.5
0.22±0.05
0.08
A-B D C
48x
1)DOESNOTINCLUDEPLASTICORMETALPROTRUSIONO0F.25MAX.PERSIDE
2)EXPOSEDPADFORSOLDERINGPURPOSE
Figure 39 PG-TQFP-48-9
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Dimensions in mm
Datasheet
55
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Revision History
14
Revision History
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Rev. 1.1
Date
Changes
2016-05-20 Released Datasheet
2018-02-08 Added: CCM on regulator description Chapter 6.1
2018-02-08 Added TQFP package
2018-02-08 Corrected graph VCOMP vs DUTY
2018-02-08 Corrected soft start behavior Chapter 6.2 “if an open load”
2018-02-08 Divided In and out overvoltage protection def. Chapter 10.2 Chapter 10.3
2018-02-08 Removed “Flex” from Family name. Chapter 1
2018-02-08 Specified Complessive gain of error amp Chapter 6.1
2018-02-08 Improved description of soft start Chapter 6.2
2018-02-08 Added Soft Start mask in the Short circuit description Chapter 10.2
2018-02-08 Added input current limiter description Chapter 10.4
2018-02-08 Removed Parameter 6.4.2 covered now by updated 6.4.1 Chapter 6.6
Datasheet
56
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
Table of Content
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
4.2
4.3
5
5.1
5.2
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Different Power States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
6.1
6.2
6.3
Regulator Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Regulator Diagram Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Adjustable Soft Start Ramp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Switching Frequency setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Operation of 4 switches H-Bridge architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Boost mode (VIN < VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Buck mode (VIN > VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Buck-Boost mode (VIN ~ VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Flexible current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Programming Output Voltage (Constant Voltage Regulation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.4
6.4.1
6.4.2
6.4.3
6.5
6.6
6.7
7
7.1
7.2
Digital Dimming Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8
8.1
8.2
Analog Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
9
9.1
9.2
Linear Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
IVCC Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
10
Protection and Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Output Overvoltage, Open Load, Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Short Circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Open Load Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Input voltage monitoring, protection and power derating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Input current Monitoring and Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Output current Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Device Temperature Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
10.1
10.2
10.2.1
10.2.2
10.2.3
10.3
10.4
10.5
10.6
10.7
11
11.1
Infineon FLAT SPECTRUM Feature set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Datasheet
57
Rev. 1.1
2018-02-08
TLD5190
H-Bridge DC/DC Controller
11.2
11.3
11.4
11.5
11.6
Synchronization Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
CLKOUT Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Spread Spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
EMC optimized schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
12
12.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
13
14
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table of Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Datasheet
58
Rev. 1.1
2018-02-08
Please read the Important Notice and Warnings at the end of this document
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
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SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
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The information given in this document shall in no For further information on technology, delivery terms
Edition 2018-02-08
Published by
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81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
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Document reference
(doc_number)
相关型号：
TLD5191ES
TLD5191ES 是一款具有内置保护功能的同步 MOSFET H 桥 DC-DC 控制器。 该设计有利于以最高的系统效率和最少的外部组件驱动高功率 LED。 TLD5191ES 具有模拟和数字 (PWM) 调光及嵌入式 PWM 发生器。 开关频率可在 200 kHz 至 700 kHz 范围内调节。 内置扩频开关频率调制和强制连续电流调节模式改善了整体 EMC 行为。 此外，电流模式调节方案提供了一个由小型外部补偿元件维持的稳定调节环路。 可调软启动功能可限制启动时的电流峰值和电压过冲。 TLD5191ES 适用于汽车环境以及工业和消费类应用（例如无线充电）。
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