TLE9350VSJ [INFINEON]
Vio;型号: | TLE9350VSJ |
厂家: | Infineon |
描述: | Vio |
文件: | 总30页 (文件大小:872K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TLE9350VSJ
High speed CAN FD transceiver
Features
•
•
•
Fully compliant to ISO 11898-2:2016 and SAE J2284-4/-5
Loop delay symmetry for CAN FD data frames up to 5 MBit/s
Certified according to VeLIO (Vehicle LAN Interoperability and
Optimization) test requirements
•
Very low electromagnetic emission (EME) allows the use without
additional common mode choke
•
•
•
•
•
•
•
•
VIO input for voltage adaption to the microcontroller interface (3.3 V or 5 V)
Excellent ESD robustness
TxD time-out function
Very low CAN bus leakage current in power-down state
Overtemperature protection
Protected against automotive transients according to ISO 7637 and SAE J2962-2
Power-save mode
Green Product (RoHS compliant)
Potential applications
•
•
•
•
Engine control units (ECU)
Electric power steering
Transmission control units (TCUs)
Chassis control modules
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100.
Description
The TLE9350VSJ is a high speed CAN transceiver, used in HS CAN systems for automotive applications as well
as for industrial applications. It is designed to fulfill the requirements of ISO 11898-2:2016 physical layer
specification as well as SAE J1939 and SAE J2284.
The TLE9350VSJ is available in a RoHS compliant, halogen free PG-DSO-8 package.
As an interface between the physical bus layer and the HS CAN protocol controller, the TLE9350VSJ is
designed to protect the microcontroller against interferences generated inside the network. A very high ESD
Datasheet
Rev. 1.2
2022-03-18
www.infineon.com/TLE9350VSJ
1
TLE9350VSJ
High speed CAN FD transceiver
robustness and the optimized RF immunity allows the use in automotive applications without additional
protection devices, such as suppressor diodes or common mode chokes.
Based on the high symmetry of the CANH and CANL output signals, the TLE9350VSJ provides a very low level
of electromagnetic emission (EME) within a wide frequency range. The TLE9350VSJ fulfills even stringent EMC
test limits without an additional external circuit, such as a common mode choke.
The optimized transmitter symmetry combined with the optimized delay symmetry of the receiver enables
the TLE9350VSJ to support CAN FD data frames. The device supports data transmission rates up to 5 MBit/s,
depending on the size of the network and the inherent parasitic effects.
Fail-safe features, such as overtemperature protection, output current limitation or the TxD time-out feature
are designed to protect the TLE9350VSJ and the external circuitry from irreparable damage.
Type
Package
Marking
TLE9350VSJ
PG-DSO-8
9350V
Datasheet
2
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1
2
2.1
2.2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
3.2
3.3
4
High speed CAN functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
High speed CAN physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Normal-operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power-save mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power-down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1
5.2
5.3
6
Fail safe functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Unconnected logic pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1
6.2
6.3
6.4
6.5
6.6
V
CC undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
TxD time-out feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay time for mode change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Power supply interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical characteristics undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical characteristics CAN controller interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Electrical characteristics receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Electrical characteristics transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Electrical characteristics dynamic transceiver parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1
7.1.1
7.1.2
7.2
7.3
7.4
7.5
7.6
8
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
ESD robustness according to IEC 61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Voltage adaption to the microcontroller supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.1
8.2
8.3
8.4
9
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Datasheet
3
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Datasheet
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Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
1
Block diagram
3
5
VCC
VIO
Transmitter
7
1
8
CANH
CANL
Timeout
TxD
Driver
Temp-
6
protection
Mode
NEN
control
Receiver
Normal-mode receiver
4
RxD
VCC/2
=
Bus-biasing
GND
2
Figure 1
Block diagram
Datasheet
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Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
2
Pin configuration
2.1
Pin assignment
1
2
3
4
8
7
6
5
NEN
CANH
CANL
TxD
GND
VCC
RxD
VIO
Figure 2
Pin assignment
2.2
Pin definitions
Table 1
Pin definitions and functions
Pin No. Symbol Function
1
TxD
Transmit data input;
Internal pull-up to VIO, "low" for dominant state.
2
3
GND
Ground
VCC
Transmitter supply voltage;
A decoupling capacitor of 1 µF to GND is recommended,
CC can be turned off in power-save mode.
V
4
5
RxD
Receive data output;
"Low" in dominant state.
VIO
Digital supply voltage input;
Adapts the logical input voltage level and output voltage level of the transceiver to the
voltage level of the microcontroller supply,
A 100 nF decoupling capacitor to GND is recommended.
6
7
8
CANL
CANH
NEN
CAN bus low level I/O;
Bus level on the CANL input/output.
CAN bus high level I/O;
Bus level on the CANH input/output.
Not enable input;
Internal pull-up to VIO, "low" for normal-operating mode.
Datasheet
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Rev. 1.2
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TLE9350VSJ
High speed CAN FD transceiver
3
General product characteristics
3.1
Absolute maximum ratings
Table 2
Absolute maximum ratings voltages, currents and temperatures1)
All voltages with respect to ground; positive current flowing into pin;
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Voltages
Transmitter supply voltage
Digital supply voltage
VCC
-0.3
-0.3
-40
–
–
–
6.0
6.0
40
V
V
V
–
P_7.1.1
P_7.1.2
P_7.1.3
VIO
–
–
CANH and CANL DC voltage
versus GND
VCANH
Differential voltage between VCAN_Diff
CANH and CANL
-40
–
–
40
V
V
–
–
P_7.1.4
P_7.1.5
Voltage at the digital input
VMAX_IO
-0.3
6.0
pins:
NEN, TxD
Voltage at the digital output VMAX_RxD
-0.3
–
VIO +0.3
V
–
P_7.1.9
pin:
RxD
Currents
RxD output current
Temperatures
IRxD
-5
–
5
mA
–
P_7.1.6
Junction temperature
Storage temperature
ESD immunity
Tj
-40
-55
–
–
150
150
°C
°C
–
–
P_7.1.7
P_7.1.8
TS
ESD immunity at CANH, CANL VESD_HBM_CAN -10
versus GND
–
–
10
2
kV
kV
HBM;
P_7.1.10
P_7.1.11
(100 pF via 1.5 kΩ)2)
ESD immunity at all other pins VESD_HBM_ALL -2
HBM;
(100 pF via 1.5 kΩ)2)
ESD immunity corner pins
ESD immunity all other pins
VESD_CDM_CP -750
VESD_CDM_OP -500
–
–
750
500
V
V
CDM3)
CDM3)
P_7.1.14
P_7.1.12
1) Not subject to production test, specified by design.
2) ESD susceptibility, Human Body Model (HBM) according to ANSI/ESDA/JEDEC JS-001.
3) ESD susceptibility, Charge Device Model (CDM) according to ANSI/ESDA/JEDEC JS-002.
Note:
Stresses above the ones listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability. Integrated
protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as outside normal-operating range. Protection
functions are not designed for continuous repetitive operation.
Datasheet
7
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
3.2
Functional range
Table 3
Functional range
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Supply voltages
Transmitter supply voltage
Digital supply voltage
Thermal parameters
Junction temperature
VCC
VIO
4.75
3.0
–
–
5.25
5.5
V
V
–
P_7.2.1
P_7.2.2
–
1)
Tj
-40
–
150
°C
P_7.2.3
1) Not subject to production test, specified by design.
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
3.3
Thermal resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, please visit www.jedec.org.
Table 4
Thermal resistance1)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Thermal resistance
2)
Junction to ambient
PG-DSO-8
RthJA_DSO8
–
120
–
K/W
P_7.3.2
Thermal shutdown (junction temperature)
Thermal shutdown temperature,
rising
TJSD
170
5
180
10
190
20
°C
K
temperature
falling: minimum
150°C
P_7.3.3
P_7.3.4
Thermal shutdown hysteresis
∆T
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to JEDEC JESD51-2,-7 at natural convection on FR4 2s2p board. The product was
simulated on a 76.2 × 114.3 × 1.5 mm3 board with two inner copper layers (2 × 70µm Cu, 2 × 35 µm Cu).
Datasheet
8
Rev. 1.2
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TLE9350VSJ
High speed CAN FD transceiver
4
High speed CAN functional description
HS CAN is a serial bus system that connects microcontrollers, sensors and actuators for real-time control
applications. ISO 11898 describes the use of the controller area network (CAN) within road vehicles. According
to the 7-layer OSI reference model the physical layer of a HS CAN bus system specifies the data transmission
from one CAN node to all other CAN nodes available within the network. The physical layer specification of a
CAN bus system includes all electrical specifications of a CAN. The CAN transceiver is part of the physical layer
specification.
4.1
High speed CAN physical layer
TxD
VIO
=
Digital supply voltage
Transmit data input from
the microcontroller
Receive data output to
the microcontroller
Bus level on the CANH
input/output
TxD
=
VIO
RxD
=
CANH =
CANL =
Bus level on the CANL
input/output
t
t
VDiff
=
Differential voltage
between CANH and CANL
CANH
CANL
VDiff = VCANH – VCANL
VDiff
“dominant” receiver threshold
“recessive” receiver threshold
t
RxD
VIO
tLoop
tLoop
t
Figure 3
High speed CAN bus signals and logic signals
Datasheet
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Rev. 1.2
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TLE9350VSJ
High speed CAN FD transceiver
The TLE9350VSJ operates as an interface between the CAN controller and the physical bus medium. A HS CAN
is a two wire differential network which allows data transmission rates up to 5 MBit/s. The characteristics for
a HS CAN are the two signal states on the CAN bus: dominant and recessive (see Figure 3).
The CANH and CANL pins are the interface to the CAN bus and both pins operate as an input and output
simultaneously. The RxD and TxD pins are the interface to the microcontroller. The pin TxD is the serial data
input from the CAN controller, the RxD pin is the serial data output to the CAN controller. As shown in Figure 1,
the TLE9350VSJ includes a receiver and a transmitter unit, allowing the transceiver to send data to the bus
medium and monitor the data from the bus medium at the same time. The TLE9350VSJ converts the serial
data stream which is available on the transmit data input TxD, into a differential output signal on the CAN bus,
provided by the CANH and CANL pins. The receiver stage of the TLE9350VSJ monitors the data on the CAN bus
and converts them to a serial, single-ended signal on the RxD output pin. A "low" signal on the TxD pin creates
a dominant signal on the CAN bus, followed by a logical "low" signal on the RxD pin (see Figure 3). The feature
of broadcasting data to the CAN bus and listening to the data traffic on the CAN bus simultaneously is essential
to support the bit-to-bit arbitration within CAN.
ISO 11898-2:2016 specifies the voltage levels for HS CAN transceivers. Whether a data bit is dominant or
recessive depends on the voltage difference between the CANH and CANL pins (VDiff = VCANH - VCANL).
To transmit a dominant signal to the CAN bus the amplitude of the differential signal VDiff is higher than or
equal to 1.5 V. To receive a recessive signal from the CAN bus the amplitude of the differential VDiff is lower than
or equal to 0.5 V.
In partially-supplied high speed CAN the bus nodes of one common network have different power supply
conditions. Some nodes are connected to the power supply, while other nodes are disconnected from the
power supply and in power-down state. Regardless of whether the CAN bus subscriber is supplied or not, each
subscriber connected to the common bus media must not interfere with the communication. The TLE9350VSJ
is designed to support partially-supplied networks. In power-down state, the receiver input resistors are
switched off and the transceiver input has a high resistance.
For permanently supplied ECUs, the HS CAN transceiver TLE9350VSJ provides a power-save mode. In power-
save mode, the power consumption of the TLE9350VSJ is optimized to a minimum
The voltage level on the digital input TxD and the digital output RxD is determined by the power supply level
at the VIO pin. Depending on the voltage level at the VIO pin, the signal levels on the logic pins (STB, TxD and
RxD) are compatible with microcontrollers having a 5 V or 3.3 V I/O supply. Usually the digital power supply VIO
of the transceiver is connected to the I/O power supply of the microcontroller (see Figure 13).
Datasheet
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Rev. 1.2
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TLE9350VSJ
High speed CAN FD transceiver
5
Modes of operation
The TLE9350VSJ supports the following modes of operation):
•
Normal-operating mode
Power-save mode
•
The mode selection input pin NEN triggers mode changes. Undervoltage on VCC disables the transmitter
output stage. An undervoltage event on the digital supply VIO powers down the device.
NEN = 0
AND
tmode expired
Normal-
Power-save
operating
mode
mode
NEN = 1
AND
tmode expired
VIO > VIO_UV
for at least tPON
Power-down
Any mode
state
VIO < VIO_UV
Figure 4
Mode state diagram
5.1
Normal-operating mode
In normal-operating mode all functions of the device are available and the device is fully functional. Data can
be received from the HS CAN bus as well as transmitted to the HS CAN bus.
•
The transmitter is enabled and drives the serial data stream on the TxD input pin to the bus pins CANH
and CANL
•
•
•
•
•
The receiver is enabled and converts the signal from the bus to a serial data stream on the RxD output pin
The bus biasing is active
The TxD time-out function is enabled (see Chapter 6.4)
The overtemperature protection is enabled (see Chapter 6.6)
The undervoltage detection on VCC and VIO are enabled (see Chapter 6.3 and Chapter 5.3)
The device enters normal-operating mode by setting the mode selection pin NEN to "low", see Figure 4.
Normal-operating mode can be entered if the device supply VCC is higher than VCC_UV_R. The device enters
normal-operating mode after tmode expires.
Note:
If the device recognizes a recessive signal on the TxD input pin during a mode change from any mode
to normal-operating mode, then it enables the transmit path after the mode change.
If the device recognizes a a dominant signal on the TxD input pin during a mode change to normal-
operating mode, then it keeps the transmit path disabled and it blocks the dominant signal in order
to not disturb the bus communication . As soon as the device recognizes a recessive signal on the TxD
input pin, it enables the transmit path again.
5.2
Power-save mode
In power-save mode the transmitter and receiver are disabled (see also ):
Datasheet
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TLE9350VSJ
High speed CAN FD transceiver
•
•
•
•
•
•
•
The transmitter is disabled and the data available on the TxD input is blocked
The receiver is disabled and the data available on the bus is blocked
The RxD output pin is permanently set to logical "high"
The bus biasing is connected to high impedance
The NEN input pin is active and if set to "low" it changes the mode of operation to normal-operating mode
The overtemperature protection is disabled
The undervoltage detection on VCC is disabled. In power-save mode the device can operate without the
transmitter supply VCC
•
The undervoltage detection on VIO is enabled
Power-save mode can be entered from normal-operating mode by setting the NEN pin to logical "high". The
device enters this mode after tmode expires or after the period of tPON when coming from power-down state.
5.3
Power-down state
If the supply voltage VIO < VIO_UV, then the device powers down independent of the transmitter supply VCC and
NEN input pin (see Figure 5). In power-down state all functions of the device are disabled and the device is
switched off. The input resistors of the receiver are disconnected. The CANH and CANL bus interface of the
device is floating and acts as a high impedance input with a very low leakage current. The high impedance
input does not influence the recessive level of the CAN and allows an optimized EME performance of the entire
network. In power-down state the transceiver is an invisible node to the bus. tpon must expire as a prerequisite
for the device to exit power-down state.
•
•
•
•
•
•
The transmitter and receiver are disabled
The bus biasing is connected to high impedance
The TxD time-out function is disabled
The overtemperature protection is disabled
The undervoltage detection on VCC is disabled
The undervoltage detection on VIO is enabled
Transmitter supply voltage VCC = “don’t care”
VIO
hysteresis
VIO_UV
tPON
t
Normal-operating mode /
Power-save mode
Normal-operating mode /
Power-save mode
Power-down state
Figure 5
Power-down and power-up behavior and VIO
Datasheet
12
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
6
Fail safe functions
6.1
Short circuit protection
The CANH and CANL bus outputs are short circuit proof to GND and short circuit proof to a supply voltage. The
current limiting circuit is designed to protect the transceiver from damage. If the device heats up due to a
continuous short on the CANH or CANL, then the internal overtemperature protection switches off the bus
transmitter.
6.2
Unconnected logic pins
All logic input pins have an internal pull-up resistor to VIO. If the VIO and VCC supply is active and the logical pins
are open, the device enters the power-save mode by default.
6.3
VCC undervoltage
If the transmitter supply is in undervoltage condition VCC < VCC_UV_F, then the device might not be able to
provide the correct bus levels on the CANH and CANL output pins. During this time the transmitter is blocked
in normal-operating mode, to avoid any interference with the network.
During undervoltage condition VCC < VCC_UV_F, the bus biasing is switched to ground in normal-operating mode.
Device is in normal-operating mode
VCC
VCC_UV_R
tVCC_UV_filter
hysteresis
VCC_UV_F
t
VCC_UV_filter + tVCC_recovery
t
Transmitter
Enabled
Disabled
Enabled
Normal-mode
receiver
Enabled
Figure 6
Undervoltage on the transmitter supply VCC
6.4
TxD time-out feature
The TxD time-out feature protects the CAN bus against permanent blocking in case the logical signal on the
TxD pin is continuously "low". A continuous "low" signal on the TxD pin might have its root cause in a locked-
up microcontroller or in a short circuit on the printed circuit board, for example.
In normal-operating mode, a "low" signal on the TxD pin for the time t > tTxD enables the TxD time-out feature
and the device disables the transmitter (see Figure 7). The receiver is still active and the device continues to
monitor data on the bus via the RxD output pin.
Datasheet
13
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
TxD
t
t > tTxD
TxD time–out released
TxD time-out
CANH
CANL
t
t
RxD
Figure 7
TxD time-out function
Figure 7 shows how the transmitter is deactivated and activated again. A permanent "low" signal on the TxD
input pin activates the TxD time-out and deactivates the transmitter. To release the transmitter after a TxD
time-out event, the device requires a signal change on the TxD input pin from "low" to "high".
6.5
Delay time for mode change
The device changes the mode of operation within the time window tMode. During the mode change from
power-save mode to non-low power mode the device sets the RxD output "high" permanently, so it does not
reflect the status on the CANH and CANL input pins.
After the mode change is completed, the device releases the RxD output pin.
6.6
Overtemperature protection
The TLE9350VSJ has an integrated overtemperature detection, which is designed to protect the device against
thermal overstress of the transmitter. The overtemperature protection is only active in normal-operating
mode. In case of an overtemperature condition, the temperature sensor disables the transmitter while the
transceiver remains in normal-operating mode. After the device cools down it enables the transmitter again
(see Figure 8). A hysteresis is implemented within the temperature sensor.
Datasheet
14
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
TJSD (shut down temperature)
cool down
TJ
ΔT
switch-on transmitter
t
t
CANH
CANL
TxD
RxD
t
t
Figure 8
Overtemperature protection
Datasheet
15
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7
Electrical characteristics
7.1
Power supply interface
7.1.1
Electrical characteristics current consumption
Table 5
Electrical characteristics current consumption
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Current consumption at VCC
normal-operating mode,
recessive state
ICC_R
–
–
–
1.4
4
mA VTxD = VIO;
NEN = 0 V;
P_8.1.1
V
VCANH = VCANL = VCC/2
Current consumption at VCC
normal-operating mode,
dominant state
ICC_D
34
48
1.5
mA VTxD = VNEN = 0 V
P_8.1.2
P_8.1.3
Current consumption at VIO
IIO
0.9
mA VNEN = 0 V;
normal-operating mode
V =VIO
;
VDiff = 0 V;
recessive
Current consumption at VCC
power-save mode
ICC(PSM)
IIO(PSM)
–
–
0.005
7
5
µA
µA
VTxD = VNEN = VIO
P_8.1.4
P_8.1.6
Current consumption at VIO
power-save mode
18
VTxD = VNEN = VIO;
0 V < VCC < 5.5 V
Datasheet
16
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.1.2
Electrical characteristics undervoltage detection
Table 6
Electrical characteristics undervoltage detection
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground;
positive current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
VCC undervoltage threshold
VCC_UV_R
VCC_UV_F
3.8
4.2
4.65
V
P_8.1.11
P_8.1.21
rising edge
see Figure 6
1)
VCC undervoltage threshold
3.8
4.2
4.5
V
falling edge
see Figure 6
2) Figure 6
2) see Figure 6
VCC undervoltage filter time
tVCC_UV_filter
tVCC_recovery
4
–
6
7
10
70
µs
µs
P_8.1.13
P_8.1.14
VCC undervoltage recovery
time
VIO undervoltage threshold
VIO_UV
tPON
2.0
–
2.6
40
3.0
V
–
P_8.1.15
P_8.1.19
VIO delay time power-up
280
µs
2) see Figure 5
1) VCC undervoltage threshold for rising edge is always higher than undervoltage threshold for falling edge.
2) Not subject to production test, specified by design.
Datasheet
17
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.2
Electrical characteristics CAN controller interface
Table 7
Electrical characteristics CAN controller interface
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Receiver output RxD
"High" level output current
IRxD_H
IRxD_L
–
1
-2.5
2.5
-1
–
mA VRxD = VIO -0.4 V;
Diff < 0.5 V
mA VRxD = 0.4 V;
Diff > 0.9 V
P_8.2.1
P_8.2.2
V
"Low" level output current
V
Transmission input TxD
"High" level input voltage
VTxD_H
VTxD_L
0.7 ×
VIO
–
–
6.0
V
V
Recessive state
Dominant state
P_8.2.3
P_8.2.4
"Low" level input voltage
-0.3
0.3 ×
VIO
Internal pull-up resistor TxD
Input capacitance
RTxD
CTxD
tTxD
35
–
55
–
70
10
4
kΩ
pF
–
P_8.2.7
P_8.2.8
P_8.2.9
1)
TxD permanent dominant
time-out
1
2.3
ms
Normal-operating
mode
non-enable input NEN
"High" level input voltage
VNEN_H
VNEN_L
0.7 ×
VIO
–
–
6.0
V
V
Power-save mode
P_8.2.13
P_8.2.14
"Low" level input voltage
-0.3
0.3 ×
VIO
Normal-operating
mode
Internal pull-up resistor NEN RNEN
Input capacitance C(NEN)
35
–
55
–
70
10
kΩ
–
1)
P_8.2.16
P_8.2.20
pF
1) Not subject to production test, specified by design.
Datasheet
18
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.3
Electrical characteristics receiver
Table 8
Electrical characteristics receiver
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min. Typ. Max.
Differential range dominant VDiff_D_Range
normal-operating mode
0.9
–
–
–
8.0
0.5
12
V
V
V
1) -12 V ≤ VCMR ≤ 12 V
1) -12V ≤ VCMR ≤ 12 V
–
P_8.3.3
P_8.3.5
Differential range recessive
normal-operating mode
VDiff_R_Range
-3.0
Common mode range
CMR
-12
6
P_8.3.11
P_8.3.12
Single ended internal
resistance
RCAN_H, RCAN_L
40 50
kΩ 1) recessive state;
-2 V ≤ VCANH ≤ 7 V;
-2 V ≤ VCANL ≤ 7 V
Differential internal resistance RDiff
12 80 100 kΩ 1) recessive state;
-2 V ≤ VCANH ≤ 7 V;
P_8.3.14
-2 V ≤ VCANL ≤ 7 V
Input resistance deviation
between CANH and CANL
∆Ri
-3
–
–
–
4
3
%
1) recessive state;
P_8.3.16
P_8.3.17
P_8.3.18
V
CANH = VCANL = 5 V
Input capacitance CANH,
CANL versus GND
CIn
40
20
pF 1)2) recessive state;
normal-operating mode
pF 1)2) recessive state;
normal-operating mode
Differential input capacitance CInDiff
–
1) Not subject to production test, specified by design.
2) S2P-Method; f = 10 MHz.
Datasheet
19
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.4
Electrical characteristics transmitter
Table 9
Electrical characteristics transmitter
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
CANL, CANH recessive
output voltage
VCANL,H
2.0
2.5
3.0
V
VTxD = VIO;
no load
P_8.4.1
normal-operating mode
CANH, CANL recessive
output voltage difference
normal-operating mode
VDiff_R_NM
=
-500 -10
50
mV
V
V
TxD = VIO;
P_8.4.2
P_8.4.3
P_8.4.4
P_8.4.5
P_8.4.6
P_8.4.7
P_8.4.10
VCANH
VCANL
-
no load
CANL dominant
output voltage
normal-operating mode
VCANL
0.5
1.5
2.25
4.5
2.5
3.3
5.0
VTxD = 0 V;
50 Ω < RL < 65 Ω
CANH dominant
output voltage
normal-operating mode
VCANH
2.75 3.4
V
VTxD = 0 V;
50 Ω < RL < 65 Ω
Differential voltage dominant VDiff_D_NM
normal-operating mode
1.5
1.9
1.9
3.5
V
VTxD = 0 V;
50 Ω < RL < 65 Ω
VDiff = VCANH - VCANL
Differential voltage dominant VDiff_EXT_BL 1.4
extended bus load
normal-operating mode
V
VTxD = 0 V;
45 Ω < RL < 70 Ω
1)
Differential voltage dominant VDiff_HEXT_BL 1.5
high extended bus load
normal-operating mode
V
V
= 0 V;
TxD
RL = 2240Ω;
static behavior
1) 2) C1 = 4.7 nF
Driver symmetry (VSYM
CANH + VCANL
=
VSYM
0.9 × 1.0 × 1.1 ×
V
V
)
VCC
VCC
VCC
CANL short circuit current
CANL short circuit current
CANH short circuit current
CANH short circuit current
Leakage current, CANH
ICANLsc
-115 90
115
mA 1)-3 V < VCANLshort < 18 V; P_8.4.11
t < tTxD
;
VTxD = 0 V
ICANLsc2
ICANHsc
ICANHsc2
ICANH,lk
40
90
115
115
-40
5
mA VCANLshort = 18 V;
P_8.4.23
t < tTxD
TxD = 0 V
mA 1)-3 V < VCANHshort = 18 V; P_8.4.13
t < tTxD
TxD =0 V
mA VCANHshort = -3 V;
t < tTxD
;
V
-115 -90
-115 -90
;
V
P_8.4.24
P_8.4.19
;
VTxD =0 V
-5
1
µA
VCC = VIO = 0 V;
0 V < VCANH ≤ 5 V;
VCANH = VCANL;
Datasheet
20
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
Table 9
Electrical characteristics transmitter (Continued)
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Leakage current, CANL
ICANL,lk
-5
1
5
µA
VCC = VIO = 0 V;
P_8.4.20
0 V < VCANL ≤ 5 V;
V
CANH = VCANL
V/µs 1) 30% to 70% of
measured differential
CANH, CANL output voltage
difference slope, recessive to
dominant
Vdiff_slope_rd
–
42
70
P_8.4.21
P_8.4.22
bus voltage,
C2 = 100 pF, RL = 60 Ω,
4.75 V < VCC < 5.25 V
CANH, CANL output voltage
difference slope, dominant to
recessive
Vdiff_slope_dr
–
42
70
V/µs 1) 70% to 30% of
measured differential
bus voltage,
C2 = 100 pF, RL = 60 Ω,
4.75 V < VCC < 5.25 V
1) Not subject to production test, specified by design.
2) VSYM is observed during dominant and recessive state and also during the transition from dominant to recessive state
and vice versa, while TxD is stimulated by a square wave signal with a frequency of 1 MHz.
Datasheet
21
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.5
Electrical characteristics dynamic transceiver parameters
Table 10
Electrical characteristics dynamic transceiver parameters
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Propagation delay
TxD-to-RxD
tLoop
80
80
30
30
30
30
150
180
70
255
330
140
140
140
140
ns
ns
ns
ns
ns
ns
C1 = 0 pF,
C2 = 100 pF,
RxD = 15 pF;
P_8.5.1
C
(see Figure 10)
Propagation delay
increased load
TxD-to-RxD
tLoop_150
C1 = 0 pF,
P_8.5.2
P_8.5.3
P_8.5.4
P_8.5.5
P_8.5.6
C2 = 100 pF,
CRxD = 15 pF,
RL = 150 Ω 1)
Propagation delay
TxD to bus
"low" to dominant
td(L)_T
C1 = 0 pF,
C2 = 100 pF,
CRxD = 15 pF;
(see Figure 10)
Propagation delay
TxD to bus
"high" to recessive
td(H)_T
90
C1 = 0 pF,
C2 = 100 pF,
CRxD = 15 pF;
(see Figure 10)
Propagation delay
bus to RxD
dominant to "low"
td(L)_R
90
CRxD = 15 pF,
Independent of tBit
(see Figure 10)
;
;
Propagation delay
bus to RxD
recessive to "high"
td(H)_R
100
CRxD = 15 pF,
Independent of tBit
(see Figure 10)
Delay Times
1)
Delay time for mode change tMode
–
12
–
20
–
µs
µs
P_8.5.7
Hold-up time of power-save
mode
tHold_PS
180
2) see Figure 12
P_8.5.19
CAN FD characteristics
Received recessive bit width at tBit(RxD)_2M 420
2 MBit/s
450
150
520
220
ns
ns
C2 = 100 pF;
P_8.5.13
P_8.5.14
CRxD = 15 pF;
tBit = 500 ns;
see Figure 11
Received recessive bit width at tBit(RxD)_5M 120
5 MBit/s
C2 = 100 pF;
CRxD = 15 pF;
tBit = 200 ns;
see Figure 11
Datasheet
22
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
Table 10
Electrical characteristics dynamic transceiver parameters (Continued)
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < Tj < 150°C; all voltages with respect to ground; positive
current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Transmitted recessive bit
width at 2 MBit/s
tBit(Bus)_2M 455
470
170
-23
-23
510
210
15
ns
ns
ns
ns
C2 = 100 pF;
RxD = 15 pF;
Bit = 500 ns;
P_8.5.15
C
t
see Figure 11
Transmitted recessive bit
width at 5 MBit/s
tBit(Bus)_5M 155
C2 = 100 pF;
CRxD = 15 pF;
P_8.5.16
P_8.5.17
P_8.5.18
tBit = 200 ns;
see Figure 11
Receiver timing symmetry at ∆tRec_2M
2 MBit/s
∆tRec_2M = tBit(RxD)_2M - tBit(Bus)_2M
-45
-45
C2 = 100 pF;
CRxD = 15 pF;
tBit = 500 ns;
see Figure 11
Receiver timing symmetry at ∆tRec_5M
5 MBit/s
∆tRec_5M = tBit(RxD)_5M - tBit(Bus)_5M
15
C2 = 100 pF;
C
RxD = 15 pF;
Bit = 200 ns;
see Figure 11
t
1) Not subject to production test, specified by design.
2) In case of mode transition from normal-operating to power-save and back to normal-operating, the transceiver is
recommended to stay for minimum of 200 µs in the power-save mode to be in the safe operating area; to receive and
transmit CAN messages properly.
Datasheet
23
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
7.6
Diagrams
TxD
RxD
CANH
RL/2
CRxD
C2
Transceiver
C1
VIO
100nF
1μF
RL/2
6
CANL
VCC
GND
Figure 9
Test circuit
TxD
0.7 x VIO
0.3 x VIO
t
t
td(L),T
td(H),T
VDiff
0.9 V
td(L),R
0.5 V
td(H),R
tLoop
tLoop
RxD
0.7 x VIO
0.3 x VIO
t
Figure 10 Timing diagrams for dynamic characteristics
Datasheet
24
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
TxD
0.7 x VIO
0.3 x VIO
0.3 x VIO
t
t
5 x tBit
tBit
tLoop
tBit(Bus)
VDiff = VCANH - VCANL
VDiff
0.9 V
0.5 V
tLoop
tBit(RxD)
RxD
0.7 x VIO
0.3 x VIO
t
Figure 11 Recessive bit time for five dominant bits followed by one recessive bit
State
tMode=20μs
tMode=20μs
tHold_PS =180μs
Normal-operating mode
Power-save mode
Normal-operating mode
t
Mode transition to Power-save
Mode transition to Normal-operating
Earliest point where the mode change is allowed by the microcontroller
Figure 12 Hold-up time of power-save mode
Datasheet
25
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
8
Application information
8.1
ESD robustness according to IEC 61000-4-2
Tests for ESD robustness according to IEC 61000-4-2 Gun test (150 pF, 330 Ω) have been performed. The results
and test conditions are available in a separate test report.
Table 11
ESD robustness according to IEC 61000-4-2
Performed test
Result Unit Remarks
Electrostatic discharge voltage at pin CANH and CANL versus GND
Electrostatic discharge voltage at pin CANH and CANL versus GND
≥ +8
≤ -8
kV
kV
1) positive pulse
1) negative pulse
1) Not subject to production test. ESD susceptibility "ESD GUN" according to GIFT/ICT paper: "EMC Evaluation of CAN
Transceivers, version IEC TS62228", section 4.3. (DIN EN61000-4-2).
Tested by external test facility (IBEE Zwickau).
8.2
Application example
VBAT
I
Q1
Q2
22 μF
TLE4476D
GND
1 μF
CANH
CANL
EN
100 nF
3
VCC
100 nF
VIO
22 μF
5
8
1
4
120
Ohm
Transceiver
VCC
Out
Out
In
NEN
7
6
CANH
Microcontroller
e.g. AURIX™ 32
bit multicore
TxD
RxD
CANL
2
microcontroller
optional:
common mode choke
GND
GND
I
Q1
Q2
22 μF
TLE4476D
GND
1 μF
EN
3
VCC
100 nF
VIO
100 nF
22 μF
5
8
1
4
Transceiver
VCC
Out
Out
In
NEN
TxD
RxD
7
6
Microcontroller
e.g. AURIX™ 32
bit multicore
CANH
CANL
microcontroller
optional:
common mode choke
GND
120
Ohm
GND
2
example ECU design
CANH
CANL
Figure 13 Application circuit
Datasheet
26
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
8.3
Voltage adaption to the microcontroller supply
To adapt the digital input and output levels of the device to the I/O levels of the microcontroller, connect the
power supply pin VIO to the microcontroller voltage supply, see Figure 13.
Note:
If case no dedicated digital supply voltage VIO is required in the application, then connect the digital
supply voltage VIO to the transmitter supply VCC
.
8.4
Further application information
For further information you may visit: https://www.infineon.com/automotive-transceiver
Datasheet
27
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
9
Package information
1)
0.33 x 45°
4.93+-00..1035
0.64+-00..2235
2)
0.41+-00..0068
8° Max.
3 x 1.27 =3.81
1.27
5
8
4
1
Index Marking
1) Does not include plastic or metal protrusion of 0.25 Max. per side
2) Does not include dambar protrusion of 0.1 Max. per side
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [
]
Figure 14 PG-DSO-8
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e. Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
Datasheet
28
Rev. 1.2
2022-03-18
TLE9350VSJ
High speed CAN FD transceiver
10
Revision history
Revision Date
Changes
•
•
•
•
Added new parameter P_8.5.19
1.2
2022-03-18
Editorial changes
Minimum value for Parameter P_8.1.13 VCC undervoltage filter time specified
1.1
2021-07-30
VCC undervoltage threshold (P_8.1.11 and P_8.1.21) for rising and falling edge
specified
•
•
•
Updated description of VCC undervoltage detection
Added new parameter P_8.4.23 and P_8.4.24
Updated figure of application example
1.0
2020-11-06 Datasheet created
Datasheet
29
Rev. 1.2
2022-03-18
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
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Published by
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81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
characteristics ("Beschaffenheitsgarantie").
Infineon Technologies Office (www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
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In addition, any information given in this document is
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Document reference
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