IZ74HC157A [INTEGRAL]
Quad 2-Input Data Selectors/Multiplexer; 四2输入数据选择器/多路复用器
| 型号： | IZ74HC157A |
| 厂家： | 
INTEGRAL CORP. |
| 描述： | Quad 2-Input Data Selectors/Multiplexer |
| 文件： | 总6页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TECHNICAL DATA
IN74HC157A
Quad 2-Input Data Selectors/Multiplexer
The IN74HC157A is identical in pin out to the LS/ALS157. The device
inputs are compatible with standard CMOS outputs; with pull up resistors,
they are compatible with LS/ALSTTL outputs.
This device routes 2 nibbles (A or B) to a single port (Y) as determined
by the Select input. The data is presented at the outputs in non inverted
form. A high level on the Output Enable input sets all four Y outputs to a low
level.
·
·
·
·
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
ORDERING INFORMATION
IN74HC157AN Plastic
High Noise Immunity Characteristic of CMOS Devices
IN74HC157AD SOIC
IZ74HC157A Chip
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Output
Outputs
Y0-Y3
Select
Enable
PIN 16 =VCC
PIN 8 = GND
H
X
L
L
L
L
A0-A3
B0-B3
H
X=don’t care
A0-A3, B0-B3=the levels of the respective
Data-Word Inputs
INTEGRAL
1
IN74HC157A
MAXIMUM RATINGS*
Symbol
Parameter
Value
-0.5 to +7.0
-1.5 to VCC +1.5
-0.5 to VCC +0.5
±20
Unit
V
VCC
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
V
IN
V
VOUT
IIN
V
mA
mA
mA
mW
IOUT
ICC
DC Output Current, per Pin
±25
DC Supply Current, VCC and GND Pins
±50
PD
Power Dissipation in Still Air, Plastic DIP**
SOIC Package**
750
500
Tstg
TL
Storage Temperature
-65 to +150
260
°C
°C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Min
2.0
0
Max
6.0
Unit
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
V , VOUT
IN
VCC
V
TA
-55
+125
°C
ns
tr, tf
Input Rise and Fall Time (Figure 1)
VCC =2.0 V
VCC =4.5 V
VCC =6.0 V
0
0
0
1000
500
400
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation, V and VOUT should be constrained to the range GND£(V or
IN
IN
VOUT)£VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
INTEGRAL
2
IN74HC157A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
Guaranteed Limit
Unit
V
25 °C
to
£85
°C
£125
°C
-55°C
V
Minimum High-Level
Input Voltage
VOUT=0.1 V or VCC-0.1 V
êIOUTê£ 20 mA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
IH
V
IL
Maximum Low -Level
Input Voltage
VOUT=0.1 V or VCC-0.1 V
êIOUTê £ 20 mA
2.0
4.5
6.0
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
VOH
Minimum High-Level
Output Voltage
V =V or V
IL
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
IN
IH
êIOUTê £ 20 mA
V =V or V
IL
IN
IH
êIOUTê £ 4.0 mA
êIOUTê £ 5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
VOL
Maximum Low-Level
Output Voltage
V =V or V
IL
êIOUTê £ 20 mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
IH
V =V or V
IL
IN
IH
êIOUTê £ 4.0 mA
êIOUTê £ 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
IIN
Maximum Input
Leakage Current
V =VCC or GND
6.0
±0.1
±1.0
±1.0
mA
mA
IN
ICC
Maximum Quiescent
Supply Current
(per Package)
V =VCC or GND
6.0
4.0
40
160
IN
IOUT=0mA
INTEGRAL
3
IN74HC157A
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25 °C to
-55°C
£85°C
£125°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay, Input A or B to
Output Y (Figures 1and 4)
2.0
4.5
6.0
105
21
18
130
26
22
160
32
27
tPLH, tPHL Maximum Propagation Delay , Select to
Output Y (Figures 2 and 4)
2.0
4.5
6.0
110
22
19
140
28
24
165
33
28
ns
ns
ns
pF
tPLH, tPHL Maximum Propagation Delay , Output Enable to
Output Y (Figures 3 and 4)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
CIN
Maximum Input Capacitance
-
10
10
10
Power Dissipation Capacitance (Per Package)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
33
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Test Circuit
INTEGRAL
4
IN74HC157A
EXPANDED LOGIC DIAGRAM
INTEGRAL
5
IN74HC157A
CHIP PAD DIAGRAM IZ74HC157A
Pad size 0.120 x 0.120 mm (Pad size is given as per passivation layer)
Thickness of chip 0,46±0,02 mm
PAD LOCATION
Pad No
01
Symbol
X
Y
Pad size
SELECT
0.143
0.143
0.143
0.377
0.644
0.848
1.132
1.132
1.131
1.101
1.122
0.650
0.442
0.153
0.143
0.143
0.668
0.443
0.173
0.133
0.133
0.133
0.244
0.468
0.748
1.036
1.27
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.159
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.106
0.106x0.159
02
A0
03
B0
04
Y0
05
A1
06
B1
07
Y1
08
GND
09
Y2
10
B2
11
A2
12
Y3
0.311
1.311
1.271
1.069
0.838
13
B3
14
A3
OUTPUT ENABLE
Vcc
15
16
INTEGRAL
6
相关型号：
©2020 ICPDF网 联系我们和版权申明