ISL21440IUZ-T13_技术文档

Micropower Voltage Reference with Comparator

ISL21440

Features

• 1.8µA Supply Current Over Full Temperature Range

• Wide Supply Range. . . . . . . . . . . . . . . 2V to 11V

• Precision 1.182V ±0.5% Voltage Reference

• Comparator with User Programmable Hysteresis

• Temperature Range . . . . . . . . . -40°C to +125°C

• 8 Ld MSOP and 8 Ld TDFN Packages

The ISL21440 is a micropower, FGA™ reference and

comparator on a single chip. Drawing less than 1.8µA

supply current over the full operating temperature range,

the ISL21440 operates from a single 2V to 11V supply

and can also be used with split bipolar supplies.

The ISL21440’s on-board reference provides a 1.182V

±0.5% output. It features programmable hysteresis and

TTL/CMOS compatible outputs that sink and source

current. Low Bias currents permit high value divider

resistors for typical circuit current drains of <2.5µA.

• Pin Compatible Upgrade to MAX921 and LTC1440

Applications*(see page 13)

• Low Battery Detector

• Low Voltage Reset

The low supply current makes the ISL21440 ideal for

battery powered devices in battery level or low voltage

monitors circuits.

• Overvoltage Monitor

• Window Comparator

The ISL21440 is a pin-compatible, performance upgrade

of both the LTC1440, LTC1540, MAX921 and MAX931.

Typical Application

Reference Voltage vs

Temperature

Vdd

VBAT

1.190

V+ = 3V

1.188

V+

2.4M

IN+

IN-

1.186

+

-

OUT

LoBAT-

V+ = 5V

1.184

1.182

1.180

1.8M

HYST

REF

ISL21440

20k

1.178

V+ = 2V

1.176

1.174

1.172

2.4M

V-

GND

-40

-20

0

20

40

60

80

100 120

TEMPERATURE (°C)

LOW BATTERY DETECTOR

March 2, 2010

FN6532.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

All other trademarks mentioned are the property of their respective owners.

ISL21440

Block Diagram

V+

IN+

+

-

OUT

IN-

HYST

REF

ISL21440

V-

GND

Pin Configuration

Pin Descriptions

PIN SYMBOL

ISL21440

DESCRIPTION

(8 LD MSOP, 8 LD TDFN)

TOP VIEW

1

2

3

4

5

GND

V-

Ground pin. Sets the Comparator output

low level.

Negative Supply Input for Voltage

Reference and Comparator.

OUT

V+

GND

V-

1

2

3

4

8

7

6

5

IN+

IN-

Comparator non-inverting input pin.

Range: V- to V+ -1.5V.

IN+

IN-

REF

HYST

Comparator inverting input pin. Range: V-

to V+ -1.5V

HYST

Comparator Hysteresis input. Accepts a

voltage divided from the Reference

output. Range is VREF - 50mV to VREF.

Connect directly to VREF for zero

hysteresis.

6

7

8

REF

V+

Reference output. Source 2mA and Sink

10µA.

Positive Supply Input for Comparator and

Reference. Range is 2.0V to 11.0V

OUT

Comparator output, CMOS push-pull.

Output swing referenced to V+ and GND.

FN6532.1

March 2, 2010

2

ISL21440

Ordering Information

PART NUMBER

PART

V

RANGE

(V)

TEMP RANGE

(°C)

PACKAGE

(Pb-free)

PKG.

DWG. #

DD

(Notes 2, 3)

MARKING

ISL21440IUZ

1440Z

2 to 11

-40 to +125

8 Ld MSOP

8 Ld TDFN

M8.118

ISL21440IUZ-T13 (Note 1)

ISL21440IRTZ

1440Z

1440

M8.118

L8.3x3G

ISL21440IRTZ-T13 (Note 1)

NOTES:

1. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach

materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both

SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that

meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL21440. For more information on MSL please

see techbrief TB363.

FN6532.1

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ISL21440

Table of Contents

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . 2

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 5

Thermal Information . . . . . . . . . . . . . . . . . . . . . 5

Environmental Operating Conditions . . . . . . . . 5

Recommended Operating Conditions . . . . . . . . 5

Electrical Specifications . . . . . . . . . . . . . . . . . . 5

Typical Performance Curves . . . . . . . . . . . . . . . 7

Functional Description . . . . . . . . . . . . . . . . . . 11

Device Power . . . . . . . . . . . . . . . . . . . . . . . . 11

Comparator Section . . . . . . . . . . . . . . . . . . . . 11

Voltage Reference Section . . . . . . . . . . . . . . . 11

Applications Information . . . . . . . . . . . . . . . . 11

Handling and Board Mounting . . . . . . . . . . . . . 11

Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Board Assembly Considerations . . . . . . . . . . . . 12

Special Applications Considerations . . . . . . . . . 12

Typical Applications . . . . . . . . . . . . . . . . . . . . 12

Low Battery Detector . . . . . . . . . . . . . . . . . . . 12

Window Comparator . . . . . . . . . . . . . . . . . . . 12

Revision History . . . . . . . . . . . . . . . . . . . . . . . 13

Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

M8.118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

L8.3x3G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

FN6532.1

March 2, 2010

4

ISL21440

Absolute Maximum Ratings

Thermal Information

Supply Voltage Range, V+ to GND . . . . . . . . .-0.5V to +12V

IN+, IN- with Respect to V- . . . . . . . . -0.3V to (V+) +0.3V

GND with Respect to V-. . . . . . . . . . . . . . . . . 6.0V to -0.3V

V+ with Respect to V-. . . . . . . . . . . . . . . . . . . 12V to -0.3V

REF, HYST with Respect to V-. . . . . . . . . . . . . -0.3V to 1.5V

Out with Respect to GND. . . . . . . . . . . (V+) +0.3V to -0.3V

Thermal Resistance (Typical)

θ_JA(°C/W) θ_JC(°C/W)

8 Ld MSOP Package (Notes 5, 7). . . .

8 Ld TDFN Package (Notes 5, 6) . . . .

Maximum Junction Temperature (Plastic Package). . . +150°C

Storage Temperature Range. . . . . . . . . . . -65°C to +150°C

Pb-Free Reflow Profile (Note 8). . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

154

68

55

8

Voltage on All Other Pins. . . . . . . . . . . .-0.3V to V

ESD Rating

+ 0.3V

CC

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . 4000V

Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 350V

Charged Device Model . . . . . . . . . . . . . . . . . . . . . 2000V

Latch Up (Tested Per JESD-78B; Class1, Level A). . . . 100mA

Recommended Operating Conditions

Temperature. . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 5.5V

Environmental Operating Conditions

X-Ray Exposure (Note 4). . . . . . . . . . . . . . . . . . . .10mRem

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact

product reliability and result in failures not covered by warranty.

NOTES:

4. Measured with no filtering, distance of 10” from source, intensity set to 55kV and 70mA current, 30s duration. Other exposure

levels should be analyzed for Output Voltage drift effects. See “Applications Information” on page 11.

5. θ_JAis measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief

TB379 for details.

6. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.

JC

7. For θ , the “case temp” location is taken at the package top center.

JC

8. Post-reflow drift for the ISL21440 device voltage reference output will range from 100mV to 1.0mV based on experimental

results with devices on FR4 double sided boards. The design engineer must take this into account when considering the

reference voltage after assembly.

Analog Specifications V+= +5.0V. V- = GND = 0V unless otherwise specified, T = +25°C. Boldface limits apply

A

over the operating temperature range, -40°C to +125°C.

MIN

TYP

MAX

SYMBOL

PARAMETER

TEST CONDITIONS

(Note 10) (Note 9) (Note 10) UNITS

POWER SUPPLY

V

Supply Voltage Range

Supply Current

V- = GND

2.0

11.0

0.75

0.85

V

+

I

IN+ = IN- +80mV,

HYST = REF

0.46

µA

CC

COMPARATOR

V

I

Input Offset Voltage

V

= 2.5V

MSOP Package

TDFN Package

±3

±3.25

±3.6

±3.75

1.4

mV

OS

CM

mV

Input Leakage Current (IN+,

IN-, HYST)

= V

IN-

= 2.5V MSOP Package

TDFN Package

0.1

nA

IN+

IN

1.5

nA

3

nA

V

Common-Mode Input Range

V-

(V+) - 1.5

3

V

CM

CMRR

Common-Mode Rejection Ratio V- to (V+ - 1.5V)

MSOP Package

TDFN Package

1.2

mV/V

3.5

4.5

5

FN6532.1

March 2, 2010

5

ISL21440

Analog Specifications V+= +5.0V. V- = GND = 0V unless otherwise specified, T = +25°C. Boldface limits apply

A

over the operating temperature range, -40°C to +125°C. (Continued)

MIN

TYP

MAX

SYMBOL

PARAMETER

TEST CONDITIONS

V+ = 2V to 11V MSOP Package

(Note 10) (Note 9) (Note 10) UNITS

PSRR

Power Supply Rejection Ratio

0.25

1.1

1.2

1.5

mV/V

V

TDFN Package

1.6

REF

V

Hysteresis Input Voltage

REF -

50mV

HYST

t

Propagation Delay - High to

Low Transition

C = 100pF

Overdrive = 10mV

Overdrive = 100mV

Overdrive = 10mV

Overdrive = 100mV

100

50

µs

V

PHL

L

t

Propagation Delay - Low to

High Transition

C = 100pF

200

100

PLH

L

V

Output High Voltage

Output Low Voltage

I

= -10mA

= 3mA

(V+) - 0.4

1.176

OH

O

V

GND +

0.4

V

OL

O

REFERENCE

V

Reference Voltage

No Load

1.188

-2.0

-2.5

2.0

V

REF

ΔV

Output Load Regulation

0 ≤ I

≤ 2mA

SOURCE

-0.5

0.1

mV

REF

0 ≤ I

≤ 10µA

SINK

2.5

V+ = 3.0V, V- = GND = 0V

Supply Current

I

IN+ = IN- +80mV,

HYST =REF

0.40

0.7

µA

CC

0.8

COMPARATOR

V

Input offset Voltage

V

= 1.5V

MSOP Package

TDFN Package

±2.3

0.1

±3.4

±3.5

±4.2

±4.3

1.1

mV

OS

CM

mV

I

Input Leakage Current

(IN+, IN-, HYST)

= V

= 1.5V

IN-

nA

IN+

IN

3

nA

V

Common-Mode Input Range

V-

(V+) - 1.5

5

V

CM

CMRR

Common-Mode Rejection Ratio V- to (V+ - 1.5V)

MSOP Package

TDFN Package

MSOP Package

TDFN Package

1.2

mV/V

V

5.5

7.5

8

PSRR

Power Supply Rejection Ratio

V+ = 2V to 11V

0.25

1.1

1.2

1.5

1.6

V

Hysteresis Input Voltage

REF -

50mV

REF

HYST

FN6532.1

March 2, 2010

6

ISL21440

Analog Specifications V+= +5.0V. V- = GND = 0V unless otherwise specified, T = +25°C. Boldface limits apply

A

over the operating temperature range, -40°C to +125°C. (Continued)

MIN

TYP

MAX

SYMBOL

PARAMETER

TEST CONDITIONS

(Note 10) (Note 9) (Note 10) UNITS

t

Propagation Delay - High to

Low Transition

C = 100pF

Overdrive = 10mV

Overdrive = 100mV

Overdrive = 10mV

Overdrive = 100mV

100

50

µs

V

PHL

L

t

Propagation Delay - Low to

High Transition

C = 100pF

200

100

PLH

L

V

Output High Voltage

Output Low Voltage

I

= -7mA

= 3mA

(V+) - 0.4

1.176

OH

O

V

GND +

0.4

V

OL

O

REFERENCE

V

Reference Voltage

No Load

1.188

-2.0

-2.5

2.0

V

REF

ΔV

Output Load Regulation

0 ≤ I

≤ 2mA

SOURCE

-0.5

0.1

mV

REF

0 ≤ I

≤ 10µA

SINK

-2.5

NOTES:

9. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in V

divided by the temperature range; in this case, -40°C to +125°C = +165°C.

is

OUT

10. Parts are 100% tested at +25°C and +85°C. The -40°C and +125°C temperature limits are established by characterization and

are not production tested.

Typical Performance Curves

0.49

0.48

0.47

0.46

0.45

0.44

0.43

0.42

0.41

0.40

1.2

1.0

0.8

0.6

0.4

0.2

0

V+ = 5V

V+ = 3V

2

3

4

5

6

7

8

9

10

11

-40

-20

0

20

40

60

80

100 120

V

(V)

TEMPERATURE (°C)

DD

FIGURE 2. I

DD

vs V

DD

FIGURE 1. I

vs TEMPERATURE

DD

FN6532.1

March 2, 2010

7

ISL21440

Typical Performance Curves (Continued)

1.190

1.188

1.186

1.184

1.182

1.180

1.178

1.176

1.174

1.172

V+ = 3V

1.188

1.186

1.184

1.182

1.180

1.178

1.176

1.174

1.172

V+ = 5V

V+ = 2V

-40

-20

0

20

40

60

80

100 120

2

3

4

5

6

7

8

9

10 11 12

V

(V)

TEMPERATURE (°C)

DD

FIGURE 4. V

vs SUPPLY VOLTAGE

FIGURE 3. V

vs TEMPERATURE

REF

1.183

1.182

1.181

1.180

1.179

1.178

1.177

1.176

1.175

1.188

1.187

1.186

1.185

1.184

1.183

V+ = 5V

V+ = 3V

V+ = 2V

1.182

0

0.5

1.0

1.5

LOAD (mA)

2.0

2.5

3.0

0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50

LOAD (mA)

FIGURE 5. V

vs LOAD (SOURCE)

FIGURE 6. V

vs LOAD (SINK)

REF

1.30

1.25

1.20

1.15

1.10

1.05

1.00

3.0

2.5

2.0

1.5

1.0

0.5

NO

LOAD

10mA

LOAD

100mA

LOAD

V+ = 5V

V+ = 3V

V+ = 2V

V+ = 11V

0

1.00 1.25 1.50 1.75

2.00 2.25 2.50 2.75

3.00

2

4

6

I

8

10

12

14

V

(V)

(mA)

DD

LOAD

FIGURE 8. COMPARATOR OUTPUT LOW VOLTAGE vs

LOAD

FIGURE 7. DROPOUT - V

OUTPUT

REF

FN6532.1

March 2, 2010

8

ISL21440

Typical Performance Curves (Continued)

12

6

5

4

3

2

1

0

10

8

V+ = 11V

V+ = 5V

6

4

V+ = 3V

2

V+ = 2V

0

5

10 15

20 25 30 35 40

(mA)

45 50

-60-55-50-45-40-35-30-25-20-15-10 -5 0

5 10 15 20 25 30 35 40 45 50 55 60

I

LOAD

IN+ - IN- (mV)

FIGURE 9. COMPARATOR OUTPUT HIGH VOLTAGE vs

LOAD

FIGURE 10. HYSTERESIS - 0mV (V+ = 5V)

6

5

4

3

2

1

5

4

3

2

1

0

-60-55-50-45-40-35-30-25-20-15-10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60

IN+ - IN- (mV)

FIGURE 12. HYSTERESIS - 25mV (V+ = 5V)

FIGURE 11. HYSTERESIS - 12.5mV (V+ = 5V)

6

5

4

3

2

1

6

5

4

3

2

1

0

-60-55-50-45-40-35-30-25-20-15-10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60

IN+ - IN- (mV)

FIGURE 14. HYSTERESIS - 50mV (V+ = 5V)

FIGURE 13. HYSTERESIS - 37.5mV (V+ = 5V)

FN6532.1

March 2, 2010

9

ISL21440

Typical Performance Curves (Continued)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

3.0

2.5

2.0

1.5

1.0

0.5

0

-60-55-50-45-40-35-30-25-20-15-10 -5 0

5 10 15 20 25 30 35 40 45 50 55 60

-60-55-50-45-40-35-30-25-20-15-10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60

IN+ - IN- (mV)

FIGURE 15. HYSTERESIS - 0mV (V+ = 3V)

FIGURE 16. HYSTERESIS - 12.5mV (V+ = 3V)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

-60-55-50-45-40-35-30-25-20-15-10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60

-60-55-50-45-40-35-30-25-20-15-10 -5

0 5 10 15 20 25 30 35 40 45 50 55 60

IN+ - IN- (mV)

FIGURE 18. HYSTERESIS - 37.5mV (V+ = 3V)

FIGURE 17. HYSTERESIS - 25mV (V+ = 3V)

90

80

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

70

3V

60

50

40

30

5V

20

10 20 30 40 50 60 70 80 90 100 110 120

-60-55-50-45-40-35-30-25-20-15-10 -5

0 5 10 15 20 25 30 35 40 45 50 55 60

IN+ - IN- (mV)

INPUT VOLTAGE (mV)

FIGURE 20. OUTPUT RESPONSE TIME vs INPUT

FIGURE 19. HYSTERESIS - 50mV (V+=3V)

OVERDRIVE (t

)

PHL

FN6532.1

March 2, 2010

10

ISL21440

Typical Performance Curves (Continued)

270

245

220

195

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

170

145

120

95

3V

OUT

V+

70

45

5V

20

-0.5

10 20 30 40 50 60 70 80 90 100 110 120

INPUT VOLTAGE (mV)

0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

TIME (ms)

FIGURE 21. OUTPUT RESPONSE TIME vs INPUT

FIGURE 22. POWER-UP/DOWN OUTPUT RESPONSE

(V+ = 5V, IN+ = V+, IN- = V

OVERDRIVE (t

)

PLH

)

REF

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

OUT

V+

-0.5

0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

TIME (ms)

FIGURE 23. POWER-UP/DOWN OUTPUT RESPONSE (V+ = 3V, IN+ = V+, IN- = V

REF

)

The CMOS output swings essentially from the GND

potential to V+ potential, depending on load current. If

loads in excess of 1mA are expected, then a 0.1µF

decoupling capacitor at the V+ pin should be added.

Functional Description

Device Power

The ISL21440 device has a single positive supply pin, V+,

and two other supply pins, V- and GND. Normally for

single supply applications the V- pin is tied to system

ground as well as the GND pin. The separate ground pin

allows the comparator to be powered by split supplies

from ±1.0V to ±5.5V. Note that the minimum supply

voltage will be 0.8V above the comparator maximum

input level for accurate operation.

Voltage Reference Section

The voltage reference is a micropower FGA reference

and is set to 1.182V ±0.5% at the factory. The

reference output can source up to 2mA but the sink

capability is very limited at only 10µA, maximum.

Small value capacitors, up to 10nF, can be used on the

reference output to lower noise if desired.

Comparator Section

Applications Information

Handling and Board Mounting

FGA references provide excellent initial accuracy and

low temperature drift at the expense of very little

power drain. There are some precautions to take to

insure this accuracy is not compromised. Excessive

heat during solder reflow can cause excessive initial

accuracy drift, so the recommended +260°C max

The comparator inputs can swing from the negative

supply (GND pin) to within 0.8V of the positive supply

(V+). Alternatively, with the comparator input set at

the 1.182V reference level, the minimum input voltage

for accurate operation is 2.0V. If the inputs are

expected to see voltage levels above V+ or below

ground, they should be clamped with low leakage

Schottky diodes.

FN6532.1

March 2, 2010

11

ISL21440

temperature profile should not be exceeded. Expect up

to 1mV drift from the solder reflow process.

Special Applications Considerations

In addition to post-assembly examination, there are

also other X-ray sources that may affect the FGA

reference long term accuracy. Airport screening

machines contain X-rays and will have a cumulative

effect on the voltage reference output accuracy.

Carry-on luggage screening uses low level X-rays and

is not a major source of output voltage shift, although

if a product is expected to pass through that type of

screening over 100x it may need to consider shielding

with copper or aluminum. Checked luggage X-rays are

higher intensity and can cause output voltage shift in

much fewer passes, so devices expected to go through

those machines should definitely consider shielding.

Note that just two layers of 1/2 ounce copper planes

will reduce the received dose by over 90%. The lead

frame for the device which is on the bottom also

provides similar shielding.

FGA references are susceptible to excessive

X-radiation like that used in PC board manufacturing.

Initial accuracy can change 10mV or more under

extreme radiation. If an assembled board needs to be

X-rayed, care should be taken to shield the FGA

reference device.

Hysteresis

The Hysteresis function allows for changing the value of

the reference switchover point depending on the

previouse state of the comparator. This works to remove

the effects of noise or glitches in the voltage detection

input and provide more reliable output transitions.

Hysteresis is added to the ISL21440 by connecting one

resistor between the REF and HYST pins (R

), and

REF

another resistor(R

) between the HYST pin and

HYST

ground. The hysteresis voltage (V ) is designed to be

twice the voltage difference between the HYST pin and

If a device is expected to pass through luggage X-ray

machines numerous times, it is advised to mount a

2-layer (minimum) PC board over the top of the

package, which along with a ground plane underneath

will effectively shield it from 50 to 100 passes through

the machine. Since these machines vary in X-ray dose

delivered, it is difficult to produce an accurate

maximum pass recommendation.

H

REF pin (V = 2 * (V

voltage is 1.182V (V

- V

)). Since the reference

H

REF

HYST

), Equations 1 and 2 for these

two resistors are shown as follows:

(EQ. 1)

(EQ. 2)

∗

R

= V ⁄ (2 I

) = (V

– V

) ⁄ I

REF

H

REF

HYST

REF

= (1.182 – V ⁄ 2) ⁄ I

= V

⁄ I

Typical Applications

HYST

H

HYST REF

Low Battery Detector

I

is chosen to be less than the maximum output of

REF

the reference, usually 5µA is a safe value but for

lowest power, 0.1µA can be used.

Figure 24 shows a typical implementation for the

ISL21440, a low battery detector. The values for R

REF

and R

HYST

The input trip point for V

provide 20mV of hysteresis and 0.5µA I .

REF

If the hysteresis is not used, the HYST pin should be

tied to the REF pin.

is the same as the

detect

reference voltage, 1.182V, and a resistor divider at the

input sets the Lo trip point at 2.7V. The total

Board Assembly Considerations

FGA references provide high accuracy and low

BAT

current draw for the circuit is going to be 1.1µA for

V

and 0.6µA for V

.

temperature drift but some PC board assembly

precautions are necessary. Normal Output voltage shifts of

100µV to 1mV can be expected with Pb-free reflow

profiles or wave solder on multi-layer FR4 PC boards.

Precautions should be taken to avoid excessive heat or

extended exposure to high reflow or wave solder

temperatures, this may reduce device initial accuracy.

DD

BAT

V_DD

V_BAT

V+

2.4M

IN+

IN-

+

Lo_BAT-

OUT

-

Post-assembly X-ray inspection may also lead to

permanent changes in device output voltage and

should be minimized or avoided. If X-ray inspection is

required, it is advisable to monitor the reference

output voltage to verify excessive shift has not

occurred. If large amounts of shift are observed, it is

best to add an X-ray shield consisting of thin zinc

(300µm) sheeting to allow clear imaging, yet block x-

ray energy that affects the FGA reference.

1.8M

20k

HYST

REF

ISL21440

V- GND

2.4M

FIGURE 24. LOW BATTERY DETECTOR WITH

HYSTERESIS

FN6532.1

March 2, 2010

12

ISL21440

The resulting circuit draws about 3µA and works down to

= 2.2V.

Window Comparator

V

DD

The ISL21440 can be combined with a micropower to

produce a window comparator circuit. The circuit in

Figure 25 uses a 3 resistor divider to produce high and

low trip points, and the ISL28197 (800nA supply current)

comparator is added to give the second output. The two

outputs can be used separately for over or undervoltage

indication, or a gate can be added as shown to report

either in-window or out-of window condition.

V_BATOR V_DD

V_BAT

V+

R1

R2

IN+

V_LOW

-

+

-

OUT

IN-

V_WINDOW

HYST

REF

V_HI

-

ISL21440

The resistors are shown as Equations 3, 4 and 5 as

follows.

V-

GND

Set:

(EQ. 3)

R

= 1M(1%)

+

-

3

2

= R [V ⁄ V – 1]

(EQ. 4)

(EQ. 5)

ISL28197

3

H

L

R3

R

= R ([V ⁄ V

– 1] – R )

REF 2

1

3

H

Example: For V = 3.8V, V = 2.7V (3.3V ± 0.5V)

H

L

FIGURE 25. WINDOW COMPARATOR CIRCUIT

R = 402k, R = 1.82M (can be 1%)

2

1

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to

web to make sure you have the latest Rev.

DATE

REVISION

CHANGE

3/2/10

FN6532.1

Updated datasheet with the TDFN spec.

Spec added on pages 5-6 are: VOS, IIN, CMRR and PSRR. Each spec has an added row for the

TDFN package and the original limit for the MSOP package.

12/7/09

FN6532.0

Initial Release

Products

Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The

Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,

handheld products, and notebooks. Intersil's product families address power management and analog signal

processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.

*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device

information page on intersil.com: ISL21440

To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff

FITs are available from our website at http://rel.intersil.com/reports/search.php

FN6532.1

March 2, 2010

13

ISL21440

Mini Small Outline Plastic Packages (MSOP)

N

M8.118 (JEDEC MO-187AA)

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

INCHES

MILLIMETERS

E1

E

SYMBOL

MIN

MAX

MIN

0.94

0.05

0.75

0.25

0.09

2.95

MAX

1.10

0.15

0.95

0.36

0.20

3.05

NOTES

A

A1

A2

b

0.037

0.002

0.030

0.010

0.004

0.116

0.043

0.006

0.037

0.014

0.008

0.120

-

-B-

0.20 (0.008)

INDEX

AREA

1 2

A

B

C

-

TOP VIEW

4X θ

9

0.25

(0.010)

R1

c

-

R

GAUGE

PLANE

D

3

E1

e

4

SEATING

PLANE

L

0.026 BSC

0.65 BSC

-

-C-

4X θ

L1

A

A2

E

0.187

0.016

0.199

0.028

4.75

0.40

5.05

0.70

-

L

6

SEATING

PLANE

L1

N

0.037 REF

0.95 REF

-

0.10 (0.004)

-A-

C

b

8

7

-H-

A1

e

R

0.003

-

0.07

-

D

0.20 (0.008)

C

R1

0

-

o

5

15

5

15

-

a

SIDE VIEW

C

L

o

0

6

0

6

-

α

E

1

-B-

Rev. 2 01/03

0.20 (0.008)

C

D

END VIEW

NOTES:

1. These package dimensions are within allowable dimensions of

JEDEC MO-187BA.

2. Dimensioning and tolerancing per ANSI Y14.5M-1994.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs and are measured at Datum Plane. Mold flash, protrusion

and gate burrs shall not exceed 0.15mm (0.006 inch) per side.

4. Dimension “E1” does not include interlead flash or protrusions

- H -

and are measured at Datum Plane.

Interlead flash and

protrusions shall not exceed 0.15mm (0.006 inch) per side.

5. Formed leads shall be planar with respect to one another within

0.10mm (0.004) at seating Plane.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “b” does not include dambar protrusion. Allowable

dambar protrusion shall be 0.08mm (0.003 inch) total in excess

of “b” dimension at maximum material condition. Minimum space

between protrusion and adjacent lead is 0.07mm (0.0027 inch).

- B -

to be determined at Datum plane

-A -

10. Datums

and

.

- H -

11. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are for reference only.

FN6532.1

March 2, 2010

14

ISL21440

Package Outline Drawing

L8.3x3G

8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (TDFN)

Rev 0, 5/07

PIN 1 INDEX AREA

3.00

A

1.45

PIN 1 INDEX AREA

B

0.075 C

4X

6X 0.50 BSC

1.50

REF

3.00

1.75

8X 0.25

0.10 M C A B

8X 0.40

2.20

TOP VIEW

BOTTOM VIEW

SEE DETAIL X''

0.10 C

(8X 0.60)

(1.75)

(8X 0.25)

0.75

C

SEATING PLANE

0.08 C

(6X 0.50 BSC)

SIDE VIEW

(1.45)

(2.20)

5

TYPICAL RECOMMENDED LAND PATTERN

0.20 REF

c

0~0.05

DETAIL “X”

NOTES:

1. Controlling dimensions are in mm.

Dimensions in ( ) for reference only.

2. Unless otherwise specified, tolerance : Decimal ±0.05

Angular ±2°

3. Dimensioning and tolerancing conform to JEDEC STD MO220-D.

4. The configuration of the pin #1 identifier is optional, but must be located

within the zone indicated. The pin #1 identifier may be either a mold or

mark feature.

5. Tiebar shown (if present) is a non-functional feature.

For additional products, see www.intersil.com/product_tree

Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted

in the quality certifications found at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications

at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by

Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any

infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any

patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6532.1

March 2, 2010

15


型号：	ISL21440IUZ-T13
厂家：	Intersil
描述：	Micropower Voltage Reference with Comparator 微功耗电压参考与比较
文件：	总15页 (文件大小：536K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISL21440IUZ-T13 [INTERSIL]

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