ISL55290IUZ-T13 [INTERSIL]
Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Low Power Op Amp; 单路和双路超低噪音，超低失真，低功耗运算放大器
| 型号： | ISL55290IUZ-T13 |
| 厂家： | 
Intersil |
| 描述： | Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Low Power Op Amp |
| 文件： | 总18页 (文件大小：962K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL55190, ISL55290
®
Data Sheet
March 30, 2007
FN6262.1
Single and Dual Ultra-Low Noise, Ultra-Low
Distortion, Low Power Op Amp
Features
• 1.2nV/√Hz input voltage noise, f = 1kHz
O
The ISL55190 and ISL55290 are single and dual high speed
operational amplifiers featuring low noise, low distortion, and
rail-to-rail output drive capability. They are designed to
operate with single and dual supplies from +5VDC
(±2.5VDC) down to +3VDC (±1.5VDC). These amplifiers
draw 16mA of quiescent supply current per amplifier. For
power conservation, this family offers a low-power shutdown
mode that reduces supply current to 21µA and places the
amplifiers' output into a high impedance state. The ISL55190
ENABLE logic places the device in the shutdown mode with
EN = 0 and the ISL55290 is placed in the shutdown mode
with EN = 1.
• Harmonic Distortion -95dBc, -92dBc, f = 4MHz
O
• Stable at gains as low as 5
• 800MHz gain bandwidth product (A = 5)
V
• 268V/µs typical slew rate
• 16mA typical supply current (21µA in disable mode)
• 300µV typical offset voltage
• 25µA typical input bias current
• 3V to 5V single supply voltage range
• Rail-to-rail output
These amplifiers have excellent input and output overload
recovery times and outputs that swing rail-to-rail. Their input
common mode voltage range includes ground. The
• Enable pin
• Pb-free plus anneal available (RoHS compliant)
ISL55190 and ISL55290 are stable at gains as low as 5 with
an input referred noise voltage of 1.2nV/√Hz and harmonic
distortion products -95dBc (2nd) and -92dBc (3rd) below a
Applications
• High speed pulse applications
• Low noise signal processing
• ADC buffers
4MHz 2V
P-P
signal.
The ISL55190 is available in space-saving 8 Ld DFN and 8 Ld
SOIC packages. The ISL55290 is available in a 10 Ld MSOP
package.
• DAC output amplifiers
• Radio systems
Ordering Information
• Portable equipment
TABLE 1. ENABLE LOGIC
PART
NUMBER
(Note)
TAPE
AND
REEL
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ENABLE
EN = 1
DISABLE
EN = 0
ISL55190IBZ
55190 IBZ
-
8 Ld SOIC
8 Ld SOIC
MDP0027
MDP0027
ISL55190
ISL55290
ISL55190IBZ-T13 55190 IBZ
13”
EN = 0
EN = 1
(2,500 pcs) Tape and Reel
ISL55190IRZ
190Z
-
8 Ld DFN
8 Ld DFN
L8.3x3D
L8.3x3D
ISL55190IRZ-T13 190Z
13”
(2,500 pcs) Tape and Reel
ISL55290IUZ
5290Z
-
10 Ld MSOP MDP0043
10 Ld MSOP MDP0043
ISL55290IUZ-T13 5290Z
13”
(2500 pcs) Tape and Reel
Coming Soon
ISL55190EVAL1Z
Evaluation Board
Coming Soon
ISL55290EVAL1Z
Evaluation Board
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
ISL55190, ISL55290
Pinouts
ISL55190
(8 LD SOIC)
TOP VIEW
ISL55190
(8 LD DFN)
TOP VIEW
FEEDBACK
1
2
3
4
8
7
6
5
EN
EN
V +
1
2
3
4
8
7
6
5
IN-
IN+
V-
VS+
OUT
NC
FEEDBACK
OUT
NC
V-
-
+
-
+
IN-
IN+
ISL55290
(10 LD MSOP)
TOP VIEW
OUT_A
IN-_A
IN+_A
V-
1
2
3
4
5
10 V+
9
8
7
6
OUT_B
IN-_B
-
+
-
+
IN+_B
EN_B
EN_A
FN6262.1
March 30, 2007
2
ISL55190, ISL55290
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Thermal Resistance
θ
(°C/W)
JA
65.75
8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . .
8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . .
10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . .
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
110
115
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV
Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .300V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V+ = 5V, V -= GND, R = 1kΩ, R = 30Ω, R = 120Ω. unless otherwise specified. Parameters are per amplifier.
L
G
F
All values are at V+ = 5V, T = +25°C
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
DC SPECIFICATIONS
V
Input Offset Voltage
-1100
-300
0.43
500
µV
OS
ΔV
Input Offset Drift vs Temperature
-40°C to +85°C
µV/°C
OS
ΔT
---------------
I
I
Input Offset Current
-1.3
-0.3
-25
0.7
-40
3.8
µA
µA
V
OS
B
Input Bias Current
V
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Maximum Output Voltage Swing
0
CM
CMRR
PSRR
V
= 0V to 3.8V
80
80
85
95
100
115
39
dB
dB
dB
mV
V
CM
V+ = 3V to 5V
V = 0.5V to 4V, R = 1kΩ
O
A
VOL
L
V
Output low, R = 1kΩ
100
OUT
S,ON
S,OFF
L
Output high, R = 1kΩ, V+= 5V
4.960
4.978
16
L
I
I
Supply Current, Enabled
ISL55190
ISL55290
20
38
49
mA
mA
µA
mA
mA
V
30
Supply Current, Disabled
Short-Circuit Output Current
Short-Circuit Output Current
Supply Operating Range
ENABLE High Level
21
I +
R
R
= 10Ω
= 10Ω
110
110
3
130
130
O
L
L
I -
O
V
V
V
V+ to V-
5
SUPPLY
INH
Referred to -V
Referred to -V
ISL55190 (EN)
ISL55290 (EN)
ISL55190 (EN)
ISL55290 (EN)
2
V
ENABLE Low Level
0.8
80
V
INL
I
ENABLE Input High Current
20
0.8
5
nA
µA
µA
nA
ENH
V
= V+
EN
1.5
6.2
80
I
ENABLE Input Low Current
= V-
ENL
V
EN
20
FN6262.1
March 30, 2007
3
ISL55190, ISL55290
Electrical Specifications V+ = 5V, V -= GND, R = 1kΩ, R = 30Ω, R = 120Ω. unless otherwise specified. Parameters are per amplifier.
L
G
F
All values are at V+ = 5V, T = +25°C
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
2nd Harmonic Distortion
3rd Harmonic Distortion
A
= +5; V
= 100mV ; R /R = 402Ω/100Ω
P-P
800
-95
-92
-65
MHz
dBc
dBc
dB
V
OUT
f
g
HD
(4 MHz)
A
= 5; V
= 2V ; R /R = 402Ω/100Ω
P-P
V
OUT
f
g
ISO
Off-state Isolation; EN = 1 ISL55290;
EN = 0 ISL55190
f
= 10MHz; A = 5; V = 640mV
IN
;
P-P
O
V
R /R = 402Ω/100Ω; C = 1.2pF
f
g
L
X-TALK
ISL55290
Channel-to-Channel Crosstalk
f
= 10MHz; A = 5; V
(Driven Channel) =
-75
-45
-38
dB
dB
dB
O
V
OUT
640mV ; R /R = 402Ω/100Ω; C = 1.2pF
P-P
f
g
L
PSRR
Power Supply Rejection Ratio
V
= ±2.5V; A = 5; V
= 640mV
;
S
V
SOURCE
P-P
f
= 10MHz;
R /R = 402Ω/100Ω; C = 1.2pF
O
f
g
L
CMRR
Input Common Mode Rejection
V
= ±2.5V; A = 5; V
640mV
;
P-P
S
V
CM =
Ratio; f = 10MHz;
R /R = 402Ω/100Ω; C = 1.2pF
O
f
O
O
g
L
V
Input Referred Voltage Noise
Input Referred Current Noise
f
f
= 1kHz
1.2
6
nV/√Hz
pA/√Hz
N
IN
= 10kHz
TRANSIENT RESPONSE
SR Slew Rate
t , t Large Rise Time, t 10% to 90%
163
268
11.2
9.8
4.4
4.0
2.2
2.0
1.6
V/uS
ns
A
= 5; V
= 3.5V
; R /R = 402Ω/100Ω
P-P f g
r
f
r
V
OUT
Signal
C = 1.2pF
L
Fall Time, t 10% to 90%
ns
f
Rise Time, t 10% to 90%
A
= 5; V
= 1V ; R /R = 402Ω/100Ω
P-P
ns
r
V
OUT
f
g
C = 1.2pF
L
Fall Time, t 10% to 90%
ns
f
t , t , Small
Rise Time, t 10% to 90%
A
= 5; V
= 1V ; R /R = 402Ω/100Ω
ns
r
f
r
V
OUT
P-P
f
g
Signal
C = 1.2pF
L
Fall Time, t 10% to 90%
f
ns
t
t
Propagation Delay
A
= 5; V
= 100mV
; R /R = 402Ω/100Ω
ns
pd
V
OUT
P-P
f
g
10% V to 10% V
IN
C = 1.2pF
OUT
L
Positive Input Overload Recovery
Time, t ; 10% V to 10% V
V
= ±2.5V; A = 5; V = +V
IN
+0.1V;
15
18
ns
ns
ns
ns
ns
ns
ns
ns
IOL
S
V
CM
R /R = 402Ω/100Ω; C = 1.2pF
IOL+ IN
OUT
f
g
L
Negative Input Overload Recovery
Time, t ; 10% V to 10% V
V
= ±2.5V; A = 5; V = -V -0.5V;
IN
S
V
R /R = 402Ω/100Ω; C = 1.2pF
IOL-
IN
Positive Output Overload Recovery
Time, t ; 10% V to 10% V
OUT
f
g
L
t
t
V
= ±2.5V; A = 5; V = 1.1V
;
;
17
OOL
S
V
IN P-P
R /R = 402Ω/100Ω; C = 1.2pF
OOL+ IN OUT
f
g
L
Negative Output Overload Recovery
Time, t ; 10% V to 10% V
V
= ±2.5V; A = 5; V = 1.1V
IN P-P
17
S
V
R /R = 402Ω/100Ω; C = 1.2pF
OOL-
IN
ENABLE to Output Turn-on Delay
Time; 10% EN to 10% V
OUT
f
g
L
A
= 5; V = 500mV
IN
; R /R = 402Ω/100Ω
420
240
160
32
EN
V
P-P
f
g
ISL55190
C = 1.2pF
OUT
ENABLE to Output Turn-off Delay
Time; 10% EN to 10% V
L
A
= 5; V = 500mV
IN
; R /R = 402Ω/100Ω
f g
V
P-P
P-P
P-P
C = 1.2pF
OUT
ENABLE to Output Turn-on Delay
Time; 10% EN to 10% V
L
t
A
= 5; V = 500mV
IN
; R /R = 402Ω/100Ω
f g
EN
ISL55290
V
C = 1.2pF
OUT
ENABLE to Output Turn-off Delay
L
A
= 5; V = 500mV
IN
; R /R = 402Ω/100Ω
f g
V
Time;10% EN to 10% V
C = 1.2pF
OUT
L
FN6262.1
March 30, 2007
4
ISL55190, ISL55290
Typical Performance Curves
2
1
0
A
= 5
R = 1.21k, R = 301
V
L
f
G
R
= 1k
V
= 100mV
1
0
OUT
V
= 100mV
OUT
P-P
-1
-2
-3
-4
-5
-6
-7
R = 100, R = 24.9
-1
-2
-3
-4
-5
-6
-7
-8
f
G
V
= 200mV
OUT
R = 402, R = 100
f
G
V
= 1V
R = 604, R = 150
OUT
f
G
A
= 5
V
f
g
L
R = 402
R
R
= 100
= 1k
-8
.01
0.1
1.0
10
100
1k
0.1
1.0
10
FREQUENCY (MHz)
100
1k
FREQUENCY (MHz)
FIGURE 1. GAIN vs FREQUENCY vs R AND R
f
FIGURE 2. GAIN vs FREQUENCY vs V
OUT
g
70
60
50
40
30
20
10
0
1
0
R
C
C
= 1k
= 2.2pF
= 2.5pF
L
L
g
A
= 1000 R /R = 100k/100
f g
V
-1
-2
V
= 100mV
P-P
A
= 100 R /R = 10k/100
V
f
g
-3
-4
-5
-6
-7
-8
-9
R = 1000
L
R = 499
L
A
= 10 R /R = 909/100
f g
V
R = 249
L
A
= 5
V
C
C
R
= 0.8pF
= 1.2pF
= 100
g
L
g
R = 100
L
R = 402
f
A
= 5 R /R = 402/100
f g
V
V
= 100mV
P-P
0.1
1.0
10
FREQUENCY (MHz)
100
1k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FIGURE 3. ISL55290 GAIN vs FREQUENCY vs R
FIGURE 4. CLOSED LOOP GAIN vs FREQUENCY
L
1
0
4
C
= 13.2pF
L
3
2
1
-1
-2
-3
C
= 8.0pF
L
C
= 4.5pF
L
0
V
= 2.4V
-4
-5
-6
-7
-8
-9
C = 2.2pF
L
S
-1
-2
-3
C
= 1.2pF
L
A
= 5
=1.6pF
= 1k
V
V =5.0V
S
C
R
R
A
R
= 5
= 1k
g
L
V
L
f
g
-4
-5
=100
R = 402
g
R
V
= 100
= 100mV
R =402
f
V
=100mV
OUT P-P
OUT
P-P
-6
.01
0.1
1.0
10
100
1k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 5. GAIN vs FREQUENCY vs VS
FIGURE 6. ISL55190 GAIN vs FREQUENCY vs C
L
FN6262.1
March 30, 2007
5
ISL55190, ISL55290
Typical Performance Curves (Continued)
5
5
4
A
R
R
= 5
= 1k
= 100
C
= 9.0pF
= 7.6pF
A
R
= 5
= 1k
V
L
g
V
L
f
g
4
C
g
g
R = 402
C
= 13.2pF
g
L
3
3
R
V
= 100
= 100mV
R = 402
f
C
C
= 5.5pF
= 4.1pF
V
= 100mV
2
OUT
pp
2
OUT
P-P
C
= 8.0pF
L
1
1
g
0
0
C
= 3.0pF
= 2.3pF
g
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
C
= 2.2pF
L
C
C
= 2.2pF
g
L
C
= 1.2pF
C
= 1.8pF
L
g
C
= 0.8pF
g
.01
0.1
1.0
10
100
1k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 7. ISL55290 GAIN vs FREQUENCY vs C
FIGURE 8. ISL55190 GAIN vs FREQUENCY vs C
g
L
5
10M
A
R
R
= 5
= 1k
= 100
V
L
g
C
= 10.5pF
= 8.7pF
A = 5
V
4
3
g
R
= 1k
L
1M
100k
10k
1k
C
g
C
C
= 1.6pF
= 1.2pF
g
L
R = 402
f
2
V
= 100mV
OUT
P-P
C
C
= 5.2pF
= 3.8pF
R = 402
g
g
f
1
R
= 100
g
V
= 500mV
P-P
0
SOURCE
C
C
= 2.7pF
= 2.0pF
g
-1
-2
-3
-4
-5
100
10
g
C
= 1.6pF
g
C
= 0.5pF
g
1
.01
.01
0.1
1.0
10
100
1k
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 9. ISL55290 GAIN vs FREQUENCY vs C
FIGURE 10. DISABLED INPUT IMPEDANCE vs FREQUENCY
g
100k
10k
1k
1000
OUTPUT DISABLED
100
A
= 5
V
100
10
1
R
= 1k
L
A
= 5
V
R = 402
f
R = 402
f
R = 100
i
R
= 100
g
V
= 500mV
P-P
SOURCE
V
= 1V
P-P
SOURCE
10
.01
0.1
1.0
10
100
1k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 11. ENABLED INPUT IMPEDANCE vs FREQUENCY
FIGURE 12. DISABLED OUTPUT IMPEDANCE vs
FREQUENCY
FN6262.1
March 30, 2007
6
ISL55190, ISL55290
Typical Performance Curves (Continued)
100
10
0
A
= 5
A
R
= 5
= 100
V
V
C
R
R
= 0.8pF
= 1k
= 100
g
L
g
g
R = 402
-10
-20
-30
-40
-50
-60
-70
-80
-90
f
10
V
=1V
P-P
SOURCE
R = 402
f
V
= 1V
CM
P-P
1
OUTPUT ENABLED
0.1
0.01
.01
.01
0.1
1.0
10
100
1k
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 13. ENABLED OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 14. CMRR vs FREQUENCY
10
0
A
= 5
= 0.8pF
= 1k
V
A
= 5
V
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
C
R
R
g
L
g
C
C
R
= 1.6pF
= 1.2pF
= 1k
g
L
L
f
i
-20
PSRR-
= 100
R = 402
R = 402
R = 100
f
-40
V
= 1V
P-P
SOURCE
V
= 640mV
P-P
IN
-60
PSRR+
-80
-100
-120
.01
0.1
1.0
10
100
1k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 15. PSRR vs FREQUENCY
FIGURE 16. OFF ISOLATION vs FREQUENCY
100
10
1
0
-20
A = 100
V
A
= 5
V
C = 1.6pF
C
C
R
= 1.6pF
= 1.2pF
= 1k
g
g
L
L
f
i
R = 330
f
g
R
= 3.3
R = 1k
R = 402
R = 100
i
-40
V
(DRIVEN CHANNEL) = 640mV
OUT
P-P
-60
-80
-100
-120
0.1
1
10
100
1k
10k
100k
.01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FREQUENCY (Hz)
FIGURE 17. ISL55290 CHANNEL TO CHANNEL CROSSTALK
vs FREQUENCY
FIGURE 18. INPUT VOLTAGE NOISE vs FREQUENCY
FN6262.1
March 30, 2007
7
ISL55190, ISL55290
Typical Performance Curves (Continued)
1000
100
10
0.6
0.4
0.2
0
A
= 5
= ±2.5V
= 1k
= 1.3pF
= 1V
V
V
R
C
S
L
L
V
OUT
P-P
-0.2
-0.4
-0.6
A
C
= 100
= 1.6pF
V
g
f
g
R = 330
R
R = 1k
= 3.3
i
1
0
10 20 30 40 50 60 70 80 90 100
TIME (µs)
0.1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 19. INPUT NOISE CURRENT vs FREQUENCY
FIGURE 20. LARGE SIGNAL STEP RESPONSE
0.06
0.04
0.02
50
45
40
35
30
25
20
15
10
5
A
R
R
= 5
= 1k
= 100
V
L
3
2
V
= 0.1V
OUT
g
R = 402
f
A
= 5
= ±2.5V
= 1k
= 1.3pF
=100mV
V
V
S
R
C
V
L
L
1
0
-0.02
-0.04
-0.06
V
= 0.5V
OUT
OUT
P-P
0
V
= 1V
OUT
V
= 3.5V
-1
-2
-3
OUT
0
0
10 20 30 40 50 60 70 80 90 100
TIME (µs)
0
5
10
15
20
25
C
pF)
L (
FIGURE 21. SMALL SIGNAL STEP RESPONSE
FIGURE 22. ISL55290 PERCENT OVERSHOOT vs V
C
OUT, L
-1.0
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
3
3.0
2.5
2.0
1.5
1.0
0.5
0
A
R
= 5
= 10k
= ±2.5V
= 100
V
L
-1.5
2
1
V
INPUT
S
R
g
R = 402
-2.0
f
INPUT
V
= VCM +0.1V
IN
-2.5
-3.0
-3.5
-4.0
OUTPUT
0
OUTPUT
A
= 5
= 10k
= ±2.5V
= 100
V
R
-1
-2
-3
L
-0.5
-1.0
-1.5
-2.0
V
S
R
g
R = 402
f
V
= -V-0.5V
IN
0
10
20
30
40
50
60
70
80
0
10
20
30
40
TIME (ns)
50
60
70
80
TIME (ns)
FIGURE 23. POSITIVE INPUT OVERLOAD RECOVERY TIME
FIGURE 24. NEGATIVE INPUT OVERLOAD RECOVERY TIME
FN6262.1
March 30, 2007
8
ISL55190, ISL55290
Typical Performance Curves (Continued)
0.6
0.4
0.2
0
3
3.0
2.5
2.0
1.5
1.0
0.5
0
6.0
5.0
4.0
3.0
2.0
1.0
0
INPUT
2
A
R
R
= 5
V
L
g
= 1k
= 100
OUTPUT
1
OUTPUT
R = 402
f
V
= 0.5V
IN
0
A
R
= 5
= 10k
= +2.5V
= 100
V
L
ENABLE
-0.2
-0.4
-0.6
-1
-2
-3
V
S
R
g
f
R = 402
V
= 1.1V
P-P
IN
-0.5
-1.0
4.0
0
0.5
1.0 1.5
2.0 2.5
3.0 3.5
0
10 20 30 40 50 60 70 80 90 100
TIME (nS)
TIME (µs)
FIGURE 25. OUTPUT OVERLOAD RECOVERY TIME
FIGURE 26. ISL55290 ENABLE TO OUTPUT DELAY
265
-220
A
R
= 5
= 10k
V
L
-230
-240
-250
-260
-270
-280
-290
R = 100
i
255
245
235
225
215
R = 402
f
A
R
= 5
= 10k
V
L
R = 100
i
R = 402
f
3.0
3.5
4.0
4.5
5.0
5.5
3.0
3.5
4.0
4.5
5.0
5.5
V
(V)
V (V)
S
S
FIGURE 27. ISL55290 POSITIVE SLEW RATE vs VS
FIGURE 28. ISL55290 NEGATIVE SLEW RATE vs VS
24
34
n = 100
n = 100
32
22
MAX
30
MAX
20
28
MEDIAN
18
26
MEDIAN
24
22
20
16
14
MIN
ISL55190
12
18
MIN
16
10
-40
-40
-20
0
20
40
60
80
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. SUPPLY CURRENT ENABLED vs TEMPERATURE
= ±2.5V
FIGURE 30. SUPPLY CURRENT DISABLED vs TEMPERATURE
= ±2.5V
V
V
S
S
FN6262.1
March 30, 2007
9
ISL55190, ISL55290
Typical Performance Curves (Continued)
17.5
16.5
15.5
14.5
13.5
12.5
11.5
10.5
9.5
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
n = 100
n = 100
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
60
ISL55190
60 80
8.5
-40
-20
0
20
40
80
-40
-20
0
20
40
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 31. SUPPLY CURRENT ENABLED vs TEMPERATURE
= ±1.5V
FIGURE 32. SUPPLY CURRENT DISABLED vs
V
TEMPERATURE V = ±1.5V
S
S
600
300
500
300
n = 100
n = 100
MAX
MAX
MEDIAN
MEDIAN
100
0
-100
-300
-500
-700
-900
-1100
-300
-600
-900
-1200
MIN
MIN
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. V vs TEMPERATURE V = ±2.5V
IO
FIGURE 34. V vs TEMPERATURE V = ±1.5V
IO
S
S
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
n = 100
n = 100
MAX
MAX
MEDIAN
MEDIAN
MIN
40
MIN
40
-40
-20
0
20
60
80
-40
-20
0
20
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 35. I
vs TEMPERATURE V = ±2.5V
S
FIGURE 36. I vs TEMPERATURE V = ±2.5V
BIAS- S
BIAS+
FN6262.1
March 30, 2007
10
ISL55190, ISL55290
Typical Performance Curves (Continued)
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
n = 100
n = 100
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 37. I
vs TEMPERATURE V = ±1.5V
S
FIGURE 38. I
BIAS-
vs TEMPERATURE V = ±1.5V
S
BIAS+
0.4
0.5
n = 100
n = 100
0.2
0
0.3
0.1
MAX
MAX
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
-0.1
-0.3
-0.5
-0.7
-0.9
-1.1
-1.3
-1.5
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 39. I
vs TEMPERATURE V = ±2.5V
S
FIGURE 40. I
OS
vs TEMPERATURE V = ±1.5V
S
OS
98
97
96
95
94
93
92
91
n = 100
n = 100
130
120
110
100
90
V+ = 5V
MAX
MEDIAN
V+ = 3V
MIN
60
80
-40
-20
0
20
40
60
80
-40
-20
0
20
40
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 41. CMRR vs TEMPERATURE. V+ = ±2.5V, ±1.5V
FIGURE 42. PSRR vs TEMPERATURE ±1.5V to ±2.5V,
= ±2.5V
V
S
FN6262.1
March 30, 2007
11
ISL55190, ISL55290
Typical Performance Curves (Continued)
4.986
4.984
4.982
4.980
4.978
4.976
4.974
4.972
4.970
4.968
110
100
90
n = 100
n = 100
MAX
80
MAX
70
MEDIAN
60
50
40
MEDIAN
0
MIN
30
MIN
80
20
-40
-20
20
40
60
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 43. V
R
HIGH vs TEMPERATURE V = ±2.5V,
S
= 1k
FIGURE 44. V
LOW vs TEMPERATURE V = ±2.5V, R = 1k
OUT S L
OUT
L
2.986
60
55
50
45
40
n = 100
n = 100
MAX
2.984
2.982
2.980
2.978
2.976
2.974
2.972
MAX
MEDIAN
35
30
25
20
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 45. V
R
HIGH vs TEMPERATURE V = ±1.5V,
S
FIGURE 46. V
LOW vs TEMPERATURE V = ±1.5V, R = 1k
OUT
= 1k
OUT
S
L
L
FN6262.1
March 30, 2007
12
ISL55190, ISL55290
Pin Descriptions
ISL55190
ISL55190
ISL55290
(8 Ld SOIC)
(8 Ld DFN)
(10 Ld MSOP) PIN NAME
FUNCTION
Not connected
EQUIVALENT CIRCUIT
5
2
6
3
NC
2 (A)
8 (B)
IN-
Inverting input
V+
IN+
V-
IN-
Circuit 1
3
4
3 (A)
7 (B)
IN+
Non-inverting input
(See circuit 1)
4
6
5
7
4
V-
Negative supply
Output
1 (A)
9 (B)
OUT
V+
OUT
V-
Circuit 2
7
8
10
V+
Positive supply
5 (A)
6 (B)
EN
Enable pin with internal pull-
down referenced to the -V
pin; Logic “1” selects the
disabled state; Logic “0”
selects the enabled state.
V+
EN
V-
Circuit 3a
8
1
EN
Enable pin with internal pull-
down referenced to the -V
pin; Logic “0” (-V) selects
the disabled state; Logic “1”
(+V) selects the enabled
state.
V+
EN
V-
Circuit 3b
1
2
FEEDBACK Feedback pin to reduce IN-
capacitance
V+
FEEDBACK
OUT
V-
Circuit 4
FN6262.1
March 30, 2007
13
ISL55190, ISL55290
where:
Applications Information
• P
DMAXTOTAL
dissipation of each amplifier in the package (PD
is the sum of the maximum power
Product Description
)
MAX
The ISL55190 and ISL55290 are single and dual high
speed, voltage feedback amplifiers designed for fast pulse
applications, as well as communication and imaging systems
that require very low voltage and current noise. Both devices
are stable at a minimum gain of 5 and feature low distortion
while drawing moderately low supply current. The ISL55190
and ISL55290 use a classical voltage-feedback topology,
which allows them to be used in a variety of high speed
applications where current-feedback amplifiers are not
appropriate due to restrictions placed upon the feedback
element used with the amplifier.
• PD
for each amplifier can be calculated using
Equation 2:
MAX
V
OUTMAX
R
L
----------------------------
PD
= 2*V × I
+ (V - V ) ×
OUTMAX
MAX
S
SMAX
S
(EQ. 2)
where:
• T
= Maximum ambient temperature
MAX
• θ = Thermal resistance of the package
JA
• PD
= Maximum power dissipation of 1 amplifier
• V = Supply voltage
MAX
Enable/Power-Down
S
Both devices can be operated from a single supply with a
voltage range of +3V to +5V, or from split ±1.5V to ±2.5V.
The logic level input to the ENABLE pins are TTL compatible
and are referenced to the -V terminal in both single and split
supply applications. The following discussion assumes
single supply operation.
• I
= Maximum supply current of 1 amplifier
MAX
• V
= Maximum output voltage swing of the
OUTMAX
application
• R = Load resistance
L
The ISL55190 uses a logic “0” (<0.8V) to disable the
amplifier and the ISL55290 uses a logic “1” (>2V) to disable
its amplifiers. In this condition, the output(s) will be in a high
impedance state and the amplifier(s) current will be reduced
to 21µA. The ISL55190 has an internal pull-up on the EN pin
and is enabled by either floating or tying the EN pin to a
voltage >2V. The ISL55290 has internal pull-downs on the
EN pins and are enabled by either floating or tying the EN
pins to a voltage <0.8V. The enable pins should be tied
directly to their respective supply pins when not being used
(EN tied to -V for the ISL55290 and EN tied to +V for the
ISL55190).
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Low
impedance ground plane construction is essential. Surface
mount components are recommended, but if leaded
components are used, lead lengths should be as short as
possible. The power supply pins must be well bypassed to
reduce the risk of oscillation. The combination of a 4.7µF
tantalum capacitor in parallel with a 0.01µF capacitor has
been shown to work well when placed at each supply pin.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the inverting input. When
ground plane construction is used, it should be removed
from the area near the inverting input to minimize any stray
capacitance at that node. Carbon or Metal-Film resistors are
acceptable with the Metal-Film resistors giving slightly less
peaking and bandwidth because of additional series
inductance. Use of sockets (particularly for the SOIC
package) should be avoided if possible. Sockets add
parasitic inductance and capacitance which, will result in
additional peaking and overshoot.
Current Limiting
The ISL55190 and ISL55290 have no internal current-
limiting circuitry. If the output is shorted, it is possible to
exceed the Absolute Maximum Rating for output current or
power dissipation, potentially resulting in the destruction of
the device.
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
For inverting gains, this parasitic capacitance has little effect
because the inverting input is a virtual ground, but for non-
inverting gains, this capacitance (in conjunction with the
feedback and gain resistors) creates a pole in the feedback
path of the amplifier. This pole, if low enough in frequency,
has the same destabilizing effect as a zero in the forward
open-loop response. The use of large-value feedback and
gain resistors exacerbates the problem by further lowering
the pole frequency (increasing the possibility of oscillation).
maximum junction temperature (T
) for all applications
JMAX
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
T
= T
+ (θ xPD
)
MAXTOTAL
JMAX
MAX
JA
(EQ. 1)
FN6262.1
March 30, 2007
14
ISL55190, ISL55290
CURRENT
INPUT
+5VDC
R
F
10kΩ
R
G-
100
ISL55190
R
T
IN- V+
PARASITIC
L TO R
R
FEEDBACK
SENSE
0.01Ω
VOUT
OUT
V-
IN+
R
G+
100Ω
R
L
R
REF
10kΩ
V
REF
+2.5V
CURRENT
INPUT
FIGURE 47. GROUND SIDE CURRENT SENSE AMPLIFIER
The ISL55190 single has a dedicated feedback pin which is
internally connected to the amplifier output and located next
to the inverting input pin. This additional output connection
enables the PC board trace capacitance at the inverting pin
to be minimized.
Current Sense Application Circuit
The schematic in Figure 47 provides an example of utilizing
the ISL55190 high speed performance with the ground
sensing input capability to implement a single-supply, G =1 0
differential low side current sense amplifier. This circuit can
be used to sense currents of either polarity. The reference
voltage applied to V
(+2.5V) defines the amplifier output
REF
0A current sense reference voltage at one half the supply
voltage level (V = +5VDC), and R sets the current
S
SENSE
sense gain and full scale values. In this example the current
gain is 10A/V over a maximum current range of slightly less
than ±25A with R
= 0.01Ω. The amplifier V error
IO
SENSE
(-1.1mV max) and input bias offset current (I ) error (1.3µA)
IO
together contribute less than 15mV (150mA) at the output for
better than 0.3% full scale accuracy.
The amplifier’s high slew rate and fast pulse response make
this circuit suitable for low-side current sensing in PWM and
motor control applications. The excellent input overload
recovery response enables the circuit to maintain
performance in the presence of parasitic inductance that can
cause fast rise and falling edge spikes that can momentarily
overload the input stage of the amplifier.
FN6262.1
March 30, 2007
15
ISL55190, ISL55290
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
±0.003
±0.002
±0.003
±0.001
±0.004
±0.008
±0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
±0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN6262.1
March 30, 2007
16
ISL55190, ISL55290
Package Outline Drawing
L8.3x3D
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (DFN)
Rev 0, 9/06
PIN 1 INDEX AREA
3.00
A
1.45
PIN 1 INDEX AREA
B
0.075 C
4X
6X 0.50 BSC
1.50
REF
3.00
1.75
8X 0.25
0.10 M C A B
8X 0.40
2.20
TOP VIEW
BOTTOM VIEW
SEE DETAIL X''
0.10 C
(8X 0.60)
(1.75)
(8X 0.25)
0.85
C
SEATING PLANE
0.08 C
(6X 0.50 BSC)
SIDE VIEW
(1.45)
(2.20)
5
TYPICAL RECOMMENDED LAND PATTERN
0.20 REF
c
0~0.05
DETAIL “X”
NOTES:
1. Controlling dimensions are in mm.
Dimensions in ( ) for reference only.
2. Unless otherwise specified, tolerance : Decimal ±0.05
Angular ±2°
3. Dimensioning and tolerancing conform to JEDEC STD MO220-D.
4. The configuration of the pin #1 identifier is optional, but must be located
within the zone indicated. The pin #1 identifier may be either a mold or
mark feature.
5. Tiebar shown (if present) is a non-functional feature.
FN6262.1
March 30, 2007
17
ISL55190, ISL55290
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
MSOP8 MSOP10
1.10 1.10
N
SYMBOL
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
0.08
M
C A B
b
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3° ±3°
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6262.1
March 30, 2007
18
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