IRF7749L2PBF [INFINEON]
RoHS Compliant, Halogen Free;
| 型号： | IRF7749L2PBF |
| 厂家： | 
Infineon |
| 描述： | RoHS Compliant, Halogen Free |
| 文件： | 总11页 (文件大小：319K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97434
IRF7749L2TRPbF
IRF7749L2TR1PbF
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l RoHS Compliant, Halogen Free
l Lead-Free (Qualified up to 260°C Reflow)
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Optimized for Synchronous Rectification
VDSS
VGS
RDS(on)
1.1mΩ@ 10V
Vgs(th)
60V min ±20V max
Qg tot
Qgd
l Low Conduction Losses
l High Cdv/dt Immunity
200nC
71nC
2.9V
l Low Profile (<0.7mm)
l Dual Sided Cooling Compatible
l Compatible with existing Surface Mount Techniques
l Industrial Qualified
S
S
S
S
S
S
S
S
G
D
D
DirectFET ISOMETRIC
L8
Applicable DirectFET Outline and Substrate Outline
SB
SC
M2
M4
L4
L6
L8
Description
The IRF7749L2TR/TR1PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to
achieve the lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile. The DirectFET package
is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package
allows dual sided cooling to maximize thermal transfer in power systems.
The IRF7749L2TR/TR1PbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses
in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system
reliability improvements, and makes this device ideal for high performance power converters.
Absolute Maximum Ratings
Max.
60
Parameter
Units
V
VDS
Drain-to-Source Voltage
Gate-to-Source Voltage
±20
200
140
33
V
GS
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
I
I
I
I
I
@ TC = 25°C
D
D
D
D
A
@ TC = 100°C
@ TA = 25°C
@ TC = 25°C
375
800
260
120
DM
EAS
IAR
Single Pulse Avalanche Energy
mJ
A
Avalanche Current
1.60
1.40
1.20
1.00
0.80
12.0
10.0
8.0
V
V
V
V
= 6.0V
= 8.0V
= 10V
= 14V
T
= 25°C
I
= 120A
GS
GS
GS
GS
C
D
6.0
T
T
= 25°C
J
4.0
= 125°C
J
2.0
0.0
4.0
6.0
V
8.0
10.0 12.0 14.0 16.0
40
80
120
160
200
, Gate-to-Source Voltage (V)
GS
I , Drain Current (A)
D
Fig 1. Typical On-Resistance vs. Gate Voltage
Fig 2. Typical On-Resistance vs. Drain Current
Notes:
TC measured with thermocouple mounted to top (Drain) of part.
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.035mH, RG = 25Ω, IAS = 120A.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
www.irf.com
1
11/17/09
IRF7749L2TR/TR1PbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250μA
Parameter
Min. Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
60
–––
0.03
1.1
2.9
-10
–––
–––
–––
–––
–––
200
36
–––
–––
1.50
4.0
V
V/°C
mΩ
V
Reference to 25°C, ID = 2mA
VGS = 10V, ID = 120A i
VDS = VGS, ID = 250μA
ΔΒVDSS/ΔTJ
RDS(on)
–––
–––
2.0
VGS(th)
ΔVGS(th)/ΔTJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
280
–––
–––
–––
–––
–––
–––
–––
–––
––– mV/°C
VDS = 60V, VGS = 0V
VDS = 48V, VGS = 0V, TJ = 125°C
VGS = 20V
20
250
100
-100
–––
300
–––
–––
110
–––
–––
–––
–––
–––
–––
–––
–––
μA
nA
S
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
VGS = -20V
VDS = 10V, ID = 120A
gfs
Qg
VDS = 30V
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Output Charge
VGS = 10V
ID = 120A
See Fig. 9
12
nC
71
100
83
VDS = 16V, VGS = 0V
67
nC
Gate Resistance
1.1
17
Ω
VDD = 30V, VGS = 10Vꢁi
ID = 120A
td(on)
tr
td(off)
tf
Turn-On Delay Time
–––
–––
–––
–––
Rise Time
43
RG=1.8Ω
Turn-Off Delay Time
78
ns
Fall Time
39
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 12320 –––
––– 1810 –––
VDS = 25V
Output Capacitance
pF
ƒ = 1.0MHz
Reverse Transfer Capacitance
Output Capacitance
–––
850
–––
VGS = 0V, VDS = 1.0V, f=1.0MHz
VGS = 0V, VDS = 120V, f=1.0MHz
––– 8060 –––
––– 1310 –––
Output Capacitance
Diode Characteristics
Conditions
MOSFET symbol
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
IS
–––
–––
200
showing the
A
ISM
integral reverse
Pulsed Source Current
(Body Diode)ꢁg
–––
–––
800
p-n junction diode.
TJ = 25°C, IS = 120A, VGS = 0V i
TJ = 25°C, IF = 120A, VDD = 30V
di/dt = 100A/μs i
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
45
1.3
68
V
ns
nC
Qrr
78
120
Notes:
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
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IRF7749L2TR/TR1PbF
Absolute Maximum Ratings
Max.
125
Parameter
Units
W
Power Dissipation
Power Dissipation
Power Dissipation
P
P
P
@TC = 25°C
@TC = 100°C
@TA = 25°C
D
D
D
P
J
63
3.3
270
Peak Soldering Temperature
Operating Junction and
°C
T
T
T
-55 to + 175
Storage Temperature Range
STG
Thermal Resistance
Parameter
Typ.
–––
12.5
20
Max.
45
Units
Rθ
Rθ
Rθ
Rθ
Rθ
Junction-to-Ambient
JA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Can
–––
–––
1.2
JA
°C/W
JA
–––
–––
J-Can
J-PCB
Junction-to-PCB Mounted
0.5
10
1
D = 0.50
0.20
0.10
0.05
0.1
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.02
0.01
0.10804
0.61403
0.45202
0.00001
0.000171
0.053914
0.006099
0.036168
τ
τ
J τJ
τ
Cτ
0.01
0.001
0.0001
1τ1
Ci= τi/Ri
τ
τ
τ
2τ2
3τ3
4τ4
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Notes:
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Surface mounted on 1 in. square Cu board, steady state.
TC measured with thermocouple incontact with top (Drain) of part.
Used double sided cooling, mounting pad with large heatsink.
R is measured at TJ of approximately 90°C.
θ
Surface mounted on 1 in. square Cu
Mounted on minimum footprint full size board with metalized
board (still air).
back and with small clip heatsink. (still air)
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3
IRF7749L2TR/TR1PbF
1000
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
7.0V
5.0V
4.5V
4.3V
4.0V
3.8V
7.0V
5.0V
4.5V
4.3V
4.0V
3.8V
100
10
1
BOTTOM
BOTTOM
≤ 60μs PULSE WIDTH
Tj = 25°C
3.8V
3.8V
≤ 60μs PULSE WIDTH
Tj = 175°C
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
2.0
1.5
1.0
0.5
1000
I
= 120A
= 10V
D
V
GS
100
T
T
T
= 175°C
J
J
J
= 25°C
= -40°C
10
1
V
= 25V
DS
≤ 60μs PULSE WIDTH
0.1
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
V
, Gate-to-Source Voltage (V)
GS
T
, Junction Temperature (°C)
J
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
100000
14
V
C
= 0V,
f = 1 MHZ
GS
I
= 120A
= C + C , C SHORTED
D
iss
gs
gd ds
12
10
8
V
V
V
= 48V
= 30V
= 12V
C
= C
DS
DS
DS
rss
gd
C
= C + C
oss
ds
gd
Ciss
10000
1000
100
6
Coss
Crss
4
2
0
0
40
Q
80
120 160 200 240 280
1
10
100
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 9. Typical Total Gate Charge vs
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Gate-to-Source Voltage
4
www.irf.com
IRF7749L2TR/TR1PbF
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
1000
100
10
100μsec
1msec
T
T
T
= 175°C
= 25°C
= -40°C
J
J
J
DC
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
1
0
1
10
100
0.2
0.4
V
0.6
0.8
1.0
1.2
1.4
V
, Drain-toSource Voltage (V)
, Source-to-Drain Voltage (V)
DS
SD
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
200
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250μA
160
120
80
40
0
25
50
75
100
125
150
175
-75 -50 -25
0
J
25 50 75 100 125 150 175
, Temperature ( °C )
T
, CaseTemperature (°C)
T
C
Fig 13. Typical Threshold Voltage vs.
Fig 12. Maximum Drain Current vs. Case Temperature
Junction Temperature
1200
I
D
TOP
20A
31A
120A
1000
800
600
400
200
0
BOTTOM
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF7749L2TR/TR1PbF
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
Duty Cycle = Single Pulse
100
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 19a, 19b.
280
240
200
160
120
80
TOP
BOTTOM 1% Duty Cycle
= 120A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
40
0
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
175
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy Vs. Temperature
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·ta
Driver Gate Drive
P.W.
D.U.T
Period
D =
Period
P.W.
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
-
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
Re-Applied
Voltage
RG
+
-
• Driver same type as D.U.T.
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel HEXFET® Power MOSFETs
6
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IRF7749L2TR/TR1PbF
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
20K
Qgs1
Qgs2
Qgodr
Qgd
Fig 18a. Gate Charge Test Circuit
Fig 18b. Gate Charge Waveform
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
VGS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
I
AS
Fig 19b. Unclamped Inductive Waveforms
Fig 19a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 20a. Switching Time Test Circuit
Fig 20b. Switching Time Waveforms
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7
IRF7749L2TR/TR1PbF
DirectFET Board Footprint, L8 (Large Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
D
D
S
S
S
S
S
S
S
S
G
8
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IRF7749L2TR/TR1PbF
DirectFET Outline Dimension, L8 Outline (LargeSize Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
IMPERIAL
MIN
METRIC
MAX
CODE MIN
MAX
0.360
0.280
0.236
0.026
0.024
0.048
0.017
0.030
0.017
0.058
0.106
0.028
0.003
0.007
9.15
7.10
6.00
0.65
A
B
C
D
E
F
0.356
0.270
0.232
0.022
9.05
6.85
5.90
0.55
0.58
1.18
0.98
0.73
0.38
1.34
2.52
0.59
0.03
0.09
0.62 0.023
1.22
1.02 0.015
0.77
0.42 0.015
0.046
G
H
J
0.029
1.47
2.69
0.70
0.08
0.18
K
L
0.053
0.099
0.023
0.001
0.003
M
N
P
DirectFET Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
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9
IRF7749L2TR/TR1PbF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel
quantity is 4000 parts. (ordered as IRF7749L2PBF).
REEL DIMENSIONS
STANDARD OPTION (QTY 4000)
METRIC
MAX
IMPERIAL
CODE
MIN
MIN
MAX
N.C
A
B
C
D
E
F
12.992
0.795
0.504
0.059
3.937
N.C
330.0
20.2
12.8
1.5
N.C
N.C
13.2
N.C
N.C
22.4
18.4
18.4
N.C
0.520
N.C
100.0
N.C
N.C
0.889
0.724
0.724
G
H
0.646
0.626
16.4
15.9
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
DIMENSIONS
METRIC
IMPERIAL
CODE
MIN
MAX
0.476
0.161
0.642
0.299
0.291
0.398
NC
MIN
MAX
12.10
4.10
16.30
7.60
A
B
C
D
E
F
0.469
0.154
0.626
0.291
0.284
0.390
0.059
0.059
11.90
3.90
15.90
7.40
7.20
9.90
1.50
1.50
7.40
10.10
NC
G
H
0.063
1.60
10
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IRF7749L2TR/TR1PbF
Part number
Package Type
Standard Pack
Form
Tape and Reel
Tape and Reel
Note
Quantity
4000
1000
IRF7749L2TRPbF
IRF7749L2TR1PbF
DirectFET2 Large Can
DirectFET2 Large Can
"TR" suffix
"TR1" suffix
Qualification Information†
Industrial ††
(per JEDEC JESD47F††† guidelines)
Qualification level
Comments: This family of products has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is granted by extension of the
higher Industrial level.
MSL1
Moisture Sensitivity Level
RoHS Compliant
DFET2
(per JEDEC J-STD-020D†††
)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Data and specifications subject to change without notice.
This product has been designed and qualified to MSL1 rating for the Industrial market.
Additional storage requirement details for DirectFET products can be found in application note AN1035 on IRs Web site.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/09
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11
相关型号：
IRF7751PBF
Small Signal Field-Effect Transistor, 4.5A I(D), 30V, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, MO-153AA, LEAD FREE, TSSOP-8
INFINEON
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