LT1943EFE#TR [Linear]
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| 型号： | LT1943EFE#TR |
| 厂家： | 
Linear |
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Final Electrical Specifications
LT1943
High Current Quad Output
Regulator for TFT LCD Panels
U
September 2003
DESCRIPTIO
FEATURES
The LT®1943 quad output adjustable switching regulator
provides power for large TFT LCD panels. The device,
housed in a low profile 28 pin thermally enhanced TSSOP
package, cangeneratea3.3Vor5Vlogicsupplyalongwith
the triple output supply required for the TFT LCD panel.
Operatingfromaninputrangeof4.5Vto22V, astep-down
regulator provides a low voltage output VLOGIC with up to
2A current. A high-power step-up converter, a lower-
power step-up converter and an inverting converter pro-
vide the three independent output voltages AVDD, VON and
■
4 Integrated Switches: 2.4A Buck, 2.6A Boost,
0.35A Boost, 0.35A Inverter (Guaranteed Minimum
Current Limit)
■
Fixed Frequency, Low Noise Outputs
■
Soft Start for all Outputs
■
Externally Programmable VON Delay
■
Integrated Schottky Diode for VON Output
■
PGOOD Pin for AVDD Output Disconnect
■
4.5V to 22V Input Voltage Range
PanelProtectTM Circuitry Disables VON Upon Fault
■
V
OFF required by the LCD panel. A high-side PNP provides
■
Thermally EnhanUced 28-Lead TSSOP
delayed turn-on of the VON signal and can handle up to
30mA. Protection circuitry ensures VON is disabled if any
of the four outputs are more than 10% below normal
voltage.
APPLICATIO S
■
Large TFT-LCD Desktop Monitor Displays
Flat Panel Televisions
■
All switchers are synchronized to the internal 1.2MHz
clock, allowing the use of low profile inductors and ce-
ramic capacitors throughout. A current mode architecture
provides excellent transient response. For best flexibility,
all outputs are adjustable. Soft-start is included in all four
channels. A PGOOD pin can drive an optional PMOS pass
device to provide output disconnect for the AVDD output.
, LTC and LT are registered trademarks of Linear Technology Corporation.
PannelProtect is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
V
IN,
8V TO 20V
ZHCS400
B240A
10µH
V
OFF
AV
DD
–10V
13V
50mA
500mA
0.47µF
1µF
25V
10µF
16V
33µH
10µH
95.3k
10.0k
10µF
2.2µF
Startup Waveforms
80.6k
ZHCS400
V
SW3
IN
SW4
SW2
FB2
RUN-SS
2V/DIV
NFB4
0.015µF
0.015µF
0.047µF
V
RUN-SS
SS-234
LOGIC
LT1943
10.0k
10pF
10µH
5V/DIV
AV
DD
FB4
C
T
10V/DIV
BIAS
BOOST
PGOOD
PGOOD
V
ON
V
OFF
V
ON
30V
10V/DIV
30mA
0.22µF
10V
E3
CMDSH-3
SW1
232k
V
E3
4.7µH
B230A
20V/DIV
16.2k
FB3
V
LOGIC
3.3V
2A
V
ON
FB1
VC1
GND
SGND
VC4
10.0k
2.2µF
50V/DIV
10.0k
I
IN(AVG)
1A/DIV
VC2
VC3
22µF
5ms/DIV
0.47µF
27.4k
100pF
2.2nF
13k
47.5k
100pF
6.81k
100pF
2.2nF
100pF
2.2nF
680pF
1943 F01
Figure 1. Quad Output TFT-LCD Power Supply
1943i
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LT1943
W W U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
TOP VIEW
VIN Voltage .............................................................. 25V
BOOST Voltage ........................................................ 36V
BOOST Voltage Above SW1..................................... 25V
BIAS Pin Voltage ..................................................... 18V
SW2, SW4 Pin Voltages .......................................... 40V
SW3 Voltage ............................................................ 36V
FB1, FB2, FB3, FB4 Voltages...................................... 4V
NFB4 Voltage ................................................ +6V, –0.6V
VC1, VC2, VC3, VC4 Pin Voltages.............................. 6V
RUN-SS, SS-234 Pin Voltages................................... 6V
PGOOD Pin Voltage ................................................. 36V
E3 Pin Voltage ......................................................... 36V
NUMBER
GND
VC1
1
2
SW2
SW2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LT1943EFE
VC2
3
V
ON
FB1
4
C
T
FB2
5
E3
FB3
6
PGOOD
BIAS
NFB4
FB4
7
29
8
SW3
VC3
9
GND
VC4
10
11
12
13
14
SW4
SGND
BOOST
SW1
SW1
RUN-SS
SS-234
FE PART MARKING
1943EFE
V
IN
V
IN
FE PACKAGE
28-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 29) IS GROUND
(MUST BE SOLDERED TO PCB)
V
ON Voltage ............................................................. 36V
CT Pin Voltage ........................................................... 6V
Junction Temperature........................................... 125°C
Operating Temperature Range (Note 2) ...–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TJMAX = 150°C, θJA = 25°C/W, θJC = 7.5°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
4.5
UNITS
Minimum Input Voltage
Maximum Input Voltage
Quiescent Current
●
V
V
22
Not Switching
RUN-SS = SS-234 = 0V
10
35
14
45
mA
µA
RUN-SS, SS-234 Pin Current
RUN-SS, SS-234 Threshold
BIAS Pin Voltage to Begin SS-234 Charge
BIAS Pin Current
RUN-SS, SS-234 = 0.4V
1.7
0.8
2.8
10.5
125
20
µA
V
●
2.4
3.15
15
V
BIAS = 3.1V, All Switches Off
(Note 3)
mA
mV
µA
V
FB Threshold Offset to Begin C Charge
90
16
160
25
T
C Pin Current Source
T
All FB Pins = 1.5V
All FB Pins = 1.5V
C Threshold to Power V
T
1.0
1.1
180
60
1.2
240
ON
V
Switch Drop
V
V
Current = 30mA
= 30V
mV
mA
mV
µA
ON
ON
E3
Maximum V Current
●
●
30
90
ON
PGOOD Threshold Offset
PGOOD Pin Leakage
125
160
1
V
= 36V
PGOOD
Master Oscillator Frequency
1.1
1.0
1.2
1.35
1.46
MHz
MHz
Foldback Switching Frequency
Frequency Shift Threshold on FB
All FB Pins = 0V
250
0.5
kHz
V
∆200kHz
1943i
2
LT1943
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCH 1 (2.4A BUCK)
FB1 Voltage
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB1 Voltage Line Regulation
FB1 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
3.2
310
0.1
1.8
30
0.03
600
%/V
nA
IN
(Note 4)
Error Amplifier 1 Voltage Gain
Error Amplifier 1 Transconductance
Switch 1 Current Limit
V/V
µmhos
A
∆I = 5µA
Duty Cycle = 35%
●
2.4
82
4.3
470
10
Switch 1 V
I
= 2A
SW
mV
µA
CESAT
Switch 1 Leakage Current
Minimum BOOST Voltage Above SW1 Pin
BOOST Pin Current
FB1 = 1.5V
I
I
= 1.5A
= 1.5A
2.5
50
V
SW
SW
mA
%
Maximum Duty Cycle (SW1)
SWITCH 2 (2.6A BOOST)
FB2 Voltage
●
92
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB2 Voltage Line Regulation
FB2 Pin Bias Current
4.5V < V < 22V
0.01
220
200
450
3.8
360
0.1
45
0.03
%/V
nA
IN
(Note 4)
1000
Error Amplifier 2 Voltage Gain
Error Amplifier 2 Transconductance
Switch 2 Current Limit
V/V
µmhos
A
∆I = 5µA
●
●
2.6
85
4.9
540
1
Switch 2 V
I
= 2A
SW2
mV
µA
CESAT
Switch 2 Leakage Current
BIAS Pin Current
FB2 = 1.5V
= 2A
I
mA
%
SW2
Maximum Duty Cycle (SW2)
SWITCH 3 (350mA BOOST)
FB3 Voltage
92
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB3 Voltage Line Regulation
FB3 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
0.5
180
0.1
14
0.03
600
%/V
nA
IN
(Note 4)
Error Amplifier 3 Voltage Gain
Error Amplifier 3 Transconductance
Switch 3 Current Limit
V/V
µmhos
A
∆I = 5µA
●
●
0.35
0.7
280
1
Switch 3 V
I
= 0.2A
SW3
mV
CESAT
Switch 3 Leakage Current
BIAS Pin Current
FB3 = 1.5V
= 0.2A
µA
I
mA
SW3
Maximum Duty Cycle (SW3)
84
83
88
%
%
Schottky Diode Drop
I = 170mA
700
mV
1943i
3
LT1943
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCH 4 (350mA INVERTER)
FB4 Voltage
1.23
1.22
1.25
1.27
1.27
V
V
●
FB4 Voltage Line Regulation
FB4 Pin Bias Current
4.5V < V < 22V
0.01
100
0.03
600
%/V
nA
IN
(Note 4)
●
●
NFB4 Voltage (V -V
)
1.215
1.205
1.245
1.275
1.275
V
V
FB4 NFB4
NFB4 Voltage Line Regulation
NFB4 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
0.5
260
0.1
15
0.03
600
%/V
nA
IN
(Note 5)
Error Amplifier 4 Voltage Gain
Error Amplifier 4 Transconductance
Switch 4 Current Limit
V/V
µmhos
A
∆I = 5µA
●
●
0.35
0.7
390
1
Switch 4 V
I
I
= 0.3A
= 0.3A
mV
CESAT
SW4
SW4
Switch 4 Leakage Current
BIAS Pin Current due to SW4
Maximum Duty Cycle (SW4)
µA
mA
84
83
88
%
%
Note 3: The C pin is held low until FB1, FB2, FB3 and FB4 all ramp above
the FB threshold offset.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
T
Note 4: Current flows into FB1, FB2, FB3 and FB4 pins.
Note 5: Current flows out of NFB4 pin.
Note 2: The LT1943E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization, and correlation
with statistical process controls.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Output Current
for VLOGIC
SW1 Current Limit vs Duty Cycle
SW1 Current Limit
5
4
3
2
1
0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
4.5
4.0
3.5
3.0
2.5
T
= 25°C
T
= 25°C
A
A
L1 = 4.7µH
L1 = 3.3µH
TYPICAL
MINIMUM
10
0
5
15
20
0
20
40
60
80
100
–50
0
25
50
75 100 125
–25
DUTY CYCLE (%)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
1943 G01
1943 G02
1943 G03
1943i
4
LT1943
U W
TYPICAL PERFOR A CE CHARACTERISTICS
MINIMUM Input Voltage to Start,
VOUT = 3.3V
BOOST Pin Current
SW2 Current Limit
5.0
4.5
4.0
3.5
3.0
2.5
100
80
60
40
20
0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
T
A
= 25°C
T
A
= 25°C
0
1.0
1.5
2.0
2.5
3.0
50
0.5
–50
0
25
75 100 125
–25
0
20
40
60
80
100
SW1 CURRENT (A)
TEMPERATURE (°C)
LOAD CURRENT (mA)
1943 G05
1943 G06
1943 G04
SW3 Current Limit
SW4 Current Limit
SW1 VCESAT
600
500
400
300
200
100
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
T
A
= 25°C
0
1.0
1.5
2.0
2.5
3.0
0.5
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
75
SW1 CURRENT (A)
1943 G09
1943 G07
1943 G08
SW3 VCESAT
SW4 VCESAT
SW2 VCESAT
500
400
300
200
100
0
500
400
300
200
100
0
600
500
400
300
200
100
0
T
A
= 25°C
T
A
= 25°C
T = 25°C
A
0.2
0.3
0.1
0.2
0.3
0
0.1
0
0.4
0.4
0
1.0
1.5
2.0
2.5
3.0
0.5
SW3 CURRENT (A)
SW4 CURRENT (A)
SW2 CURRENT (A)
1943 G11
1943 G12
1943 G10
1943i
5
LT1943
U W
TYPICAL PERFOR A CE CHARACTERISTICS
VON Current Limit
Frequency Foldback
Oscillator Frequency
100
90
80
70
60
50
40
30
1.4
1.3
1.2
1.1
1.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T
= 25°C
T
= 25°C
A
A
25
35
40
5
10
15
20
V
30
–50
0
25
50
75 100 125
0
0.4
0.6
0.8
1.0
1.2
–25
0.2
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
(V)
ON
1943 G13
1943 G14
1943 G14
Reference Voltage
Bias Pin Current
1.27
1.26
1.25
1.24
1.23
1.22
100
80
60
40
20
0
I
I
I
= 1.5A
= 0.2A
= 0.3A
SW2
SW3
SW4
I
= I
= I
= 0A
50
SW2 SW3 SW4
50
100 125
100 125
–50 –25
0
25
75
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1943 G16
1943 G17
1943i
6
LT1943
U
U
U
PI FU CTIO S
GND (Pins 1, 20, Exposed Pad Pin 29): Ground. Tie both
GND pins and the exposed pad directly to local ground
plane. The ground metal to the exposed pad should be as
wide as possible for better heat dissipation. Multiple vias
(to ground plane under the ground backplane) placed
close to the exposed pad can further aid in reducing
thermal resistance.
VC4 (Pin 10): Switching Regulator 4 Error Amplifier
Compensation. Connect a resistor/capacitor network in
series with this pin.
SGND (Pin 11): Signal Ground. Return ground trace from
theFBresistornetworksandVC pincompensationcompo-
nents directly to this pin and then tie to ground.
BOOST (Pin 12): The BOOST pin is used to provide a drive
voltage, higher than VIN, to the switch 1 drive circuit.
VC1 (Pin 2): Switching Regulator 1 Error Amplifier Com-
pensation. Connect a resistor/capacitor network in series
with this pin.
SW1 (Pins 13, 14): The SW1 pins are the emitter of the
internal NPN bipolar power transistor for switching regu-
lator 1. These pins must be tied together for proper
operation. Connect these pins to the inductor, catch diode
and boost capacitor.
VC2(Pin3):ErrorAmplifierCompensationforSwitcher 2.
Connect a resistor/capacitor network in series with this
pin.
FB1 (Pin 4): Switching Regulator 1 Feedback. Tie the
resistor divider tap to this pin and set VLOGIC according to
VLOGIC = 1.25 • (1 + R2/R1). Reference designators refer
to Figure 2.
VIN (Pins 15, 16): The VIN pins supply current to the
LT1943’s internal regulator and to the internal power
transistor for switch 1. These pins must be tied together
and locally bypassed.
FB2 (Pin 5): Feedback for Switch 2. Tie the resistor divider
tap to this pin and set AVDD according to AVDD = 1.25 •
(1 + R6/R5).
SS-234 (Pin 17): This is the soft-start pin for switching
regulators 2, 3 and 4. Place a soft-start capacitor here to
limit start-up inrush current and output voltage ramp rate.
When the BIAS pin reaches 2.8V, a 1.7µA current source
beginschargingthecapacitor. Whenthecapacitorvoltage
reaches 0.8V, switches 2, 3 and 4 turn on and begin
switching. For slower start-up, use a larger capacitor.
When this pin is pulled to ground, switches 2, 3 and 4 are
disabled. For complete shutdown, tie RUN-SS to ground.
FB3 (Pin 6): Switching Regulator 3 Feedback. Tie the
resistor divider tap to this pin and set VON according to
VON = 1.25 • (1 + R9/R8) – 150mV.
NFB4 (Pin 7): Switching Regulator 4 Negative Feedback.
Switcher 4 can be used to generate a positive or negative
output. When regulating a negative output, tie the resistor
divider tap to this pin. Negative output voltage can be set
by the equation VOFF = –1.25 • (R3/R4) with R4 set to 10k.
Tie the NFB4 pin to FB4 for positive output voltages.
RUN-SS (Pin 18): This is the soft-start pin for switching
regulator 1. Place a soft-start capacitor here to limit start-
up inrush current and output voltage ramp rate. When
power is applied to the VIN pin, a 1.7µA current source
chargesthecapacitor.Whenthevoltageatthispinreaches
0.8V, switch 1 turns on and begins switching. For slower
start-up, use a larger capacitor. For complete shutdown,
tie RUN-SS to ground.
FB4 (Pin 8): Feedback for Switch 4. When generating a
positive voltage from switch 4, tie the resistor divider tap
to this pin. When generating a negative voltage, tie a 10k
resistor between FB4 and NFB4 (R4).
VC3 (Pin 9): Switching Regulator 3 Error Amplifier Com-
pensation. Connect a resistor/capacitor network in series
with this pin.
SW4 (Pin 19): This is the collector of the internal NPN
bipolar power transistor for switching regulator 4. Mini-
mize metal trace area at this pin to keep EMI down.
1943i
7
LT1943
U
U
U
PI FU CTIO S
E3 (Pin 24): This is switching regulator 3’s output and the
emitter of the output disconnect PNP. Tie the output
capacitor and resistor divider here.
SW3 (Pin 21): This is the collector of the internal NPN
bipolar power transistor for switching regulator 3. Mini-
mize metal trace area at this pin to keep EMI down.
CT (Pin 25): Timing Capacitor Pin. This is the input to the
VON timer and programs the time delay from all four
feedback pins reaching 1.125V to VON turning on. The CT
capacitor value can be set using the equation C = (20µA •
BIAS (Pin 22): The BIAS pin is used to improve efficiency
when operating at higher input voltages. Connecting this
pin to the output of switching regulator 1 forces most of
the internal circuitry to draw its operating current from
VLOGIC rather than VIN. Switches 2, 3 and 4 drivers are
supplied by BIAS and will not switch until this pin reaches
tDELAY)/1.1V.
VON (Pin 26): This is the delayed output for switching
regulator 3. VON reaches its programmed voltage after the
internal CT timer times out. Protection circuitry ensures
VON is disabled if any of the four outputs are more than
10% below normal voltage.
approximately 2.8V. BIAS must be tied to VLOGIC
.
PGOOD (Pin 23): Power Good Comparator Output. This is
the open collector output of the power good comparator
andcanbeusedinconjunctionwithanexternalP-Channel
MOSFET to provide output disconnect for AVDD. When
switcher 2’s output reaches approximately 90% of its
programmed voltage, PGOOD will be pulled to ground.
This will pull down on the gate of the MOSFET, connecting
AVDD. A 100k pull-up resistor between the source and
drain of the P-channel MOSFET keeps it off when switcher
2’s output is low.
SW2 (Pins 27, 28): The SW2 pins are the collector of the
internal NPN bipolar power transistor for switching regu-
lator 2. These pins must be tied together. Minimize trace
area at these pins to keep EMI down.
1943i
8
LT1943
W
BLOCK DIAGRA
V
V
IN
IN
15
16
C1
BOOST
12
D2
MASTER
OSCILLATOR
1.2MHz
SLOPE
V
FOLDBACK
OSCILLATOR
COMPENSATION
LOGIC
R2
Σ
–
+
C3
V
LOGIC
3A
DRIVER
FB1
SW1
14
SWITCH
L1
4
13
R1
R
Q
D1
C2
PGOOD
S
AV
23
DD
–
R14
–
VC1
10
R10
C11
gm
+
C20
+
1.25V
1.25V
VC2
R6
R11
C12
FB2
3
5
–
+
C21
R5
gm
–
+
20µA
BIAS
C
T
22
SW2
1.25V
L2
25
–
–
–
–
V
IN
27 28
C9
R
2.6A
SWITCH
D5
C16
S
Q
DRIVER
FOLDBACK
OSCILLATOR
+
AV
DD
L3
C8
1.125V
Σ
SLOPE
COMPENSATION
FB4
8
7
R4
C24
NFB4
V
–
+
IN
R3
1.7µA
1.7µA
VC4
INTERNAL
REGULATOR
AND
R13
C14
RUN-SS
18
10
C23
C5
REFERENCE
–
+
–
+
SW4
19
C7
gm
L4
V
LOGIC
SW2
SW3
SS-234
17
D6
R
400mA
SWITCH
1.25V
DRIVER
S
Q
SW4
V
OFF
LOCKOUT
C4
D3
C6
FOLDBACK
OSCILLATOR
BIAS
–
Σ
SLOPE
COMPENSATION
+
2.8V
VC3
FB3
R12
C13
R9
9
V
6
E3
–
+
C22
gm
R8
–
+
SW3
20
L5
1.25V
V
IN
V
ON
R
300mA
SWITCH
V
26
DRIVER
S
Q
ON
–
FOLDBACK
OSCILLATOR
C15
+
E3
24
Σ
V
E3
SLOPE
1.1V
C10
COMPENSATION
Figure 2.
1943i
9
LT1943
U
OPERATIO
The LT1943 is a highly integrated power supply IC con-
tainingfourseparateswitchingregulators. Allfourswitch-
ers have their own oscillator with frequency foldback and
use current mode control. Switching regulator 1 consists
of a step-down regulator with a current limit of 2.4A.
Switching regulator 2 is a boost regulator with a current
limit of 2.6A and switchers 3 and 4 are 0.35A boost
regulators. Switching regulator 4 has two feedback pins
(FB4 and NFB4) and can directly regulate positive or
negative output voltages.
RUN-SS
2V/DIV
V
LOGIC
5V/DIV
I
L1
1A/DIV
SS-234
2V/DIV
AV
DD
20V/DIV
I
L2+L3
1A/DIV
PGOOD
20V/DIV
1943 F03a
5ms/DIV
When power is applied to VIN, the RUN-SS pin starts
charging and when its voltage reaches 0.8V, switcher 1 is
enabled. (See Figure 2) The RUN-SS pin is used for soft-
start and limits the ramp-rate for VLOGIC. Using a larger
capacitor at the RUN-SS pin will cause VLOGIC to start
more slowly. Switching regulators 2, 3 and 4 are driven by
the BIAS pin which must be connected to VLOGIC. VLOGIC
is the first to come up and when it reaches 2.8V, the SS-
234 pin will begin charging to enable switches 2, 3 and 4.
AVDD and VOFF will then begin rising and their ramp rate is
determined by the capacitor tied to the SS-234 pin. When
AVDD reaches approximately 90% of its programmed
voltage, the PGOOD pin will be pulled low. When all
outputs reach 90% of their programmed voltages, the CT
timer will trigger and a 20µA current source begins to
charge the CT pin. When the CT pin reaches 1.1V, the
output disconnect PNP turns on, connecting VON. In the
event of any of the 4 outputs dropping below 10% of its
normal voltage, PanelProtect circuitry pulls the CT pin to
ground, disabling VON.
(3a)
V
OFF
10V/DIV
I
L4
500mA/DIV
V
E3
20V/DIV
I
L5
500mA/DIV
V
CT
2V/DIV
V
ON
50V/DIV
1943 F03b
5ms/DIV
(3b)
Figure 3. LT1943 Power-Up Sequence. (Traces From
Both Photos are Synchronized to the Same Trigger)
Whenneeded,thePGOODpincanbeusedtodrivethegate
of a P-channel MOSFET that functions as output discon-
nect for AVDD. For complete shutdown, the RUN-SS pin
must be pulled to ground.
1943i
10
LT1943
U
PACKAGE DESCRIPTIO
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation EB
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
4.75
(.187)
28 2726 25 24 23 22 21 20 19 18 1716 15
6.60 ±0.10
2.74
(.108)
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
4.50 ±0.10
SEE NOTE 4
6.40
BSC
2.74
(.108)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
5
7
1
2
3
4
6
8
9 10 12 13 14
11
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0° – 8°
0.65
(.0256)
BSC
0.45 – 0.75
(.018 – .030)
0.09 – 0.20
(.0036 – .0079)
0.05 – 0.15
(.002 – .006)
FE28 (EB) TSSOP 0203
0.195 – 0.30
(.0077 – .0118)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1943i
11
LT1943
U
TYPICAL APPLICATIO
5V Input, Quad Output TFT-LCD Power Supply
V
IN
4.5V TO 8V
10µH
0.47µF
ZHCS400
B240A
4.7µH
V
OFF
–10V
50mA
10µF
80.6k
33µH
2.2µF
10µF
ZHCS400
95.3k
100k
V
SW3
IN
SW4
SW2
FB2
10.0k
NFB4
FDN360P
0.015µF
RUN-SS
SS-234
LT1943
10pF
10.0k
0.015µF
0.047µF
AV
13V
500mA
DD
FB4
C
T
BIAS
BOOST
PGOOD
V
ON
V
30V
ON
E3
30mA
0.22µF
CMDSH-3
SW1
232k
4.7µH
B230A
16.2k
FB3
V
LOGIC
3.3V
1.5A
FB1
VC1
GND
SGND
VC4
10.0k
10.0k
VC2
VC3
2.2µF
22µF
0.47µF
27.4k
30.1k
13k
6.81k
100pF
2.2nF
100pF
4700pF
100pF
2.2nF
100pF
1500pF
1943 F01
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1615/LT1615-1
300mA/80mA (I ), Constant Off-Time, High Efficiency
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V : 1.2V to 15V, V
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LT1944/LT1944-1
LT1945
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MS Package
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Q SD
SW
IN
OUT(MAX)
Dual Output, Pos/Neg, 350mA (I ), Constant Off-Time,
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: ±34V, I : 20µA, I : <1µA,
Q SD
SW
IN
OUT(MAX)
High Efficiency Step-Up DC/DC Converter
MS Package
LT1946/LT1946A
LT1947
1.5mA (I ), 1.2MHz/2.7MHz, High Efficiency
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V : 2.75V to 16V, V
MS Package
: 34V, I : 20µA, I : <1µA,
SW
IN
OUT(MAX) Q SD
1.1A, 3MHz, TFT-LCD Triple Output Switching Regulator
V : 2.7V to 8V, V
: 34V, I : 9.5mA, I : <1µA,
IN
OUT(MAX) Q SD
MS Package
LT3464
85mA (I ), Constant Off-Time, High Efficiency Step-Up DC/DC V : 2.3V to 10V, V
Converter with Integrated Schottky and Output Disconnect PNP ThinSOT Package
: 34V, I : 25µA, I : <0.5µA,
OUT(MAX) Q SD
SW
IN
ThinSOT is a trademark of Linear Technology Corporation.
1943i
LT/TP 0903 1K • PRINTED IN USA
12 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2003
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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