LT1969CMS#PBF [Linear]
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| 型号： | LT1969CMS#PBF |
| 厂家： | 
Linear |
| 描述： | 暂无描述 运算放大器 |
| 文件： | 总20页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1969
Dual 700MHz, 200mA,
Adjustable Current Operational Amplifier
U
FEATURES
DESCRIPTIO
The LT®1969 is an adjustable current version of the
popular LT1886, a 200mA minimum output current, dual
op amp with outstanding distortion performance. The
adjustable current feature is highly desirable in applica-
tions where minimum power dissipation is required while
still being able to provide adequate line termination.
■
700MHz Gain Bandwidth
■
±200mA Minimum IOUT
■
Adjustable Quiescent Current
■
■
■
■
■
■
■
■
■
■
■
Low Distortion: –72dBc at 1MHz, 4VP-P, 25Ω, AV = 2
Stable in AV ≥ 10, Simple Compensation for AV < 10
±4.3V Minimum Output Swing, VS = ±6V, RL = 25Ω
Stable with 1000pF Load
At nominal supply current, the amplifiers are gain of 10
stable and can easily be compensated for lower gains. The
LT1969 features balanced high impedance inputs with
4µA input bias current and 4mV maximum input offset
voltage. Single supply applications are easy to implement
and have lower total noise than current feedback amplifier
implementations.
6nV/√Hz Input Noise Voltage
2pA/√Hz Input Noise Current
4mV Maximum Input Offset Voltage
4µA Maximum Input Bias Current
400nA Maximum Input Offset Current
±4.5V Minimum Input CMR, VS = ±6V
Specified at ±6V, ±2.5V
The output drives a 25Ω load to ±4.3V with ±6V supplies.
On ±2.5V supplies, the output swings ±1.5V with a 100Ω
load. The amplifier is stable with a 1000pF capacitive load
making it useful in buffer and cable driver applications.
U
APPLICATIO S
■
DSL Modems
■
xDSL PCI Cards
The LT1969 is manufactured on Linear Technology’s
advancedlowvoltagecomplementarybipolarprocessand
is available in a thermally enhanced MS10 package
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
USB Modems
Line Drivers
■
U
TYPICAL APPLICATIO
Single 12V Supply ADSL Modem Line Driver
12V
ADSL Modem Line Driver Distortion
0.1µF
–60
+
IN
+
V
A
= 12V
= 10
S
V
12.4Ω
1/2 LT1969
f = 200kHz
100Ω LINE
1:2 TRANSFORMER
–70
–80
–
909Ω
*COILCRAFT X8390-A
OR EQUIVALENT
10k 20k
10k 20k
HD2
HD3
1:2*
100Ω
100Ω
–
100Ω
1µF
1µF
–90
909Ω
I
I
I
ON = 14mA
Q
Q
Q
CTRL1 CTRL2
LOW POWER = 2mA
6
7
STANDBY = 600µA
–100
12.4Ω
0
2
4
6
8
10 12 14 16
0.1µF
1/2 LT1969
+
STANDBY ON
13k
49.9k
LINE VOLTAGE (V
)
P-P
–
LOGIC
OUTPUT
IN
1969 TA01b
STANDBY
LOW POWER
1969 TA01a
ON
1
LT1969
W W U W
W
U
ABSOLUTE MAXIMUM RATINGS
/O
PACKAGE RDER I FOR ATIO
(Note 1)
Total Supply Voltage (V+ to V–) ........................... 13.2V
Input Current (Note 2) ....................................... ±10mA
Input Voltage (Note 2) ............................................ ±VS
Maximum Continuous Output Current (Note 3)
DC ............................................................... ±100mA
AC ............................................................... ±300mA
Operating Temperature Range (Note 10) –40°C to 85°C
Specified Temperature Range (Note 9).. –40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
+
V
1
2
3
4
5
10 OUTB
LT1969CMS
OUTA
–INA
+INA
9
8
7
6
–INB
+INB
CTRL2
CTRL1
–
V
MS10 PACKAGE
10-LEAD PLASTIC MSOP
MS10 PART MARKING
LTTN
TJMAX = 150°C, θJA = 110°C/W (NOTE 4)
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±6V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V– and
a 49.9k resistor from CTRL2 to V–, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
(Note 5)
1
4
5
mV
mV
OS
●
●
Input Offset Voltage Drift
Input Offset Current
(Note 8)
3
17
µV/°C
I
I
150
400
600
nA
nA
OS
●
●
Input Bias Current
1.5
4
6
µA
µA
B
e
Input Noise Voltage
Input Noise Current
Input Resistance
f = 10kHz
f = 10kHz
6
2
nV/√Hz
pA/√Hz
n
i
n
R
V
= ±4.5V
CM
5
10
35
MΩ
kΩ
IN
Differential
C
Input Capacitance
2
pF
IN
Input Voltage Range (Positive)
Input Voltage Range (Negative)
●
●
4.5
77
5.9
–5.2
V
V
–4.5
CMRR
PSRR
Common Mode Rejection Ratio
Minimum Supply Voltage
V
= ±4.5V
●
●
98
dB
V
CM
Guaranteed by PSRR
V = ±2V to ±6.5V
±2
Power Supply Rejection Ratio
80
78
86
12
12
5
dB
dB
S
●
●
●
●
●
●
A
Large-Signal Voltage Gain
Output Swing
V
V
= ±4V, R = 100Ω
5.0
4.5
V/mV
V/mV
VOL
OUT
OUT
L
= ±4V, R = 25Ω
4.5
4.0
V/mV
V/mV
L
V
R = 100Ω, 10mV Overdrive
4.85
4.70
±V
±V
OUT
L
R = 25Ω, 10mV Overdrive
4.30
4.10
4.6
4.5
±V
±V
L
I
= 200mA, 10mV Overdrive
4.30
4.10
±V
±V
OUT
2
LT1969
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±6V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V– and
a 49.9k resistor from CTRL2 to V–, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Short-Circuit Current (Sourcing)
Short-Circuit Current (Sinking)
(Note 3)
700
500
mA
mA
SC
SR
Slew Rate
A = –10 (Note 6)
100
200
8
V/µs
MHz
MHz
ns
V
Full Power Bandwidth
Gain Bandwidth
Rise Time, Fall Time
Overshoot
4V Peak (Note 7)
f = 1MHz
GBW
700
4
t , t
r
A = 10, 10% to 90% of 0.1V, R = 100Ω
V L
f
A = 10, 0.1V, R = 100Ω
1
%
V
L
Propagation Delay
Settling Time
A = 10, 50% V to 50% V , 0.1V, R = 100Ω
2.5
50
ns
V
IN
OUT
L
t
6V Step, 0.1%
ns
S
Harmonic Distortion
HD2, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
–75/–63
–85/–71
dBc
dBc
V
P-P
L
HD3, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
V
P-P
L
IMD
Intermodulation Distortion
Output Resistance
Supply Current
A = 10, f = 0.9MHz, 1MHz, 14dBm, R = 100Ω/25Ω
–81/–80
dBc
V
L
R
OUT
A = 10, f = 1MHz
V
0.1
7
Ω
I
Per Amplifier
8.25
8.50
mA
mA
S
●
●
●
●
–
–
CTRL1 Voltage
13k to V , Measured with Respect to V
0.77
0.74
0.97
1.05
300
13
1.25
1.30
V
V
–
–
CTRL2 Voltage
49.9k to V , Measured with Respect to V
per Amplifier; CTRL1, CTRL2 Open
0.87
0.80
1.18
1.25
V
V
Minimum Supply Current
Maximum Supply Current
800
1100
µA
µA
–
per Amplifier; CTRL1 or CTRL2 Shorted to V
mA
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±2.5V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V– and a 49.9k resistor from CTRL2 to V–, pulse power tested
unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
(Note 5)
1.5
5
6
mV
mV
OS
●
●
Input Offset Voltage Drift
Input Offset Current
(Note 8)
5
17
µV/°C
I
I
100
350
550
nA
nA
OS
●
●
Input Bias Current
1.2
3.5
5.5
µA
µA
B
e
Input Noise Voltage
Input Noise Current
Input Resistance
f = 10kHz
f = 10kHz
6
2
nV/√Hz
pA/√Hz
n
i
n
R
V
= ±1V
CM
10
20
50
MΩ
kΩ
IN
Differential
C
Input Capacitance
2
pF
IN
Input Voltage Range (Positive)
Input Voltage Range (Negative)
●
●
1
2.4
–1.7
V
V
–1
CMRR
Common Mode Rejection Ratio
V
= ±1V
●
75
91
dB
CM
3
LT1969
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±2.5V, VCM = 0V, nominal mode with a 13k resistor from CTRL1 to V–
and a 49.9k resistor from CTRL2 to V–, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
A
Large-Signal Voltage Gain
V
= ±1V, R = 100Ω
5.0
4.5
10
V/mV
V/mV
VOL
OUT
L
●
●
●
●
●
V
= ±1V, R = 25Ω
4.5
4.0
10
1.65
1.50
1
V/mV
V/mV
OUT
L
V
Output Swing
R = 100Ω, 10mV Overdrive
1.50
1.40
±V
±V
OUT
L
R = 25Ω, 10mV Overdrive
1.35
1.25
±V
±V
L
I
= 200mA, 10mV Overdrive
0.87
0.80
±V
±V
OUT
I
Short-Circuit Current (Sourcing)
Short-Circuit Current (Sinking)
(Note 3)
500
400
mA
mA
SC
SR
Slew Rate
A = –10 (Note 6)
50
100
16
530
7
V/µs
MHz
MHz
ns
V
Full Power Bandwidth
Gain Bandwidth
Rise Time, Fall Time
Overshoot
1V Peak (Note 7)
f = 1MHz
GBW
t , t
r
A = 10, 10% to 90% of 0.1V, R = 100Ω
V L
f
A = 10, 0.1V, R = 100Ω
5
%
V
L
Propagation Delay
Harmonic Distortion
A = 10, 50% V to 50% V , 0.1V, R = 100Ω
5
ns
V
IN
OUT
L
HD2, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
–75/–64
–80/–66
dBc
dBc
V
P-P
L
HD3, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
V
P-P
L
IMD
Intermodulation Distortion
Output Resistance
A = 10, f = 0.9MHz, 1MHz, 5dBm, R = 100Ω/25Ω
–77/–85
0.2
dBc
V
L
R
OUT
A = 10, f = 1MHz
V
Ω
Channel Separation
V
= ±1V, R = 25Ω
82
80
92
dB
dB
OUT
L
●
●
●
●
●
I
Supply Current
Per Amplifier
5
6.00
6.25
mA
mA
S
–
–
CTRL1 Voltage
13k to V , Measured with Respect to V
0.77
0.74
0.95
1.03
250
11.5
1.25
1.30
V
V
–
–
CTRL2 Voltage
49.9k to V , Measured with Respect to V
0.87
0.80
1.18
1.25
V
V
Minimum Supply Current
Maximum Supply Current
per Amplifier; CTRL1, CTRL2 Open
650
750
µA
µA
–
per Amplifier; CTRL1 or CTRL2 Shorted to V
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 0.7V, the input current should be limited to less than
10mA.
Note 6: Slew rate is measured between ±2V on a ±4V output with ±6V
supplies, and between ±1V on a ±1.5V output with ±2.5V supplies. Falling
slew rate is guaranteed by correlation to rising slew rate.
Note 7: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πV .
P
Note 3: A heat sink may be required to keep the junction temperature
Note 8: This parameter is not 100% tested.
below absolute maximum.
Note 4: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. θ is specified for a 2500mm test board
covered with 2 oz copper on both sides.
Note 9: The LT1969C is guaranteed to meet specified performance from 0°C
to 70°C. The LT1969C is designed, characterized and expected to meet
specified performance from –40°C to 85°C but is not tested or QA sampled
at these temperatures.
2
JA
Note 5: Input offset voltage is exclusive of warm-up drift.
Note10:TheLT1969Cisguaranteedfunctionalovertheoperatingtemperature
range of –40°C to 85°C.
4
LT1969
U W
TYPICAL PERFOR A CE CHARACTERISTICS
13k resistor from CTRL1 to V– and a 49.9k resistor from CTRL2 to V–
Input Bias Current
vs Input Common Mode Voltage
Input Common Mode Range
Supply Current vs Temperature
vs Supply Voltage
+
20
18
16
14
12
10
8
V
3.0
2.5
2.0
1.5
1.0
0.5
0
T
B
= 25°C
B B
A
I
= (I + + I –)/2
–0.1
–0.2
–0.3
1.5
V
S
= ±6V
V
V
= ±6V
V
= ±2.5V
S
S
= ±2.5V
S
6
1.0
4
0.5
T
= 25°C
OS
A
2
∆V > 1mV
–
0
V
–50
0
25
50
75 100 125
–25
0
2
4
6
8
10
12
14
–6
–4
–2
0
2
4
6
TEMPERATURE (°C)
TOTAL SUPPLY VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
1969 G01
1969 G02
1969 G03
Input Bias Current
vs Temperature
Output Saturation Voltage
vs Temperature
Input Noise Spectral Density
+
100
10
1
100
10
1
V
3.5
3.0
+
–
V
S
= ±6V
T
= 25°C
= 101
I
B
= (I – I )/2
B B
A
V
A
–0.5
R
L
= 100Ω
–1.0
–1.5
1.5
2.5
2.0
1.5
1.0
0.5
200mA
150mA
200mA
e
i
n
V
S
= ±6V
1.0
R
L
= 100Ω
150mA
0
V
S
= ±2.5V
n
0.5
–
V
0
10
100
1k
FREQUENCY (Hz)
10k
100k
–50 –25
25
50
75
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
1969 G04
1969 G44
1969 G43
Output Saturation Voltage
vs Temperature
Output Short-Circuit Current
vs Temperature
Settling Time vs Output Step
+
1000
900
800
700
600
500
400
300
200
100
0
V
6
4
V
S
= ±2.5V
V
= ±6V
S
–0.5
SOURCE
R
L
= 100Ω
V
S
= ±6V
10mV
1mV
–1.0
–1.5
1.5
SOURCE
2
200mA
150mA
V
S
= ±2.5V
0
200mA
SINK
S
–2
–4
–6
SINK
= ±2.5V
V
= ±6V
1.0
V
S
R
L
= 100Ω
150mA
0
0.5
10mV
1mV
50
–
V
–50
0
25
50
75 100 125
–25
50
100 125
0
10
20
30
40
60
–50 –25
25
75
TEMPERATURE (°C)
SETTLING TIME (ns)
TEMPERATURE (°C)
1969 G46
1886 G05
1969 G45
5
LT1969
U W
TYPICAL PERFOR A CE CHARACTERISTICS
13k resistor from CTRL1 to V– and a 49.9k resistor from CTRL2 to V–
Gain Bandwidth
vs Supply Voltage
Output Impedance vs Frequency
Gain and Phase vs Frequency
80
70
100
80
100
10
800
700
600
500
400
300
T
= 25°C
= –10
A
V
A
V
= ±6V
PHASE
= ±2.5V
S
R
= 1k
L
60
60
V
S
50
40
A
= 100
= 10
V
V
40
20
V
= ±6V
S
R
R
= 100Ω
= 25Ω
L
L
30
0
1
V
= ±2.5V
20
–20
–40
–60
–80
–100
S
GAIN
10
0.1
A
0
T
= 25°C
A
A
= –10
V
–10
–20
R
= 100Ω
L
0.01
1M
10M
100M
1G
0
2
4
6
8
10
12
14
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL SUPPLY VOLTAGE (V)
1969 G06
1969 G08
1969 G07
Frequency Response
Frequency Response
Frequency Response
vs Supply Voltage, AV = 10
vs Supply Voltage, AV = –10
vs Supply Voltage, AV = 2
23
22
21
20
19
18
17
16
15
14
13
23
22
21
20
19
18
17
16
15
14
13
9
8
T
= 25°C
= 10
= 100Ω
T
= 25°C
= –10
= 100Ω
A
V
L
A
V
L
A
A
V
V
= ±2.5V
= ±6V
S
S
R
R
7
6
5
V
= ±6V
V = ±6V
S
S
4
T
= 25°C
= 2
3
A
V
L
F
C
C
V
= ±2.5V
V = ±2.5V
S
A
S
2
R
= 100Ω
R = R = 1k
G
1
R
C
= 124Ω
= 100pF
0
SEE FIGURE 3
–1
1M
10M
100M
1G
1M
10M
100M
1G
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1969 G09
1969 G10
1969 G11
Frequency Response
vs Supply Voltage, AV = –1
Frequency Response
vs Capacitive Load
Power Supply Rejection
vs Frequency
3
2
38
35
32
29
26
23
20
17
14
11
8
100
90
80
70
60
50
40
30
20
10
0
V
= ±6V
= 25°C
= 10
V
S
A
V
= ±6V
S
A
V
T
= 10
1000pF
500pF
A
NO R
V
V
= ±2.5V
= ±6V
S
S
1
L
0
(–) SUPPLY
(+) SUPPLY
200pF
100pF
50pF
–1
–2
–3
–4
–5
–6
–7
T
= 25°C
= –1
A
V
L
F
C
C
A
R
= 100Ω
R = R = 1k
G
R
C
= 124Ω
= 100pF
SEE FIGURE 2
1M
10M
100M
1G
1M
10M
100M
1G
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1969 G12
1969 G13
1969 G14
6
LT1969
U W
TYPICAL PERFOR A CE CHARACTERISTICS
13k resistor from CTRL1 to V– and a 49.9k resistor from CTRL2 to V–
Common Mode Rejection Ratio
Harmonic Distortion vs
Frequency, AV = 10, VS = ±6V
vs Frequency
Amplifier Crosstalk vs Frequency
100
90
80
70
60
50
40
30
20
10
0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
V
T
= ±6V
= 25°C
V
A
= ±6V
= 10
T
= 25°C
S
A
S
V
L
A
V
A
= 10
R
= 100Ω
2V OUT
P-P
INPUT = –20dBm
2nd
3rd
R
L
= 25Ω
B → A
2nd
3rd
A → B
R
L
= 100Ω
100k
1M
FREQUENCY (Hz)
10M
1M
10M
100M
1G
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
1969 G17
1969 G16
1969 G15
Harmonic Distortion vs
Frequency, AV = 10, VS = ±2.5V
Harmonic Distortion
vs Resistive Load
Harmonic Distortion
vs Resistive Load
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
T
V
A
= 25°C
= ±6V
= 10
T
V
A
= 25°C
= ±2.5V
= 10
T
= 25°C
A
S
V
A
S
V
A
V
A
= 10
2V OUT
P-P
2V OUT
P-P
f = 1MHz
2V OUT
P-P
f = 1MHz
R
L
= 25Ω
2nd
3rd
2nd
3rd
2nd
3rd
2nd
3rd
R
L
= 100Ω
100k
1M
FREQUENCY (Hz)
10M
1
10
100
1k
1
10
100
1k
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
1969 G18
1969 G19
1969 G20
Harmonic Distortion vs Output
Swing, AV = 10, VS = ±6V
Harmonic Distortion vs Output
Swing, AV = 10, VS = ±2.5V
Harmonic Distortion vs Output
Swing, AV = 2, VS = ±6V
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
T
= 25°C
T
= 25°C
T
= 25°C
A
A
A
R = R = 1k
f = 1MHz
f = 1MHz
F
C
C
G
R
C
= 124Ω
= 100pF
f = 1MHz
SEE FIGURE 3
R
= 25Ω
R
= 25Ω
L
L
R
= 25Ω
R
= 100Ω
L
L
2nd
3rd
2nd
3rd
2nd
2nd
2nd
3rd
2nd
3rd
3rd
3rd
R
= 100Ω
R
= 100Ω
L
L
0
2
4
6
8
10
12
0
1
2
3
4
5
0
2
4
6
8
10
12
OUTPUT VOLTAGE (V
)
P-P
OUTPUT VOLTAGE (V
)
P-P
OUTPUT VOLTAGE (V
)
P-P
1969 G21
1969 G22
1969 G23
7
LT1969
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Harmonic Distortion vs Output
Swing, AV = 2, VS = ±2.5V
Harmonic Distortion
vs Output Current, VS = ±6V
Harmonic Distortion
vs Output Current, VS = ±2.5V
–30
–40
–50
–60
–70
–80
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–30
–40
–50
–60
–70
–80
T
= 25°C
T
= 25°C
T
= 25°C
A
A
V
A
A
= 10
R = R = 1k
A = 10
V
F
C
C
G
f = 1MHz
R
C
= 124Ω
f = 1MHz
= 100pF
R
R
= 5Ω
R
= 5Ω
L
L
f = 1MHz
SEE FIGURE 3
= 10Ω
L
R
= 10Ω
L
R
= 25Ω
L
R
L
= 25Ω
R
L
= 25Ω
2nd
3rd
2nd
R
= 100Ω
L
3rd
0
50
100
150
200
250
0
1
2
3
4
5
0
100
200
300
400
500
PEAK OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V
)
P-P
PEAK OUTPUT CURRENT (mA)
1969 G26
1969 G24
1969 G25
Undistorted Output Swing
vs Frequency
Gain Bandwidth Product
vs Supply Current
Phase Margin vs Supply Current
12
10
8
1400
1200
1000
800
600
400
200
0
81
80
79
78
77
76
75
V
S
A
V
= ±6V
V = ±6V
S
= –10
MEASURED AT A = –10
V
V
= ±6V
S
T
= 25°C
= 10
A
V
L
A
6
R
= 100Ω
1% DISTORTION
4
V
S
= ±2.5V
2
0
100k
1M
FREQUENCY (Hz)
10M
0
6
8
10
12
0
4
6
8
10
12
2
4
2
I
, PER AMPLIFIER (mA)
I
CC
, PER AMPLIFIER (mA)
CC
1969 G27
1959 G28
1969 G29
Output Impedance
vs Supply Current
Output Impedance
vs Frequency Low Power **
Slew Rate vs Supply Current
100
10
1
400
100
10
V = ±6V
S
V
A
= ±6V
V
S
= ±6V
S
V
= 10
350
300
A
= 100
V
250
200
150
100
50
RISING
A
V
= 10
f = 1MHz
1
FALLING
f = 600kHz
0.1
0.1
0.01
0.01
0
1
2
6
8
10
12
0
4
0
1
2
3
4
5
6
7
8
9
10
100k
1M
10M
100M
FREQUENCY (Hz)
I
PER AMPLIFIER (mA)
I , PER AMPLIFIER (mA)
CC
CC
1969 G31
1969 G30
1969 G32
8
LT1969
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum IOUT Sourcing
vs Quiescent Current
Small-Signal Transient, AV = 10,
Nominal Power*
Small-Signal Transient, AV = –10,
Nominal Power*
800
700
600
500
400
300
200
100
0
V
= ±6V
S
SHORT-CIRCUIT CURRENT
LINEAR OUTPUT
CURRENT REGION
1969 G34
1969 G35
4
5
0
1
2
3
6
7
8
I
CC
PER AMPLIFIER (mA)
1969 G33
Small-Signal Transient, AV = 10,
CL = 1000pF, Nominal Power*
Large-Signal Transient, AV = 10,
Nominal Power*
Large-Signal Transient, AV = –10,
Nominal Power*
1969 G36
1969 G38
1969 G37
Large-Signal Transient, AV = 10,
CL = 1000pF, Nominal Power*
Small-Signal Transient, AV = 10,
CL = 1000pF, Low Power**
1969 G39
1969 G40
*13k RESISTOR FROM CTRL1 TO V– AND A 49.9k RESISTOR FROM CTRL2 TO V–
** 49.9k RESISTOR FROM CTRL2 TO V–, CTR1 FLOATING
9
LT1969
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Large-Signal Transient, AV = 10,
Low Power**
Large-Signal Transient, AV = –10,
Low Power**
1969 G42
1969 G41
*13k RESISTOR FROM CTRL1 TO V– AND A 49.9k RESISTOR FROM CTRL2 TO V–
** 49.9k RESISTOR FROM CTRL2 TO V–, CTR1 FLOATING
W U U
U
APPLICATIO S I FOR ATIO
Input Considerations
a combination of RF-quality supply bypass capacitors
(i.e., 470pF and 0.1µF). As the primary applications have
high drive current, use low ESR supply bypass capacitors
(1µF to 10µF). For best distortion performance with high
drive current a capacitor with the shortest possible trace
lengths should be placed between Pins 1 and 5. The
optimum location for this capacitor is on the back side of
the PC board.
The inputs of the LT1969 are an NPN differential pair
protected by back-to-back diodes (see the Simplified
Schematic). There are no series protection resistors
onboard which would degrade the input voltage noise. If
theinputscanhaveavoltagedifferenceofmorethan0.7V,
the input current should be limited to less than 10mA with
externalresistance(usuallythefeedbackresistororsource
resistor).EachinputalsohastwoESDclampdiodes—one
to each supply. If an input drive exceeds the supply, limit
the current with an external resistor to less than 10mA.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
frequency peaking. In general, use feedback resistors of
1kΩ or less.
TheLT1969designisatrueoperationalamplifierwithhigh
impedance inputs and low input bias currents. The input
offset current is a factor of ten lower than the input bias
current. To minimize offsets due to input bias currents,
match the equivalent DC resistance seen by both inputs.
The low input noise current can significantly reduce total
noisecomparedtoacurrentfeedbackamplifier, especially
for higher source resistances.
Thermal Issues
The LT1969 enhanced θJA MS10 package has the V– pin
fusedtotheleadframe.Thisthermalconnectionincreases
the efficiency of the PC board as a heat sink. The PCB
material can be very effective at transmitting heat between
the pad area attached to the V– pin and a ground or power
plane layer. Copper board stiffeners and plated through-
holes can also be used to spread the heat generated by the
device. Table 1 lists the thermal resistance for several
different board sizes and copper areas. All measurements
Layout and Passive Components
With a gain bandwidth product of 700MHz the LT1969
requires attention to detail in order to extract maximum
performance. Use a ground plane, short lead lengths and
10
LT1969
W U U
APPLICATIO S I FOR ATIO
were taken in still air on 3/32" FR-4 board with 2oz copper.
This data can be used as a rough guideline in estimating
thermal resistance. The thermal resistance for each appli-
cation will be affected by thermal interactions with other
components as well as board size and shape.
U
As an example, calculate the junction temperature for the
circuitinFigure1assumingan70°Cambienttemperature.
The device dissipation can be found by measuring the
supply currents, calculating the total dissipation and then
subtracting the dissipation in the load.
Table 1. Fused 10-Lead MSOP Package
COPPER AREA
The dissipation for the amplifiers is:
PD = (63.5mA)(12V) – (4V/√2)2/(50) = 0.6W
TOPSIDE* BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2
2
2
(mm )
(mm )
(mm )
Thetotalpackagepowerdissipationis0.6W. Whena2500
sq. mm PC board with 540 sq. mm of 2oz copper on top
and bottom is used, the thermal resistance is 110°C/W.
The junction temperature TJ is:
540
100
100
30
540
100
0
2500
2500
2500
2500
2500
110°C/W
120°C/W
130°C/W
135°C/W
140°C/W
0
TJ = (0.6W)(110°C/W) + 70°C = 136°C
0
0
*Device is mounted on topside.
The maximum junction temperature for the LT1969 is
150°C so the heat sinking capability of the board is
adequate for the application.
Calculating Junction Temperature
The junction temperature can be calculated from the
equation:
If the copper area on the PC board is reduced to 0 sq. mm
the thermal resistance increases to 140°C/W and the
junction temperature becomes:
TJ = (PD)(θJA) + TA
TJ = Junction Temperature
TA = Ambient Temperature
PD = Device Dissipation
TJ = (0.6W)(140°C/W) + 70°C = 154°C
which is above the maximum junction temperature indi-
cating that the heat sinking capability of the board is
inadequate and should be increased.
θJA = Thermal Resistance (Junction-to-Ambient)
6V
+
–
909Ω
100Ω
4V
50Ω
1K
–4V
f = 1MHz
100Ω
–
CTRL1
6
CTRL2
7
+
13k
–6V
49.9k
–6V
–6V
1969 F01
Figure 1. Thermal Calculation Example
11
LT1969
W U U
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APPLICATIO S I FOR ATIO
Capacitive Loading
Compensation
The LT1969 is stable with a 1000pF capacitive load. The
photo of the small-signal response with 1000pF load in a
gain of 10 shows 50% overshoot. The photo of the large-
signal response with a 1000pF load shows that the output
slew rate is not limited by the short-circuit current. The
Typical Performance Curve of Frequency Response vs
Capacitive Load shows the peaking for various capacitive
loads.
The LT1969 is stable in a gain 10 or higher for any supply
and resistive load. It is easily compensated for lower gains
with a single resistor or a resistor plus a capacitor.
Figure 2 shows that for inverting gains, a resistor from the
inverting node to AC ground guarantees stability if the
parallel combination of RC and RG is less than or equal to
RF/9. For lowest distortion and DC output offset, a series
capacitor,CC,canbeusedtoreducethenoisegainatlower
frequencies. The break frequency produced by RC and CC
should be less than 15MHz to minimize peaking. The
Typical Curve of Frequency Response vs Supply Voltage,
AV = –1 shows less than 1dB of peaking for a break
frequency of 12.8MHz.
This stability is useful in the case of directly driving a
coaxial cable or twisted pair that is inadvertently
unterminated. For best pulse fidelity, however, a termina-
tionresistorofvalueequaltothecharacteristicimpedance
of the cable or twisted pair (i.e., 50Ω/75Ω/100Ω/135Ω)
should be placed in series with the output. The other end
of the cable or twisted pair should be terminated with the
same value resistor to ground.
Figure3showscompensationinthenoninvertingconfigu-
ration. The RC, CC network acts similarly to the inverting
case. The input impedance is not reduced because the
R
F
V
–R
F
o
R
=
G
–
+
V
R
G
i
V
i
(R || R ) ≤ R /9
R
V
C
G
F
C
o
C
1
C
< 15MHz
(OPTIONAL)
2πR C
C
C
1969 F02
Figure 2. Compensation for Inverting Gains
V
R
R
o
F
= 1 +
+
–
V
V
i
G
i
R
C
V
o
(R || R ) ≤ R /9
C
C
G
F
C
1
(OPTIONAL)
< 15MHz
R
2πR C
F
C
C
R
G
1969 F03
Figure 3. Compensation for Noninverting Gains
12
LT1969
W U U
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APPLICATIO S I FOR ATIO
network is bootstrapped. This network can also be placed
between the inverting input and an AC ground.
optionalsnubbernetworkconsistingofaseriesRCacross
the load can provide a resistive load at high frequency.
Another option is to filter the drive to the load. If a back-
termination resistor is used, a capacitor to ground at the
load can eliminate ringing.
Anothercompensationschemefornoninvertingcircuitsis
showninFigure4.Thecircuitisunitygainatlowfrequency
and a gain of 1 + RF/RG at high frequency. The DC output
offset is reduced by a factor of ten. The techniques of
Figures3and4canbecombinedasshowninFigure5. The
gainisunityatlowfrequencies, 1+RF/RG atmid-bandand
for stability, a gain of 10 or greater at high frequencies.
Line Driving Back-Termination
The standard method of cable or line back-termination is
shown in Figure 6. The cable/line is terminated in its
characteristic impedance (50Ω, 75Ω, 100Ω, 135Ω, etc.).
A back-termination resistor also equal to to the
chararacteristic impedance should be used for maximum
pulse fidelity of outgoing signals, and to terminate the line
for incoming signals in a full-duplex application. There are
three main drawbacks to this approach. First, the power
dissipated in the load and back-termination resistors is
equal so half of the power delivered by the amplifier is
Output Loading
The LT1969 output stage is very wide bandwidth and able
to source and sink large currents. Reactive loading, even
isolated with a back-termination resistor, can cause ring-
ingatfrequenciesofhundredsofMHz.Forthisreason,any
design should be evaluated over a wide range of output
conditions. To reduce the effects of reactive loading, an
V
o
+
+
–
= 1 (LOW FREQUENCIES)
V
i
V
i
V
i
R
R
F
R
C
V
V
= 1 +
(HIGH FREQUENCIES)
V
O
C
o
–
G
C
R
≤ R /9
F
G
o
R
= 1 AT LOW FREQUENCIES
R
F
F
V
1
i
< 15MHz
R
F
2πR C
= 1 +
= 1 +
AT MEDIUM FREQUENCIES
G
C
R
R
C
G
G
R
G
C
C
BIG
R
F
AT HIGH FREQUENCIES
(R || R )
1969 F04
1969 F05
C
G
Figure 4. Alternate Noninverting Compensation
Figure 5. Combination Compensation
CABLE OR LINE WITH
CHARACTERISTIC IMPEDANCE R
L
+
V
G
i
R
BT
V
O
–
R
L
R
F
R
= R
=
BT
L
V
1
2
o
R
(1 + R /R )
F G
1969 F06
V
i
Figure 6. Standard Cable/Line Back-Termination
13
LT1969
W U U
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APPLICATIO S I FOR ATIO
wasted in the termination resistor. Second, the signal is
halved so the gain of the amplifer must be doubled to have
the same overall gain to the load. The increase in gain
increases noise and decreases bandwidth (which can also
increase distortion). Third, the output swing of the ampli-
fier is doubled which can limit the power it can deliver to
the load for a given power supply voltage.
Eliminating Vp, we get the following:
(1 + RP2/RP1) = (1 + RF/RG)/(1 – 1/n)
For example, reducing RBT by a factor of n = 4, and with an
amplifer gain of (1 + RF/RG) = 10 requires that RP2/RP1
= 12.3.
Note that the overall gain is increased:
An alternate method of back-termination is shown in
Figure 7. Positive feedback increases the effective back-
termination resistance so RBT can be reduced by a factor
ofn.Toanalyzethiscircuit,firstgroundtheinput.AsRBT
RL/n, and assuming RP2>>RL we require that:
RP2 / R +R
Vo
V
i
(
)
P1
P2
P1
=
1+ 1/ n / 1+R / R − R / R +R
F
G
P2
P1
=
A simpler method of using positive feedback to reduce the
back-termination is shown in Figure 8. In this case, the
drivers are driven differentially and provide complemen-
tary outputs. Grounding the inputs, we see there is invert-
ing gain of –RF/RP from –Vo to Va
Va = Vo (1 – 1/n) to increase the effective value of
RBT by n.
Vp = Vo (1 – 1/n)/(1 + RF/RG)
Vo = Vp (1 + RP2/RP1)
Va = Vo (RF/RP)
R
R
L
P2
FOR R
=
BT
n
R
P1
1
n
R
R
R
P1
+
–
F
1 +
= 1 –
V
i
V
R
V
o
(
) (
)
a
BT
R
+ R
P2
V
G
P1
P
R
/(R + R
P2 P2
)
R
P1
L
V
R
1 + 1/n
o
P1
R
–
F
=
V
R
+ R
P2 P1
i
R
F
1 +
(
)
R
R
G
G
1969 F07
Figure 7. Back-Termination Using Positive Feedback
V
+
–
i
V
R
BT
a
V
o
R
L
FOR R
n =
=
BT
R
R
F
F
n
1
R
R
R
R
G
L
R
F
1 –
=
R
R
P
R
P
P
R
R
R
F
F
G
L
1 +
+
V
R
P
o
G
R
F
V
i
2 1 –
–
+
(
)
R
P
R
BT
1969 F08
–V
o
–V
a
–V
i
Figure 8. Back-Termination Using Differential Positive Feedback
14
LT1969
W U U
APPLICATIO S I FOR ATIO
U
Table 2. ADSL Upstream Driver Designs
and assuming RP >> RL, we require
STANDARD
LOW POWER
100Ω
13dBm
5.33
Va = Vo (1 – 1/n)
Line Impedance
100Ω
13dBm
5.33
solving
Line Power
Peak-to-Average Ratio
Transformer Turns Ratio
Reflected Impedance
Back-Termination Resistors
Transformer Insertion Loss
Average Amplifier Swing
Average Amplifier Current
Peak Amplifier Swing
Peak Amplifier Current
Total Average Power Consumption
Supply Voltage
RF/RP = 1 – 1/n
2
1
So to reduce the back-termination by a factor of 3 choose
RF/RP = 2/3. Note that the overall gain is increased to:
25Ω
12.5Ω
1dB
100Ω
8.35Ω
0.5dB
Vo/Vi = (1 + RF/RG + RF/RP)/[2(1 – RF/RP)]
0.79V
0.87V
15mA
RMS
RMS
RMS
ADSL Driver Requirements
31.7mA
RMS
4.21V Peak
169mA Peak
550mW
4.65V Peak
80mA Peak
350mW
The LT1969 is an ideal choice for ADSL upstream (CPE)
modems. The key advantages are: ±200mA output drive
with only 1.7V worst-case total supply voltage headroom,
high bandwidth, which helps achieve low distortion, low
quiescent supply current of 7mA per amplifier and a
space-saving, thermally enhanced MS10 package.
Single 12V
Single 12V
–73dBc for all swings up to 16VP-P into the line. The gain
of this circuit from the differential inputs to the line voltage
is 10. Lower gains are easy to implement using the
compensation techniques of Figure 5. Table 2 shows the
drive requirements for this standard circuit.
An ADSL remote terminal driver must deliver an average
power of 13dBm (20mW) into a 100Ω line. This corre-
spondsto1.41VRMS intotheline.TheDMT-ADSLpeak-to-
average ratio of 5.33 implies voltage peaks of 7.53V into
the line. Using a differential drive configuration and trans-
former coupling with standard back-termination, a trans-
formerratioof1:2iswellsuited. Thisisshownonthefront
page of this data sheet along with the distortion perfor-
mance vs line voltage at 200kHz, which is beyond ADSL
requirements. Note that the distortion is better than
The above design is an excellent choice for desktop
applications and draws typically 550mW of power. For
portable applications, power savings can be achieved by
reducingtheback-terminationresistorusingpositivefeed-
back as shown in Figure 9. The overall gain of this circuit
V
+
i
8.45Ω
–
1k
1k
1:1
1.21k
1.21k
523Ω
523Ω
100Ω
1µF
1969 F09
–
+
A
= 10
V
8.45Ω
–V
i
Figure 9. Power Saving ADSL Modem Driver
15
LT1969
W U U
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APPLICATIO S I FOR ATIO
is also 10, but the power consumption has been reduced
to 350mW, a savings of 36% over the previous design.
Note that the reduction of the back-termination resistor
has allowed use of a 1:1 transformer ratio.
The reduced signal has system implications for the sensi-
tivityofthereceiver.Thepowerreductionmay,ormaynot,
be an acceptable system tradeoff for a given design.
Controlling the Quiescent Current
Table 2 compares the two approaches. It may seem that
thelowpowerdesignisaclearchoice,buttherearefurther
system issues to consider. In addition to driving the line,
the amplifiers provide back-termination for signals that
are received simultaneously from the line. In order to
reject the drive signal, a receiver circuit is used such as
shown in Figure 10. Taking advantage of the differential
nature of the signals, the receiver can subtract out the
drive signal and amplify the received signal. This method
works well for standard back-termination. If the back-
termination resistors are reduced by positive feedback, a
portion of the received signal also appears at the amplifier
outputs. The result is that the received signal is attenuated
by the same amount as the reduction in the back-termina-
tionresistor. Takingintoaccountthedifferenttransformer
turns ratios, the received signal of the low power design
will be one third of the standard design received signal.
The quiescent current of the LT1969 is controlled via two
control pins, CTRL1 and CTRL2. The pins can be used to
either turn off the amplifiers, reducing the quiescent cur-
renton±2.5Vsuppliestolessthan500µAperamplifier, or
to control the quiescent current in normal operation.
Figure 11 shows how the control pins are used in conjunc-
tion with external resistors to program the supply current.
In normal operation, each control pin is biased to approxi-
mately 1V above V– and by varying the resistor values, the
current from each control pin can be adjusted. It is this
current that sets the supply current of both amplifiers. If
one of the resistors is open, i.e. R2, the supply current of
the amplifiers will be set by CTRL1 and R1. Figure 12
shows supply current vs resistor value.
R
BT
V
V
a
L
1:n
R
L
R
BT
–V
a
–V
L
R
R
R
F
D
G
–
R
L
2
+
LT1813
LT1813
= REFLECTED IMPEDANCE
n
+
R
L
2
V
RX
V
BIAS
2n
= ATTENUATION OF V
a
+
–
R
L
2
+ R
BT
2n
–
R
L
R
R
D
2
2n
R
R
G
D
SET
=
R
L
R
F
G
+ R
1969 F10
BT
2
2n
Figure 10. Receiver Configuration
16
LT1969
W U U
APPLICATIO S I FOR ATIO
U
+
CTRL1
6
CTRL2
7
V
1
+
–
R1
R2
OFF
OFF
–
ON
ON
3.3V/5V FROM V
1969 F13
CTRL1
6
CTRL2
7
5
Figure 13
–
V
R1
R2
–
–
1969 F11
V
V
remains low, preserving the line termination. The Typical
PerformanceCharacteristicscurveOutputImpedancevs
Supply Current shows the details. Both logic inputs high
further reduces the supply current and places the part in
a “standby” mode with less than 500µA per amplifier
quiescent current.
Figure 11
30
25
V
= ±6V
= 25°C
S
A
T
20
15
Output Loading in Low Current Modes
The LT1969 output stage has a very wide bandwidth and
is able to source and sink large amounts of current. The
internal circuitry of the output stage incorporates a posi-
tive feedback boost loop giving it high drive capability. As
thesupplycurrentisreduced,thesourcingdrivecapability
also reduces. Maximum sink current is independent of
supply current and is limited by the short-circuit protec-
tion at 500mA. If the amplifier is in a low power or
“standby” mode, the output stage is slightly biased and is
not capable of sourcing high output currents. The Typical
Performance Characteristics curve Maximum IOUT Sourc-
ing vs Quiescent Current shows the maximum output
current for a given quiescent current.
10
5
0
0
10 20 30 40 50 60 70 80 90 100
RESISTANCE (kΩ)
1969 F12
Figure 12. Supply Current vs Control Resistance (R1//R2)
Using CTRL1 and CTRL2 to set the supply current effec-
tively places R1 and R2 in parallel obtaining a net resis-
tance, and Figure 12 can still be utilized in determining
supply current.
Considerations for Fault Protection
The use of two pins to control the supply current allows
for applications where external logic can be used to place
the amplifiers in different supply current modes. Figure
13 illustrates a partial shutdown with direct logic on each
control pin. If both logic inputs are low, the control pins
will effectively see a resistance of 13k//49.9k = 10k to
V–. This will set the amplifiers in nominal mode with a
The basic line driver design presents a direct DC path
between the outputs of the two amplifiers. An imbalance
in the DC biasing potentials at the noninverting inputs
through either a fault condition or during turn-on of the
system can create a DC voltage differential between the
two amplifier outputs. This condition can force a consid-
erable amount of current, 500mA or more, to flow as it is
limited only by the small valued back-termination resis-
tors and the DC resistance of the transformer primary.
This high current can possibly cause the power supply
voltage source to drop significantly impacting overall
gain bandwidth of 700MHz and±200mA minimum IOUT
.
The electrical characteristics are specified in nominal
mode. Forcing R1’s input logic high will partially shut
down the part, putting it in a low power mode. By keeping
the output stage slightly biased, the output impedance
17
LT1969
W U U
U
APPLICATIO S I FOR ATIO
system performance. If left unchecked, the high DC cur-
rent can heat the LT1969 to destruction.
create fast voltage transitions themselves that can be
coupled through the transformer to the outputs of the line
driver. Several hundred volt transient signals can appear
at the primary windings of the transformer with current
intothedriveroutputslimitedonlybythebacktermination
resistors. While the LT1969 has clamps to the supply rails
at the output pins, they may not be large enough to handle
thesignificanttransientenergy. Externalclampingdiodes,
such as BAV99s, at each end of the transformer primary
help to shunt this destructive transient energy away from
the amplifier outputs.
Using DC blocking capacitors to AC couple the signal to
thetransformereliminatesthepossibilityforDCcurrentto
flow under any conditions. These capacitors should be
sized large enough to not impair the frequency response
characteristics required for the data transmission.
Another important fault related concern has to do with
very fast high voltage transients appearing on the tele-
phone line (lightning strikes for example). TransZorbsTM,
varistors and other transient protection devices are often
used to absorb the transient energy, but in doing so also
TransZorb is a registered trademark of General Instruments, GSI
18
LT1969
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS10 Package
10-Lead Plastic MSOP
(LTC DWG # 05-08-1661)
0.118 ± 0.004*
(3.00 ± 0.102)
10 9
8
7 6
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2
3
4 5
0.034
(0.86)
REF
0.043
(1.10)
MAX
0.007
(0.18)
0° – 6° TYP
SEATING
PLANE
0.007 – 0.011
(0.17 – 0.27)
0.021 ± 0.006
(0.53 ± 0.015)
0.005 ± 0.002
(0.13 ± 0.05)
MSOP (MS10) 1100
0.0197
(0.50)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1969
U
TYPICAL APPLICATIO
Split Supply ±5V ADSL CPE Line Driver
5V
5V
4
3
1
+
BAV99**
–5V
0.47µF**
6.19Ω
2
130Ω
1/2 LT1969
–
1k
1k
100pF
1:2*
+
2k
866Ω
866Ω
+
V
100Ω V
IN
L
–
2k
–
100pF
0.47µF**
–
9
6.19Ω
10
5V
BAV99**
1/2 LT1969
+
130Ω
7
8
5
6
–5V
49.9k
13k
*COILCRAFT X8390-A OR EQUIVALENT
**SEE TEXT REGARDING FAULT PROTECTION
1969 TA02
–5V –5V –5V
V
L
= 5
(ASSUME 0.5dB TRANSFORMER POWER LOSS)
2
V
IN
REFLECTED LINE IMPEDANCE = 100Ω / 2 = 25Ω
2kΩ
EFFECTIVE TERMINATION = 2 • 6.19 •
= 24.8Ω
1kΩ
EACH AMPLIFIER: 0.56V
, 29.9mA
RMS
RMS
±3V PEAK, ±160mA PEAK
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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Dual 250mA, 60MHz Current Feedback Amplifier
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Shutdown/Current Set Function
4.6mA Supply Current Set, 80mA I
900V/µs Slew Rate
LT1396
OUT
LT1497
LT1795
Shutdown/Current Set Function, ADSL CO Driver
Gain of 10 Stable, Low Distortion
LT1886
1969f LT/TP 0301 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
LINEAR TECHNOLOGY CORPORATION 2001
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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