LT1970AIFE#PBF [Linear]
LT1970A - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C;
| 型号： | LT1970AIFE#PBF |
| 厂家： | 
Linear |
| 描述： | LT1970A - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C 放大器 光电二极管 |
| 文件： | 总24页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1970A
500mA Power Op Amp with
Adjustable Precision Current Limit
FEATURES
DESCRIPTION
The LT®1970A is a 500mA power op amp with precise
externally controlled current limiting. Separate control
voltages program the sourcing and sinking current limit
sense thresholds with 1% accuracy. Output current may
be boosted by adding external power transistors.
n
±±550m Miꢃi0u0 Output ꢂurreꢃt
n
IꢃAepeꢃAeꢃt mAduꢀt0eꢃt of Source ꢁꢃA
Siꢃk ꢂurreꢃt ꢄi0itꢀ
1% ꢂurreꢃt ꢄi0it mccurꢁcy
I0proveA Reꢁctive ꢄoꢁA Driviꢃg Stꢁaility
Operates with Single or Split Supplies
Shutdown/Enable Control Input
Open-Collector Status Flags:
n
n
n
The circuit operates with single or split power supplies
from 5V to 36V total supply voltage. In normal opera-
tion, the input stage supplies and the output stage sup-
n
n
Sink Current Limit
Source Current Limit
Thermal Shutdown
+
–
plies are connected (V to V and V to V ). To reduce
CC
EE
power dissipation it is possible to power the output stage
+
–
(V ,V )fromindependent,lowervoltagerails.Theamplifier
isunity-gainstablewitha3.6MHzgain-bandwidthproduct
and slews at 1.6V/μs. The LT1970A can drive capacitive
and inductive loads directly.
n
Fail-Safe Current Limit and Thermal Shutdown
n
1.6V/μs Slew Rate
3.6MHz Gain-Bandwidth Product
Specified Temperature Range: –40°C to 85°C
Available in a 20-Lead TSSOP Package
n
n
n
Open-collector status flags signal current limit circuit
activation, as well as thermal shutdown of the amplifier.
An enable logic input puts the amplifier into a low power,
high impedance output state when pulled low. Thermal
shutdown and a 800mA fixed current limit protect the
chip under fault conditions.
APPLICATIONS
n
Automatic Test Equipment
n
Laboratory Power Supplies
n
Motor Drivers
Thermoelectric Cooler Driver
n
TheLT1970Aispackagedina20-leadTSSOPpackagewith
a thermally conductive copper bottom plate to facilitate
heat sinking.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Device Power Supply (DPS) with ±±550m mAduꢀtꢁale ꢂurreꢃt ꢄi0it
V
LIMIT
0V TO 5V
20V
20V
6k
CURRENT LIMIT = 500mA
V
CC
V
LIMIT
ꢀꢁꢂtꢂ3
+
I
=
V
OUT(MAX)
V
, R = 100Ω
LOAD LOAD
CS
EN
VC
I
OUT
SRC
VC
V
IN
+IN
SNK
R
CS
ISNK
TRACE R TRACE L
100mΩ 200nH
V
LOAD
,
1Ω
LOAD
= 10Ω
ISRC
2V/DIV
0V
R
1/4W
TSD
LT1970A
OUT
+
SENSE
4.7μF
V
, 5V/DIV
–
IN
SENSE
LOAD
SENSE
ESR
0.1Ω
–
V
–IN
COMMON
V
EE
1970A TA01
100μs/DIV
–5V
10k
100pF
1970A TA01b
1970afa
1
LT1970A
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
Supply Voltage (V to V )..................................... 36V
CC
EE
+
–
V
1
2
20
19
18
17
16
15
14
13
12
11
V
V
EE
–
EE
+
Positive High Current Supply (V )................... V to V
CC
V
–
+
21
Negative High Current Supply(V ) ....................V to V
Amplifier Output (OUT)..................................... V to V
EE
OUT
3
TSD
–
+
+
SENSE
4
ISNK
Current Sense Pins
FILTER
5
ISRC
+
–
–
+
–
+
(SENSE , SENSE , FILTER)........................... V to V
–
SENSE
6
ENABLE
COMMON
Logic Outputs (ISRC, ISNK, TSD)....... COMMON to V
CC
V
7
CC
Input Voltage (–IN, +IN)............ V – 0.3V to V + 36V
EE
EE
–IN
+IN
8
VC
SRC
Input Current......................................................... 10mA
9
VC
SNK
Current Control Inputs
V
EE
10
V
EE
(VC , VC )..............COMMON to COMMON + 7V
SRC
SNK
FE PACKAGE
20-LEAD PLASTIC TSSOP
= 150°C, θ = 40°C/W (NOTE 8)
Enable Logic Input .............................. COMMON to V
CC
T
JMAX
JA
COMMON....................................................... V to V
EE
CC
EXPOSED PAD (PIN 21) IS CONNECTED TO V
EE
Output Short-Circuit Duration ......................... Indefinite
Operating Temperature Range (Note 2)....–40°C to 85°C
Specified Temperature Range (Note 3)
LT1970AC ................................................ 0°C to 70°C
LT1970AI.............................................. –40°C to 85°C
Maximum Junction Temperature.......................... 150°C
Storage Temperature Range...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
ORDER INFORMATION
ꢄEmD FREE FINISH
LT1970ACFE#PBF
LT1970AIFE#PBF
TmPE mND REEꢄ
PmRT MmRKING*
LT1970AFE
PmꢂKmGE DESꢂRIPTION
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
SPEꢂIFIED TEMPERmTURE RmNGE
0°C to 70°C
LT1970ACFE#TRPBF
LT1970AIFE#TRPBF
LT1970AFE
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l Aeꢃoteꢀ the ꢀpecificꢁtioꢃꢀ which ꢁpply over the full operꢁtiꢃg
te0perꢁture rꢁꢃge, otherwiꢀe ꢀpecificꢁtioꢃꢀ ꢁre ꢁt Tm = 2±°ꢂ. See Teꢀt ꢂircuit for ꢀtꢁꢃAꢁrA teꢀt coꢃAitioꢃꢀ.
SYMBOꢄ
PmRmMETER
ꢂONDITIONS
MIN
TYP
MmX
UNITS
Power Op m0p ꢂhꢁrꢁcteriꢀticꢀ
V
Input Offset Voltage
200
600
1000
1300
μV
μV
μV
OS
l
l
0°C < T < 70°C
A
–40°C < T < 85°C
A
l
l
l
Input Offset Voltage Drift (Note 4)
Input Offset Current
–10
–100
–600
–4
10
μV/°C
I
I
V
V
= 0V
= 0V
100
nA
OS
CM
Input Bias Current
–160
3
nA
B
CM
Input Noise Voltage
0.1Hz to 10Hz
μV
P-P
1970afa
2
LT1970A
ELECTRICAL CHARACTERISTICS The l Aeꢃoteꢀ the ꢀpecificꢁtioꢃꢀ which ꢁpply over the full operꢁtiꢃg
te0perꢁture rꢁꢃge, otherwiꢀe ꢀpecificꢁtioꢃꢀ ꢁre ꢁt Tm = 2±°ꢂ. See Teꢀt ꢂircuit for ꢀtꢁꢃAꢁrA teꢀt coꢃAitioꢃꢀ.
SYMBOꢄ
PmRmMETER
ꢂONDITIONS
1kHz
MIN
TYP
15
3
MmX
UNITS
nV/√Hz
pA/√Hz
e
n
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
i
1kHz
n
R
Common Mode
Differential Mode
500
100
kΩ
kΩ
IN
C
V
Input Capacitance
Pin 8 and Pin 9 to Ground
6
pF
IN
Input Voltage Range
Typical
Guaranteed by CMRR Test
–14.5
–12.0
92
13.6
12.0
V
V
dB
CM
l
l
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
–12V < V < 12V
105
CM
–
–
+
l
l
l
l
V
EE
V
EE
V
EE
V
EE
= V = –5V, V = V = 3V to 30V
90
110
90
100
130
100
130
dB
dB
dB
dB
CC
+
= V = –5V, V = 30V, V = 2.5V to 30V
CC
–
+
= V = –3V to –30V, V = V = 5V
CC
–
+
110
= –30V, V = –2.5V to –30V, V = V = 5V
CC
A
Large-Signal Voltage Gain
R = 1k, –12.5V < V < 12.5V
OUT
100
75
80
40
20
5
150
120
45
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
VOL
L
l
l
l
l
R = 100Ω, –12.5V < V
L
< 12.5V
OUT
+
–
R = 10Ω, –5V < V
L
< 5V, V = –V = 8V
OUT
–
V
V
Output Sat Voltage Low
Output Sat Voltage High
Output Short-Circuit Current
V
OL
= V
– V
OUT
OL
OH
+
–
R = 100, V = V = 15V, V = V = –15V
1.9
0.8
2.5
2.3
V
V
L
CC
EE
+
–
R = 10, V = –V = 15V, V = –V = 5V
L
CC
EE
+
V
= V – V
OH
OUT
+
–
l
R = 100, V = V = 15V, V = V = –15V
1.7
1.0
800
–800
V
V
mA
mA
L
L
CC
CC
EE
+
–
R = 10, V = –V = 15V, V = –V = 5V
EE
I
SC
Output Low, R
= 0Ω
= 0Ω
500
–1000
1200
–500
SENSE
SENSE
Output High, R
SR
Slew Rate
–10V < V
< 10V, R = 1k
0.7
1.6
V/μs
kHz
MHz
μs
OUT
L
FPBW
GBW
Full Power Bandwidth
Gain-Bandwidth Product
Settling Time
V
= 10V
(Note 5)
PEAK
11
OUT
f = 10kHz
0.01%, V
3.6
8
t
= 0V to 10V, A = –1, R = 1k
S
OUT
V
L
ꢂurreꢃt Seꢃꢀe ꢂhꢁrꢁcteriꢀticꢀ
V
Minimum Current Sense Voltage
VC
= VC
= 0V
0.1
0.1
15
4
7
mV
mV
mV
SENSE(MIN)
SRC
SNK
l
l
10
V
V
V
Current Sense Voltage 4% of Full Scale
Current Sense Voltage 10% of Full Scale
VC
SRC
VC
SRC
SRC
= VC
= VC
= VC
= 0.2V
= 0.5V
= 5V
20
50
25
SENSE(4%)
SENSE(10%)
SENSE(FS)
SNK
SNK
SNK
l
45
55
mV
Current Sense Voltage 100% of Full Scale VC
495
480
–1
500
500
–0.2
505
520
0.1
500
500
mV
mV
μA
nA
nA
l
l
I
I
I
I
Current Limit Control Input Bias Current
VC , VC Pins
SRC SNK
BI
–
l
l
–
+
SENSE Input Current
0V < (VC , VC ) < 5V
–500
–500
SENSE
FILTER
SENSE
SRC
SNK
FILTER Input Current
0V < (VC , VC ) < 5V
SRC SNK
+
l
l
l
l
SENSE Input Current
VC = VC
= 0V
–500
200
–300
–25
500
300
–200
25
nA
μA
μA
μA
SRC
SRC
SNK
= 5V, VC
VC
= 0V
250
–250
SNK
SNK
VC = 0V, VC
= 5V
SRC
SRC
VC
= VC
= VC
= 5V
SNK
Current Sense Change with Output Voltage VC
= 5V, –12.5V < V
< 12.5V
0.1
%
SRC
SNK
OUT
+
Current Sense Change with Supply Voltage VC
= VC
= 5V, 6V < (V , V ) < 18V
0.05
0.01
0.05
0.01
%
%
SRC
SNK
CC
+
2.5V < V < 18V, V = 18V
CC
–
–18V < (V , V ) < –2.5V
%
EE
–
–18V < V < –2.5V, V = –18V
%
EE
1970afa
3
LT1970A
ELECTRICAL CHARACTERISTICS The l Aeꢃoteꢀ the ꢀpecificꢁtioꢃꢀ which ꢁpply over the full operꢁtiꢃg
te0perꢁture rꢁꢃge, otherwiꢀe ꢀpecificꢁtioꢃꢀ ꢁre ꢁt Tm = 2±°ꢂ. See Teꢀt ꢂircuit for ꢀtꢁꢃAꢁrA teꢀt coꢃAitioꢃꢀ.
SYMBOꢄ
PmRmMETER
ꢂONDITIONS
MIN
TYP
2
MmX
UNITS
MHz
ꢀ
Current Sense Bandwidth
Resistance FILTER to SENSE
–
l
R
750
1000
1250
CSF
ꢄogic I/O ꢂhꢁrꢁcteriꢀticꢀ
l
l
Logic Output Leakage ISRC, ISNK, TSD
Logic Low Output Level
V = 15V
1
μA
V
I = 5mA (Note 6)
0.2
25
0.4
Logic Output Current Limit
Enable Logic Threshold
mA
V
l
l
l
l
l
V
0.8
–1
1.9
2.5
1
ENABLE
ENABLE
SUPPLY
CC
I
I
I
I
t
t
Enable Pin Bias Current
μA
mA
mA
mA
μs
+
–
Total Supply Current
V
CC
V
CC
V
CC
, V and V , V Connected
7
3
13
7
EE
+
–
V
Supply Current
, V and V , V Separate
EE
CC
+
–
Supply Current Disabled
Turn-On Delay
, V and V , V Connected, V ≤ 0.8V
ENABLE
0.6
10
10
1.5
CC(STBY)
ON
EE
(Note 7)
(Note 7)
Turn-Off Delay
μs
OFF
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device reli-
ability and lifetime.
Note 2: The LT1970AC is guaranteed functional over the operating tem-
perature range of –40°C and 85°C.
Note 4: This parameter is not 100% tested.
Note ±: Full power bandwidth is calculated from slew rate measurements:
FPBW = SR/(2 • π • V )
P
Note 6: The logic low output level of pin TSD is guaranteed by correlating
the output level of pin ISRC and pin ISNK over temperature.
Note 7: Turn-on and turn-off delay are measured from V
crossing
ENABLE
Note 3: The LT1970AC is guaranteed to meet specified performance from
0°C to 70°C. The LT1970AC is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1970AI is guaranteed to meet speci-
fied performance from –40°C to 85°C.
1.6V to the OUT pin at 90% of normal output voltage.
Note 8: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. If the maximum dissipation of the package is
exceeded, the device will go into thermal shutdown and be protected.
TYPICAL PERFORMANCE CHARACTERISTICS
Totꢁl Supply ꢂurreꢃt
vꢀ Supply Voltꢁge
Wꢁr0-Up Drift VIO vꢀ Ti0e
Iꢃput Biꢁꢀ ꢂurreꢃt vꢀ VꢂM
–100
–120
–140
–160
–180
–200
–220
–240
–260
14
12
10
8
6
4
V
S
= 15V
+
I
+ I
V
125°C
25°C
CC
–I
BIAS
–55°C
–55°C
2
0
+I
BIAS
–
I
+ I
V
EE
–2
–4
–6
–8
–10
–12
–14
0V
25°C
TIME (100ms/DIV)
1970A G01
125°C
–15 –12 –9 –6 –3
0
3
6
9
12 15
0
2
4
6
8
10 12 14 16 18
COMMON MODE INPUT VOLTAGE (V)
SUPPLY VOLTAGE ( V)
1970A G03
1970A G02
1970afa
4
LT1970A
TYPICAL PERFORMANCE CHARACTERISTICS
Opeꢃ-ꢄoop Gꢁiꢃ ꢁꢃA Phꢁꢀe
Supply ꢂurreꢃt vꢀ Supply Voltꢁge
vꢀ Frequeꢃcy
Phꢁꢀe Mꢁrgiꢃ vꢀ Supply Voltꢁge
60
58
56
54
52
50
48
46
44
42
40
70
60
50
40
100
90
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
+
A
= –1
V
F
I
V
R
= R = 1k
G
–
I
T
A
= 25°C
V
80
V
= V /2
OUT
S
GAIN
PHASE
70
I
VCC
30
20
60
50
I
VEE
10
0
40
30
20
10
0
–10
–20
–30
T
= 25°C
CC
A
+
–
V
= V = –V = –V
EE
0
0
4
8
12 16 20 24 28 32 36
100
1k
10k 100k
1M
10M 100M
2
4
6
8
10 12
20
14 16 18
TOTAL SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
SUPPLY VOLTAGE ( V)
1970A G05
1970A G06
1870A G04
Gꢁiꢃ BꢁꢃAwiAth vꢀ Supply Voltꢁge
Gꢁiꢃ vꢀ Frequeꢃcy
Gꢁiꢃ vꢀ Frequeꢃcy with ꢂꢄOmD
10
0
10
5
A
= 1
V
A
=
= 1
15V
A
= 100
V
S
V
V
30nF
10nF
0
–10
–20
–30
–40
4
3
1nF
V
= 15V
S
–10
–20
–30
–40
V
=
5V
S
0nF
2
1
0
10k
100k
1M
10M
10k
100k
1M
10M
0
4
8
12 16 20 24 28 32 36
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL SUPPLY VOLTAGE (V)
1970A G08
1970A G09
1970A G07
Output I0peAꢁꢃce
DiꢀꢁaleA Output I0peAꢁꢃce
Slew Rꢁte vꢀ Supply Voltꢁge
600k
100k
100
10
1.8
V
V
=
15V
= 0.8V
V
= 15V
S
S
ENABLE
1.7
1.6
FALLING
RISING
A
= 100
V
10k
1k
1.5
1.4
1.3
1.2
1.1
1
A
= 10
V
0.1
A
= 1
V
100
10
1
0.01
0.001
A
= –1
V
F
R
= R = 1k
G
T
A
= 25°C
1.0
1k
10k
100k
1M
10M
100M
4
6
8
10
12
14
16
18
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
SUPPLY VOLTAGE ( V)
1970A G10
1970A G11
1970A G12
1970afa
5
LT1970A
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rꢁte vꢀ Te0perꢁture
ꢄꢁrge-Sigꢃꢁl Reꢀpoꢃꢀe, mV = 1
ꢄꢁrge-Sigꢃꢁl Reꢀpoꢃꢀe, mV = –1
2.5
2.0
1.5
1.0
0.5
0
V
= 15V
S
FALLING
10V
10V
RISING
0V
0V
–10V
–10V
R
= 1k
1970A G14
20μs/DIV
L
R
L
L
= 1k
20μs/DIV
1970A G15
C
= 1000pF
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
1970A G13
S0ꢁll-Sigꢃꢁl Reꢀpoꢃꢀe, mV = 1
S0ꢁll-Sigꢃꢁl Reꢀpoꢃꢀe, mV = –1
Output OverAriveꢃ
V
OUT
0V
0V
5V/DIV
V
IN
5V/DIV
R
= 1k
1970A G16
500ns/DIV
R
C
= 1k
= 1000pF
1970A G17
2μs/DIV
V
S
A
V
=
= 1
5V
200μs/DIV
1970A G18
L
L
L
UꢃAiꢀtorteA Output Swiꢃg
vꢀ Frequeꢃcy
Full Rꢁꢃge ꢂurreꢃt Seꢃꢀe
Trꢁꢃꢀfer ꢂurve
% Overꢀhoot vꢀ ꢂꢄOmD
60
50
40
30
20
10
0
30
25
20
15
10
5
500
400
300
200
100
0
V
= 15V
S
SOURCING
CURRENT
A
= 1
V
A
= –1
V
–100
–200
–300
–400
–500
SINKING
CURRENT
V
A
=
15V
S
V
= –5
1% THD
0
10
100
1k
10k
100
1k
10k
100k
0
1
2
3
4
5
C
(pF)
FREQUENCY (Hz)
V
CSNK
= V
(V)
LOAD
CSRC
1970A G19
1970A G20
1970A G21
1970afa
6
LT1970A
TYPICAL PERFORMANCE CHARACTERISTICS
ꢄow ꢄevel ꢂurreꢃt Seꢃꢀe
Trꢁꢃꢀfer ꢂurve
ꢄogic Output ꢄevel
Mꢁxi0u0 Output ꢂurreꢃt
vꢀ Siꢃk ꢂurreꢃt (Output ꢄow)
vꢀ Te0perꢁture
25
20
1.0
0.9
0.8
0.7
1600
1400
1200
1000
800
600
400
200
0
+
–
+
–
V
V
= 15V
= –15V
V
V
= 15V
= –15V
15
SOURCING
CURRENT
10
SOURCE
SINK
5
0.6
0.5
25°C
0
125°C
0.4
0.3
0.2
0.1
0
–5
SINKING
CURRENT
–10
–15
–20
–25
–55°C
25 50
0
25 50 75 100 125 150 175 200 225 250
–75 –50 –25
0
75 100 125
0.001
0.01
0.1
1
10
100
V
= V
(mV)
CSRC
TEMPERATURE (°C)
SINK CURRENT (mA)
CSNK
1970A G23
1970A G22
1970A G24
Output Stꢁge Quieꢀceꢃt ꢂurreꢃt
vꢀ Supply Voltꢁge
Sꢁfe Operꢁtiꢃg mreꢁ
10
8
1200
1000
800
600
400
200
0
I
AT 10% DUTY CYCLE
OUT
+
125°C
I
V
6
25°C
4
–55°C
2
0
–
I
V
–55°C
–2
–4
–6
–8
–10
25°C
125°C
14 16
18
25 30
10 15 20
SUPPLY VOLTAGE (V)
0
2
4
6
8
10 12
SUPPLY VOLTAGE ( V)
0
5
35 40
1970A G26
1970A G25
ꢂoꢃtrol Stꢁge Quieꢀceꢃt ꢂurreꢃt
vꢀ Supply Voltꢁge
Supply ꢂurreꢃt vꢀ Supply Voltꢁge
iꢃ ShutAowꢃ
5
4
800
700
600
500
400
300
200
100
0
V
= 0V
I
ENABLE
CC
85°C
125°C
25°C
–55°C
3
25°C
2
–55°C
1
0
I
EE
–1
–2
–3
–4
–5
–55°C
25°C
125°C
8
10
0
2
4
6
12 14 16 18
0
2
4
6
8
10 12 14 16 18
SUPPLY VOLTAGE ( V)
SUPPLY VOLTAGE (V)
1970A G27
1970A G28
1970afa
7
LT1970A
PIN FUNCTIONS
V
(Piꢃꢀ 1, 15, 11, 25, 21): Minus Supply Voltage. V
FIꢄTER (Piꢃ ±): Current Sense Filter Pin. This pin is
EE
EE
connects to the substrate of the integrated circuit die, and
normally not used and should be left open or shorted to
–
therefore must always be the most negative voltage ap-
the SENSE pin. The FILTER pin can be used to adapt the
plied to the part. Decouple V to ground with a low ESR
response time of the current sense amplifiers with a 1nF
EE
–
capacitor. V may be a negative voltage or it may equal
to 100nF capacitor connected to the SENSE input. An
EE
ground potential. Any or all of the V pins may be used.
internal 1k resistor sets the filter time constant.
EE
Unused V pins must remain open.
–
EE
SENSE (Piꢃ 6): Negative Current Sense Pin. This pin is
–
–
V (Piꢃ 2): Output Stage Negative Supply. V may equal
normally connected to the load end of the external sense
resistor.Sourcingcurrentlimitoperationisactivatedwhen
V
or may be smaller in magnitude. Only output stage
EE
–
current flows out of V , all other current flows out of V .
the voltage V
(V
+ – V
–) equals 1/10 of
EE
SENSE SENSE
the programming control voltage at VC
SENSE
–
V maybeusedtodrivethebase/gateofanexternalpower
(Pin 13). Sink-
SRC
devicetoboosttheamplifier’soutputcurrenttolevelsabove
the rated 500mA of the on-chip output devices. Unless
ing current limit operation is activated when the voltage
equals –1/10 of the programming control voltage
V
SENSE
at VC
–
used to drive boost transistors, V should be decoupled
(Pin 12).
SNK
to ground with a low ESR capacitor.
V
(Piꢃ 7): Positive Supply Voltage. All circuitry except
ꢂꢂ
OUT (Piꢃ 3): Amplifier Output. The OUT pin provides the
force function as part of a Kelvin sensed load connection.
OUTisnormallyconnecteddirectlytoanexternalloadcur-
the output transistors draw power from V . Total supply
CC
voltage from V to V must be between 3.5V and 36V.
CC
EE
+
V
CC
mustalwaysbegreaterthanorequaltoV . V should
CC
+
rentsenseresistorandtheSENSE pin.Amplifierfeedback
always be decoupled to ground with a low ESR capacitor.
is directly connected to the load and the other end of the
current sense resistor. The load connection is also wired
–IN (Piꢃ 8): Inverting Input of Amplifier. –IN may be any
voltage from V – 0.3V to V + 36V. –IN and +IN remain
EE
EE
–
directly to the SENSE pin to monitor the load current.
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to ensure that –IN or +IN can never go to a volt-
The OUT pin is current limited to 800mA typical. This
currentlimitprotectstheoutputtransistorintheeventthat
connections to the external sense resistor are opened or
shortedwhichdisablestheprecisioncurrentlimitfunction.
age below V – 0.3V even during transient conditions or
EE
damage to the circuit may result. A Schottky diode from
V
to –IN can provide clamping if other elements in the
+
EE
SENSE (Piꢃ 4): Positive Current Sense Pin. This lead is
circuit can allow –IN to go below V .
EE
normallyconnectedtothedrivenendoftheexternalsense
resistor.Sourcingcurrentlimitoperationisactivatedwhen
+IN(Piꢃ9):NoninvertingInputofAmplifier.+INmaybeany
the voltage V
(V
+ – V
–) equals 1/10 of
SRC
voltage from V – 0.3V to V + 36V. –IN and +IN remain
SENSE SENSE
the programming control voltage at VC
SENSE
EE EE
(Pin 13). Sink-
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to ensure that –IN or +IN can never go to a volt-
ing current limit operation is activated when the voltage
V
equals –1/10 of the programming control voltage
SNK
SENSE
at VC
(Pin 12).
age below V – 0.3V even during transient conditions or
EE
damage to the circuit may result. A Schottky diode from
V
to +IN can provide clamping if other elements in the
EE
circuit can allow +IN to go below V .
EE
1970afa
8
LT1970A
PIN FUNCTIONS
Vꢂ
(Piꢃ 12): Sink Current Limit Control Voltage In-
current. The current limit flag is off when the source
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISRC may be left open if
this function is not monitored.
SNK
put. The current sink limit amplifier will activate when
+
–
the sense voltage between SENSE and SENSE equals
–1.0 • V
and V
and V
at VC
/10. VC
may be set between V
VCSNK
COMMON
SENSE
SNK COMMON
+ 6V. The transfer function between VC
SNK
ISNK (Piꢃ 17): Sinking Current Limit Digital Output Flag.
ISNK is an open-collector digital output. ISNK pulls low
whenever the sinking current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
current. The current limit flag is off when the source
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISNK may be left open if
this function is not monitored.
is linear except for very small input voltages
< 60mV. V
limits at a minimum set point
SNK
SENSE
of 4mV typical to ensure that the sink and source limit
amplifiers do not try to operate simultaneously. To force
zero output current, the ENABLE pin can be taken low.
Vꢂ
(Piꢃ 13): Source Current Limit Control Voltage
SRꢂ
Input. The current source limit amplifier will activate
+
–
when the sense voltage between SENSE and SENSE
equals V
and V
and V
at VC
TSD (Piꢃ 18): Thermal Shutdown Digital Output Flag. TSD
isanopen-collectordigitaloutput.TSDpullslowwhenever
theinternalthermalshutdowncircuitactivates, typicallyat
a die temperature of 160°C. This pin can sink up to 10mA
of output current. The TSD flag is off when the die tem-
perature is within normal operating temperatures. ISRC,
ISNKandTSDmaybewired“OR”togetherifdesired.ISNK
may be left open if this function is not monitored. Thermal
shutdown activation should prompt the user to evaluate
electrical loading or thermal environmental conditions.
/10. VC
may be set between V
VCSRC
SRC COMMON
+ 6V. The transfer function between VC
COMMON
SRC
is linear except for very small input voltages
SENSE
< 60m
V. V
limits at a minimum set point
SRC
SENSE
of 4mV typical to ensure that the sink and source limit
amplifiers do not try to operate simultaneously. To force
zero output current, the ENABLE pin can be taken low.
ꢂOMMON (Piꢃ 14): Control and ENABLE inputs and flag
outputs are referenced to the COMMON pin. COMMON
may be at any potential between VEE and VCC – 3V. In
+
+
V (Piꢃ 19): Output Stage Positive Supply. V may equal
typical applications, COMMON is connected to ground.
V
or may be smaller in magnitude. Only output stage
CC
+
ENmBꢄE (Piꢃ 1±): ENABLE Digital Input Control. When
taken low this TTL-level digital input turns off the ampli-
fier output and drops supply current to less than 1mA.
Use the ENABLE pin to force zero output current. Setting
current flows through V , all other current flows into V .
CC
+
V may be used to drive the base/gate of an external power
devicetoboosttheamplifier’soutputcurrenttolevelsabove
the rated 500mA of the on-chip output devices. Unless
+
VC
= VC
= 0V allows I
OUT
= 4mV/R to flow
used to drive boost transistors, V should be decoupled
SNK
in or out of V
SRC
OUT
SENSE
.
to ground with a low ESR capacitor.
ISRC (Piꢃ 16): Sourcing Current Limit Digital Output Flag.
ISRC is an open-collector digital output. ISRC pulls low
whenever the sourcing current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
ExpoꢀeA PꢁA (Piꢃ 21): The exposed backside of the pack-
age is electrically connected to the V pins on the IC die.
EE
The package base should be soldered to a heat spreading
pad on the PC board that is electrically connected to V .
EE
1970afa
9
LT1970A
BLOCK DIAGRAM AND TEST CIRCUIT
R
F
1k
V
CC
+
7
V
15V
19
+IN
9
8
+
–
Q1
Q2
OUT
+
V
IN
1=
GM1
3
–
–IN
R
G
1k
10k
10k
10k
ISNK
ISRC
TSD
17
16
18
–
+
D1
D2
R
1Ω
CS
+
–
I
I
V
SNK
SNK
SRC
+
SENSE
FILTER
15V
4
5
6
ENABLE
+
–
V
ENABLE
15
12
–
SENSE
VC
SNK
5V
VC
SNK
–
+
R
FIL
1k
R
–
VC
LOAD
SRC
V
SRC
VC
1k
13
14
SRC
2
V
COMMON
EE
–15V
1, 10, 11, 20
1970ATC
APPLICATIONS INFORMATION
The LT1970A power op amp with precision controllable
current limit is a flexible voltage and current source
module. The drawing on the front page of this data sheet
is representative of the basic application of the circuit,
however many alternate uses are possible with proper
understanding of the subcircuit capabilities.
a conventional manner. The output stage includes current
limiting at 800mA to protect against fault conditions.
The input stage has high differential breakdown of 36V
minimum between –IN and +IN. No current will flow at
the inputs when differential input voltage is present. This
feature is important when the precision current sense
amplifiers “I
” and “I ” become active.
SINK
SRC
ꢂIRꢂUIT DESꢂRIPTION
ꢂurreꢃt ꢄi0it m0plifierꢀ
Amplifierstages“I ”and“I ”areveryhightranscon-
Mꢁiꢃ Operꢁtioꢃꢁl m0plifier
SINK
SRC
ductance amplifier stages with independently controlled
Subcircuit block GM1, the 1X unity-gain current buffer
and output transistors Q1 and Q2 form a standard op-
erational amplifier. This amplifier has 500mA current
output capability and a 3.6MHz gain-bandwidth product.
Most applications of the LT1970A will use this op amp
in the main signal path. All conventional op amp circuit
configurationsaresupported.Inverting,noninverting,filter,
summation or nonlinear circuits may be implemented in
offset voltages. These amplifiers monitor the voltage
+
–
between input pins SENSE and SENSE which usually
sense the voltage across a small external current sense
resistor. The transconductance amplifiers outputs con-
nect to the same high impedance node as the main input
stage GM1 amplifier. Small voltage differences between
+
–
SENSE and SENSE , smaller than the user set VC /10
SNK
1970afa
10
LT1970A
APPLICATIONS INFORMATION
andVC /10inmagnitude, causethecurrentlimitampli-
For low V supply applications it is important to keep
CC
SRC
fiers to decouple from the signal path. This is functionally
the maximum input control voltages, VC
and VC
,
SRC
SNK
indicatedbydiodesD1andD2intheBlockDiagram.When
at least 2.5V below the V potential. This ensures linear
CC
the voltage V
increases in magnitude sufficient to
controlofthecurrentlimitthreshold.Reducingthecurrent
limit sense resistor value allows high output current from
a smaller control voltage which may be necessary if the
SENSE
equal or overcome one of the offset voltages VC /10 or
SNK
VC /10,theappropriatecurrentlimitamplifierbecomes
SRC
activeandbecauseofitsveryhightransconductance,takes
V
CC
supply is only 5V.
control from the input stage, GM1. The output current is
The transfer function from V to the associated V is
C
OS
regulated to a value of I
= V
/R
= (VC
or
OUT
SENSE SENSE
SRC
linear from about 0.1V to 5V in, or 10mV to 500mV at
thecurrentlimitamplifierinputs. Anintentionalnonlinear-
ity is built into the transfer functions at low levels. This
nonlinearity ensures that both the sink and source limit
amplifiers cannot become active simultaneously. Simul-
taneous activation of the limit amplifiers could result in
uncontrolledoutputs.AsshownintheTypicalPerformance
Characteristics curves, the control inputs have a “hockey
stick” shape, to keep the minimum limit threshold at 4mV
for each limit amplifier.
VC )/(10 • R
). The time required for the current
SNK
SENSE
limitamplifierstotakecontroloftheoutputistypically4μs.
Linear operation of the current limit sense amplifier
+
–
occurs with the inputs SENSE and SENSE ranging be-
tween V – 1.5V and V + 1.5 . Most applications will
V
CC
EE
+
connect pins SENSE and OUT together, with the load on
the opposite side of the external sense resistor and pin
–
SENSE . Feedback to the inverting input of GM1 should
–
be connected from SENSE to –IN. Ground side sensing
of load current may be employed by connecting the load
Figure 1 illustrates an interesting use of the current
sense input pins. Here the current limit control ampli-
fiers are used to produce a symmetrically limited output
voltage swing. Instead of monitoring the output current,
the output voltage is divided down by a factor of 20 and
+
–
between pins OUT and SENSE . Pin SENSE would be
connected to ground in this instance. Load current would
be regulated in exactly the same way as the conventional
connection. However, voltage mode accuracy would be
degraded in this case due to the voltage across R
.
+
–
SENSE
+
applied to the SENSE input, with the SENSE input
+
Creative applications are possible where pins SENSE and
grounded. When the threshold voltage between SENSE
–
–
SENSE monitor a parameter other than load current. The
and SENSE (V
/10) is reached, the current limit
CLAMP
operating principle that at most one of the current limit
stages may be active at one time, and that when active,
the current limit stages take control of the output from
GM1, can be used for many different signals.
stage takes control of the output and clamps it a level of
2 • V . With control inputs VC and VC tied
together, a single polarity input voltage sets the same +
and – output limit voltage for symmetrical limiting. In this
circuit the output will current limit at the built-in fail-safe
level of typically 800mA.
CLAMP
SRC
SNK
ꢂurreꢃt ꢄi0it ThreꢀholA ꢂoꢃtrol Bufferꢀ
Input pins VC
and VC
are used to set the response
SNK
SRC
ENmBꢄE ꢂoꢃtrol
thresholds of current limit amplifiers “I
” and “I ”.
SRC
SINK
Each of these inputs may be independently driven by a
voltage of 0V to 5V above the COMMON reference pin.
The 0V to 5V input voltage is attenuated by a factor of 10
and applied as an offset to the appropriate current limit
amplifier. AC signals may be applied to these pins. The AC
The ENABLE input pin puts the LT1970A into a low sup-
ply current, high impedance output state. The ENABLE
pin responds to TTL threshold levels with respect to the
COMMON pin. Pulling the ENABLE pin low is the best
way to force zero current at the output. Setting VC
=
SNK
bandwidth from a V pin to the output is typically 2MHz.
VC
= 0V allows the output current to remain as high
C
SRC
as 4mV/R
For proper operation of the LT1970A, these control inputs
cannot be left floating.
.
SENSE
1970afa
11
LT1970A
APPLICATIONS INFORMATION
12V
V
OUT
80mV
1V/DIV
0V
TO
V
CLAMP
R3
3k
10V
OV TO 5V
–80mV
TO
–10V
EN
CLAMP
VC
SRC
VC
10V/DIV
REACHED
0V
SNK
OUTPUT CLAMPS
EN
ENABLE
V
IN
= 0.5V
V
= –0.5V
IN
AT 2w V
CLAMP
+IN
V
5V
0V
V
IN
CC
+
5μs/DIV
V
DISABLE
5V
ISRC
ISNK
TSD
OUT
LT1970A
+
SENSE
–
12V
R1
21.5k
SENSE
FILTER
R
L
VC
SRC
VC
SNK
–
V
–IN
EN
V
R2
1.13k
EE
+IN
V
V
IN
CC
+
COMMON
V
ISRC
ISNK
R
S
1Ω
TSD
OUT
LT1970A
–12V
+
R
R
SENSE
G
F
–
1970A F01
R
L
SENSE
FILTER
10Ω
–
V
–IN
V
EE
Figure 1. Sy00etricꢁl Output Voltꢁge ꢄi0itiꢃg
COMMON
R
R
F
–12V
G
10k
In applications such as circuit testers (ATE), it may be
preferable to apply a predetermined test voltage with a
preset current limit to a test node simultaneously. The
ENABLE pin can be used to provide this gating action
as shown in Figure 2. While the LT1970A is disabled,
the load is essentially floating and the input voltage and
current limit control voltages can be set to produce the
load test levels. Enabling the LT1970A then drives the
load. The LT1970A enables and disables in just a few
microseconds. The actual enable and disable times at
the load are a function of the load reactance.
10k
1970A F02
Figure 2. Uꢀiꢃg the ENmBꢄE piꢃ
Forslowvaryingoutputsignals,theassertionofalowlevel
at the current limit output flags occurs when the current
limit threshold is reached. For fast moving signals where
the LT1970A output is moving at the slew limit, typically
1.6V/μs, the flag assertion can be somewhat premature
at typically 75% of the actual current limit value.
Operꢁtiꢃg Stꢁtuꢀ Flꢁgꢀ
The operating status flags are designed to drive LEDs to
provide a visual indication of current limit and thermal
conditions. As such, the transition edges to and from
the active low state are not particularly sharp and may
exhibitsomeuncertainty.Addingsomepositivefeedback
to the current limit control inputs helps to sharpen these
transitions.
The LT1970A has three digital output indicators; TSD,
ISRC and ISNK. These outputs are open-collector drivers
referred to the COMMON pin. The outputs have 36V ca-
pabilities and can sink in excess of 10mA. ISRC and ISNK
indicateactivationoftheassociatedcurrentlimitamplifier.
The TSD output indicates excessive die temperature has
caused the circuit to enter thermal shutdown. The three
digital outputs may be wire “OR’d” together, monitored
individually or left open. These outputs do not affect
circuit operation, but provide an indication of the present
operational status of the chip.
WiththevaluesshowninFigure3, thecurrentlimitthresh-
old is reduced by approximately 0.5% when either current
limit status flag goes low. With sharp logic transitions, the
status outputs can be used in a system control loop to
take protective measures when a current limit condition
is detected automatically.
1970afa
12
LT1970A
APPLICATIONS INFORMATION
R1
100Ω
R3
20k
500mA
I
CURRENT
LIMIT
CONTROL
VOLTAGE
(0.1V TO 5V)
MAX
I
FLAG
SOURCE
R2
100Ω
R4
20k
50mA
0
I
LOW
I
OUT
I FLAG
SINK
12V
WHEN CURRENT LIMIT
–500mA
VC
SRC
IS FLAGGED, I
LIMIT
TRESHOLD IS REDUCED
BY 0.5%
VC
SNK
EN
V
ꢂtꢂ3ꢇ
CC
+IN
V
V
IN
CC
I
I
≈
≈
MAX
LOW
+
ꢃ3ꢀꢂꢈꢂ3ꢇꢆꢂtꢂꢀꢁꢂtꢂ3
V
S
ISRC
ISNK
V
ꢂtꢂꢃ3ꢇ]]3ꢉꢆ
R
S
1Ω
CC
<3ꢀꢂꢈꢂꢃ3ꢇ]]3ꢉꢆ>ꢂtꢂꢀꢁꢂtꢂ3
TSD
S
12V
OUT
LT1970A
+
SENSE
–
SENSE
R
L
R1
54.9k
R2
39.2k
R3
2.55k
FILTER
V
–
–IN
V
EE
COMMON
VC
SRC
VC
SNK
–12V
EN
R
G
R
F
+IN
V
V
IN
CC
1970A F03
+
V
ISRC
ISNK
R
S
1Ω
TSD
OUT
LT1970A
+
Figure 3. mAAiꢃg Poꢀitive FeeAaꢁck to Shꢁrpeꢃ the Trꢁꢃꢀitioꢃ
EAgeꢀ of the ꢂurreꢃt ꢄi0it Stꢁtuꢀ Flꢁgꢀ
SENSE
–
SENSE
FILTER
R
L
–
V
–IN
V
EE
COMMON
The current limit status flag can also be used to produce
a dramatic change in the current limit value of the ampli-
fier. Figure 4 illustrates a “snap-back” current limiting
characteristic. In this circuit, a simple resistor network
initially sets a high value of current limit (500mA). The
circuitoperatesnormallyuntilthesignalislargeenoughto
enter current limit. When either current limit flag goes low,
the current limit control voltage is reduced by a factor of
10. This then forces a low level of output current (50mA)
until the signal is reduced in magnitude. When the load
current drops below the lower level, the current limit is
then restored to the higher value. This action is similar to
a self resettable fuse that trips at dangerously high current
levels and resets only when conditions are safe to do so.
R
R
G
–12V
F
10k
10k
1970A F04
Figure 4. “Sꢃꢁp-Bꢁck” ꢂurreꢃt ꢄi0itiꢃg
shutdown. While the thermal shutdown feature prevents
damage to the circuit, normal operation is impaired.
Thermal design of the LT1970A operating environment
is essential to getting maximum utility from the circuit.
The first concern for thermal management is minimizing
the heat which must be dissipated. The separate power
+
–
pins V and V can be a great aid in minimizing on-chip
+
power. The output pin can swing to within 1.0V of V or
THERMmꢄ MmNmGEMENT
–
V even under maximum output current conditions. Using
+
separate power supplies, or voltage regulators, to set V
Miꢃi0iziꢃg Power Diꢀꢀipꢁtioꢃ
–
and V to their minimum values for the required output
The LT1970A can operate with up to 36V total supply volt-
age with output currents up to 500mA. The amount of
power dissipated in the chip could approach 18W under
worst-case conditions. This amount of power will cause
die temperature to rise until the circuit enters thermal
swing will minimize power dissipation. The supplies V
CC
and V may also be reduced to a minimal value, but these
EE
supply pins do not carry high currents, and the power
saving is much less. V and V must be greater than
CC
EE
the maximum output swing by 1.5V or more.
1970afa
13
LT1970A
APPLICATIONS INFORMATION
–
+
WhenV andV areprovidedseparatelyfromV andV ,
plating) connecting all layers of metal also helps reduce
the operating temperature of the LT1970A. These are also
shown in Figure 5.
CC
EE
–
+
care must be taken to ensure that V and V are always
less than or equal to the main supplies in magnitude.
Protection Schottky diodes may be required to ensure this
in all cases, including power on/off transients.
It is important to note that the metal planes used for heat
sinking are connecting electrically to V . These planes
EE
+
–
Operation with reduced V and V supplies does not affect
any performance parameters except maximum output
swing.AllDCaccuracyandACperformancespecifications
must be isolated from any other power planes used in
the PCB design.
Anothereffectivewaytocontrolthepoweramplifieroperat-
ing temperature is to use airflow over the board. Airflow
can significantly reduce the total thermal resistance as
also shown in Figure 5.
+
–
guaranteed with V = V and V = V are still valid with
CC
EE
the reduced output signal swing range.
Heꢁt Siꢃkiꢃg
The power dissipated in the LT1970A die must have a path
to the environment. With 100°C/W thermal resistance in
free air with no heat sink, the package power dissipation
is limited to only 1W. The 20-pin TSSOP package with
exposed copper underside is an efficient heat conductor
if it is effectively mounted on a PC board. Thermal resis-
tances as low as 40°C/W can be obtained by soldering
the bottom of the package to a large copper pattern on
the PC board. For operation at 85°C, this allows up to
1.625W of power to be dissipated on the LT1970A. At
25°C operation, up to 3.125W of power dissipation can
be achieved. The PC board heat spreading copper area
DRIVING REmꢂTIVE ꢄOmDS
ꢂꢁpꢁcitive ꢄoꢁAꢀ
The LT1970A is much more tolerant of capacitive loading
than most operational amplifiers. In a worst-case con-
figuration as a voltage follower, the circuit is stable for
capacitiveloadslessthan2.5nF.Highergainconfigurations
improve the C
handling. If very large capacitive loads
LOAD
are to be driven, a resistive decoupling of the amplifier
fromthecapacitiveloadiseffectiveinmaintainingstability
and reducing peaking. The current sense resistor, usually
connected between the output pin and the load can serve
as a part of the decoupling resistance.
must be connected to V .
EE
Figure 5 shows examples of PCB metal being used for
heat spreading. These are provided as a reference for
what might be expected when using different combina-
tions of metal area on different layers of a PCB. These
examples are with a 4-layer board using 1oz copper on
each layer. The most effective layers for spreading heat
are those closest to the LT1970A junction. Soldering the
exposed thermal pad of the TSSOP package to the board
produces a thermal resistance from junction-to-case of
approximately 3°C/W.
IꢃAuctive ꢄoꢁAꢀ
Load inductance is usually not a problem at the outputs of
operational amplifiers, but the LT1970A can be used as a
highoutputimpedancecurrentsource.Thisconditionmay
be the main operating mode, or when the circuit enters
a protective current limit mode. Just as load capacitance
degrades the phase margin of normal op amps, load
inductance causes a peaking in the loop response of the
feedbackcontrolledcurrentsource.Theinductiveloadmay
be caused by long lead lengths at the amplifier output. If
the amplifier will be driving inductive loads or long lead
lengths (greater than 4 inches) a 500pF capacitor from the
As a minimum, the area directly beneath the package on
all PCB layers can be used for heat spreading. However,
limiting the area to that of the metal heat sinking pad is
not very effective. Expanding the area on various layers
significantly reduces the overall thermal resistance. The
addition of vias (small 13 mil holes which fill during PCB
–
SENSE pin to the ground plane will cancel the inductive
load and ensure stability.
1970afa
14
LT1970A
APPLICATIONS INFORMATION
STIꢄꢄ mIR V
PmꢂKmGE
TOP ꢄmYER
2ND ꢄmYER
3RD ꢄmYER
BOTTOM ꢄmYER
Jm
TSSOP
155°ꢂ/W
TSSOP
±5°ꢂ/W
TSSOP
4±°ꢂ/W
1970A F05a
Typicꢁl ReAuctioꢃ iꢃ V with
Jm
ꢄꢁ0iꢃꢁr mirflow Over the Device
0
–10
–20
–30
–40
–50
–60
% REDUCTION RELATIVE
TO V IN STILL AIR
JA
0
100 200 300 400 500 600 700 800 900 1000
AIRFLOW (LINEAR FEET PER MINUTE, lfpm)
1970A F05b
Figure ±. Exꢁ0pleꢀ of PꢂB Metꢁl UꢀeA for Heꢁt Diꢀꢀipꢁtioꢃ. Driver Pꢁckꢁge MouꢃteA oꢃ Top
ꢄꢁyer. Heꢁt Siꢃk PꢁA SolAereA to Top ꢄꢁyer Metꢁl. Metꢁl mreꢁꢀ Drꢁwꢃ to Scꢁle of Pꢁckꢁge Size
1970afa
15
LT1970A
APPLICATIONS INFORMATION
5V
V
IN
12V
0V
5V
VC
SRC
SOURCING
VC
SNK
D1
EN
1N4001
+IN
V
CC
+
V
SINKING
ISRC
ISNK
R
1Ω
S
500mA
TSD
OUT
LT1970A
12V
+
SENSE
–
MAGNETIC
TRANSDUCER
R1
95.3K
SENSE
FILTER
V
2.5V
–
–IN
V
EE
LT1634-2.5
D2
1N4001
COMMON
1970A F06
C1
500pF
–12V
Figure 6. ꢂurreꢃt MoAulꢁtioꢃ of ꢁ Mꢁgꢃetic TrꢁꢃꢀAucer
OPTIONAL TEST PIN
ON/OFF CONTROL
APPLY LOAD
DRIVE
5V
Hi-Z
0V
5V
CODE C – CODE D
V
= 15V
≈ 15V
OUT
(
)
1024
V
CLR V
REF
CC
ꢁꢊꢄꢂtꢂ$0%&ꢂ#
I
I
=
≈ –4mA TO –500mA
≈ 4mA TO 500mA
SOURCE(MAX)
ꢀꢁꢇꢋꢂtꢂ3
S
DAC A
DAC B
DAC C
ꢁꢊꢄꢂtꢂ$0%&ꢂ"
=
SINK(MAX)
ꢀꢁꢇꢋꢂtꢂ3
S
18V
+
3-WIRE
R5
R6
3k
10μF
0.1μF
SERIAL
3k
INTERFACE
CS/LD
SCK
DI
DECODER
VC
SRC
VC
R1
SNK
3.4k
EN
+IN
V
CC
+
V
R2
10.2k
ISRC
ISNK
R
S
1ꢀ
FORCE
TSD
OUT
LT1970A
+
SENSE
–
TEST PIN
LOAD
SENSE
FILTER
R3
3.4k
–
DAC D
V
–IN
V
EE
COMMON
SENSE
10μF
0.1μF
+
–18V
R4
10.2k
LTC1664
QUAD 10-BIT DAC
1970A F07
Figure 7. Digitꢁlly ꢂoꢃtrolleA mꢃꢁlog Piꢃ Driver
1970afa
16
LT1970A
APPLICATIONS INFORMATION
Figure 6 shows the LT1970A driving an inductive load
with a controlled amount of current. This load is shown
as a generic magnetic transducer, which could be used to
create and modulate a magnetic field. Driving the current
limit control inputs directly forces a current through the
load that could range up to 2MHz in modulation. Clamp
diodesareaddedtoprotecttheLT1970Aoutputfromlarge
inductiveflybackpotentialscausedbyrapiddi/dtchanges.
LT1787 high side current sense amplifier monitoring the
current through sense resistor R . The LT1787 is biased
S
from the V supply to accommodate the common mode
EE
input range of 10V. The sense resistor is scaled down
to provide a 100mV maximum differential signal to the
current sense amplifier to preserve linearity. The LT1880
amplifier provides gain and level shifting to produce a 0V
to 5V output signal (2.5V DC 5mV/mA) with up to 1kHz
full-scale bandwidth. An A/D converter could then digi-
tize this instantaneous current reading to provide digital
feedback from the circuit.
Supply Bypꢁꢀꢀiꢃg
The LT1970A can supply large currents from the power
supplies to a load at frequencies up to 4MHz. Power
supply impedance must be kept low enough to deliver
these currents without causing supply rails to droop. Low
ESR capacitors, such as 0.1μF or 1μF ceramics, located
close to the pins are essential in all applications. When
large, high speed transient currents are present additional
capacitance may be needed near the chip. Check supply
rails with a scope and if signal related ripple is seen on the
supply rail, increase the decoupling capacitor as needed.
The LT1970A is just as easy to use as a standard opera-
tionalamplifier.Basicamplificationofaprecisionreference
voltage creates a very simple bench DC power supply as
shown in Figure 9. The built-in power stage produces an
adjustable 0V to 25V at 4mA to 100mA of output current.
Voltage and current adjustments are derived from the
LT1634-5 5V reference. The output current capability is
500mA, but this supply is restricted to 100mA for power
dissipation reasons. The worst-case output voltage for
maximum power dissipated in the LT1970A output stage
occurs if the output is shorted to ground or set to a voltage
near zero. Limiting the output current to 100mA sets the
maximum power dissipation to 3W. To allow the output to
range all the way to 0V, an LTC1046 charge pump inverter
is used to develop a –5V supply. This produces a negative
rail for the LT1970A which has to sink only the quiescent
current of the amplifier, typically 7mA.
To ensure proper start-up biasing of the LT1970A, it is
recommended that the rate of change of the supply volt-
ages at turn-on be limited to be no faster than 6V/μs.
mpplicꢁtioꢃ ꢂircuit IAeꢁꢀ
The digitally controlled analog pin driver is shown in
Figure 7. All of the control signals are provided by an
LTC®1664 quad, 10-bit DAC by way of a 3-wire serial
interface. The LT1970A is configured as a simple differ-
ence amplifier with a gain of 3. This gain is required to
produce 15V from the 0V to 5V outputs from DACs C
and D. To provide voltage headroom, the supplies for the
LT1970A are set to the maximum value of 18V. As 18V
is the absolute maximum rating of supply voltage for the
LT1970A,caremustbetakentonotallowthesupplyvoltage
to increase. DACs A and B separately control the sinking
and sourcing current limit to the load over the range of
4mA to 500mA. An optional on/off control for the pin
driver using the ENABLE input is shown. If always enabled
UsingasecondLT1970A,a0Vto 12Vdualtrackingpower
supply is shown in Figure 10. The midpoint of two 10k
resistors connected between the + and – outputs is held
at 0V by the LT1881 dual op amp servo feedback loop. To
maintain 0V, both outputs must be equal and opposite in
polarity, thus they track each other. If one output reaches
current limit and drops in voltage, the other output fol-
lows to maintain a symmetrical + and – voltage across
a common load. Again, the output current limit is less
than the full capability of the LT1970A due to thermal
reasons. Separate current limit indicators are used on
each LT1970A because one output only sources current
and the other only sinks current. Both devices can share
the same thermal shutdown indicator, as the output flags
can be OR’ed together.
the ENABLE pin should be tied to V .
CC
In some applications it may be necessary to know what
the current into the load is at any time. Figure 8 shows an
1970afa
17
LT1970A
APPLICATIONS INFORMATION
V
CC
0V TO 1V
12V
VC
SRC
VC
SNK
EN
+IN
V
CC
+
V
ISRC
ISNK
R
S
0.2ꢀ
TSD
OUT
LT1970A
+
SENSE
–
SENSE
R
LOAD
FILTER
V
–
–IN
V
EE
COMMON
R4
LT1787
255k
–
+
V
V
V
S
S
BIAS
–12V
–12V
R
R
F
G
12V
LT1880
–12V
R1
60.4k
20k
–
+
V
OUT
EE
R2
10k
2.5V
5mV/mA
1kHz FULL CURRENT
BANDWIDTH
R3
20k
–12V
0V TO 5V
A/D
1970A F08
OPTIONAL DIGITAL FEEDBACK
Figure 8. Seꢃꢀiꢃg Output ꢂurreꢃt
30V DC
R2 40k
R1
2.1k
CURRENT LIMIT
ADJUST
R5
5.49k
R3
10k
R4 10k
LOAD
FAULT
OUTPUT
VOLTAGE
ADJUST
VC
SRC
VC
SNK
EN
+IN
V
CC
+
V
ISRC
ISNK
R
S
1Ω
V
OUT
0V TO 25V
TSD
OUT
LT1970A
LT1634-5
+
SENSE
–
4mA TO 100mA
C3
10μF
+
SENSE
FILTER
V
–
–IN
V
EE
GND
COMMON
–5V
LTC1046
C2
+ 10μF
+
R
R
G
F
2.55k
10.2k
C1 10μF
1970A F09
Figure 9. Si0ple Beꢃch Power Supply
1970afa
18
LT1970A
APPLICATIONS INFORMATION
R6
18.2k
15V
+
+
R7
R8
0.1
10μF
3k
3k
+OUT
CURRENT FAULT
LIMIT
THERMAL
VC
SRC
VC
R5
13k
SNK
EN
–IN
V
CC
+
V
ISRC
ISNK
R
S1
1ꢀ
+OUT
TSD
0V TO 12V
OUT
LT1970A
+
4mA TO 150mA
SENSE
–
C2
10μF
SENSE
FILTER
–
V
+IN
COMMON
V
EE
18V
R1
R9
10k
1%
5V
C1
1μF
6.19k
REF
V
–15V
OUT
R3
23.2k
ADJUST
R2
10k
R4
10k
15V
+
–
LT1634-5
OPTIONAL SYMMETRY
ADJUST
–
+
CURRENT
R11
10k
1/2 LT1881
LIMIT
100ꢀ
ADJUST
1/2 LT1881
–15V
R12
10k
GROUND
R13
25.5k
15V
R15
3k
R10
10k
1%
TO TSD PIN
OF +OUT
–OUT
CURRENT
LIMIT
VC
SRC
VC
R14
10.7k
SNK
EN
–IN
V
CC
+
V
ISRC
ISNK
R
S2
1ꢀ
–OUT
TSD
0V TO –12V
4mA TO 150mA
OUT
+
LT1970A
C3
SENSE
–
+
10μF
SENSE
FILTER
–
V
+IN
V
EE
1970A F10
COMMON
10μF
0.1μF
+
–15V
Figure 15. Duꢁl Trꢁckiꢃg Beꢃch Power Supply
1970afa
19
LT1970A
APPLICATIONS INFORMATION
Another simple linear power amplifier circuit is shown in
Figure 11. This uses the LT1970A as a linear driver of a DC
motorwithspeedcontrol.Theabilitytosourceandsinkthe
same amount of output current provides for bidirectional
rotationofthemotor.Speedcontrolismanagedbysensing
the output of a tachometer built on to the motor. A typi-
cal feedback signal of 3V/1000rpm is compared with the
desired speed-set input voltage. Because the LT1970A is
unity-gain stable, it can be configured as an integrator to
force whatever voltage across the motor as necessary to
match the feedback speed signal with the set input signal.
For motor speed control without using a tachometer, the
circuit in Figure 12 shows an approach. Using the enable
feature of the LT1970A, the drive to the motor can be
removed periodically. With no drive applied, the spinning
motor presents a back EMF voltage proportional to its
rotational speed. The LT1782 is a tiny rail-to-rail amplifier
with a shutdown pin. The amplifier is enabled during this
interval to sample the back EMF voltage across the motor.
This voltage is then buffered by one-half of an LT1638 dual
op amp and used to provide the feedback to the LT1970A
integrator. When re-enabled the LT1970A will adjust the
drive to the motor until the speed feedback voltage, com-
pared to the speed-set input voltage, settles the output to
a fixed value. A 0V to 5V signal for the motor speed input
controls both rotational speed and direction.
Additionally, the current limit of the amplifier can be ad-
justed to control the torque and stall current of the motor.
For reliability, a feedback scheme similar to that shown in
Figure 4 can be used. Assuming that a stalled rotor will
generate a current limit condition, the stall current limit
can be significantly reduced to prevent excessive power
dissipation in the motor windings.
The other half of the LT1638 is used as a simple pulse
oscillator to control the periodic sampling of the motor
back EMF.
Figure 13 shows how easy it is to boost the output current
of the LT1970A. This 5A power stage uses complemen-
tary external N- and P-channel MOSFETs to provide the
additional current. The output stage power supply inputs,
OV TO 5V
TORQUE/STALL
CURRENT CONTROL
15V
VC
SRC
VC
+
–
SNK
V and V , are used to provide gate drive as needed. With
EN
+IN
V
CC
+
higher output currents, the sense resistor R , is reduced
V
CS
ISRC
ISNK
R
S
in value to maintain the same easy current limit control.
1ꢀ
TSD
OUT
LT1970A
+
This Class B power stage is intended for DC and low
frequency, <1kHz, applications as crossover distortion
becomes evident at higher frequencies.
SENSE
–
SENSE
FILTER
12V DC
MOTOR
–
V
–IN
V
EE
COMMON
GND
Figure 13 shows some optional resistor dividers between
theoutputconnectionsandthecurrentsenseinputs. They
are required only if the load of this power stage is removed
or at a very low current level. Large power devices with
no load on them can saturate and pull the output voltage
very close to the power supply rails. The current sense
amplifiers operate properly with input voltages at least
15V
C1
1μF
R1
–15V
TACH
1.2k
FEEDBACK
REVERSE
3V/1000rpm
R4
49.9k
R5
49.9k
1970A F11
R2
10k
FORWARD
R3
1.2k
–15V
1V away from the V and V supply rails. In boosted
CC
EE
current applications, it may be necessary to attenuate the
maximum output voltage levels by 1V before connecting
to the sense input pins. This only slightly deceases the
current limit thresholds.
Figure 11. Si0ple BiAirectioꢃꢁl Dꢂ Motor SpeeA ꢂoꢃtroller
1970afa
20
LT1970A
APPLICATIONS INFORMATION
12V
OV TO 5V
TORQUE/STALL
CURRENT CONTROL
R3
2k
FAULT/STALL
VC
SRC
FWD
R1
10k
5V
STOP
VC
SNK
V
MOTOR SPEED
CONTROL
CC
+IN
+
V
R2
20k
ISRC
0V
REV
R
S
1ꢀ
ISNK
TSD
OUT
LT1970A
+
SENSE
–
SENSE
12V DC
MOTOR
FILTER
V
–
–IN
V
EE
EN
COM
C1
4.7μF
–12V
R6
49.9k
R14
10k
R4
100k
12V
–
R5
120k
–
+
R15
12V
1/2 LT1638
–12V
100ꢀ
+
LT1782
–12V
2.5V AT 10mA
1μF
C2
0.01μF
SHDN
R7
10k
R8
20k
R13
10k
R12
10k
+
–
12V
1/2 LT1638
D1
R9
20k
R10
1N4148
82.5k
C3
0.1μF
D2
1N4148
R11
9.09k
1970A F12
–12V
Figure 12. Si0ple BiAirectioꢃꢁl Dꢂ Motor SpeeA ꢂoꢃtroller Without ꢁ Tꢁcho0eter
1970afa
21
LT1970A
PACKAGE DESCRIPTION
Pleꢁꢀe refer to http://www.liꢃeꢁr.co0/Aeꢀigꢃtoolꢀ/pꢁckꢁgiꢃg/ for the 0oꢀt receꢃt pꢁckꢁge Arꢁwiꢃgꢀ.
FE Pꢁckꢁge
25-ꢄeꢁA Plꢁꢀtic TSSOP (4.400)
(Reference LTC DWG # 05-08-1663 Rev I)
ExpoꢀeA PꢁA Vꢁriꢁtioꢃ ꢂm
6.40 – 6.60*
4.95
(.195)
(.252 – .260)
4.95
(.195)
20 1918 17 16 15 14 1312 11
6.60 t0.10
2.74
(.108)
4.50 t0.10
6.40
(.252)
BSC
2.74
(.108)
SEE NOTE 4
0.45 t0.05
1.05 t0.10
0.65 BSC
5
7
8
1
2
3
4
6
9 10
RECOMMENDED SOLDER PAD LAYOUT
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0s – 8s
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE20 (CA) TSSOP REV I 0211
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1970afa
22
LT1970A
REVISION HISTORY
REV
DmTE
DESꢂRIPTION
PmGE NUMBER
A
06/12 Corrected D1, D2 orientation in Block Diagram
Changed supply voltage in Figure 12
10
21
1970afa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT1970A
APPLICATIONS INFORMATION
V
CC
CURRENT LIMIT
CONTROL VOLTAGE
0V TO 5V
15V
R2
100Ω
10μF
0.1μF
IRF9530
V
CC
R1
1k
ENABLE
+IN
VC
SRC
VC
SNK
R4
100Ω
+
V
OUT
LT1970A
+
SENSE
–
R5
100Ω
SENSE
R
0.1Ω
5W
CS
COMMON
V
*
*
–IN
–
V
EE
*
*
R
LOAD
R
F
G
2.2k
2.2k
V
IN
IRF530
0.1μF
R3
100Ω
V
EE
–15V
10μF
*OPTIONAL, SEE TEXT
1970A F13
Figure 13. mV = –1 m0plifier with Diꢀcrete Power Deviceꢀ to Booꢀt Output ꢂurreꢃt to ±m
RELATED PARTS
PmRT NUMBER
LT1010
DESꢂRIPTION
ꢂOMMENTS
Fast 150mA Power Buffer
20MHz Bandwidth, 75V/μs Slew Rate
Shutdown Mode, Adjustable Supply Current
LT1206
250mA/60MHz Current Feedback Amplifier
1.1A/35MHz Current Feedback Amplifier
High Voltage Bidirectional Current Sense Amplifier
LT1210
Stable with C = 10,000pF
L
LT1999
–5V to 80V Input Voltage Range
1970afa
LT 0612 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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Linear
LT1970CFE#TRPBF
LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: 0°C to 70°C
Linear
LT1970IFE#PBF
LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C
Linear
LT1970IFE#TR
LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C
Linear
LT1970IFE#TRPBF
LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C
Linear
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