LT3013BEDE#PBF [Linear]
LT3013B - 250mA, 4V to 80V Low Dropout Micropower Linear Regulator with PWRGD; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C;
| 型号： | LT3013BEDE#PBF |
| 厂家： | 
Linear |
| 描述： | LT3013B - 250mA, 4V to 80V Low Dropout Micropower Linear Regulator with PWRGD; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C 光电二极管 输出元件 调节器 |
| 文件： | 总16页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3013B
250mA, 4V to 80V
Low Dropout Micropower
Linear Regulator with PWRGD
FEATURES
DESCRIPTION
The LT®3013B is a high voltage, micropower low dropout
linear regulator. The device is capable of supplying 250mA
of output current with a dropout voltage of 400mV. De-
signedforuseinbattery-poweredorhighvoltagesystems,
the low quiescent current (65μA operating) makes the
LT3013B an ideal choice. Quiescent current is also well
controlled in dropout.
n Wide Input Voltage Range: 4V to 80V
n Low Quiescent Current: 65μA
n Low Dropout Voltage: 400mV
n Output Current: 250mA
n No Protection Diodes Needed
n Adjustable Output from 1.24V to 60V
n Stable with 3.3μF Output Capacitor
n Stable with Aluminum, Tantalum or Ceramic
Capacitors
n Reverse-Battery Protection
n No Reverse Current Flow from Output to Input
n Thermal Limiting
n Thermally Enhanced 16-Lead TSSOP and 12-Pin
(4mm × 3mm) DFN Package
Other features of the LT3013B include a PWRGD flag to
indicate output regulation. The delay between regulated
output level and flag indication is programmable with
a single capacitor. The LT3013B also has the ability to
operate with very small output capacitors. The regulator
is stable with only 3.3μF on the output while most older
devices require between 10μF and 100μF for stability.
Small ceramic capacitors can be used without any need
for series resistance (ESR) as is common with other
regulators. Internal protection circuitry includes reverse-
battery protection, current limiting, thermal limiting and
reverse-current protection.
APPLICATIONS
n
Low Current High Voltage Regulators
n
Regulator for Battery-Powered Systems
n
Telecom Applications
Automotive Applications
The device is available with an adjustable output with a
1.24V reference voltage. The LT3013B regulator is avail-
ableinthethermallyenhanced16-leadTSSOPandthelow
profile (0.75mm), 12-pin (4mm × 3mm) DFN package,
both providing excellent thermal characteristics.
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Dropout Voltage
400
350
300
250
200
150
100
50
5V Supply
V
OUT
IN
OUT
LT3013B
5V
250mA
V
IN
750k
249k
1.6M
5.4V TO
80V
3.3μF
1μF
ADJ
PWRGD
GND
C
T
3013 TA01
1000pF
0
50
100
150
250
0
200
OUTPUT CURRENT (mA)
3013 TA02
3013bfb
1
LT3013B
ABSOLUTE MAXIMUM RATINGS (Note 1)
IN Pin Voltage ........................................................ 80V
OUT Pin Voltage..................................................... 60V
IN to OUT Differential Voltage ................................ 80V
ADJ Pin Voltage ....................................................... 7V
Storage Temperature Range
TSSOP Package................................ –65°C to 150°C
DFN Package..................................... –65°C to 125°C
Operating Junction Temperature Range
C Pin Voltage................................................. 7V, –0.5V
(Notes 3, 9, 10)..................................... –40°C to 125°C
Lead Temperature (Soldering, 10 sec)
T
PWRGD Pin Voltage...................................... 80V, –0.5V
Output Short-Circuit Duration ......................... Indefinite
TSSOP Only..................................................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
GND
NC
1
2
3
4
5
6
7
8
16
15
14
GND
NC
NC
OUT
1
2
3
4
5
6
12 NC
11 IN
10 IN
OUT
IN
OUT
OUT
13 IN
17
13
ADJ
12
11
10
9
NC
NC
ADJ
9
8
7
NC
NC
GND
GND
PWRGD
GND
C
T
PWRGD
C
T
GND
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
FE PACKAGE
16-LEAD PLASTIC TSSOP
T
= 125°C, θ = 40°C/W, θ = 16°C/W
JA JC
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
JMAX
T
= 125°C, θ = 40°C/W, θ = 16°C/W
JA JC
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LT3013BEDE#PBF
LT3013BEFE#PBF
LEAD BASED FINISH
LT3013BEDE
TAPE AND REEL
LT3013BEDE#TRPBF
LT3013BEFE#TRPBF
TAPE AND REEL
LT3013BEDE#TR
LT3013BEFE#TR
PART MARKING
3013B
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
12-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic TSSOP
3013BEFE
PART MARKING
3013B
PACKAGE DESCRIPTION
12-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic TSSOP
LT3013BEFE
3013BEFE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3013bfb
2
LT3013B
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
PARAMETER
CONDITIONS
= 250mA
MIN
TYP
MAX
UNITS
l
Minimum Input Voltage
ADJ Pin Voltage (Notes 2, 3)
I
4
4.5
V
LOAD
V
= 4V, I
= 1mA
LOAD
1.225
1.2
1.24
1.24
1.255
1.28
V
V
IN
l
l
l
4.5V < V < 80V, 1mA < I
< 250mA
IN
LOAD
Line Regulation
0.1
7
5
mV
ΔV = 4V to 80V, I
IN
= 1mA (Note 2)
LOAD
Load Regulation (Note 2)
12
25
mV
mV
V
IN
V
IN
= 4.5V, ΔI
= 4.5V, ΔI
= 1mA to 250mA
= 1mA to 250mA
LOAD
LOAD
Dropout Voltage
I
I
= 10mA
= 10mA
160
250
400
230
300
mV
mV
LOAD
LOAD
l
l
V
= V
OUT(NOMINAL)
IN
(Notes 4, 5)
I
I
= 50mA
= 50mA
340
420
mV
mV
LOAD
LOAD
I
I
= 250mA
= 250mA
490
620
mV
mV
LOAD
LOAD
l
l
GND Pin Current
I
I
I
= 0mA
= 100mA
= 250mA
65
3
10
120
μA
mA
mA
LOAD
LOAD
LOAD
V
= 4.5V
IN
l
(Notes 4, 6)
18
Output Voltage Noise
ADJ Pin Bias Current
PWRGD Trip Point
C
= 10μF, I
= 250mA, BW = 10Hz to 100kHz
100
30
μV
RMS
OUT
LOAD
(Note 7)
100
94
nA
l
l
% of Nominal Output Voltage, Output Rising
% of Nominal Output Voltage
85
90
%
%
PWRGD Trip Point Hysteresis
PWRGD Output Low Voltage
1.1
140
3.6
1.6
75
I
= 50μA
250
6
mV
μA
V
PWRGD
C Pin Charging Current
T
C Pin Voltage Differential
T
V – V
CT(PWRGD High) CT(PWRGD Low)
Ripple Rejection
Current Limit
V
IN
= 7V(Avg), V
= 0.5V , f
= 120Hz, I = 250mA
LOAD
65
dB
RIPPLE
P-P RIPPLE
V
IN
V
IN
= 7V, V
= 0V
400
mA
mA
OUT
l
= 4.5V, ΔV
= –0.1V (Note 2)
270
OUT
Reverse Output Current (Note 8)
V
OUT
= 1.24V, V < 1.24V (Note 2)
12
25
μA
IN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 6: GND pin current is tested with V = 4.5V and a current source
IN
load. This means the device is tested while operating close to its dropout
region. This is the worst-case GND pin current. The GND pin current will
decrease slightly at higher input voltages.
Note 2: The LT3013B is tested and specified for these conditions with the
Note 7: ADJ pin bias current flows into the ADJ pin.
ADJ pin connected to the OUT pin.
Note 8: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 9: The LT3013BE is guaranteed to meet performance specifications
from 0°C to 125°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT3013B is
tested and specified for these conditions with an external resistor divider
(249k bottom, 549k top) for an output voltage of 4V. The external resistor
divider will add a 5μA DC load on the output.
Note 10: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to (V – V
).
IN
DROPOUT
3013bfb
3
LT3013B
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
600
500
400
300
200
100
0
600
500
600
500
400
300
200
100
0
= TEST POINTS
T
≤ 125°C
J
T
= 125°C
J
I
= 250mA
L
I
= 100mA
400
300
L
T
≤ 25°C
J
T
= 25°C
J
I
= 50mA
L
200
100
0
I
I
= 10mA
= 1mA
L
L
0
50
100
150
200
250
–50
0
25
50
75 100 125
0
50
100
150
200
250
–25
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
3013 G02
3013 G03
3013 G01
Quiescent Current
ADJ Pin Voltage
Quiescent Current
120
100
80
60
40
20
0
1.260
80
70
60
50
40
30
20
10
0
V
= 6V
= ∞
T
= 25°C
= ∞
I
= 1mA
IN
L
= 0
J
L
L
R
I
R
1.255
1.250
L
1.245
1.240
1.235
1.230
1.225
1.220
–25
0
50
75 100 125
1
2
6
7
9
–50
25
0
3
4
5
8
10
–50
0
25 50 75 100 125 150
TEMPERATURE (°C)
3013 G04
–25
TEMPERATURE (°C)
INPUT VOLTAGE (V)
3013 G05
3013 G06
GND Pin Current
GND Pin Current
Quiescent Current
250
225
200
175
150
125
100
75
1.2
1.0
0.8
0.6
0.4
0.2
0
10
9
8
7
6
5
4
3
2
1
0
T
R
V
= 25°C
T
= 25°C, *FOR V
= 1.24V
R
T
= 25°C
J
L
J
OUT
J
=
∞
*FOR V
= 1.24V
OUT
= 1.24V
OUT
R
I
= 49.6Ω
= 25mA*
= 4.96Ω
L
L
L
I
= 250mA*
L
R
L
= 124Ω
= 10mA*
L
I
R
L
= 12.4Ω
= 100mA*
L
I
R
L
I
L
= 1.24k
= 1mA*
50
25
R
= 24.8Ω, I = 50mA*
L
L
0
0
10 20 30 40 50 60 70 80
1
2
6
7
9
0
1
2
3
4
5
6
7
8
9
10
0
3
4
5
8
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3013 G06b
3013 G07
3013 G08
3013bfb
4
LT3013B
TYPICAL PERFORMANCE CHARACTERISTICS
ADJ Pin Bias Current
PWRGD Trip Point
GND Pin Current vs ILOAD
50
45
40
35
30
25
20
15
10
5
10
9
8
7
6
5
4
3
2
1
0
95
94
93
92
91
90
89
88
87
86
85
V
J
= 4.5V
IN
T
= 25°C
OUTPUT RISING
OUTPUT FALLING
0
–25
0
50
75 100 125
–50
25
0
50
100
LOAD CURRENT (mA)
150
200
250
–50
–25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
3013 G13
3013 G09
3013 G25
CT Charging Current
CT Comparator Thresholds
PWRGD Output Low Voltage
200
180
160
140
120
100
80
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
I
= 50μA
PWRGD TRIPPED HIGH
PWRGD
V
(HIGH)
CT
60
40
V
(LOW)
50
20
CT
0
–25
0
50
75 100 125
–25
0
50
75 100 125
–25
0
75 100 125
–50
25
–50
25
–50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3013 G26
3013 G27
3013 G28
Current Limit
Reverse Output Current
Current Limit
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
200
180
160
140
120
100
80
V
= 0V
T
V
V
= 25°C
= 0V
OUT
J
IN
= V
OUT
ADJ
T
= 25°C
J
T
= 125°C
J
CURRENT FLOWS
INTO OUTPUT PIN
ADJ
PIN CLAMP
(SEE APPLICATIONS
INFORMATION)
60
40
V
V
= 7V
IN
OUT
20
= 0V
0
0
10 20 30 40 50 60 70 80
–50
0
25
50
75
125
–25
100
0
1
2
3
4
5
6
7
8
9
10
TEMPERATURE (°C)
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3013 G14
3013 G15
3013 G16
3013bfb
5
LT3013B
TYPICAL PERFORMANCE CHARACTERISTICS
Reverse Output Current
Input Ripple Rejection
Input Ripple Rejection
35
30
25
20
15
10
5
92
88
84
80
76
72
68
64
60
100
90
V
V
= 0V
= V
V
I
= 4.5V + 50mV
LOAD
RIPPLE
RMS
IN
OUT
IN
= 1.24V
ADJ
= 250mA
80
70
60
50
C
OUT
= 10μF
40
30
20
10
0
V
I
= 4.5V + 0.5V RIPPLE AT f = 120Hz
P-P
IN
L
= 250mA
C
= 3.3μF
OUT
V
= 1.24V
OUT
0
–25
0
50
75 100 125
–50
25
–50
0
25
50
75 100 125
–25
10
100
1k
10k
100k
1M
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (Hz)
3013 G19
3013 G17
3013 G18
Minimum Input Voltage
Load Regulation
Output Noise Spectral Density
4.0
10
1
0
–2
C
I
= 3.3μF
= 250mA
I
= 250mA
$I = 1mA TO 250mA
L
OUT
LOAD
LOAD
3.5
3.0
–4
–6
2.5
2.0
1.5
1.0
0.5
–8
–10
–12
–14
–16
–18
–20
0.1
0.01
0
–25
0
50
75 100 125
–50
25
–25
0
50
75 100 125
–50
25
10
100
1k
FREQUENCY (Hz)
10k
100k
TEMPERATURE (°C)
TEMPERATURE (°C)
3013 G22
3013 G20
3013 G21
10Hz to 100Hz Output Noise
Transition Response
0.15
0.10
0.05
0
V
OUT
–0.05
–0.10
–0.15
300
100μV/DIV
V
V
C
C
= 6V
IN
OUT
IN
= 5V
= 3.3μF CERAMIC
= 3.3μF CERAMIC
LOAD
OUT
$I
= 100mA TO 200mA
200
3013B G23
C
L
V
= 10μF
1ms/DIV
OUT
100
I
= 250mA
= V
OUT
ADJ
0
0
100
200
300
400
500
TIME (μs)
3013 G24
3013bfb
6
LT3013B
PIN FUNCTIONS (DFN/TSSOP)
NC (Pins 1, 8, 9, 12/Pins 2, 11, 12, 15): No Connect. No
Connect pins may be floated, tied to IN or tied to GND.
C (Pin 7/Pin 10): Timing Capacitor. The C pin allows
T T
the use of a small capacitor to delay the timing between
the point where the output crosses the PWRGD thresh-
old and the PWRGD flag changes to a high impedance
state. Current out of this pin during the charging phase
is 3μA. The voltage difference between the PWRGD low
and PWRGD high states is 1.6V (see the Applications
Information Section).
OUT (Pins 2, 3/Pins 3, 4): Output. The output supplies
power to the load. A minimum output capacitor of 3.3μF
is required to prevent oscillations. Larger output capaci-
tors will be required for applications with large transient
loadstolimitpeakvoltagetransients. SeetheApplications
Information section for more information on output ca-
pacitance and reverse output characteristics.
IN (Pins 10, 11/Pins 13,14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input filter capacitor. In general, the
output impedance of a battery rises with frequency, so it is
advisabletoincludeabypasscapacitorinbattery-powered
circuits. A bypass capacitor in the range of 1μF to 10μF is
sufficient. The LT3013B is designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reversed input, which can happen if
a battery is plugged in backwards, the LT3013B will act
as if there is a diode in series with its input. There will be
no reverse current flow into the LT3013B and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
ADJ (Pin 4/Pin 5): Adjust. This is the input to the error
amplifier. This pin is internally clamped to 7V. It has a
bias current of 30nA which flows into the pin (see curve
of ADJ Pin Bias Current vs Temperature in the Typical
Performance Characteristics). The ADJ pin voltage is
1.24V referenced to ground, and the output voltage range
is 1.24V to 60V.
GND (Pin 5/Pins 1, 6, 8, 9, 16): Ground.
PWRGD (Pin 6/Pin 7): Power Good. The PWRGD flag is
an open-collector flag to indicate that the output voltage
has come up to above 90% of the nominal output voltage.
There is no internal pull-up on this pin; a pull-up resistor
must be used. The PWRGD pin will change state from an
open-collector to high impedance after both the output
is above 90% of the nominal voltage and the capacitor
Exposed Pad (Pin 13/Pin 17): Ground. The exposed
backside of the package is an electrical connection for
GND. As such, to ensure optimum device operation and
thermalperformance,theExposedPadmustbeconnected
directly to Pin 5/Pin 6 on the PC board.
on the C pin has charged through a 1V differential. The
T
maximum pull-down current of the PWRGD pin in the low
state is 50μA.
3013bfb
7
LT3013B
APPLICATIONS INFORMATION
TheLT3013Bisa250mAhighvoltagelowdropoutregulator
with micropower quiescent current. The device is capable
of supplying 250mA at a dropout voltage of 400mV. Op-
erating quiescent current is only 65μA. In addition to the
low quiescent current, the LT3013B incorporates several
protection features which make it ideal for use in bat-
tery-powered systems. The device is protected against
both reverse input and reverse output voltages. In battery
backup applications where the output can be held up by
a backup battery when the input is pulled to ground, the
LT3013B acts like it has a diode in series with its output
and prevents reverse current flow.
output voltages greater than 1.24V will be proportional to
the ratio of the desired output voltage to 1.24V; (V
/
OUT
1.24V). For example, load regulation for an output current
change of 1mA to 250mA is –7mV typical at V = 1.24V.
OUT
At V
= 12V, load regulation is:
OUT
(12V/1.24V) • (–7mV) = –68mV
Output Capacitance and Transient Response
The LT3013B is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 3.3μF with an ESR of 3Ω or less is
recommended to prevent oscillations. The LT3013B is a
micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3013B, will increase the
effective output capacitor value.
Adjustable Operation
The LT3013B has an output voltage range of 1.24V to 60V.
The output voltage is set by the ratio of two external resis-
tors as shown in Figure 1. The device servos the output to
maintain the voltage at the adjust pin at 1.24V referenced
to ground. The current in R1 is then equal to 1.24V/R1 and
the current in R2 is the current in R1 plus the ADJ pin bias
current. The ADJ pin bias current, 30nA at 25°C, flows
through R2 into the ADJ pin. The output voltage can be
calculated using the formula in Figure 1. The value of R1
should be less than 250k to minimize errors in the output
voltage caused by the ADJ pin bias current.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specified with EIA temperature char-
acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but they tend to have strong voltage
The adjustable device is tested and specified with the ADJ
pintiedtotheOUTpinanda5μADCload(unlessotherwise
specified)foranoutputvoltageof1.24V.Specificationsfor
V
IN
LT3013B
ADJ
OUT
OUT
+
R2
V
IN
GND
R1
3013 F01
R2
R1
V
V
= 1.24V 1 +
+ (I )(R2)
ADJ
OUT
ADJ
ꢀ
ꢁ
= 1.24V
I
= 30nA AT 25°C
OUTPUT RANGE = 1.24V TO 60V
ADJ
Figure 1. Adjustable Operation
3013bfb
8
LT3013B
APPLICATIONS INFORMATION
and temperature coefficients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is avail-
able in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitancechangeovertemperature.Capacitancechange
due to DC bias with X5R and X7R capacitors is better than
Y5VandZ5Ucapacitors,butcanstillbesignificantenough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
casesizeincreases, butexpectedcapacitanceatoperating
voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltageacrossitsterminalsduetomechanicalstress,simi-
lartothewayapiezoelectricaccelerometerormicrophone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
0
X5R
–20
–40
PWRGD Flag and Timing Capacitor Delay
–60
The PWRGD flag is used to indicate that the ADJ pin volt-
age is within 10% of the regulated voltage. The PWRGD
pin is an open-collector output, capable of sinking 50μA
of current when the ADJ pin voltage is low. There is no
internal pull-up on the PWRGD pin; an external pull-up
resistor must be used. When the ADJ pin rises to within
10% of its final reference value, a delay timer is started.
At the end of this delay, programmed by the value of the
Y5V
–80
–100
0
8
12 14
2
4
6
10
16
DC BIAS VOLTAGE (V)
3013 F02
Figure 2. Ceramic Capacitor DC Bias Characteristics
40
20
capacitor on the C pin, the PWRGD pin switches to a high
T
impedance and is pulled up to a logic level by an external
pull-up resistor.
0
X5R
To calculate the capacitor value on the C pin, use the
T
–20
following formula:
–40
Y5V
ICT •tDELAY
VCT(HIGH) – VCT(LOW)
CTIME
=
–60
–80
BOTH CAPACITORS ARE 16V,
Figure 4 shows a block diagram of the PWRGD circuit. At
start-up,thetimingcapacitorisdischargedandthePWRGD
pin will be held low. As the output voltage increases and
the ADJ pin crosses the 90% threshold, the JK flip-flop
is reset, and the 3μA current source begins to charge the
1210 CASE SIZE, 10μF
–100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
3013 F03
Figure 3. Ceramic Capacitor Temperature Characteristics
3013bfb
9
LT3013B
APPLICATIONS INFORMATION
I
3μA
CT
CT
PWRGD
+
ADJ
V
– V
BE
CT(HIGH)
J
Q
(~1.1V)
K
V
• 90%
–
REF
–
+
V
CT(LOW)
~0.1V
3013 F04
Figure 4. PWRGD Circuit Block Diagram
timing capacitor. Once the voltage on the C pin reaches
not apply for all possible combinations of input voltage
and output current. Operating the LT3013B beyond the
maximum junction temperature rating may impair the
life of the device.
T
the V
threshold (approximately 1.7V at 25°C), the
CT(HIGH)
capacitor voltage is clamped and the PWRGD pin is set to
a high impedance state.
Duringnormaloperation,aninternalglitchfilterwillignore
shorttransients(<15μs).Longertransientsbelowthe90%
threshold will reset the JK flip-flop. This flip-flop ensures
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components:
that the capacitor on the C pin is quickly discharged all
T
the way to the V
threshold before restarting the
CT(LOW)
time delay. This provides a consistent time delay after the
ADJ pin is within 10% of the regulated voltage before the
PWRGD pin switches to high impedance.
1. Output current multiplied by the input/output voltage
differential: I
• (V – V ) and,
OUT
IN OUT
2. GND pin current multiplied by the input voltage:
• V .
Current Limit and Safe Operating Area Protection
I
GND
IN
Like many IC power regulators, the LT3013B has safe op-
eratingareaprotection. Thesafeoperatingareaprotection
decreases the current limit as the input voltage increases
and keeps the power transistor in a safe operating region.
Theprotectionisdesignedtoprovidesomeoutputcurrent
at all values of input voltage up to the device breakdown
(see curve of Current Limit vs Input Voltage in the Typical
Performance Characteristics).
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
TheLT3013Bseriesregulatorshaveinternalthermallimiting
designedtoprotectthedeviceduringoverloadconditions.
For continuous normal conditions the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
The LT3013B is limited for operating conditions by maxi-
mum junction temperature. While operating at maximum
input voltage, the output current range must be limited;
when operating at maximum output current, the input
voltage range must be limited. Device specifications will
3013bfb
10
LT3013B
APPLICATIONS INFORMATION
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input volt-
age range of 8V to 12V, an output current range of 0mA
to 250mA, and a maximum ambient temperature of 30°C,
what will the maximum junction temperature be?
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
The power dissipated by the device will be equal to:
I
• (V
– V ) + (I
• V
)
OUT(MAX)
IN(MAX)
OUT
GND
IN(MAX)
where:
Table 1. Measured Thermal Resistance (TSSOP)
I
= 250mA
= 12V
OUT(MAX)
COPPER AREA
THERMAL RESISTANCE
V
I
IN(MAX)
TOPSIDE
BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
at (I
= 250mA, V = 12V) = 8mA
IN
2500 sq mm 2500 sq mm 2500 sq mm
1000 sq mm 2500 sq mm 2500 sq mm
225 sq mm 2500 sq mm 2500 sq mm
100 sq mm 2500 sq mm 2500 sq mm
40°C/W
45°C/W
50°C/W
62°C/W
GND
OUT
So:
P = 250mA • (12V – 5V) + (8mA • 12V) = 1.85W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
Table 2. Measured Thermal Resistance (DFN)
COPPER AREA
THERMAL RESISTANCE
TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm
1000 sq mm 2500 sq mm 2500 sq mm
225 sq mm 2500 sq mm 2500 sq mm
100 sq mm 2500 sq mm 2500 sq mm
40°C/W
45°C/W
50°C/W
62°C/W
1.85W • 50°C/W = 92.3°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
The thermal resistance junction-to-case (θ ), measured
JC
T
= 30°C + 92.3°C = 122.3°C
JMAX
at the Exposed Pad on the back of the die, is 16°C/W.
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 200mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical
due to thermal limitations. Transient operation at high
input/output differentials is possible. The approximate
thermal time constant for a 2500sq mm 3/32" FR-4 board
with maximum topside and backside area for one ounce
copper is 3 seconds. This time constant will increase as
more thermal mass is added (i.e., vias, larger board, and
other components).
P1(48V in, 5mA load) = 5mA • (48V – 5V)
+ (200μA • 48V) = 0.23W
P2(48V in, 50mA load) = 200mA • (48V – 5V)
+ (8mA • 48V) = 8.98W
Foranapplicationwithtransienthighpowerpeaks,average
power dissipation can be used for junction temperature
calculationsaslongasthepulseperiodissignificantlyless
than the thermal time constant of the device and board.
P3(72V in, 5mA load) = 5mA • (72V – 5V)
+ (200μA • 72V) = 0.35W
P4(72V in, 50mA load) = 200mA • (72V – 5V)
+ (8mA • 72V) = 13.98W
3013bfb
11
LT3013B
APPLICATIONS INFORMATION
Operation at the different power levels is as follows:
If the input is left open circuit or grounded, the ADJ pin
will act like an open circuit when pulled below ground, and
like a large resistor (typically 100k) in series with a diode
when pulled above ground. If the input is powered by a
voltage source, pulling the ADJ pin below the reference
voltage will cause the device to try and force the current
limitcurrentoutoftheoutput. Thiswillcausetheoutputto
gotoaunregulatedhighvoltage.PullingtheADJpinabove
the reference voltage will turn off all output current.
76% operation at P1, 19% for P2, 4% for P3,
and 1% for P4.
PEFF = 76%(0.23W) + 19%(8.98W) + 4%(0.35W)
+ 1%(13.98W) = 2.03W
Withathermalresistanceintherangeof40°C/Wto62°C/W,
this translates to a junction temperature rise above ambi-
ent of 81°C to 125°C.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltageiftheoutputispulledhigh,theADJpininputcurrent
must be limited to less than 5mA. For example, a resistor
dividerisusedtoprovidearegulated1.5Voutputfromthe
1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
Protection Features
The LT3013B incorporates several protection features
which make it ideal for use in battery-powered circuits. In
addition to the normal protection features associated with
monolithicregulators,suchascurrentlimitingandthermal
limiting, thedeviceisprotectedagainstreverse-inputvolt-
ages, and reverse voltages from output to input.
Current limit protection and thermal overload protection
areintendedtoprotectthedeviceagainstcurrentoverload
conditionsattheoutputofthedevice.Fornormaloperation,
the junction temperature should not exceed 125°C.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
LikemanyICpowerregulators,theLT3013Bhassafeoper-
ating area protection. The safe area protection decreases
the current limit as input voltage increases and keeps
the power transistor inside a safe operating region for
all values of input voltage. The protection is designed to
provide some output current at all values of input voltage
up to the device breakdown. The SOA protection circuitry
for the LT3013B uses a current generated when the input
voltage exceeds 25V to decrease current limit. This cur-
rent shows up as additional quiescent current for input
voltages above 25V. This increase in quiescent current
occurs both in normal operation and in shutdown (see
curve of Quiescent Current in the Typical Performance
Characteristics).
200
T
V
V
= 25°C
= 0V
J
IN
180
160
140
120
100
80
= V
OUT
ADJ
CURRENT FLOWS
INTO OUTPUT PIN
ADJ
PIN CLAMP
(SEE ABOVE)
60
The input of the device will withstand reverse voltages of
80V. No negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
40
20
0
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
3013 F05
The ADJ pin of the device can be pulled above or below
ground by as much as 7V without damaging the device.
Figure 5. Reverse Output Current
3013bfb
12
LT3013B
APPLICATIONS INFORMATION
regulator output, this current will be reduced depending
on the size of the resistor divider.
currentwilltypicallydroptolessthan2μA.Thiscanhappen
if the input of the LT3013B is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit.
When the IN pin of the LT3013B is forced below the
OUT pin or the OUT pin is pulled above the IN pin, input
TYPICAL APPLICATIONS
LT3013B Automotive Application
IN
OUT
NO PROTECTION
DIODE NEEDED!
+
V
IN
LT3013B
GND
750k
249k
3.3μF
12V
1μF
LOAD: CLOCK,
SECURITY SYSTEM
ETC
(LATER 42V)
ADJ
LT3013B Telecom Application
V
IN
IN
OUT
48V
(72V TRANSIENT)
+
–
LT3013B
750k
249k
BACKUP
BATTERY
NO PROTECTION
DIODE NEEDED!
3.3μF
1μF
LOAD:
SYSTEM MONITOR
ETC
ADJ
GND
3013 TA05
Constant Brightness for Indicator LED over Wide Input Voltage Range
RETURN
IN
LT3013B
ADJ
OUT
1μF
3.3μF
GND
R
SET
–48V
3013 TA06
I
= 1.24V/R
SET
LED
–48V CAN VARY FROM –4V TO –80V
3013bfb
13
LT3013B
PACKAGE DESCRIPTION
DE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 p0.05
3.30 p0.05
3.60 p0.05
2.20 p0.05
1.70 p 0.05
PACKAGE OUTLINE
0.25 p 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 p 0.10
4.00 p0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 p0.10
3.00 p0.10
(2 SIDES)
1.70 p 0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45o
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3013bfb
14
LT3013B
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 p0.10
2.94
(.116)
4.50 p0.10
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
0.45 p0.05
1.05 p0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0o – 8o
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BB) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
3013bfb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT3013B
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 4.5V to 36V, V
LT1020
125mA, Micropower Regulator and Comparator
= 2.5V, V = 0.4V, I = 40μA, I = 40μA, Comparator and
OUT DO Q SD
IN
Reference, Class B Outputs, S16, PDIP14 Packages
LT1120/LT1120A
125mA, Micropower Regulator and Comparator
V : 4.5V to 36V, V = 2.5V, V = 0.4V, I = 40μA, I = 10μA,
IN
OUT
DO
Q
SD
Comparator and Reference, Logic Shutdown, Ref Sources and Sinks 2/4mA,
S8, N8 Packages
LT1121/LT1121HV 150mA, Micropower, LDO
V : 4.2V to 30/36V, V
= 3.75V, V = 0.42V, I = 30μA, I = 16μA,
IN
OUT DO Q SD
Reverse Battery Protection, SOT-223, S8, Z Packages
LT1129
700mA, Micropower, LDO
V : 4.2V to 30V, V = 3.75V, V = 0.4V, I = 50μA, I = 16μA,
IN
OUT
DO
Q
SD
DD, S0T-223, S8,TO220-5, TSSOP20 Packages
LT1616
25V, 500mA (I ), 1.4MHz, High Efficiency
V : 3.6V to 25V, V
= 1.25V, I = 1.9mA, I = <1μA, ThinSOT Package
Q SD
OUT
IN
OUT
Step-Down DC/DC Converter
LT1676
60V, 440mA (I ), 100kHz, High Efficiency
V : 7.4V to 60V, V
= 1.24V, I = 3.2mA, I = 2.5μA, S8 Package
Q SD
OUT
IN
OUT
Step-Down DC/DC Converter
LT1761
100mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.3V, I = 20μA, I = <1μA,
IN
OUT DO Q SD
Low Noise < 20μV
, Stable with 1μF Ceramic Capacitors, ThinSOT Package
RMS P-P
LT1762
150mA, Low Noise Micropower, LDO
500mA, Low Noise Micropower, LDO
3A, Low Noise, Fast Transient Response, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.3V, I = 25μA, I = <1μA,
IN
OUT
DO
Q
SD
Low Noise < 20μV
, MS8 Package
RMS P-P
LT1763
V : 1.8V to 20V, V
= 1.22V, V = 0.3V, I = 30μA, I = <1μA,
IN
OUT
DO
Q
SD
Low Noise < 20μV
, S8 Package
RMS P-P
LT1764/LT1764A
V : 2.7V to 20V, V
RMS P-P,
DD, TO220-5 Packages
= 1.21V, V = 0.34V, I = 1mA, I = <1μA,
IN
OUT DO Q SD
Low Noise < 40μV
“A” Version Stable with Ceramic Capacitors,
LT1766
LT1776
60V, 1.2A (I ), 200kHz, High Efficiency
V : 5.5V to 60V, V
= 1.20V, I = 2.5mA, I = 25μA, TSSOP16/E Package
Q SD
OUT
IN
OUT
Step-Down DC/DC Converter
40V, 550mA (I ), 200kHz, High Efficiency
V : 7.4V to 40V, V
= 1.24V, I = 3.2mA, I = 30μA, N8, S8 Packages
Q SD
OUT
IN
OUT
Step-Down DC/DC Converter
LT1934/LT1934-1 300mA/60mA, (IOUT), Constant Off-Time, High
Efficiency Step-Down DC/DC Converter
90% Efficiency, V : 3.2V to 34V, V
= 1.25V, I = 14μA, I = <1μA,
OUT Q SD
IN
ThinSOT Package
LT1956
60V, 1.2A (I ), 500kHz, High Efficiency
V : 5.5V to 60V, V
= 1.20V, I = 2.5mA, I = 25μA, TSSOP16/E Package
OUT Q SD
OUT
IN
Step-Down DC/DC Converter
LT1962
300mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.27V, I = 30μA, I = <1μA,
IN
OUT
DO
Q
SD
Low Noise < 20μV
, MS8 Package
RMS P-P
LT1963/LT1963A
1.5A, Low Noise, Fast Transient Response, LDO
V : 2.1V to 20V, V
= 1.21V, V = 0.34V, I = 1mA, I = <1μA,
IN
OUT DO Q SD
Low Noise < 40μV
, “A” Version Stable with Ceramic Capacitors,
RMS P-P
DD, TO220-5, S0T-223, S8 Packages
LT1964
LT3010
200mA, Low Noise Micropower, Negative LDO
50mA, High Voltage, Micropower LDO
V : –1.9V to –20V, V
= –1.21V, V = 0.34V, I = 30μA, I = 3μA,
IN
OUT DO Q SD
Low Noise < 30μV
, Stable with Ceramic Capacitors, ThinSOT Package
RMS P-P
V : 3V to 80V, V
= 1.2V, V = 0.3V, I = 30μA, I < 1μA,
DO Q SD
, Stable with 1μF Output Capacitor, Exposed
IN
OUT(MIN)
RMS
Low Noise: <100μV
MS8E Package
3013bfb
LT 0109 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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Linear
LT3013HFE#TRPBF
LT3013 - 250mA, 4V to 80V Low Dropout Micropower Linear Regulator with PWRGD; Package: TSSOP; Pins: 16; Temperature Range: -40°C to 125°C
Linear
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