LT3471EDD_技术文档

LT3471

Dual 1.3A, 1.2MHz

Boost/Inverter in

3mm × 3mm DFN

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FEATURES

DESCRIPTIO

■

1.2MHz Switching Frequency

The LT^®3471 dual switching regulator combines two 42V,

1.3A switches with error amplifiers that can sense to

ground providing boost and inverting capability. The low

■

Low V_CESATSwitches: 330mV at 1.3A

■

High Output Voltage: Up to 40V

■

Wide Input Range: 2.4V to 16V

V_CESATbipolar switches enable the device to deliver high

■

Inverting Capability

current outputs in a small footprint. The LT3471 switches

at 1.2MHz, allowing the use of tiny, low cost and low

profile inductors and capacitors. High inrush current at

start-up is eliminated using the programmable soft-start

function, where an external RC sets the current ramp rate.

A constant frequency current mode PWM architecture

resultsinlow,predictableoutputnoisethatiseasytofilter.

■

5V at 630mA from 3.3V Input

■

12V at 320mA from 5V Input

■

–12V at 200mA from 5V Input

■

Uses Tiny Surface Mount Components

■

Low Shutdown Current: <1µA

■

Low Profile (0.75mm) 10-Lead 3mm × 3mm

DFN Package

The LT3471 switches are rated at 42V, making the device

idealforboostconvertersupto±40VaswellasSEPICand

flyback designs. Each channel can generate 5V at up to

630mA from a 3.3V supply, or 5V at 510mA from four

alkaline cells in a SEPIC design. The device can be config-

ured as two boosts, a boost and inverter or two inverters.

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APPLICATIO S

■

Organic LED Power Supply

■

Digital Cameras

■

White LED Power Supply

Cellular Phones

Medical Diagnostic Equipment

Local ±5V or ±12V Supply

TFT-LCD Bias Supply

xDSL Power Supply

■

The LT3471 is available in a low profile (0.75mm) 10-lead

3mm × 3mm DFN package.

■

, LTC and LT are registered trademarks of Linear Technology Corporation.

■

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TYPICAL APPLICATIO

OLED Driver

2.2µH

V

OLED Driver Efficiency

OUT1

V

IN

7V

3.3V

95

350mA

90.9k

15k

4.7µF

CONTROL 1

90

SW1

4.7k

V

= 7V

OUT1

SHDN/SS1

FB1N

FB1P

85

80

75

70

65

60

55

50

0.33µF

V

= –7V

REF

OUT1

0.1µF

V

LT3471

IN

10µF

4.7k

15k

FB2N

FB2P

CONTROL 2

SHDN/SS2

GND

SW2

0.33µF

75pF

105k

1µF

10µH

15µH

V

–7V

250mA

OUT2

V

IN

200

0

100

300

400

10µF

I

(mA)

OUT

3471 TA01b

3471 TA01

3471f

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LT3471

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ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

TOP VIEW

ORDER PART

NUMBER

V_INVoltage .............................................................. 16V

SW1, SW2 Voltage ....................................–0.4V to 42V

FB1N, FB1P, FB2N, FB2P Voltage ....... 12V or V_IN– 1.5V

SHDN/SS1, SHDN/SS2 Voltage .............................. 16V

V_REFVoltage ........................................................... 1.5V

Maximum Junction Temperature ......................... 125°C

Operating Temperature Range (Note 2) .. –40°C to 85°C

Storage Temperature Range ................. –65°C to 125°C

FB1N

FB1P

1

2

3

4

5

10 SW1

9

8

7

6

SHDN/SS1

LT3471EDD

V

REF

11

V

IN

FB2P

FB2N

SHDN/SS2

SW2

DD PART MARKING

LBHM

DD PACKAGE

10-LEAD (3mm × 3mm) PLASTIC DFN

T_JMAX= 125°C, θ_JA= 43°C/ W, θ_JC= 3°C/ W

EXPOSED PAD (PIN 11) IS GND

MUST BE SOLDERED TO PCB

Consult LTC Marketing for parts specified with wider operating temperature ranges.

The ● denotes specifications which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are T_A= 25°C. V_IN= V_SHDN= 3V unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

2.1

MAX

UNITS

Minimum Operating Voltage

Reference Voltage

2.4

V

0.991

0.987

1.000

1.009

1.013

V

●

Reference Voltage Current Limit

Reference Voltage Load Regulation

Reference Voltage Line Regulation

Error Amplifier Offset

(Note 3)

1

1.4

0.1

0.03

±2

mA

%/100µA

%/V

0mA ≤ I ≤ 100µA (Note 3)

0.2

0.08

±3

REF

2.6V ≤ V ≤ 16V

IN

Transition from Not Switching to Switching, V = V

= 1V

FBN

mV

FBP

FB Pin Bias Current

(Note 3)

●

60

100

4

nA

Quiescent Current

V

= 1.8V, Not Switching

2.5

0.01

1.2

94

mA

SHDN

Quiescent Current in Shutdown

Switching Frequency

= 0.3V, V = 3V

1

µA

IN

1

1.4

MHz

Maximum Duty Cycle

90

86

%

●

Minimum Duty Cycle

Switch Current Limit

15

%

At Minimum Duty Cycle

At Maximum Duty Cycle (Note 4)

1.5

0.9

2.05

1.45

2.6

2.0

A

Switch V

I

= 1.3A (Note 5)

= 5V

330

440

1

mV

µA

V

CESAT

SW

Switch Leakage Current

SHDN/SS Input Voltage High

SHDN Input Voltage Low

SHDN Pin Bias Current

V

0.01

SW

1.8

Quiescent Current ≤ 1µA

0.3

V

= 3V, V = 4V

22

0

36

0.1

µA

SHDN

IN

= 0V

Note 1: Absolute Maximum Ratings are those values beyond which the life of

Note 3: Current flows out of the pin.

a device may be impaired.

Note 4: See Typical Performance Characteristics for guaranteed current

Note 2: The LT3471E is guaranteed to meet performance specifications from

0°C to 70°C. Specifications over the –40°C to 85°C operating temperature

range are assured by design, characterization and correlation with statistical

process controls.

limit vs duty cycle.

Note 5: V

is 100% tested at wafer level.

CESAT

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LT3471

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TYPICAL PERFOR A CE CHARACTERISTICS

Quiescent Current

vs Temperature

V_REFVoltage vs V_REFCurrent

V_REFVoltage vs Temperature

2.6

2.4

2.2

2.0

1.8

1.6

1.010

1.005

1.000

0.995

0.990

V_REF

VOLTAGE

100mV/DIV

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

V_REFCURRENT 200µA/DIV

3741 G03

3471 G01

3471 G02

SHDN/SS Current

vs SHDN/SS Voltage

Switch Saturation Voltage

vs Switch Current

Current Limit vs Duty Cycle

2.2

800

700

600

500

400

300

200

100

0

T

= 25°C

A

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

V_IN= 3.3V

TYPICAL

90°C

GUARANTEED

SHDN/SS

CURRENT

20µV/DIV

25°C

V

_IN> V_SHDN/SS

SHDN/SS VOLTAGE 1V/DIV

3741 G04

0

20

40

60

80

100

0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

DUTY CYCLE (%)

SW CURRENT (A)

3471 G05

3471 G06

Oscillator Frequency

vs Temperature

Peak Switch Current

vs SHDN/SS Voltage

Start-Up Waveform

(Figure 2 Circuit)

1.50

1.45

1.40

1.35

1.30

1.25

1.20

1.15

1.10

1.05

1.00

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T

= 25°C

A

I_SUPPLY

1A/DIV

V_OUT1

2V/DIV

V_OUT2

5V/DIV

CONTROL 1 AND 2

5V/DIV

0.5ms/DIV

3471 G09

–50

0

25

50

75 100 125

–25

0

0.2 0.4 0.6 0.8

1

1.2 1.4 1.6 1.8 2.0

TEMPERATURE (°C)

V

(V)

SHDN/SS

3471 G07

3471 G08

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LT3471

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FB1N (Pin 1): Negative Feedback Pin for Switcher 1. and minimize the metal trace area connected to this pin to

Connect resistive divider tap here. Minimize trace area at minimize EMI.

FB1N. Set V_OUT= V_FB1P(1 + R1/R2), or connect to ground

SHDN/SS2 (Pin 7): Shutdown and Soft-Start Pin. Tie to

for inverting topologies.

1.8V or more to enable device. Ground to shut down. Soft-

FB1P (Pin 2): Positive Feedback Pin for Switcher 1. Con- start function is provided when the voltage at this pin is

nect either to V_REGor a divided down version of V_REG, or ramped slowly to 1.8V with an external RC circuit.

connect to a resistive divider tap for inverting topologies.

V_IN(Pin 8): Input Supply. Must be locally bypassed.

V

_REF(Pin 3): 1.00V Reference Pin. Can supply up to 1mA

SHDN/SS1(Pin9):SameasSHDN/SS2butforSwitcher 1.

Note: taking either SHDN/SS pin high will enable the part.

Each switcher is individually enabled with its respective

SHDN/SS pin.

of current. Do not pull this pin high. Must be locally

bypassed with no less than 0.01µF and no more than 1µF.

A 0.1µF ceramic capacitor is recommended. Use this pin

as the positive feedback reference or connect a resistor

divider here for a smaller reference voltage.

SW1 (Pin 10): Same as SW2 but for Switcher 1.

Exposed Pad (Pin 11): Ground. Connect directly to local

ground plane. This ground plane also serves as a heat sink

for optimal thermal performance.

FB2P (Pin 4): Same as FB1P but for Switcher 2.

FB2N (Pin 5): Same as FB1N but for Switcher 2.

SW2 (Pin 6): Switch Pin for Switcher 2 (Collector of

internal NPN power switch). Connect inductor/diode here

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BLOCK DIAGRA

10 SW1

FB1P

2

+

–

+

DRIVER

A1

FB1N

R

Q1

1

A2

R

Q

C

S

C

+

–

V

REF

IN

1.00V

0.01Ω

8

9

3

Σ

REFERENCE

RAMP

GENERATOR

SHDN/SS1

LEVEL

SHIFTER

GND

11

6

SW2

FB2P

FB2N

4

5

+

–

+

DRIVER

A3

R

C

Q2

A4

R

Q

–

S

C

+

–

SHDN/SS2

LEVEL

SHIFTER

7

0.01Ω

Σ

RAMP

GENERATOR

GND

1.2MHz

OSCILLATOR

3471 F01

Figure 1. Block Diagram

3471f

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LT3471

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OPERATIO

The LT3471 uses a constant frequency, current mode

control scheme to provide excellent line and load regula-

tion. Refer to the Block Diagram. At the start of each

oscillator cycle, the SR latch is set, which turns on the

power switch, Q1 (Q2). A voltage proportional to the

switch current is added to a stabilizing ramp and the

resulting sum is fed into the positive terminal of the PWM

comparator A2 (A4). When this voltage exceeds the level

at the negative input of A2 (A4), the SR latch is reset,

turning off the power switch Q1 (Q2). The level at the

negative input of A2 (A4) is set by the error amplifier A1

(A3) and is simply an amplified version of the difference

between the negative feedback voltage and the positive

feedback voltage, usually tied to the reference voltage

taking either SHDN/SS pin above 1.8V. Disabling the part

is done by grounding both SHDN/SS pins. The soft-start

feature of the LT3471 allows for clean start-up conditions

by limiting the amount of voltage rise at the output of

comparator A1 and A2, which in turn limits the peak

switching current. The soft-start feature for each switcher

isenabledbyslowlyrampingthatswitcher’sSHDN/SSpin,

using an RC network, for example. Typical resistor and

capacitor values are 0.33µF and 4.7kΩ, allowing for a

start-uptimeontheorderofmilliseconds.TheLT3471has

a current limit circuit not shown in the Block Diagram. The

switch current is constantly monitored and not allowed to

exceed the maximum switch current (typically 1.6A). If the

switch current reaches this value, the SR latch is reset

regardless of the state of the comparator A2 (A4). Also not

shown in the Block Diagram is the thermal shutdown

circuit. If the temperature of the part exceeds approxi-

mately160°C,bothlatchesareresetregardlessofthestate

of comparators A2 and A4. The current limit and thermal

shutdown circuits protect the power switch as well as the

external components connected to the LT3471.

V

_REG. In this manner, the error amplifier sets the correct

peak current level to keep the output in regulation. If the

error amplifier’s output increases, more current is deliv-

ered to the output. Similarly, if the error decreases, less

current is delivered. Each switcher functions indepen-

dently but they share the same oscillator and thus the

switchersarealwaysinphase. Enablingthepartisdoneby

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APPLICATIONS INFORMATION

Duty Cycle

where V_FBNis connected between R1 and R2 (see the

Typical Applications section for examples).

The typical maximum duty cycle of the LT3471 is 94%.

The duty cycle for a given application is given by:

Select values of R1 and R2 according to the following

equation:

|V_OUT| + |V_D| – |V |

IN

DC =

⎛ V_OUT

⎝ V_REF– 1⎠

⎞

|V_OUT| + |V_D| – |V_CESAT

|

R1= R2

⎜

⎟

Where V_Dis the diode forward voltage drop and V_CESATis

in the worst case 330mV (at 1.3A)

A good value for R2 is 15k which sets the current in the

resistor divider chain to 1.00V/15k = 67µA.

The LT3471 can be used at higher duty cycles, but it must

beoperatedinthediscontinuousconductionmodesothat

the actual duty cycle is reduced.

V_FBPis usually just tied to V_REF= 1.00V, but V_FBPcan also

be tied to a divided down version of V_REFor some other

voltage as long as the absolute maximum ratings for the

feedback pins are not exceeded (see Absolute Maximum

Ratings).

Setting Output Voltage

Setting the output voltage depends on the topology used.

For normal noninverting boost regulator topologies:

For inverting topologies, V_FBNis tied to ground and V_FBP

is connected between R1 and R2. R2 is between V_FBPand

R1

R2

⎛

⎜

⎝

⎞

⎟

⎠

V_OUT= V

1+

FBP

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LT3471

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APPLICATIONS INFORMATION

V_REFand R1 is between V_FBPand V_OUT(see the Applica-

tions section for examples). In this case:

pin has reached about 1.1V. The soft-start function will go

away once the voltage at the SHDN/SS pin exceeds 1.8V.

SeethePeakSwitchCurrentvsSHDN/SSVoltagegraphin

the Typical Performance Characteristics section. The rate

of voltage rise at the SHDN/SS pin can easily be controlled

with a simple RC network connected between the control

signal and the SHDN/SS pin. Typical values for the RC

network are 4.7kΩ and 0.33µF, giving start-up times on

the order of milliseconds. This RC time constant can be

adjusted to give different start-up times. If different values

of resistance are to be used, keep in mind the SHDN/SS

Current vs SHDN/SS voltage graph along with the Peak

Switch Current vs SHDN/SS Voltage graph, both found in

the Typical Performance Characteristics section. The im-

pedancelookingintotheSHDN/SSpindependsonwhether

the SHDN/SS is above or below V_IN. Normally SHDN/SS

willnotbedrivenaboveV_IN, andthustheimpedancelooks

like 100kΩ in series with a diode. If the voltage of the

SHDN/SS pin is above V_IN, the impedance looks more like

50kΩ in series with a diode. This 100kΩ or 50kΩ imped-

ance can have a slight effect on the start-up time if you

choose the R in the RC soft-start network too large.

Another consideration is selecting the soft-start time so

that the soft-start feature is dominated by the RC network

and not the capacitor on V_REF. (See V_REFvoltage reference

section of the Applications Information for details.)

R1

R2

⎛

⎜

⎝

⎞

⎟

⎠

V_OUT= V_REF

Select values of R1 and R2 according to the following

equation:

⎛ V_OUT

⎝ V_REF

⎞

R1= R2

⎜

⎟

⎠

A good value for R2 is 15k, which sets the current in the

resistor divider chain to 1.00V/15k = 67µA.

Switching Frequency and Inductor Selection

TheLT3471switchesat1.2MHz,allowingforsmallvalued

inductors to be used. 4.7µH or 10µH will usually suffice.

Choose an inductor that can handle at least 1.4A without

saturating, and ensure that the inductor has a low DCR

(copper-wire resistance) to minimize I²R power losses.

Note that in some applications, the current handling

requirements of the inductor can be lower, such as in the

SEPIC topology where each inductor only carries one half

ofthetotalswitchcurrent.Forbetterefficiency,usesimilar

valued inductors with a larger volume. Many different

sizes and shapes are available from various manufactur-

ers. Chooseacorematerialthathaslowlossesat1.2MHz,

such as ferrite core.

CAPACITOR SELECTION

Low ESR (equivalent series resistance) capacitors should

beusedattheoutputtominimizetheoutputripplevoltage.

Multi-layer ceramic capacitors are an excellent choice, as

they have extremely low ESR and are available in very

small packages. X5R dielectrics are preferred, followed by

X7R, as these materials retain the capacitance over wide

voltage and temperature ranges. A 4.7µF to 15µF output

capacitor is sufficient for most applications, but systems

withverylowoutputcurrentsmayneedonlya1µFor2.2µF

output capacitor. Solid tantalum or OS-CON capacitors

can be used, but they will occupy more board area than a

ceramicandwillhaveahigherESR.Alwaysuseacapacitor

with a sufficient voltage rating.

Table 1. Inductor Manufacturers

Sumida

TDK

(847) 956-0666

(847) 803-6100

(714) 852-2001

www.sumida.com

www.tdk.com

Murata

www.murata.com

Soft-Start and Shutdown Features

To shut down the part, ground both SHDN/SS pins. To

shut down one switcher but not the other one, ground that

switcher’s SHDN/SS pin. The soft-start feature provides a

waytolimittheinrushcurrentdrawnfromthesupplyupon

start-up. To use the soft-start feature for either switcher,

slowly ramp up that switcher’s SHDN/SS pin. The rate of

voltage rise at the output of the switcher’s comparator (A1

or A3 for switcher 1 or switcher 2 respectively) tracks the

rate of voltage rise at the SHDN/SS pin once the SHDN/SS

Ceramic capacitors also make a good choice for the input

decoupling capacitor, which should be placed as close as

possible to the LT3471. A 4.7µF to 10µF input capacitor is

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LT3471

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APPLICATIONS INFORMATION

L1

2.2µH

D1

V

OUT1

V

IN

7V

10

SW1

R3

C

C3

R

PL

SS1

CONTROL 1

1.8V

0V

90.9k

33pF

4.7µF

4.7k

9

1

2

3

SHDN/SS1

FB1N

FB1P

R4

15k

C

SS1

0.33µF

V

REF

V

IN

8

7

C2

0.1µF

V

LT3471

2.6V TO 4.2V

Li-Ion

IN

10µF

5

4

R2

15k

R

FB2N

FB2P

SS2

CONTROL 2

1.8V

0V

4.7k

SHDN/SS2

GND

SW2

C

SS2

0.33µF

11

6

C5

1µF

C6

75pF

L3

15µH

R1

105k

L2

10µH

V

OUT2

V

IN

–7V

C4

10µF

D2

3471 F02

C1, C2: X5R OR X7R 6.3V

C3, C4: X5R OR X7R 10V

C5: XR5 OR X7R 16V

D1, D2: ON SEMICONDUCTOR MBRM-120

L1: SUMIDA CR43-2R2

L2: SUMIDA CDRH4D18-100

L3: SUMIDA CDRH4D18-150

C

: OPTIONAL

PL

Figure 2. Li-Ion OLED Driver

Supply Current of Figure 2 During

Start-Up without Soft-Start RC Network

Supply Current of Figure 2 During

Start-Up with Soft-Start RC Network

I_SUPPLY

0.5A/DIV

I_SUPPLY

0.5A/DIV

V_OUT1

2V/DIV

V_OUT1

2V/DIV

0.1ms/DIV

3471 F02b

0.2ms/DIV

3471 F02c

sufficient for most applications. Table 2 shows a list of

several ceramic capacitor manufacturers. Consult the

manufacturers for detailed information on their entire

selection of ceramic parts.

affect the stability of the overall system. The ESR of any

capacitor, along with the capacitance itself, contributes a

zero to the system. For the tantalum and OS-CON capaci-

tors, this zero is located at a lower frequency due to the

highervalueoftheESR, whilethezeroofaceramiccapaci-

tor is at a much higher frequency and can generally be

ignored.

Table 2. Ceramic Capacitor Manufacturers

Taiyo Yuden

AVX

(408) 573-4150

(803) 448-9411

(714) 852-2001

www.t-yuden.com

www.avxcorp.com

www.murata.com

A phase lead zero can be intentionally introduced by

placing a capacitor (C_PL) in parallel with the resistor (R3)

betweenV_OUTandV_FBasshowninFigure2.Thefrequency

of the zero is determined by the following equation.

3471f

Murata

ThedecisiontouseeitherlowESR(ceramic)capacitorsor

the higher ESR (tantalum or OS-CON) capacitors can

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LT3471

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APPLICATIONS INFORMATION

1

V_REGVOLTAGE REFERENCE

ƒ_Z=

2π •R3 •C_PL

Pin3oftheLT3471isabandgapvoltagereferencethathas

been divided down to 1.00V and buffered for external use.

This pin must be bypassed with at least 0.01µF and no

more than 1µF. This will ensure stability as well as reduce

the noise on this pin. The buffer has a built-in current limit

of at least 1mA (typically 1.4mA). This not only means that

you can use this pin as an external reference for supple-

mental circuitry, but it also means that it is possible to

provide a soft-start feature if this pin is used as one of the

feedback pins for the error amplifier. Normally the soft-

start time will be dominated by the RC time constant

discussed in the soft-start and shutdown section. How-

ever, because of the finite current limit of the buffer for the

By choosing the appropriate values for the resistor and

capacitor, the zero frequency can be designed to improve

the phase margin of the overall converter. The typical

target value for the zero frequency is between 35kHz to

55kHz. Figure 3 shows the transient response of the step-

up converter from Figure 2 without the phase lead capaci-

tor C_PL. Although adequate for many applications, phase

margin is not ideal as evidenced by 2-3 “bumps” in both

the output voltage and inductor current. A 33pF capacitor

for C_PLresults in ideal phase margin, which is revealed in

Figure 4 as a more damped response and less overshoot.

V

_REGpin, it will take some time to charge up the bypass

capacitor. During this time, the voltage at the V_REGpin will

ramp up, and this action provides an alternate means for

soft-starting the circuit. If the largest recommended by-

pass capacitor is used, 1µF, the worst-case (longest) soft-

start function that would be provided from the V_REFpin is:

V_OUT

200mV/DIV

AC COUPLED

I_L1

0.5A/DIV

AC COUPLED

1µF •1.00V

= 1.0ms

1.0mA

LOAD CURRENT

100mA/DIV

AC COUPLED

Choose the RC network such that the soft-start time is

longer than this time, or choose a smaller bypass capaci-

tor for the V_REFpin (but always larger than 0.01µF) so that

theRCnetworkdominatesthesoft-startingoftheLT3471.

The voltage at the V_REFpin can also be divided down and

used for one of the feedback pins for the error amplifier.

This is especially useful in LED driver applications, where

the current through the LEDs is set using the voltage

reference across a sense resistor in the LED chain. Using

a smaller or divided down reference leads to less wasted

power in the sense resistor. See the Typical Applications

section for an example of LED driving applications.

50µs/DIV

3471 F03

Figure 3. Transient Response of Figure 2’s Step-Up

Converter without Phase Lead Capacitor

V_OUT

200mV/DIV

AC COUPLED

I_L1

0.5A/DIV

AC COUPLED

LOAD CURRENT

100mA/DIV

AC COUPLED

DIODE SELECTION

50µs/DIV

3471 F04

ASchottkydiodeisrecommendedforusewiththeLT3471.

For high efficiency, a diode with good thermal character-

istics at high currents should be used such as the On

Figure 4. Transient Response of Figure 2’s Step-Up

Converter with 33pF Phase Lead Capacitor

3471f

8

LT3471

U

W U U

APPLICATIONS INFORMATION

SemiconductorMBRM120. Thisisa20Vdiode. Wherethe

switch voltage exceeds 20V, use the MBRM140, a 40V

diode. These diodes are rated to handle an average for-

ward current of 1.0A. In applications where the average

forward current of the diode is less than 0.5A, use the

Philips PMEG 2005, 3005, or 4005 (a 20V, 30V or 40V

diode, respectively).

Compensation—Theory

Like all other current mode switching regulators, the

LT3471 needs to be compensated for stable and efficient

operation. Two feedback loops are used in the LT3471: a

fast current loop which does not require compensation,

and a slower voltage loop which does. Standard Bode plot

analysis can be used to understand and adjust the voltage

feedback loop.

LAYOUT HINTS

As with any feedback loop, identifying the gain and phase

contribution of the various elements in the loop is critical.

Figure 6 shows the key equivalent elements of a boost

converter. Because of the fast current control loop, the

power stage of the IC, inductor and diode have been

replaced by the equivalent transconductance amplifier

The high speed operation of the LT3471 demands careful

attention to board layout. You will not get advertised

performance with careless layout. Figure 5 shows the

recommended component placement.

g

_mp. g_mpactsasacurrentsourcewheretheoutputcurrent

CONTROL 1

GND

CONTROL 2

GND

is proportional to the V_Cvoltage. Note that the maximum

C

SS1

C

SS2

output current of g_mpis finite due to the current limit in the

IC.

R

SS1

R

SS2

GND

C4

From Figure 6, the DC gain, poles and zeroes can be

calculated as follows:

C1

V

OUT2

L1

L2

L3

2

Output Pole: P1=

V

CC

•

V

OUT1

D1

C5

•

2 • π •R_L•C_OUT

SW1

10

SW2

6

1

Error Amp Pole: P2 =

2 • π •R_O•C_C

1

Error Amp Zero: Z1=

2 • π •R_C•C_C

9

8

7

D2

GND

C3

GND

SHDN/SS1

SHDN/SS2

LT3471

PIN 11 GND

V_REF

V_OUT

1

2

DC GAIN: A =

• g_ma•R_O• g_mp•R_L•

1

V

FB1N FB1P

FB2P FB2N

REF

ESR Zero: Z2 =

1

2

3

4

5

2 • π •R_ESR•C_OUT

R4

R2

V

²•R_L

IN

R3

V

R1

V

RHP Zero: Z3 =

OUT1

OUT2

2 • π • V_OUT²•L

C2

f_S

3

High Frequency Pole: P3 >

3471 F05

1

Figure 5. Suggested Layout Showing a Boost on SW1 and an

Inverter on SW2. Note the Separate Ground Returns for All High

Current Paths (Using a Multilayer Board)

PhaseLeadZero:Z4 =

2 • π •R1•C_PL

1

PhaseLeadPole:P4 =

R1•R2

R1+R2

2 • π •C_PL•

3471f

9

LT3471

U

W U U

APPLICATIONS INFORMATION

Table 3. Bode Plot Parameters

–

Parameter

Value

20

Units

Ω

Comment

g

mp

V

OUT

R

L

Application Specific

Not Adjustable

Adjustable

+

C

R

L

PL

ESR

C

4.7

10

µF

OUT

C

OUT

1.00V

REFERENCE

R

mΩ

MΩ

pF

ESR

+

–

V

C

R

0.9

90

g

O

ma

R1

R2

R

O

C

33

pF

C

PL

3471 F06

R

55

kΩ

V

Not Adjustable

Adjustable

C

C : COMPENSATION CAPACITOR

C

: OUTPUT CAPACITOR

R1

R2

90.9

15

OUT

: PHASE LEAD CAPACITOR

PL

ma

mp

Adjustable

g

: TRANSCONDUCTANCE AMPLIFIER INSIDE IC

: POWER STAGE TRANSCONDUCTANCE AMPLIFIER

V

OUT

7

Application Specific

Not Adjustable

Application Specific

Not Adjustable

R : COMPENSATION RESISTOR

C

L

O

R : OUTPUT RESISTANCE DEFINED AS V

R : OUTPUT RESISTANCE OF g

DIVIDED BY I

LOAD(MAX)

OUT

V

IN

3.3

50

V

ma

R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK

: OUTPUT CAPACITOR ESR

g

µmho

mho

µH

ma

R

ESR

9.3

2.2

1.2

mp

L

Figure 6. Boost Converter Equivalent Model

f

MHz

S

The Current Mode zero is a right half plane zero which can

be an issue in feedback control design, but is manageable

with proper external component selection.

From Figure 7, the phase is –115° when the gain reaches

0dB giving a phase margin of 65°. This is more than

adequate. The crossover frequency is 50kHz.

Using the circuit of Figure 2 as an example, Table 3 shows

the parameters used to generate the Bode plot shown in

Figure 7.

70

60

50

40

30

20

10

0

–50

–100

–150

–200

–250

–300

–350

–400

–10

GAIN

–20

PHASE

–30

100

1k

10k

100k

1M

FREQUENCY (Hz)

3471 F07

Figure 7. Bode Plot of 3.3V to 7V Application

3471f

10

LT3471

U

TYPICAL APPLICATIO S

Li-Ion OLED Driver

L1

2.2µH

D1

V

OUT1

V

9

IN

7V

10

SW1

R3

C6

C3

4.7µF

R

500mA WHEN V = 4.2V

SS1

IN

CONTROL 1

1.8V

0V

90.9k

33pF

4.7k

350mA WHEN V = 3.3V

1

SHDN/SS1

FB1N

250mA WHEN V = 2.6V

IN

2

R4

15k

C

FB1P

SS1

3

0.33µF

V

REF

V

IN

8

7

CONTROL

0V TO 1V

C2

0.1µF

V

LT3471

2.6V TO 4.2V

Li-Ion

IN

C1

10µF

R5

20k

5

4

R2

15k

FB2N

FB2P

CONTROL 2

1.8V

0V

R

4.7k

SS2

SHDN/SS2

GND

R6

10k

SW2

C

SS2

0.33µF

11

6

C5

1µF

C6

75pF

L3

15µH

R1

105k

L2

15µH

V

OUT2

V

IN

–7V TO –4V

–7V WHEN V

–4V WHEN V

C4

= 0V

D2

CONTROL

10µF

= 1

3471 TA02

–7V, 300mA WHEN V = 4.2V

IN

–7V, 250mA WHEN V = 3.3V

IN

–7V, 200mA WHEN V = 2.6V

IN

C1, C2: X5R OR X7R 6.3V

C3, C4: X5R OR X7R 10V

C5: XR5 OR X7R 16V

C6: OPTIONAL

D1, D2: ON SEMICONDUCTOR MBRM-120

L1: SUMIDA CR43-2R2

L2: SUMIDA CDRH4D18-100

L3: SUMIDA CDRH4D18-150

Li-Ion OLED Driver Efficiency

95

90

85

80

75

70

65

60

55

V

= 7V

OUT

V

= 4.2V

IN

V

IN

= 3.3V

V

= 2.6V

IN

V

= 4.2V

IN

= 3.3V

V

IN

V

= 2.6V

IN

V

= –7V

100

OUT

50

0

400

500

200

300

(mA)

I

OUT

3471 TA02b

3471f

11

LT3471

U

TYPICAL APPLICATIO S

Single Li-Ion Cell to 5V, 12V Boost Converter

L1

3.3µH

V

OUT1

D1

5V

V

900mA IF V = 4.2V

IN

10

630mA IF V = 3.3V

IN

R1

C5

100pF

C3

10µF

R

SS1

CONTROL 1

1.8V

OV

425mA IF V = 2.6V

IN

20k

4.7k

SW1

9

1

2

3

SHDN/SS1

FB1N

FB1P

R2

4.99k

C

SS1

0.33µF

V

REF

8

7

V

C2

0.1µF

IN

V

LT3471

IN

2.6V TO 4.2V

C1

4

5

4.7µF

R

FB2P

FB2N

SS2

CONTROL 2

1.8V

0V

4.7k

SHDN/SS2

GND

SW2

C

SS2

0.33µF

11

6

L2

6.8µH

V

OUT2

D2

12V

300mA IF V = 4.2V

V

IN

C4

10µF

C6

220pF

210mA IF V = 3.3V

IN

R3

54.9k

145mA IF V = 2.6V

IN

R4

4.99k

3471 TA03

C1-C3: X5R OR X7R 6.3V

C4: X5R OR X7R 16V

D1, D2: ON SEMICONDUCTOR MBRM-120

L1: SUMIDA CR43-3R3

L2: SUMIDA CR43-6R8

3471f

12

LT3471

U

TYPICAL APPLICATIO S

Li-Ion 20 White LED Driver

L1

2.2µH

D1

V

9

IN

C3

I

OUT1

10

SW1

0.22µF

R

20mA

SS1

CONTROL 1

1.8V

4.7k

1

2

3

SHDN/SS1

FB1N

FB1P

OV

C

SS1

0.33µF

V

REF

R1

90.9k

8

7

V

C2

0.1µF

IN

V

LT3471

10 WHITE LEDs

IN

2.6V TO 4.2V

C1

4

5

4.7µF

R2

10k

R

4.7k

FB2P

FB2N

SS2

CONTROL 2

1.8V

OV

SHDN/SS2

GND

SW2

C

SS2

0.33µF

11

6

4.99Ω

L2

2.2µH

D2

V

IN

C4

I

OUT2

0.22µF

20mA

C1, C2: X5R OR X7R 6.3V

C3, C4: X5R OR X7R 50V

D1, D2: ON SEMICONDUCTOR MBRM-140

L1, L2: SUMIDA CDRH2D-2R2

10 WHITE LEDs

4.99Ω

3471 TA04

3471f

13

LT3471

U

TYPICAL APPLICATIO S

Li-Ion or 4-Cell Alkaline to 3.3V and 5V SEPIC

C3

4.7µF

L1

10µH

V

OUT1

D1

3.3V

V

640mA AT V = 6.5V

IN

550mA AT V = 5V

C4

15µF

IN

L2

470mA AT V = 4V

IN

C7

56pF

10µH

410mA AT V = 3.3V

IN

10

SW1

R1

R

340mA AT V = 2.6V

IN

SS1

CONTROL 1

34.8k

4.7k

9

1

2

3

1.8V

SHDN/SS1

FB1N

FB1P

OV

R2

15k

C

SS1

0.33µF

V

REF

8

7

C2

0.1µF

V

IN

V

IN

LT3471

2.6V TO 6.5V

C1

4

5

4.7µF

R

SS2

4.7k

FB2P

FB2N

CONTROL 2

1.8V

OV

SHDN/SS2

GND

SW2

C

SS2

0.33µF

11

6

C5

10µF

L3

10µH

V

OUT2

D2

5V

500mA AT V = 6.5V

V

IN

C6

15µF

420mA AT V = 5V

IN

C8

R3

L4

10µH

360mA AT V = 4V

56pF 60.4k

C1, C3, C5: X5R OR X7R 10V

C4, C6: X5R OR X7R 6.3V

D1, D2: ON SEMICONDUCTOR MBRM-120

L1-L4: MURATA LQH43CN100K032

IN

300mA AT V = 3.3V

IN

250mA AT V = 2.6V

IN

R4

15k

3471 TA05

3471f

14

LT3471

U

PACKAGE DESCRIPTIO

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

0.675 ±0.05

3.50 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

PACKAGE

OUTLINE

0.25 ± 0.05

0.50

BSC

2.38 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

R = 0.115

TYP

6

0.38 ± 0.10

10

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(SEE NOTE 6)

(DD10) DFN 1103

5

1

0.25 ± 0.05

0.50 BSC

0.75 ±0.05

0.200 REF

2.38 ±0.10

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

3471f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection ofits circuits as described herein willnotinfringe on existing patentrights.

15

LT3471

U

TYPICAL APPLICATIO

5V to ±12V Dual Supply Boost/Inverting Converter

L1

10µH

D1

V

OUT1

12V

320mA

V

9

IN

10

SW1

R1

C6

C3

4.7µF

CONTROL 1

54.9k

56pF

4.7k

1

2

3

1.8V

SHDN/SS1

FB1N

FB1P

OV

R2

4.99k

0.33µF

V

REF

R3

15k

8

7

V

C2

0.1µF

IN

5V

V

IN

LT3471

C1

4.7µF

4

5

FB2P

FB2N

CONTROL 2

4.7k

1.8V

SHDN/SS2

GND

OV

C7

56pF

SW2

0.33µF

11

6

R4

182k

V

•

OUT2

–12V

V

IN

L2

10µH

L3

10µH

200mA

C4

4.7µF

D2

C5

1µF

3471 TA06

C1, C2: X5R OR X7R 6.3V

C3, C4: X5R OR X7R 16V

C5: X5R OR X7R 25V

L1: SUMIDA CR43-10

L2, L3: SUMIDA CLS63-10

D1, D2: ON SEMICONDUCTOR MBRM-120

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT1611

550mA (I ), 1.4MHz, High Efficiency Micropower Inverting

V : 1.1V to 10V, V

= –34V, I = 3mA, I < 1µA,

Q SD

SW

IN

OUT(MAX)

DC/DC Converter

ThinSOT Package

LT1613

550mA (I ), 1.4MHz, High Efficiency Step-Up

V : 0.9V to 10V, V

= 34V, I = 3mA, I < 1µA,

Q SD

SW

IN

OUT(MAX)

DC/DC Converter

ThinSOT Package

LT1614

750mA (I ), 600kHz, High Efficiency Micropower Inverting

V : 1V to 12V, V

= –24V, I = 1mA, I < 10µA,

OUT(MAX) Q SD

SW

IN

DC/DC Converter

MS8, S8 Packages

LT1615/LT1615-1

LT1617/LT1617-1

LT1930/LT1930A

LT1931/LT1931A

LT1943 (Quad)

LT1945 (Dual)

LT1946/LT1946A

LT3436

300mA/80mA (I ), High Efficiency Step-Up DC/DC Converters

V

= 1V to 15V, V

= 34V, I = 20µA, I < 1µA,

OUT(MAX) Q SD

SW

IN

ThinSOT Package

350mA/100mA (I ), High Efficiency Micropower Inverting

V

= 1.2V to 15V, V

= –34V, I = 20µA, I < 1µA,

OUT(MAX) Q SD

SW

IN

DC/DC Converters

ThinSOT Package

1A (I ), 1.2MHz/2.2MHz, High Efficiency

V : 2.6V to 16V, V

= 34V, I = 4.2mA/5.5mA,

Q

SW

IN

OUT(MAX)

Step-Up DC/DC Converters

I

< 1µA, ThinSOT Package

SD

1A (I ), 1.2MHz/2.2MHz High Efficiency Micropower Inverting

V

= 2.6V to 16V, V

= –34V, I = 5.8mA, I < 1µA,

Q SD

SW

IN

OUT(MAX)

DC/DC Converters

ThinSOT Package

Quad Boost, 2.6A Buck, 2.6A Boost, 0.3A Boost, 0.4A Inverter

1.2MHz TFT DC/DC Converter

V

= 4.5V to 22V, V

= 40V, I = 10µA, I < 35µA,

Q SD

IN

TSSOP28E Package

Dual Output, Boost/Inverter, 350mA (I ), Constant Off-Time,

V

= 1.2V to 15V, V

= ±34V, I = 40µA, I < 1µA,

Q SD

SW

IN

High Efficiency Step-Up DC/DC Converter

10-Lead MS Package

1.5A (I ), 1.2MHz/2.7MHz, High Efficiency

V : 2.45V to 16V, V

MS8 Package

= 34V, I = 3.2mA, I < 1µA,

OUT(MAX) Q SD

SW

IN

Step-Up DC/DC Converters

3A (I ), 1MHz, 34V Step-Up DC/DC Converter

V : 3V to 25V, V

TSSOP16E Package

= 34V, I = 0.9mA, I < 6µA,

SW

IN

OUT(MAX) Q SD

LT3462/LT3462A

LT3463/LT3463A

300mA (I ), 1.2MHz/2.7MHz, High Efficiency Inverting

V

= 2.5V to 16V, V

= –38V, I = 2.9mA, I < 1µA,

Q SD

SW

IN

OUT(MAX)

DC/DC Converters with Integrated Schottkys

ThinSOT Package

Dual Output, Boost/Inverter, 250mA (I ), Constant Off-Time,

V

= 2.3V to 15V, V

= ±40V, I = 40µA, I < 1µA,

Q SD

SW

IN

High Efficiency Step-Up DC/DC Converters with Integrated

Schottkys

DFN Package

LT3464

85mA (I ), High Efficiency Step-Up DC/DC Converter with

V

= 2.3V to 10V, V

= 34V, I = 25µA, I < 1µA,

OUT(MAX) Q SD

SW

IN

Integrated Schottky and PNP Disconnect

ThinSOT Package

3471f

LT/TP 0804 1K • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT3471EDD
厂家：	Linear
描述：	Dual 1.3A, 1.2MHz Boost/Inverter in 3mm ???? 3mm DFN 双1.3A ， 1.2MHz的升压/逆变器采用3mm ???? 3mm DFN封装
文件：	总16页 (文件大小：266K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT3471EDD [Linear]

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