LTC2324 [Linear]

Quad/Octal 16-Bit/14-Bit/12-Bit, 5Msps/2Msps/1.5Msps, Serial, High Speed SAR ADCs;


型号：	LTC2324
厂家：	Linear
描述：	Quad/Octal 16-Bit/14-Bit/12-Bit, 5Msps/2Msps/1.5Msps, Serial, High Speed SAR ADCs
文件：	总8页 (文件大小：551K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DEMO MANUAL DC2395A

LTC2325/LTC2324/LTC2320

Quad/Octal 16-Bit/14-Bit/12-Bit,

5Msps/2Msps/1.5Msps, Serial,

High Speed SAR ADCs

Description

Demonstration circuit 2395A features the LTC^®2325/

LTC2324/LTC2320 family. With up to 5Msps, these differ-

ential, multiple channel, 16-bit, serial, high speed succes-

sive approximation register (SAR) ADCs are available in a

52-leadQFNpackage. EachADChasaninternal20ppm/°C

maximum drift reference and an SPI-compatible serial

interface that supports CMOS and LVDS logic. Note the

demo board is configured for CMOS operation by default;

see the note under JP8 for LVDS operation. The following

textreferstotheLTC2325,butappliestoallmembersofthe

family, the only difference being the number of channels,

the sample rate and/or the number of bits. The DC2395A

demonstrates the DC and AC performance oftheLTC2325

in conjunction with the DC890 PScope™ data collection

board. Alternatively, by connecting the DC2395A into a

customer application, the performance of the LTC2325

can be evaluated directly in that circuit.

Design files for this circuit board are available at

http://www.linear.com/demo/DC2395A

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope

is a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

Assembly options

Table 1. DC2395A Assembly Options

VERSION

U1 PART NUMBER

LTC2320CUKG-16#PBF

LTC2324CUKG-16#PBF

LTC2325CUKG-16#PBF

LTC2320CUKG-14#PBF

LTC2324CUKG-14#PBF

LTC2325CUKG-14#PBF

LTC2320CUKG-12#PBF

LTC2324CUKG-12#PBF

LTC2325CUKG-12#PBF

MAX CONVERSION RATE

1.5Msps

2Msps

# OF BITS

MAX CLOCK FREQUENCY

52.5MHz

DC2395A-A

DC2395A-B

DC2395A-C

DC2395A-D

DC2395A-E

DC2395A-F

DC2395A-G

DC2395A-H

DC2395A-I

110MHz

5Msps

110MHz

1.5Msps

2Msps

52.5MHz

110MHz

5Msps

110MHz

1.5Msps

2Msps

52.5MHz

110MHz

5Msps

110MHz

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DEMO MANUAL DC2395A

boArD photo

7V DC POWER SUPPLY

–7V DC POWER SUPPLY

TO DC890B

SIGNAL

GENERATOR

CLOCK SIGNAL

FROM GENERATOR

Figure 1. DC2395A Connection Diagram

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DEMO MANUAL DC2395A

Quick stArt proceDure

Demonstrationcircuit2395Aiseasytosetupandevaluate

for performance. Refer to Figure 1 and follow the proce-

dure below.

www.linear.com/software. Complete software doc-

umentation is available from the Help menu. Updates

can be downloaded from the Tools menu. Check for

updates periodically, as new features may be added.

The PScope software should recognize the DC2395A

and configure itself automatically.

Connect the DC2395A to a DC890 USB high speed data

collection board using edge connector P1.

Connect the DC890 to a host PC with a standard USB

A/B cable.

Click the Collect button (Figure 2) to begin acquiring

data. The Collect button then changes to Pause, which

can be used to stop data acquisition.

Apply a low jitter signal source to J11 to test channel 1.

Note that the DC2395A is capable of accepting a

differentialinputsignalaswellasasingle-endedsignal.

SeetheHardwareSetupsectionforthejumperpositions

that correspond to these configurations.

DRIVE OPTIONS

There are several ways to drive the LTC2325 on the

DC2395A. It can be driven with a true differential source,

or a single-ended source in either pseudo-differential

bipolar or unipolar mode. For details on how to configure

the DC2395A for any of these see Table 2.

Asaclocksource, applyalowjitter 10dBmsinewaveor

square wave to connector J9. See Table 1 for maximum

clock frequencies. Note that J9 has a 50Ω termination

resistor to ground.

Anexampleinputcircuitforchannel1isshowninFigure3.

Run the PScope software (Pscope.exe version K73,

or later) supplied with the DC890 or download it from

Table 2. Resistor Values for Different Input Configurations

R32, 52, 72, 104,

R17, 37, 57, 88,

R15, 35, 55, 75,

R16, 36, 56, 76,

R24, 44, 64, 100,

INPUT CONFIGURATION

Differential

146, 179, 202, 222 125, 163, 187, 207 122, 159, 185, 205 123, 160, 186, 206 143, 173, 194, 214

0Ω

DNI

0Ω

DNI

301Ω

DNI

0Ω

301Ω

0Ω

DNI

0Ω

Single-Ended Differential ADC Drive

Single-Ended Bipolar ADC Drive

Unipolar ADC Drive

301Ω

*DNI = Do not install

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DEMO MANUAL DC2395A

Quick stArt proceDure

Figure 2. DC2395A PScope Screenshot

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DEMO MANUAL DC2395A

Quick stArt proceDure

Figure 3. Example Input Circuit, Single-Ended Differential ADC Drive

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DEMO MANUAL DC2395A

hArDwAre setup

SIGNAL CONNECTIONS

J1 Ch8 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch8+ input, and the

J2 FPGA Program: Factory use only.

J4 JTAG: Factory use only.

–

lower BNC as the Ch8 input.

J11 Ch1 Input: In the single-ended configuration, use the

J9 CLK: This input has a 50Ω termination resistor, and is

intended to be driven by a low jitter 10dBm sine or square

wave. To achieve the full AC performance of this part,

the clock jitter should be kept under 2ps. This input is

capacitively coupled so that the input clock can be either

0V to 2.5V or 1.25V. This eliminates the need for level

shifting. To run at the maximum conversion rate, apply

the frequency specified in the Table 1.

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch1 input, and the

–

lower BNC as the Ch1 input.

J10 Ch2 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch2 input, and the

–

lower BNC as the Ch2 input.

JP1 VCCIO: Use this jumper to select the VCCIO supply

voltage. The default setting is 2.5V. The 1.8V setting

selects a 1.8V supply voltage.

J8 Ch3 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch3 input, and the

–

lower BNC as the Ch3 input.

JP2 VDD: Use this jumper to select the VDD supply volt-

age. The default setting is 5V. The 3.3V setting selects a

3.3V supply voltage.

J7 Ch4 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch4 input, and the

JP5REFINT:SetforINTwhenusingtheinternalreference.

Set for EXT to disable the internal REFOUT1-4 buffers for

use with external voltage references.

–

lower BNC as the Ch4 input.

J6 Ch5 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

JP11 REF1: Set for ONB to use onboard voltage reference.

Set for EXT to use external reference applied at E14.

operation, use the upper BNC as the Ch5 input, and the

–

lower BNC as the Ch5 input.

JP10 REF2: Set for ONB to use onboard voltage reference.

Set for EXT to use external reference applied at E13.

J5 Ch6 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

JP4 REF3: Set for ONB to use onboard voltage reference.

Set for EXT to use external reference applied at E12.

operation, use the upper BNC as the Ch6 input, and the

–

lower BNC as the Ch6 input.

JP3 REF4: Set for ONB to use onboard voltage reference.

Set for EXT to use external reference applied at E11.

J3 Ch7 Input: In the single-ended configuration, use the

upper BNC connector as the signal input. For differential

operation, use the upper BNC as the Ch7 input, and the

–

lower BNC as the Ch7 input.

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DEMO MANUAL DC2395A

hArDwAre setup

JP8 SDR/DDR: Set for SDR for single data rate operation.

Set for DDR for double data rate operation.

JP7 EEPROM: Factory use only.

JP9 OSC: Use this jumper to enable the onboard encode

clock source. The default setting is OFF. The ON setting

energizesthissource. RefertotheDC2395Aschematicfor

additional passive elements required to use the onboard

source.

JP6CMOS/LVDS:Usethisjumpertoselectthedataoutput

format from the LTC2325. The default setting is CMOS.

The output data will not be valid if the jumper is moved

to the LVDS position unless the following changes have

been made:

Install100ΩS0402resistorsatR113,114,117,118,

124, 239

Reprogram the CPLD through J2 using the program-

ming file LTC2325_lvds.pof found at:

http://www.linear.com/demo/DC2395A

Move JP6 to the LVDS position.

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

DEMO MANUAL DC2395A

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

Thisdemonstrationboard(DEMOBOARD)kitbeingsoldorprovidedbyLinearTechnologyisintendedforuseforENGINEERINGDEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety

measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union

directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date

of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU

OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS

FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR

ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or

agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

Thisnoticecontainsimportantsafetyinformationabouttemperaturesandvoltages. Forfurthersafetyconcerns, pleasecontactaLTCapplication

engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

dc2395af

LT 0916 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

LINEAR TECHNOLOGY CORPORATION 2016

(408) 432-1900 FAX: (408) 434-0507 www.linear.com

LTC2324 [Linear]

相关型号：

LTC2324-12

LTC2324-14

LTC2324-16

LTC2324CUKG-14#PBF

LTC2324HUKG-12#PBF

LTC2324HUKG-14#PBF

LTC2324HUKG-16#PBF

LTC2324IUKG-14#PBF

LTC2325

LTC2325-16

LTC2325CUKG-12#PBF

LTC2325CUKG-14#PBF