LTC3419IMS#PBF [Linear]
LTC3419 - Dual Monolithic 600mA Synchronous Step-Down Regulator; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C;
| 型号： | LTC3419IMS#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3419 - Dual Monolithic 600mA Synchronous Step-Down Regulator; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总16页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3419
Dual Monolithic 600mA
Synchronous Step-Down
Regulator
FEATURES
DESCRIPTION
The LTC®3419 is a dual, 2.25MHz, constant-frequency,
synchronous step-down DC/DC converter in a tiny
3mm × 3mm DFN package. 100% duty cycle provides
low dropout operation, extending battery life in portable
systems. Lowoutputvoltagesaresupportedwiththe0.6V
feedback reference voltage. Each regulator can supply
600mA output current.
n
High Efficiency Dual Step-Down Outputs: Up to 96%
n
600mA Current per Channel at V = 3V
IN
n
Only 35μA Quiescent Current During Operation
(Both Channels)
n
2.25MHz Constant-Frequency Operation
n
2.5V to 5.5V Input Voltage Range
n
Low Dropout Operation: 100% Duty Cycle
n
No Schottky Diodes Required
The input voltage range is 2.5V to 5.5V, making it ideal
for Li-Ion and USB powered applications. Supply current
during operation is only 35μA and drops to <1μA in
shutdown. A user-selectable mode input allows the user
to trade off between high efficiency Burst Mode operation
and pulse-skipping mode.
n
Internally Compensated for All Ceramic Capacitors
n
Independent Internal Soft-Start for Each Channel
n
Available in Fixed Output Versions
n
Current Mode Operation for Excellent Line and Load
Transient Response
n
0.6V Reference Allows Low Output Voltages
User-Selectable Burst Mode® Operation
n
An internally set 2.25MHz switching frequency allows the
useoftinysurfacemountinductorsandcapacitors. Internal
soft-start reduces inrush current during start-up. Both
outputs are internally compensated to work with ceramic
outputcapacitors. TheLTC3419isavailableinalowprofile
(0.75mm)3mm×3mmDFNpackage.TheLTC3419isalso
available in a fixed output voltage configuration selected
via internal resistor dividers (see Table 2).
n
Short-Circuit Protected
Ultralow Shutdown Current: I < 1μA
Available in Small MSOP or 3mm × 3mm DFN-8
Packages
n
Q
n
APPLICATIONS
n
Cellular Telephones
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5481178, 6127815, 6304066, 6498466, 6580258, 6611131.
n
Digital Still Cameras
n
Wireless and DSL Modems
n
Portable Media Players
n
PDAs/Palmtop PCs
Efficiency and Power Loss
vs Output Current
TYPICAL APPLICATION
Dual Monolithic Buck Regulator in 8-Lead 3 × 3 DFN
100
90
80
70
60
50
40
30
20
10
0
10
V
= 3.6V
IN
V
IN
2.5V TO 5.5V
1
10μF
RUN2
V
IN
RUN1
MODE
0.1
LTC3419
SW2
SW1
3.3μH
22pF
3.3μH
22pF
V
V
OUT1
OUT2
2.5V AT
600mA
1.8V AT
600mA
0.01
0.001
0.0001
V
OUT
V
OUT
V
OUT
= 1.2V
= 1.8V
= 2.5V
V
FB2
V
FB1
GND
118k
187k
10μF
10μF
59k
59k
0.1
1
10
100
1000
3419 TA01
OUTPUT CURRENT (mA)
3419 TA01b
3419fa
1
LTC3419
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Supply Voltage (V )............................. –0.3 to 6V
Peak SW Source and Sink Current (Note 2).............1.3A
Operating Junction Temperature Range
IN
V
, V ........................................–0.3V to V + 0.3V
FB1 FB2
IN
RUN1, RUN2, MODE........................–0.3V to V + 0.3V
(Note 3) .................................................–40 to 125°C
Junction Temperature (Note 6) ............................. 125°C
Storage Temperature Range...................–65°C to 125°C
Lead Temperature (Soldering, 10 sec)
IN
SW1, SW2 .......................................–0.3V to V + 0.3V
IN
P-Channel SW Source Current (DC) (Note 2).......800mA
N-Channel SW Source Current (DC) (Note 2) ......800mA
MSOP Package ................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
V
1
2
3
4
8
7
6
5
V
FB2
FB1
V
1
2
3
4
5
10
9
V
FB2
FB1
RUN1
MODE
SW1
RUN2
SW2
RUN1
MODE
SW1
RUN2
SW2
9
8
7
6
V
IN
V
GND
GND
IN
MS PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
8-LEAD (3mm s 3mm) PLASTIC DFN
T
= 125°C, θ = 120°C/W
JMAX
JA
T
= 125°C, θ = 40°C/W
JMAX
JA
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3419EDD#PBF
LTC3419EDD-1#PBF
LTC3419IDD#PBF
LTC3419IDD-1#PBF
LTC3419EMS#PBF
LTC3419EMS-1#PBF
LTC3419IMS#PBF
LTC3419IMS-1#PBF
TAPE AND REEL
PART MARKING*
LCQJ
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
LTC3419EDD#TRPBF
LTC3419EDD-1#TRPBF
LTC3419IDD#TRPBF
LTC3419IDD-1#TRPBF
LTC3419EMS#TRPBF
LTC3419EMS-1#TRPBF
LTC3419IMS#TRPBF
LTC3419IMS-1#TRPBF
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LCWW
LCQJ
LCWW
LTCQK
LTCWX
LTCQK
10-Lead Plastic MSOP
10-Lead Plastic MSOP
LTCWX
10-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3419fa
2
LTC3419
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C, VIN = 3.6V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
●
●
V
V
IN
V
IN
Operating Voltage
2.5
V
V
IN
V
UV
Undervoltage Lockout
V
Low to High
IN
2.1
3
2.5
●
●
I
Feedback Pin Input Current
LTC3419
LTC3419-1
30
5
nA
μA
FB
V
Regulated Feedback Voltage (Channel 1) LTC3419E, 0°C < T < 85°C
0.590
0.588
1.544
0.582
1.533
0.600
0.600
1.575
0.6
0.610
0.612
1.606
0.618
1.617
V
V
V
V
V
FBREG1
FBREG2
J
●
●
●
●
LTC3419E, –40°C < T < 85°C
J
LTC3419E-1, –40°C < T < 85°C
J
LTC3419I, –40°C < T < 125°C
J
LTC3419I-1, –40°C < T < 125°C
1.575
J
V
Regulated Feedback Voltage (Channel 2) LTC3419E, 0°C < T < 85°C
0.590
0.588
1.764
0.582
1.753
0.600
0.600
1.8
0.6
1.8
0.610
0.612
1.836
0.618
1.847
V
V
V
V
V
J
●
●
●
●
LTC3419E, –40°C < T < 85°C
J
LTC3419E-1, –40°C < T < 85°C
J
LTC3419I, –40°C < T < 125°C
J
LTC3419I-1, –40°C < T < 125°C
J
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 2.5V to 5.5V (Note 7)
0.3
0.5
0.5
%/V
%
ΔV
ΔV
IN
LINE REG
I
= 0mA to 600mA (Note 7)
LOAD
LOAD REG
I
Input DC Supply Current
Active Mode (Note 4)
Sleep Mode
S
V
= V = 0.95 × V
FBREG
500
35
0.1
700
60
1
μA
μA
μA
FB1
FB1
FB2
V
= V = 1.05 × V
, V = 5.5V
FB2
FBREG IN
Shutdown
RUN1 = RUN2 = 0V, V = 5.5V
IN
●
f
I
Oscillator Frequency
V
= V
FBREG
1.8
2.25
2.7
MHz
OSC
FB
IN
Peak Switch Current Limit
Channel 1 (600mA)
Channel 2 (600mA)
V
= 3V, V < V
, Duty Cycle < 35%
FBREG
LIM
FB
900
900
1200
1200
mA
mA
R
Channel 1 (Note 5)
DS(ON)
Top Switch On-Resistance
Bottom Switch On-Resistance
Channel 2 (Note 5)
V
V
= 3.6V, I = 100mA
0.4
0.4
0.6
0.6
Ω
Ω
IN
IN
SW
= 3.6V, I = 100mA
SW
Top Switch On-Resistance
Bottom Switch On-Resistance
V
V
= 3.6V, I = 100mA
0.4
0.4
0.6
0.6
Ω
Ω
IN
IN
SW
= 3.6V, I = 100mA
SW
I
t
Switch Leakage Current
Soft-Start Time
V
= 5V, V = 0V
RUN
0.01
0.95
1
1
1.3
1.2
1
μA
ms
V
SW(LKG)
IN
V
FB
from 10% to 90% Full Scale
0.1
0.4
SOFTSTART
●
●
●
●
V
RUN Threshold High
RUN
RUN
I
RUN Leakage Current
MODE Threshold High
MODE Leakage Current
Output Ripple in Burst Mode Operation
0.01
1
μA
V
V
0.4
1.2
1
MODE
MODE
I
0.01
20
μA
V
V
OUT
= 1.5V, C
= 10μF
mV
P-P
BURST
OUT
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: The DFN switch on-resistance is guaranteed by correlation to
wafer level measurements.
Note 2: Guaranteed by long term current density limitations.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 7: The converter is tested in a proprietary test mode that connects
the output of the error amplifier to the SW pin, which is connected to an
Note 3: The LTC3419E and LTC3419E-1 are guaranteed to meet specified
performance from 0°C to 85°C. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3419I and LTC3419I-1 are guaranteed to meet specified performance
over the full –40°C to 125°C operating junction temperature range.
external servo loop.
3419fa
3
LTC3419
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 3.6V, unless otherwise noted.
Burst Mode Operation
Pulse Skip Mode Operation
Efficiency vs Input Voltage
100
90
80
70
60
50
40
30
I
= 100mA
OUT
SW
2V/DIV
SW
2V/DIV
I
= 1mA
V
OUT
OUT
V
OUT
50mV/DIV
I
= 600mA
OUT
50mV/DIV
AC-COUPLED
I
= 10mA
OUT
AC-COUPLED
I
L
I
L
100mA/DIV
100mA/DIV
I
= 0.1mA
4.5
OUT
3419 G01
3419 G02
2μs/DIV
5μs/DIV
V
V
LOAD
= 3.6V
V
V
= 3.6V
IN
OUT
I
LOAD
IN
V
= 1.8V
OUT
= 1.8V
= 1.8V
= 5mA
OUT
I
= 25mA
2.5
3.0
3.5
4.0
(V)
5.0
5.5
V
IN
3419 G03
Reference Voltage
vs Temperature
Oscillator Frequency
vs Temperature
Supply Current
vs Temperature
1.5
1.0
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
55
50
45
40
35
30
25
20
15
RUN1 = RUN2 = V
LOAD
IN
I
= 0A
V
= 4.2V
IN
0.5
V
= 3.6V
V
= 5.5V
IN
IN
0
V
= 2.7V
V
= 2.7V
IN
IN
–0.5
–1.0
–1.5
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3419 G04
3419 G05
3419 G06
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
Switch Leakage vs Input Voltage
3.0
2.5
2.0
1.5
1.0
0.5
0
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.6
0.5
0.4
0.3
0.2
0.1
MAIN SWITCH
MAIN SWITCH
MAIN SWITCH
SYNCHRONOUS
SWITCH
SYNCHRONOUS SWITCH
SYNCHRONOUS
SWITCH
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
(V)
–50 –25
0
25
50
75 100 125
V
V
IN
TEMPERATURE (°C)
IN
3419 G07
3419 G08
3419 G09
3419fa
4
LTC3419
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 3.6V, unless otherwise noted.
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
V
V
= 2.7V
= 3.6V
= 4.2V
V
V
V
= 2.7V
= 3.6V
= 4.2V
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
IN
IN
IN
IN
IN
IN
V
= 1.2V
1
V
= 1.8V
1
V
OUT
= 2.5V
1
OUT
OUT
0.1
10
100
1000
0.1
10
100
1000
0.1
10
100
1000
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
3419 G10
3419 G11
3419 G12
Efficiency vs Load Current
Load Regulation
Load Regulation
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
1.5
1.0
0.5
0
100
90
80
70
60
50
40
30
20
10
0
V
V
V
= 1.2V
= 1.8V
= 2.5V
V
= 1.8V
OUT
OUT
OUT
OUT
Burst Mode OPERATION
PULSE SKIP MODE
Burst Mode OPERATION
–0.5
–1.0
–0.5
–1.0
Burst Mode OPERATION
PULSE SKIP MODE
V
= 1.8V
1
OUT
0
100
200
300
400
500
600
0
100
200
300
400
500
600
0.1
10
100
1000
OUTPUT CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3419 G13
3419 G14
3419 G15
Line Regulation
Start-Up from Shutdown
Start-Up from Shutdown
0.6
0.4
V
= 1.8V
= 100mA
OUT
I
LOAD
RUN
2V/DIV
RUN
2V/DIV
0.2
V
V
OUT
OUT
1V/DIV
1V/DIV
0
I
LOAD
I
L
–0.2
–0.4
–0.6
500mA/DIV
500mA/DIV
3419 G17
3419 G18
250μs/DIV
250μs/DIV
V
V
I
= 3.6V
V
V
R
= 3.6V
IN
OUT
IN
OUT
= 1.8V
= 0A
= 1.8V
= 3Ω
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
LOAD
LOAD
V
IN
3419 G16
3419fa
5
LTC3419
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 3.6V, unless otherwise noted.
Load Step
Load Step
Load Step
V
V
V
OUT
OUT
OUT
100mV/DIV
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
AC-COUPLED
I
I
L
L
I
L
500mA/DIV
500mA/DIV
500mA/DIV
I
I
LOAD
I
LOAD
LOAD
500mA/DIV
500mA/DIV
500mA/DIV
3419 G19
3419 G20
3419 G21
20μs/DIV
20μs/DIV
20μs/DIV
V
V
LOAD
= 3.6V
V
V
LOAD
= 3.6V
V
= 3.6V
IN
IN
IN
= 1.8V
= 1.8V
V
= 1.2V
OUT
OUT
OUT
I
= 0A TO 600mA
I
= 40mA TO 600mA
I
= 40mA TO 600mA
LOAD
PIN FUNCTIONS
(DD/MS)
V
(Pin1/Pin1):Regulator1OutputFeedback.Receives
SW2 (Pin 6/Pin 8): Regulator 2 Switch Node Connection
FB1
the feedback voltage from the external resistive divider
across the regulator 1 output. Nominal voltage for this
pin is 0.6V.
to the Inductor. This pin swings from V to GND.
IN
RUN2 (Pin 7/Pin 9): Regulator 2 Enable. Forcing this pin
to V enables regulator 2, while forcing it to GND causes
IN
RUN1 (Pin 2/Pin 2): Regulator 1 Enable. Forcing this pin
regulator 2 to shut down.
to V enables regulator 1, while forcing it to GND causes
IN
V
(Pin8/Pin10):Regulator2OutputFeedback.Receives
FB2
regulator 1 to shut down.
the feedback voltage from the external resistive divider
across the regulator 2 output. Nominal voltage for this
pin is 0.6V.
MODE (Pin 3/Pin 3): Mode Select Input. To select pulse-
skippingmode, tietoV . GroundingthispinselectsBurst
IN
Mode operation. Do not leave this pin floating.
Exposed Pad (Pin 9/NA): Ground. The Exposed Pad must
be soldered to PCB for optimal thermal performance.
SW1 (Pin 4/Pin 4): Regulator 1 Switch Node Connection
to the Inductor. This pin swings from V to GND.
IN
GND (NA/Pins 5, 6): Ground. Connect to the (–) terminal
V
(Pin 5/Pin 7): Main Power Supply. Must be closely
IN
of C , and the (–) terminal of C . Pin 5 of the MS
OUT
IN
de-coupled to GND.
package must be soldered to the PC board for optimal
thermal performance.
3419fa
6
LTC3419
FUNCTIONAL DIAGRAM
REGULATOR 1
MODE
3
BURST
CLAMP
5
V
IN
SLOPE
COMP
–
V
FB1
1
–
+
SLEEP
–
+
I
TH
EA
I
COMP
V
+
SLEEP
BURST
Q
0.6V
S
R
RS
LATCH
SOFT-START
Q
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI
SHOOT-
THRU
4
9
SW1
GND
+
–
I
RCMP
SHUTDOWN
2
7
SLEEP2
SLEEP1
RUN1
RUN2
0.6V REF
OSC
OSC
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
8
6
SW2
V
FB2
3419 FD
3419fa
7
LTC3419
OPERATION
The LTC3419 uses a constant-frequency, current mode
architecture. The operating frequency is set at 2.25MHz.
Both channels share the same clock and run in-phase.
MOSFET on. This cycle repeats at a rate that is dependent
on load demand.
For applications where low ripple voltage and constant-
frequency operation is a higher priority than light load
efficiency,pulse-skippingmodecanbeusedbyconnecting
The output voltage is set by an external resistor divider
returned to the V pins. An error amplifier compares the
FB
the MODE pin to V . In this mode, the peak inductor
dividedoutputvoltagewithareferencevoltageof0.6Vand
regulates the peak inductor current accordingly.
IN
current is not fixed, which allows the LTC3419 to switch
at a constant-frequency down to very low currents, where
it will begin skipping pulses.
Main Control Loop
Duringnormaloperation,thetoppowerswitch(P-channel
MOSFET) is turned on at the beginning of a clock cycle
Dropout Operation
When the input supply voltage decreases toward the
output voltage the duty cycle increases to 100%, which
is the dropout condition. In dropout, the PMOS switch is
turnedoncontinuouslywiththeoutputvoltagebeingequal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor.
when the V voltage is below the reference voltage. The
FB
current into the inductor and the load increases until the
peak inductor current (controlled by I ) is reached. The
TH
RS latch turns off the synchronous switch and energy
stored in the inductor is discharged through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle begins, or until the inductor current begins to
An important design consideration is that the R
DS(ON)
reverse (sensed by the I
comparator).
RCMP
of the P-channel switch increases with decreasing input
supply voltage (see Typical Performance Characteristics).
Therefore, theusershouldcalculatetheworst-casepower
dissipation when the LTC3419 is used at 100% duty cycle
with low input voltage (see Thermal Considerations in the
Applications Information section).
The peak inductor current is controlled by the internally
compensated I voltage, which is the output of the error
TH
amplifier.ThisamplifierregulatestheV pintotheinternal
FB
0.6V reference by adjusting the peak inductor current
accordingly.
Soft-Start
Light Load Operation
Inordertominimizetheinrushcurrentontheinputbypass
capacitor,theLTC3419slowlyrampsuptheoutputvoltage
duringstart-up. WhenevertheRUN1orRUN2pinispulled
high, the corresponding output will ramp from zero to
full-scale over a time period of approximately 750μs. This
prevents the LTC3419 from having to quickly charge the
output capacitor and thus supplying an excessive amount
of instantaneous current.
There are two modes to control the LTC3419 at light load
currents:BurstModeoperationandpulse-skippingmode.
Both automatically transition from continuous operation
to the selected mode when the load current is low.
Tooptimizeefficiency,BurstModeoperationcanbeselected
by grounding the MODE pin. When the load is relatively
light, the peak inductor current (as set by I ) remains
TH
fixedatapproximately60mAandthePMOSswitchoperates
intermittently based on load demand. By running cycles
periodically, the switching losses are minimized.
Short-Circuit Protection
When either regulator output is shorted to ground, the
corresponding internal N-channel switch is forced on for
a longer time period for each cycle in order to allow the
inductor to discharge, thus preventing inductor current
runaway. This technique has the effect of decreasing
switching frequency. Once the short is removed, normal
operation resumes and the regulator output will return to
The duration of each burst event can range from a few
cycles at light load to almost continuous cycling with
short sleep intervals at moderate loads. During the sleep
intervals, the load current is being supplied solely from
the output capacitor. As the output voltage droops, the
error amplifier output rises above the sleep threshold,
signaling the burst comparator to trip and turn the top
its nominal voltage.
3419fa
8
LTC3419
APPLICATIONS INFORMATION
AgeneralLTC3419applicationcircuitisshowninFigure1.
External component selection is driven by the load
requirement, and begins with the selection of the
inductor L. Once the inductor is chosen, C and C
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style
inductor to use often depends more on the price versus
sizerequirements,andanyradiatedfield/EMIrequirements,
than on what the LTC3419 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3419 applications.
IN
OUT
can be selected.
Inductor Selection
Although the inductor does not influence the operating
frequency, the inductor value has a direct effect on ripple
current. The inductor ripple current ΔI decreases with
L
Table 1. Representative Surface Mount Inductors
higher inductance and increases with higher V or V
:
IN
OUT
MANU-
MAX DC
FACTURER PART NUMBER VALUE CURRENT DCR HEIGHT
⎛
⎞
⎟
⎠
VOUT
fO •L
VOUT
Taiyo Yuden CB2016T2R2M
CB2012T2R2M
2.2μH
2.2μH
3.3μH
510mA
530mA
410mA
1.6mm
1.25mm
1.6mm
ΔIL =
• 1−
(1)
0.13Ω
0.33Ω
0.27Ω
⎜
V
⎝
IN
CB2016T3R3M
Panasonic
Sumida
Murata
ELT5KT4R7M
4.7μH
4.7μH
950mA
630mA
450mA
1.2mm
2mm
0.2Ω
0.086Ω
0.2Ω
Accepting larger values of ΔI allows the use of low
L
CDRH2D18/LD
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
40%ofthemaximumoutputloadcurrent.So,fora600mA
LQH32CN4R7M23 4.7μH
2mm
Taiyo Yuden NR30102R2M
NR30104R7M
2.2μH
4.7μH
1100mA
750mA
1mm
1mm
0.1Ω
0.19Ω
FDK
FDKMIPF2520D
FDKMIPF2520D
FDKMIPF2520D
4.7μH
3.3μH
2.2μH
1100mA
1200mA
1300mA
1mm
1mm
1mm
0.11Ω
0.1Ω
0.08Ω
regulator, ΔI = 240mA (40% of 600mA).
L
The inductor value will also have an effect on Burst Mode
operation. The transition to low current operation begins
when the peak inductor current falls below a level set by
the internal burst clamp. Lower inductor values result in
higher ripple current which causes the transition to occur
at lower load currents. This causes a dip in efficiency in
the upper range of low current operation. Furthermore,
lower inductance values will cause the bursts to occur
with increased frequency.
TDK
VLF3010AT4R7- 4.7μH
MR70
700mA
870mA
1000mA
1mm
1mm
1mm
0.28Ω
0.17Ω
0.12Ω
VLF3010AT3R3- 3.3μH
MR87
VLF3010AT2R2- 2.2μH
M1R0
Input Capacitor (C ) Selection
IN
In continuous mode, the input current of the converter is a
square wave with a duty cycle of approximately V /V .
Topreventlargevoltagetransients, alowequivalentseries
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
OUT IN
Inductor Core Selection
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
V
IN
2.5V TO 5.5V
VOUT(V − VOUT
)
IN
C1
IRMS ≈ IMAX
RUN2
V
RUN1
MODE
IN
V
IN
LTC3419
SW2
SW1
L2
L1
V
OUT2
V
OUT1
Where the maximum average output current I
equals
C
F2
C
F1
MAX
the peak current minus half the peak-to-peak ripple cur-
rent, I = I – ΔI /2. This formula has a maximum at
V
V
FB1
FB2
GND
MAX
LIM
L
R4
R2
C
OUT2
C
OUT1
R3
R1
V = 2V , where I = I /2. This simple worst-case
IN
OUT
RMS OUT
3419 F01
is commonly used to design because even significant
Figure 1. LTC3419 General Schematic
3419fa
9
LTC3419
APPLICATIONS INFORMATION
deviations do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
only2000hourslifetime.Thismakesitadvisabletofurther
deratethecapacitor,orchooseacapacitorratedatahigher
temperaturethanrequired.Severalcapacitorsmayalsobe
paralleled to meet the size or height requirements of the
design. An additional 0.1μF to 1μF ceramic capacitor is
However, care must be taken when ceramic capacitors are
used at the input. When a ceramic capacitor is used at the
input and the power is supplied by a wall adapter through
long wires, a load step at the output can induce ringing at
theinput, V . Atbest, thisringingcancoupletotheoutput
IN
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
also recommended on V for high frequency decoupling
cause a voltage spike at V , large enough to damage the
IN
IN
when not using an all-ceramic capacitor solution.
part. For more information, see Application Note 88.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Capacitor (C ) Selection
OUT
The selection of C
is driven by the required effective
OUT
seriesresistance(ESR).Typically,oncetheESRrequirement
for C has been met, the RMS current rating generally
OUT
farexceeds the I
requirement. Theoutput ripple
Setting the Output Voltage
RIPPLE(P-P)
ΔV
is determined by:
OUT
The LTC3419 regulates the V
and V
pins to 0.6V
FB1
FB2
during regulation. Thus, the output voltage is set by a
resistive divider according to the following formula:
⎛
⎞
⎟
⎠
1
ΔVOUT ≈ ΔI ESR+
⎜
L
8fOCOUT
⎝
R2
R1
⎛
⎞
VOUT = 0.6V 1+
(2)
wheref =operatingfrequency,C
=outputcapacitance
⎜
⎝
⎟
⎠
O
L
OUT
and ΔI = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
Keeping the current small (<10μA) in these resistors
maximizes efficiency, but making it too small may allow
stray capacitance to cause noise problems or reduce the
phase margin of the error amp loop.
voltage since ΔI increases with input voltage.
L
Iftantalumcapacitorsareused,itiscriticalthatthecapacitors
are surge tested for use in switching power supplies. An
excellent choice is the AVX TPS series of surface mount
tantalum.Thesearespeciallyconstructedandtestedforlow
ESR so they give the lowest ESR for a given volume. Other
capacitor types include Sanyo POSCAP, Kemet T510 and
T495 series, and Sprague 593D and 595D series. Consult
the manufacturer for other specific recommendations.
To improve the frequency response of the main control
loop, a feedback capacitor (C ) may also be used. Great
F
care should be taken to route the V line away from noise
FB
sources, such as the inductor or the SW line.
Fixed output versions of the LTC3419 (e.g. LTC3419-1)
include an internal resistive divider, eliminating the need
for external resistors. The resistor divider is chosen
Using Ceramic Input and Output Capacitors
such that the V input current is approximately 3μA. For
FB
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high
ripple current, high voltage rating and low ESR make
them ideal for switching regulator applications. Because
the LTC3419 control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
these versions the V pin should be connected directly
FB
to V . Table 2 lists the fixed output voltages available
OUT
for the LTC3419.
Table 2. Fixed Output Voltage Versions
PART NUMBER
LTC3419
V
V
OUT2
OUT1
Adjustable
1.575V
Adjustable
1.8V
LTC3419-1
3419fa
10
LTC3419
APPLICATIONS INFORMATION
Checking Transient Response
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
The regulator loop response can be checked by looking
at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
% Efficiency = 100% – (L1 + L2 + L3 + ...)
When a load step occurs, V
immediately shifts by an
OUT
amount equal to ΔI
series resistance of C . ΔI
• ESR, where ESR is the effective
LOAD
whereL1,L2,etc.,aretheindividuallossesasapercentage
of input power.
also begins to charge or
OUT LOAD
dischargeC
generatingafeedbackerrorsignalusedby
OUT
Although all dissipative elements in the circuit produce
losses, four sources usually account for the losses in
theregulatortoreturnV toitssteady-statevalue.During
this recovery time, V
or ringing that would indicate a stability problem.
OUT
can be monitored for overshoot
OUT
LTC3419 circuits: 1) V quiescent current, 2) switching
IN
2
losses, 3) I R losses, 4) other system losses.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine the
1. The V current is the DC supply current given in the
IN
Electrical Characteristics which excludes MOSFET
driver and control currents. V current results in a
IN
phase margin. In addition, feedback capacitors (C and
F1
small (<0.1%) loss that increases with V , even at
IN
C )canbeaddedtoimprovethehighfrequencyresponse,
F2
no load.
as shown in Figure 1. Capacitor C provides phase lead by
F
2. The switching current is the sum of the MOSFET driver
andcontrolcurrents.TheMOSFETdrivercurrentresults
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
creating a high frequency zero with R2 which improves
the phase margin.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
from V to ground. The resulting dQ/dt is a current
IN
out of V that is typically much larger than the DC bias
IN
current. In continuous mode, I
= f (Q + Q ),
GATECHG
O T B
where Q and Q are the gate charges of the internal top
Insomeapplications,amoreseveretransientcanbecaused
byswitchinginloadswithlarge(>1μF)inputcapacitors.The
discharged input capacitors are effectively put in parallel
T
B
and bottom MOSFET switches. The gate charge losses
are proportional to V and thus their effects will be
IN
more pronounced at higher supply voltages.
with C , causing a rapid drop in V . No regulator can
OUT
OUT
2
deliverenoughcurrenttopreventthisproblemiftheswitch
connectingtheloadhaslowresistanceandisdrivenquickly.
Thesolutionistolimittheturn-onspeedoftheloadswitch
driver. A Hot Swap™ controller is designed specifically for
this purpose and usually incorporates current limiting,
short-circuit protection, and soft-starting.
3. I R losses are calculated from the DC resistances
of the internal switches, R , and external inductor,
SW
R . In continuous mode, the average output current
L
flows through inductor L, but is “chopped” between
the internal top and bottom switches. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
and the duty cycle
DS(ON)
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
R
SW
= (R ) • (DC) + (R ) • (1– DC)
DS(ON)TOP DS(ON)BOT
Hot Swap is a trademark of Linear Technology Corporation.
3419fa
11
LTC3419
APPLICATIONS INFORMATION
TheR
forboththetopandbottomMOSFETscanbe
Given that the thermal resistance of a properly soldered
DFN package is approximately 40°C/W, the junction
temperature of an LTC3419 device operating in a 70°C
ambient temperature is approximately:
DS(ON)
obtained from the Typical Performance Characteristics
2
curves. Thus, to obtain I R losses:
2
2
I R losses = I
• (R + R )
SW L
OUT
T = (2 • 0.216W • 40°C/W) + 70°C = 87.3°C
J
4. Other “hidden” losses, such as copper trace and
internal battery resistances, can account for additional
efficiency degradations in portable systems. It is very
important to include these “system” level losses in
the design of a system. The internal battery and fuse
resistancelossescanbeminimizedbymakingsurethat
which is well below the absolute maximum junction
temperature of 125°C.
PC Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3419.Theseitemsarealsoillustratedgraphicallyinthe
layout diagrams of Figures 2 and 3. Check the following
in your layout:
C has adequate charge storage and very low ESR at
IN
the switching frequency. Other losses, including diode
conduction losses during dead-time, and inductor
core losses, generally account for less than 2% total
additional loss.
1. Does the capacitor C connect to the power V (Pin 5)
IN
IN
and GND (Pin 9) as closely as possible? This capacitor
provides the AC current of the internal power MOSFETs
and their drivers.
Thermal Considerations
In a majority of applications, the LTC3419 does not
dissipate much heat due to its high efficiency. In the
unlikely event that the junction temperature somehow
reachesapproximately150°C,bothpowerswitcheswillbe
turned off and the SW node will become high impedance.
The goal of the following thermal analysis is to determine
whetherthepowerdissipatedcausesenoughtemperature
risetoexceedthemaximumjunctiontemperature(125°C)
of the part. The temperature rise is given by:
2. Are the respective C
and L closely connected? The
OUT
(–) plate of C
returns current to GND and the (–)
OUT
plate of C .
IN
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of C and a ground sense line
OUT1
terminatednearGND(Pin9). ThefeedbacksignalsV
FB1
andV shouldberoutedawayfromnoisycomponents
FB2
and traces, such as the SW lines (Pins 4 and 6), and
their trace length should be minimized.
T
= P • θ
D JA
RISE
Where P is the power dissipated by the regulator and
D
4. Keep sensitive components away from the SW pins, if
θ
is the thermal resistance from the junction of the die
to the ambient temperature. The junction temperature,
T , is given by:
JA
possible. The input capacitor C and the resistors R1,
IN
R2, R3 and R4 should be routed away from the SW
J
traces and the inductors.
T = T
J
+ T
AMBIENT
RISE
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at a single
point. These ground traces should not share the high
As a worst-case example, consider the case when the
LTC3419isindropoutonbothchannelsataninputvoltage
of 2.7V with a load current of 600mA and an ambient
temperature of 70°C. From the Typical Performance
current path of C or C
.
IN
OUT
Characteristics graph of Switch Resistance, the R
DS(ON)
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of power components. These copper areas should be
of the main switch is 0.6Ω. Therefore, power dissipated
by each channel is:
2
P = I
D
• R
= 216mV
DS(ON)
OUT
connected to V or GND.
IN
3419fa
12
LTC3419
APPLICATIONS INFORMATION
V
IN
2.5V TO 5.5V
C1
RUN2
V
RUN1
MODE
IN
LTC3419
SW2
SW1
L2
L1
V
OUT2
V
OUT1
C
C
F1
F2
V
V
FB1
FB2
GND
R4
R2
C
OUT2
C
OUT1
R3
R1
3419 F02
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 2. LTC3419 Layout Diagram (See Board Layout Checklist)
C
C
F2
F1
R2
R1
R3
R4
V
V
OUT2
OUT1
C
OUT1
C
OUT2
VIA TO V
IN
V
V
FB2
FB1
L1
L2
RUN1
MODE
SW1
RUN2
SW2
V
IN
VIA TO GND
GND
C
IN
3419 F03
Figure 3. LTC3419 Suggested Layout
Design Example
A 10μF ceramic capacitor should be more than sufficient
for this output capacitor. As for the input capacitor, a
As a design example, consider using the LTC3419 in a
portable application with a Li-Ion battery. The battery
typical value of C = 10μF should suffice, as the source
IN
impedance of a Li-Ion battery is very low.
provides a V ranging from 2.8V to 4.2V. The load on
IN
each channel requires a maximum of 600mA in active
The feedback resistors program the output voltage. To
maintain high efficiency at light loads, the current in these
resistors should be kept small. Choosing 10μA with the
0.6V feedback voltage makes R1~60k. A close standard
1% resistor is 59k. Using Equation 2.
mode and 2mA in standby mode. The output voltages are
V
OUT1
= 2.5V and V
= 1.8V.
OUT2
Start with channel 1. First, calculate the inductor value
for about 40% ripple current (240mA in this example) at
maximum V . Using a derivation of Equation 1:
V
0.6
⎛
⎞
IN
OUT
R2 =
− 1 •R1= 187k
⎜
⎝
⎟
⎠
2.5V
2.5V
4.2V
⎛
⎞
L1=
• 1−
= 1.87μH
⎜
⎝
⎟
⎠
2.25MHz •(240mA)
An optional 22pF feedback capacitor (C ) may be used
F1
to improve transient response.
For the inductor, use the closest standard value of
2.2μH.
3419fa
13
LTC3419
APPLICATIONS INFORMATION
100
90
80
70
60
50
40
30
20
10
0
Using the same analysis for channel 2 (V
= 1.8V),
OUT2
the results are:
L2 = 1.9μH
R3 = 59k
R4 = 118k
V
V
V
= 2.7V
= 3.6V
= 4.2V
C
= 22pF
IN
IN
IN
F2
V
= 1.8V
1
OUT
Figure 4 shows the complete schematic for this example,
along with the efficiency curve and transient response.
0.1
10
100
1000
OUTPUT CURRENT (mA)
100
90
80
70
60
50
40
30
20
10
0
V
IN
2.5V TO 5.5V
C1
10μF
RUN2
V
RUN1
MODE
IN
L2
2.2μH
L1
LTC3419
SW2
SW1
2.2μH
V
V
OUT1
OUT2
1.8V AT
600mA
2.5V AT
600mA
C
, 22pF
C , 22pF
F1
F2
V
FB2
V
FB1
C
R4
GND
R2
187k
C
R3
59k
R1
59k
V
V
V
= 2.7V
= 3.6V
= 4.2V
OUT2
OUT1
10μF
IN
IN
IN
10μF
118k
V
OUT
= 2.5V
1
3419 F04a
0.1
10
100
1000
OUTPUT CURRENT (mA)
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
L1, L2: TDK VLF3010AT2R2M1RD
3419 F04b
Figure 4a. Design Example Circuit
Figure 4b. Efficiency vs Output Current
Transient Response
Load Step
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3419 F04c1
3419 F04c2
20μs/DIV
20μs/DIV
V
V
LOAD
= 3.6V
V
= 3.6V
IN
IN
= 1.8V
V
= 2.5V
OUT
OUT
I
= 40mA TO 600mA
I
= 40mA TO 600mA
LOAD
Figure 4c. Transient Response
3419fa
14
LTC3419
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115
0.38 0.10
8
TYP
5
0.675 0.05
3.5 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
3.00 0.10 1.65 0.10
PACKAGE
OUTLINE
(4 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD) DFN 1203
4
1
0.25 0.05
0.75 0.05
0.200 REF
0.25 0.05
0.50 BSC
0.50
BSC
2.38 0.05
(2 SIDES)
2.38 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 0.127
(.035 .005)
3.00 0.102
(.118 .004)
(NOTE 3)
0.497 0.076
(.0196 .003)
REF
10 9
8
7 6
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .006)
0.50
(.0197)
BSC
0.305 0.038
(.0120 .0015)
TYP
1
2
3
4 5
RECOMMENDED SOLDER PAD LAYOUT
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0° – 6° TYP
DETAIL “A”
0.254
(.010)
0.18
(.007)
GAUGE PLANE
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 0.0508
(.004 .002)
0.53 0.152
(.021 .006)
0.50
(.0197)
BSC
MSOP (MS) 0307 REV E
NOTE:
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE
0.102mm (.004") MAX
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
3419fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresentation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3419
TYPICAL APPLICATIONS
Dual 600mA Buck Converter
1.8V/1.575V Dual 600mA Buck Converter
V
V
IN
2.5V TO 5.5V
IN
2.5V TO 5.5V
C1
C1
10μF
10μF
RUN2
V
RUN1
MODE
RUN2
V
RUN1
MODE
IN
IN
L2
3.3μH
L1
3.3μH
L2
3.3μH
L1
LTC3419
SW2
SW1
LTC3419-1
SW2
SW1
3.3μH
V
V
V
V
OUT1
OUT2
1.8V AT
600mA
OUT1
OUT2
2.5V AT
600mA
1.575V AT
600mA
1.8V AT
600mA
C
F2
, 22pF
C
, 22pF
F1
V
V
V
FB2
V
FB1
FB2
FB1
C
GND
C
C
GND
C
R4
118k
R3
59k
R1
R2
OUT2
10μF
OUT1
10μF
OUT2
10μF
OUT1
10μF
59k 187k
3419 TA02
3419 TA03
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
L1, L2: TDK VLF3010AT3R3M1RD
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
L1, L2: TDK VLF3010AT3R3M1RD
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3405/LTC3405A
300mA I , 1.5MHz, Synchronous
95% Efficiency, V
= 2.5V, V
= 2.5V, V
= 2.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 0.8V, I = 20μA, I = <1μA,
Q SD
OUT
IN(MIN)
IN(MAX)
IN(MAX)
IN(MAX)
OUT(MIN)
OUT(MIN)
OUT(MIN)
Step-Down DC/DC Converters
ThinSOTTM Package
LTC3406/LTC3406B
600mA I , 1.5MHz, Synchronous
96% Efficiency, V
ThinSOT Package
= 0.6V, I = 20μA, I = <1μA,
Q SD
OUT
IN(MIN)
Step-Down DC/DC Converters
LTC3407/LTC3407-2 Dual 600mA/800mA I , 1.5MHz/
95% Efficiency, V
= 0.6V, I = 40μA, I = <1μA,
Q SD
OUT
IN(MIN)
2.25MHz, Synchronous Step-Down
DC/DC Converters
MS10E and DFN Packages
LTC3409
600mA I , 1.7MHz/2.6MHz,
96% Efficiency, V
DFN Package
= 1.6V, V
= 5.5V, V
= 0.6V, I = 65μA, I = <1μA,
OUT(MIN) Q SD
OUT
IN(MIN)
IN(MAX)
Synchronous Step-Down DC/DC
Converter
LTC3410/LTC3410B
LTC3411
300mA I , 2.25MHz, Synchronous
95% Efficiency, V
SC70 Package
= 2.5V, V
= 2.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 5.5V, V
= 0.8V, I = 26μA, I = <1μA,
Q SD
OUT
IN(MIN)
IN(MAX)
IN(MAX)
IN(MAX)
IN(MAX)
IN(MAX)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
Step-Down DC/DC Converters
1.25A I , 4MHz, Synchronous
95% Efficiency, V
= 0.8V, I = 60μA, I = <1μA,
Q SD
OUT
IN(MIN)
Step-Down DC/DC Converter
MS10 and DFN Packages
LTC3412
2.5A I
4MHz, Synchronous
95% Efficiency, V
= 2.5V, V
= 0.8V, I = 60μA, I = <1μA,
Q SD
OUT
IN(MIN)
Step-Down DC/DC Converter
TSSOP-16E Package
LTC3441/LTC3442,
LTC3443
1.2A I 2MHz, Synchronous
95% Efficiency, V
SD
= 2.4V, V
: 2.4V to 5.25V, I = 50μA,
Q
OUT
IN(MIN)
Buck-Boost DC/DC Converters
I
= <1μA, DFN Package
LTC3531/LTC3531-3/ 200mA I , 1.5MHz, Synchronous
LTC3531-3.3
95% Efficiency, V
= 1.8V, V
: 2V to 5V, I = 16μA,
Q
OUT
IN(MIN)
Buck-Boost DC/DC Converter
I
= <1μA, ThinSOT and DFN Packages
SD
LTC3532
500mA I , 2MHz, Synchronous
95% Efficiency, V
SD
= 2.4V, V
: 2.4V to 5.25V, I = 35μA,
Q
OUT
IN(MIN)
IN(MAX)
Buck-Boost DC/DC Converter
I
= <1μA, MS10 and DFN Packages
LTC3547/LTC3547B
Dual 300mA I , 2.25MHz,
95% Efficiency, V
DFN-8 Package
= 2.5V, V
: 0.6V, I = 40μA, I = <1μA,
Q SD
OUT
IN(MIN)
IN(MAX)
Synchronous Step-Down DC/DC
Converters
LTC3548/LTC3548-1/ Dual 400mA and 800mA I
,
95% Efficiency, V
= 2.5V, V
= 5.5V, V
= 5.5V, V
: 0.6V, I = 40μA, I = <1μA,
Q SD
OUT
IN(MIN)
IN(MAX)
IN(MAX)
OUT(MIN)
LTC3548-2
2.25MHz, Synchronous Step-Down
DC/DC Converters
MS10E and DFN Packages
LTC3561
1.25A I , 4MHz, Synchronous
95% Efficiency, V
DFN Package
= 2.5V, V
: 0.8V, I = 240μA, I = <1μA,
OUT(MIN) Q SD
OUT
IN(MIN)
Step-Down DC/DC Converter
ThinSOT™ is a trademark of Linear Technology Corporation.
3419fa
LT 0309 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
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© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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