LTM4603HVIV-PBF_技术文档

LTM4603HV

6A, 28V DC/DC µModule

IN

with PLL, Output Tracking

and Margining

U

DESCRIPTIO

FEATURES

TheLTM^®4603HVisacomplete6Astep-downswitchmode

DC/DC power supply with onboard switching controller,

MOSFETs, inductor and all support components. The

μModule^TMis housed in a small surface mount 15mm ×

15mm × 2.8mm LGA package. Operating over an input

voltage range of 4.5 to 28V, the LTM4603HV supports an

outputvoltagerangeof0.6Vto5Vaswellasoutputvoltage

tracking and margining. The high efﬁciency design deliv-

ers 6A continuous current (8A peak). Only bulk input and

output capacitors are needed to complete the design.

■

Complete Switch Mode Power Supply

■

Wide Input Voltage Range: 4.5V to 28V

■

6A DC Typical, 8A Peak Output Current

■

0.6V to 5V Output Voltage

■

Output Voltage Tracking and Margining

■

Remote Sensing for Precision Regulation

■

Typical Operating Frequency: 1MHz

■

PLL Frequency Synchronization

■

1.5% Regulation

■

Current Foldback Protection (Disabled at Start-Up)

■

Pin Compatible with the LTM4601/LTM4601HV/

The low proﬁle (2.8mm) and light weight (1.7g) package

easily mounts on the unused space on the back side of

PC boards for high density point of load regulation. The

μModule can be synchronized with an external clock for

reducing undesirable frequency harmonics and allows

PolyPhase^®operation for high load currents.

LTM4603

■

Ultrafast Transient Response

■

Current Mode Control

■

Up to 93% Efﬁciency at 5V , 3.3V

IN

OUT

■

Programmable Soft-Start

Output Overvoltage Protection

A high switching frequency and adaptive on-time current

mode architecture deliver a very fast transient response

to line and load changes without sacriﬁcing stability. An

onboard remote sense ampliﬁer can be used to accurately

regulate an output voltage independent of load current.

Pb-Free (e4) RoHS Compliant Package with Gold

Finish Pads

■

Small Footprint, Low Proﬁle (15mm × 15mm ×

^{2.8mm) Surface}U^{Mount LGA Package}

APPLICATIO S

, LT, LTC, LTM and PolyPhase are registered trademarks of Linear Technology

Corporation. μModule is a trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

■

Telecom and Networking Equipment

■

Servers

■

Industrial Equipment

Point of Load Regulation

■

U

TYPICAL APPLICATIO

2.5V/6A with 4.5V to 28V Input μModule Regulator

CLOCK SYNC

Efﬁciency vs Load Current with 24V_IN

100

V

IN

4.5V TO 28V

TRACK/SS CONTROL

90

80

70

60

V

IN

PLLIN TRACK/SS

V

2.5V

6A

OUT

PGOOD

V

OUT

100pF

V

FB

ON/OFF

RUN

COMP

INTV

MARG0

MARG1

V

OUT_LCL

MARGIN

CONTROL

C

OUT

LTM4603HV

C

IN

CC

19.1k

DRV

DIFFV

V

24V , 1.8V

IN

CC

OUT

+

OUT

24V , 2.5V

IN

MPGM

SGND PGND

50

40

OSNS

24V , 3.3V

–

IN

V

OSNS

24V , 5V

IN

OUT

392k

f

SET

0

1

2

3

4

5

6

7

5% MARGIN

LOAD CURRENT (A)

4603HV TA01a

4603HV G03

4603hvf

1

LTM4603HV

W W U W

ABSOLUTE AXI U RATI GS

PIN CONFIGURATION

(Note 1)

TOP VIEW

INTV , DRV , V

, V

(V

≤ 3.3V

CC

CC OUT_LCL OUT OUT

with Remote Sense Amp) ............................ –0.3V to 6V

PLLIN, TRACK/SS, MPGM, MARG0, MARG1,

PGOOD.......................................–0.3V to INTV + 0.3V

CC

V

f

IN

SET

RUN ............................................................. –0.3V to 5V

MARG0

MARG1

DRV

V , COMP................................................ –0.3V to 2.7V

FB

CC

V ............................................................. –0.3V to 28V

IN

V

FB

+

–

PGND

V

OSNS

, V

..................................0V to INTV – 1V

OSNS CC

PGOOD

SGND

+

Operating Temperature Range (Note 2) ... –40°C to 85°C

Junction Temperature ........................................... 125°C

Storage Temperature Range................... –55°C to 125°C

V

OSNS

DIFFV

V

OUT

V

OUT

OUT_LCL

–

OSNS

LGA PACKAGE

118-LEAD (15mm 15mm 2.8mm)

T

= 125°C, θ = 15°C/W, θ = 6°C/W θ DERIVED FROM 95mm × 76mm PCB WITH 4

JMAX

JA

JC

JA

LAYERS, WEIGHT = 1.7g

ORDER INFORMATION

LEAD FREE FINISH

LTM4603HVEV#PBF

LTM4603HVIV#PBF

PART MARKING*

LTM4603HVV

PACKAGE DESCRIPTION

TEMPERATURE RANGE

118-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 85°C

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

This product is only offered in trays. For more information go to: http://linear.com/packaging/

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range, otherwise speciﬁcations are at T_A= 25°C, V_IN= 12V. Per typical application (front page) conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

●

V

Input DC Voltage

Output Voltage

4.5

28

V

IN(DC)

V

C

= 10μF ×2, C

= 2×, 100μF/X5R/

OUT(DC)

IN

OUT

Ceramic

●

V

= 5V, V

= 1.5V, I = 0A

OUT

1.478

1.5

1.522

V

IN

OUT

= 12V, V

= 1.5V, I

= 0A

OUT

Input Speciﬁcations

V

Undervoltage Lockout Threshold

Input Inrush Current at Startup

I

= 0A

3.2

4

V

IN(UVLO)

OUT

I

= 0A. V

= 1.5V

INRUSH(VIN)

OUT

V

= 5V

= 12V

0.6

0.7

A

IN

V

I

Input Supply Bias Current

V

= 12V, V

= 1.5V, No Switching

= 1.5V, Switching

3.8

25

mA

Q(VIN,NOLOAD)

IN

OUT

Continuous

V

= 5V, V

= 1.5V, No Switching

= 1.5V, Switching

2.5

43

mA

IN

OUT

Continuous

Shutdown, RUN = 0, V = 12V

22

μA

IN

4603hvf

2

LTM4603HV

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range, otherwise speciﬁcations are at T_A= 25°C, V_IN= 12V. Per typical application (front page) conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I

Input Supply Current

V

IN

V

IN

V

IN

= 12V, V

= 1.5V, I

= 3.3V, I

= 6A

0.85

1.78

2.034

A

S(VIN)

OUT

= 5V, V

= 1.5V, I

= 6A

OUT

INTV

V

= 12V, RUN > 2V

IN

No Load

4.7

0

5

5.3

6

V

CC

Output Speciﬁcations

I

Output Continuous Current Range

(See Output Current Derating Curves

for Different V , V

V

= 12V, V

= 1.5V

OUT

A

OUTDC

IN

and T )

A

IN OUT

●

ΔV

Line Regulation Accuracy

Load Regulation Accuracy

Output Ripple Voltage

V

= 1.5V, I

= 0A, V = 4.5V to 28V

0.3

%

OUT(LINE)

OUT

IN

V

OUT

OUT(LOAD)

= 0A to 6A, V = 12V

0.25

IN

V

OUT

OUT(AC)

V

I

= 0A, C

= 2×, 100μF/X5R/Ceramic

OUT

V

IN

V

IN

= 12V, V

= 1.5V

10

mV

OUT

P-P

= 5V, V

OUT

f

Output Ripple Voltage Frequency

I

= 3A, V = 12V, V = 1.5V

OUT

1000

kHz

S

OUT

IN

ΔV

Turn-On Overshoot,

TRACK/SS = 10nF

C

V

= 2×, 100μF/X5R/Ceramic,

OUT(START)

OUT

= 1.5V, I

= 12V

= 5V

= 0A

OUT

V

IN

V

IN

20

mV

t

Turn-On Time, TRACK/SS = Open

Peak Deviation for Dynamic Load

C

V

= 2×, 100μF/X5R/Ceramic,

START

OUT

= 1.5V, I

= 12V

= 5V

= 1A Resisitive Load

OUT

V

IN

V

IN

0.5

0.7

ms

ΔV

Load: 0% to 50% to 0% of Full Load,

= 2 × 22μF/Ceramic, 470μF, 4V

OUTLS

C

OUT

Sanyo POSCAP

V

IN

V

IN

= 12V

= 5V

35

mV

t

I

Settling Time for Dynamic Load Step Load: 0% to 50% to 10% of Full Load

SETTLE

V

= 12V

25

μs

IN

Output Current Limit

C

= 2×, 100μF/X5R/Ceramic

OUTPK

OUT

V

IN

V

IN

= 12V, V

= 1.5V

8

A

OUT

= 5V, V

= 1.5V

OUT

Remote Sense Amp (Note 3)

+

–

V

, V

Common Mode Input Voltage Range

V

= 12V, RUN > 2V

0

INTV – 1

V

OSNS

IN

CC

CM Range

DIFFV

Range

Output Voltage Range

Input Offset Voltage Magnitude

Differential Gain

= 12V, DIFFV

Load = 100k

INTV

CC

V

mV

OUT

IN

OUT

V

OS

1.25

AV

1

3

V/V

MHz

V/μs

kΩ

GBP

SR

Gain Bandwidth Product

Slew Rate

2

+

R

Input Resistance

V

OSNS

to GND

20

100

IN

CMRR

Common Mode Rejection Ratio

dB

4603hvf

3

LTM4603HV

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range, otherwise speciﬁcations are at T_A= 25°C, V_IN= 12V. Per typical application (front page) conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Control Stage

●

V

Error Ampliﬁer Input Voltage

Accuracy

I

= 0A, V = 1.5V

OUT

0.594

0.6

0.606

V

FB

OUT

V

RUN Pin On/Off Threshold

Soft-Start Charging Current

Minimum On Time

1

1.5

–1.5

50

1.9

–2

V

μA

ns

RUN

I

t

V

= 0V

–1

SS/TRACK

ON(MIN)

OFF(MIN)

SS/TRACK

(Note 4)

100

400

Minimum Off Time

250

50

ns

R

PLLIN Input Resistance

kΩ

mA

PLLIN

I

Current into DRV Pin

V

OUT

= 1.5V, I = 1A,

OUT

18

25

DRVCC

CC

Frequency = 1MHz, DRV = 5V

CC

R

Resistor Between V

and V

FB

60.098

60.4

1.18

1.4

60.702

kΩ

V

FBHI

OUT_LCL

V

Margin Reference Voltage

MPGM

, V

MARG0, MARG1 Voltage Thresholds

V

MARG0 MARG1

PGOOD Output

ΔV

PGOOD Upper Threshold

PGOOD Lower Threshold

PGOOD Hysteresis

V

Rising

7

10

–10

1.5

13

–13

3

%

V

FBH

FB

Falling

–7

FBL

FB

Returning

FB(HYS)

FB

V

PGL

PGOOD Low Voltage

I

= 5mA

0.15

0.4

PGOOD

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTM4603HVEV is guaranteed to meet performance

speciﬁcations from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C

operating temperature range are assured by design, characterization

and correlation with statistical process controls. The LTM4603HVIV is

guaranteed over the –40°C to 85°C temperature range.

Note 3: Remote sense ampliﬁer recommended for ≤3.3V output.

Note 4: 100% tested at die level only.

4603hvf

4

LTM4603HV

U W

TYPICAL PERFOR A CE CHARACTERISTICS ^{(See Figure 20 for all curves)}

Efﬁciency vs Load Current

with 24V_IN

Efﬁciency vs Load Current

with 5V_IN

Efﬁciency vs Load Current

with 12V_IN

100

90

80

70

60

50

40

100

90

80

70

60

50

40

100

90

80

70

12V , 1.2V

5V , 0.6V

IN

OUT

IN

OUT

60

50

40

12V , 1.5V

IN

5V , 1.2V

IN

12V , 1.8V

IN

24V , 1.8V

5V , 1.5V

IN

OUT

12V , 2.5V

IN

24V , 2.5V

IN

5V , 1.8V

IN

12V , 3.3V

24V , 3.3V

5V , 2.5V

IN

12V , 5V

24V , 5V

5V , 3.3V

IN

OUT

IN

OUT

0

2

3

4

5

6

7

0

2

3

4

5

6

7

1

4

6

7

0

1

2

3

5

LOAD CURRENT (A)

4603HV G02

4603HV G01

4603HV G03

1.2V Transient Response

1.5V Transient Response

1.8V Transient Response

LOAD STEP

1A/DIV

LOAD STEP

1A/DIV

LOAD STEP

1A/DIV

V

OUT

50mV/DIV

4603HV G06

4603HV G04

4603HV G05

25μs/DIV

1.8V AT 3A/μs LOAD STEP

1.2V AT 3A/μs LOAD STEP

1.5V AT 3A/μs LOAD STEP

C

: 1x 22μF, 6.3V CERAMIC

C

: 1x 22μF, 6.3V CERAMIC

C

: 1x 22μF, 6.3V CERAMIC

OUT

1x 330μF, 4V SANYO POSCAP

2.5V Transient Response

3.3V Transient Response

LOAD STEP

1A/DIV

LOAD STEP

1A/DIV

V

OUT

50mV/DIV

4603HV G08

4603HV G07

25μs/DIV

3.3V AT 3A/μs LOAD STEP

2.5V AT 3A/μs LOAD STEP

C

: 1x 22μF, 6.3V CERAMIC

C

: 1x 22μF, 6.3V CERAMIC

OUT

1x 330μF, 4V SANYO POSCAP

4603hvf

5

LTM4603HV

U W

TYPICAL PERFOR A CE CHARACTERISTICS ^{(See Figure 20 for all curves)}

Start-Up, I_OUT= 6A

(Resistive Load)

Short-Circuit Protection,

_OUT= 0A

Start-Up, I_OUT= 0A

I

V

OUT

0.5V/DIV

V

OUT

0.5V/DIV

I

IN

I

0.5A/DIV

IN

I

IN

2A/DIV

0.5A/DIV

4603HV G09

4603HV G10

4603HV G11

1ms/DIV

100μs/DIV

V

C

= 12V

OUT

V

C

= 12V

IN

OUT

V

= 12V

OUT

IN

= 1.5V

V

= 1.5V

= 1x 22μF, 6.3V CERAMIC

1x 330μF, 4V SANYO POSCAP

SOFT-START = 3.9nF

= 1x 22μF, 6.3V CERAMIC

1x 330μF, 4V SANYO POSCAP

SOFT-START = 3.9nF

C

= 1x 22μF, 6.3V CERAMIC

1x 330μF, 4V SANYO POSCAP

SOFT-START = 3.9nF

Short-Circuit Protection,

I_OUT= 6A

V_INto V_OUTStep-Down Ratio

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

3.3V OUTPUT WITH

82.5k FROM V

OUT

TO f

SET

V

OUT

5V OUTPUT WITH

150k RESISTOR

0.5V/DIV

ADDED FROM f

TO GND

SET

5V OUTPUT WITH

NO RESISTOR ADDED

I

IN

FROM f

TO GND

SET

2A/DIV

2.5V OUTPUT

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

4603 G12

100μs/DIV

V

C

= 12V

OUT

IN

= 1.5V

= 1x 22μF, 6.3V CERAMIC

1x 330μF, 4V SANYO POSCAP

0

4

8

12

16

20

24

28

SOFT-START = 3.9nF

INPUT VOLTAGE (V)

4603HV G13

4603hvf

6

LTM4603HV

U

PI FU CTIO S

(See Package Description for Pin Assignment)

V (Bank 1): Power Input Pins. Apply input voltage be-

SGND with a 50k resistor. Apply a clock above 2V and

IN

tween these pins and PGND pins. Recommend placing

below INTV . See Applications Information.

CC

input decoupling capacitance directly between V pins

IN

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is conﬁgured as a master

output, then a soft-start capacitor is placed on this pin

to ground to control the master ramp rate. A soft-start

capacitor can be used for soft-start turn on as a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to the ground,

and connecting the center point of the divider to this pin.

See Applications Information.

and PGND pins.

V

(Bank 3): Power Output Pins. Apply output load

OUT

between these pins and PGND pins. Recommend placing

outputdecouplingcapacitancedirectlybetweenthesepins

and PGND pins. Review the ﬁgure below.

PGND (Bank 2): Power ground pins for both input and

output returns.

–

V

OSNS

(PinM12):(–)InputtotheRemoteSenseAmpliﬁer.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10kΩ will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See Applications Information. To parallel

LTM4603HVs, eachrequiresanindividualMPGMresistor.

Do not tie MPGM pins together.

This pin connects to the ground remote sense point. The

remote sense ampliﬁer is used for V

≤3.3V.

OUT

+

V

(PinJ12):(+)InputtotheRemoteSenseAmpliﬁer.

OSNS

This pin connects to the output remote sense point. The

remote sense ampliﬁer is used for V ≤3.3V.

OUT

DIFFV

(Pin K12): Output of the Remote Sense Ampli-

OUT

ﬁer. This pin connects to the V

pin.

OUT_LCL

f

(Pin B12): Frequency Set Internally to 1MHz. An

SET

external resistor can be placed from this pin to ground

to increase frequency. This pin can be decoupled with a

1000pF capacitor. See Applications Information for fre-

quency adjustment.

DRV (Pin E12): This pin normally connects to INTV

CC

for powering the internal MOSFET drivers. This pin can

be biased up to 6V from an external supply with about

50mA capability, or an external circuit shown in Figure

16. This improves efﬁciency at the higher input voltages

by reducing power dissipation in the modules.

V

(Pin F12): The Negative Input of the Error Ampli-

FB

ﬁer. Internally, this pin is connected to V

with a

OUT_LCL

60.4k precision resistor. Different output voltages can be

programmed with an additional resistor between V and

INTV (Pin A7): This pin is for additional decoupling of

CC

FB

the 5V internal regulator.

SGND pins. See Applications Information.

PLLIN (Pin A8): External Clock Synchronization Input to

the Phase Detector. This pin is internally terminated to

TOP VIEW

A

B

C

D

E

V

IN

f

SET

BANK 1

MARG0

MARG1

DRV

CC

PGND

BANK 2

F

V

FB

G

H

J

PGOOD

SGND

+

V

OSNS

K

L

M

DIFFV

V

OUT

BANK 3

V

OUT_LCL

–

OSNS

1

2 3 4 5 6 7 8 9 10 11 12

4603hvf

7

LTM4603HV

U

PI FU CTIO S

(See Package Description for Pin Assignment)

MARG0 (Pin C12): This pin is the LSB logic input for the

margining function. Together with the MARG1 pin will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See Applications Information.

ranges from 0V to 2.4V with 0.7V corresponding to zero

sense voltage (zero current).

PGOOD (Pin G12): Output Voltage Power Good Indicator.

Open-drain logic output that is pulled to ground when the

output voltage is not within 10% of the regulation point,

after a 25μs power bad mask timer expires.

MARG1 (Pin D12): This pin is the MSB logic input for the

margining function. Together with the MARG0 pin will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See Applications Information.

RUN (Pin A10): Run Control Pin. A voltage above 1.9V

will turn on the module, and when below 1.9V, will turn

off the module. A programmable UVLO function can be

accomplished with a resistor from V to this pin that has

IN

SGND (Pin H12): Signal Ground. This pin connects to

PGND at output capacitor point.

a 5.1V zener to ground. Maximum pin voltage is 5V.

V

(Pin L12): V

connects directly to this pin to

OUT_LCL

OUT

COMP (Pin A11): Current Control Threshold and Error

Ampliﬁer Compensation Point. The current comparator

threshold increases with this control voltage. The voltage

bypass the remote sense ampliﬁer, or DIFFV

connects

OUT

to this pin when remote sense ampliﬁer is used.

W

SI PLIFIED BLOCK DIAGRA

V

1M

OUT_LCL

V

OUT

>2V = ON

<0.9V = OFF

MAX = 5V

RUN

PGOOD

COMP

V

IN

4.5V TO 28V

+

5.1V

ZENER

1.5μF

C

IN

60.4k

INTERNAL

COMP

POWER CONTROL

Q1

Q2

SGND

V

2.5V

6A

OUT

MARG1

MARG0

22μF

V

FB

50k 50k

+

f

SET

R

FB

19.1k

C

OUT

33.2k

PGND

MPGM

TRACK/SS

PLLIN

INTV

CC

10k

C

SS

–

10k

V

OSNS

50k

–

+

10k

INTV

CC

OSNS

DRV

4.7μF

CC

10k

DIFFV

OUT

4603HV F01

Figure 1. Simpliﬁed LTM4603HV Block Diagram

4603hvf

8

LTM4603HV

U

W U

DECOUPLI G REQUIRE E TS

T_A= 25°C, V_IN= 12V. Use Figure 1 conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

C

External Input Capacitor Requirement

I

= 6A

20

μF

IN

OUT

(V = 4.5V to 28V, V

= 2.5V)

IN

OUT

C

External Output Capacitor Requirement

I

= 6A

100

200

μF

OUT

(V = 4.5V to 28V, V

= 2.5V)

IN

OUT

U

OPERATIO

Power Module Description

and bottom FET Q2 is turned on and held on until the

overvoltage condition clears.

The LTM4603HV is a standalone nonisolated switching

mode DC/DC power supply. It can deliver up to 6A of DC

output current with few external input and output capaci-

tors.Thismoduleprovidespreciselyregulatedoutputvolt-

Pulling the RUN pin below 1V forces the controller into its

shutdown state, turning off both Q1 and Q2. At low load

current, the module works in continuous current mode by

default to achieve minimum output voltage ripple.

ageprogrammableviaoneexternalresistorfrom0.6V to

DC

5.0V over a 4.5V to 28V wide input voltage. The typical

DC

When DRV pin is connected to INTV an integrated

CC

application schematic is shown in Figure 20.

5V linear regulator powers the internal gate drivers. If a

The LTM4603HV has an integrated constant on-time

current mode regulator, ultralow R

5V external bias supply is applied on the DRV pin, then

CC

FETs with fast

an efﬁciency improvement will occur due to the reduced

powerlossintheinternallinearregulator.Thisisespecially

true at the higher input voltage range.

DS(ON)

switching speed and integrated Schottky diodes. The typi-

cal switching frequency is 1MHz at full load. With current

mode control and internal feedback loop compensation,

the LTM4603HV module has sufﬁcient stability margins

and good transient performance under a wide range of

operating conditions and with a wide range of output

capacitors, even all ceramic output capacitors.

The LTM4603HV has a very accurate differential remote

sense ampliﬁer with very low offset. This provides for

very accurate remote sense voltage measurement. The

MPGM pin, MARG0 pin and MARG1 pin are used to sup-

port voltage margining, where the percentage of margin

is programmed by the MPGM pin, and the MARG0 and

MARG1 select margining.

Currentmodecontrolprovidescycle-by-cyclefastcurrent

limit. Besides, foldback current limiting is provided in an

overcurrentconditionwhileV drops.Internalovervoltage

andundervoltagecomparatorspulltheopen-drainPGOOD

output low if the output feedback voltage exits a 10%

window around the regulation point. Furthermore, in an

overvoltage condition, internal top FET Q1 is turned off

FB

The PLLIN pin provides frequency synchronization of the

device to an external clock. The TRACK/SS pin is used for

power supply tracking and soft-start programming.

4603hvf

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The typical LTM4603HV application circuit is shown in

Figure 20. External component selection is primarily

determined by the maximum load current and output

voltage. Refer to Table 2 for speciﬁc external capacitor

requirements for a particular application.

where%V isthepercentageofV youwanttomargin,

OUT

and V

is the margin quantity in volts:

OUT(MARGIN)

V_OUT

1.18V

•10k

R_PGM

=

•

0.6V V_OUT(MARGIN)

where R

is the resistor value to place on the MPGM

PGM

pin to ground.

V to V

Step-Down Ratios

IN

OUT

There are restrictions in the maximum V and V

step

IN

OUT

The output margining will be margining of the value.

This is controlled by the MARG0 and MARG1 pins. See

the truth table below:

down ratio that can be achieved for a given input voltage.

These constraints are shown in the Typical Performance

Characteristics curves labeled V to V

Step-Down

IN

OUT

Ratio.Notethatadditionalthermalderatingmayapply.See

the Thermal Considerations and Output Current Derating

section of this data sheet.

MARG0

LOW

MARG1

LOW

MODE

NO MARGIN

MARGIN UP

MARGIN DOWN

NO MARGIN

LOW

HIGH

LOW

HIGH

Output Voltage Programming and Margining

HIGH

ThePWMcontrollerhasaninternal0.6Vreferencevoltage.

As shown in the Block Diagram, a 1M and a 60.4k 0.5%

Input Capacitors

internal feedback resistor connects V

and V pins

OUT

FB

LTM4603HV module should be connected to a low AC

impedance DC source. Input capacitors are required to

be placed adjacent to the module. In Figure 20, the 10μF

ceramic input capacitors are selected for their ability to

handle the large RMS current into the converter. An input

bulkcapacitorof100μFisoptional.This100μFcapacitoris

onlyneedediftheinputsourceimpedanceiscompromised

by long inductive leads or traces.

together. The V

pin is connected between the 1M

OUT_LCL

and the 60.4k resistor. The 1M resistor is used to protect

against an output overvoltage condition if the V

OUT_LCL

pin is not connected to the output, or if the remote sense

ampliﬁer output is not connected to V . The output

OUT_LCL

voltage will default to 0.6V. Adding a resistor R

the V pin to SGND pin programs the output voltage:

from

SET

FB

For a buck converter, the switching duty-cycle can be

estimated as:

60.4k +R_SET

V_OUT= 0.6V

R_SET

V_OUT

D=

Table 1. Standard 1% Resistor Values

V

IN

R

SET

Open 60.4

0.6 1.2

40.2

1.5

30.1

1.8

25.5

2

19.1

2.5

13.3

3.3

8.25

5

(kΩ)

Without considering the inductor current ripple, the RMS

current of the input capacitor can be estimated as:

V

OUT

(V)

I_OUT(MAX)

The MPGM pin programs a current that when multiplied

by an internal 10k resistor sets up the 0.6V reference

offset for margining. A 1.18V reference divided by the

I_CIN(RMS)

=

• D• 1–D

(

)

η%

In the above equation, η% is the estimated efﬁciency of

R

resistor on the MPGM pin programs the current.

PGM

Calculate V

the power module. C can be a switcher-rated electrolytic

IN

:

OUT(MARGIN)

aluminum capacitor, OS-CON capacitor or high volume

ceramic capacitor. Note the capacitor ripple current rat-

ings are often based on temperature and hours of life. This

makes it advisable to properly derate the input capacitor,

%V_OUT

100

V_OUT(MARGIN)

=

• V_OUT

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or choose a capacitor rated at a higher temperature than

required. Always contact the capacitor manufacturer for

derating requirements.

Output Capacitors

The LTM4603HV is designed for low output voltage ripple.

The bulk output capacitors deﬁned as C are chosen

OUT

In Figure 20, the 10μF ceramic capacitors are together

used as a high frequency input decoupling capacitor. In a

typical 6A output application, two very low ESR, X5R or

X7R, 10μF ceramic capacitors are recommended. These

decoupling capacitors should be placed directly adjacent

to the module input pins in the PCB layout to minimize

the trace inductance and high frequency AC noise. Each

10μF ceramic is typically good for 2A to 3A of RMS ripple

current. Refer to your ceramics capacitor catalog for the

RMS current ratings.

with low enough effective series resistance (ESR) to meet

theoutputvoltagerippleandtransientrequirements. C

OUT

can be a low ESR tantalum capacitor, a low ESR polymer

capacitororaceramiccapacitor.Thetypicalcapacitanceis

200μF if all ceramic output capacitors are used. Additional

output ﬁltering may be required by the system designer,

if further reduction of output ripple or dynamic transient

spikeisrequired.Table2showsamatrixofdifferentoutput

voltages and output capacitors to minimize the voltage

droop and overshoot during a 3A/μs transient. The table

optimizes total equivalent ESR and total bulk capacitance

to maximize transient performance.

MultiphaseoperationwithmultipleLTM4603HVdevicesin

parallelwilllowertheeffectiveinputRMSripplecurrentdue

to the interleaving operation of the regulators. Application

Note 77 provides a detailed explanation. Refer to Figure 2

fortheinputcapacitorripplecurrentrequirementasafunc-

tion of the number of phases. The ﬁgure provides a ratio

of RMS ripple current to DC load current as a function of

duty cycle and the number of paralleled phases. Pick the

corresponding duty cycle and the number of phases to

arrive at the correct ripple current value. For example, the

2-phase parallel LTM4603HV design provides 10A at 2.5V

output from a 12V input. The duty cycle is DC = 2.5V/12V

= 0.21. The 2-phase curve has a ratio of ~0.25 for a duty

cycle of 0.21. This 0.25 ratio of RMS ripple current to a

DC load current of 10A equals ~2.5A of input RMS ripple

current for the external input capacitors.

Multiphase operation with multiple LTM4603HV devices

in parallel will lower the effective output ripple current

due to the interleaving operation of the regulators. For

example, each LTM4603HV’s inductor current of a 12V to

2.5V multiphase design can be read from the “Inductor

Ripple vs Duty Cycle” (Figure 3). The large ripple current

at low duty cycle and high output voltage can be reduced

by adding an external resistor from f to ground which

SET

increases the frequency. If we choose the duty cycle of

DC = 2.5V/12V = 0.21, the inductor ripple current for 2.5V

output at 21% duty cycle is ~2A in Figure 3.

0.6

4

2.5V OUTPUT

5V OUTPUT

0.5

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

3

2

1

0

1-PHASE

0.4

2-PHASE

3-PHASE

4-PHASE

3.3V OUTPUT WITH

82.5k ADDED FROM

0.3

6-PHASE

V

OUT

TO f

SET

0.2

5V OUTPUT WITH

150k ADDED FROM

f

TO GND

0.1

SET

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

0

20

40

60

)

80

DUTY FACTOR (V /V

)

DUTY CYCLE (V /V

OUT IN

4603HV F02

4603HV F03

Figure 3. Inductor Ripple Current vs Duty Cycle

Figure 2. Normalized Input RMS Ripple Current

vs Duty Factor for One to Six Modules (Phases)

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1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

1-PHASE

2-PHASE

3-PHASE

4-PHASE

6-PHASE

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9

DUTY CYCLE (V /V

)

IN

4603HV F04

O

Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = V_OT/L_I

Figure4providesaratioofpeak-to-peakoutputripplecur-

Fault Conditions: Current Limit and Overcurrent

rent to the inductor current as a function of duty cycle and

the number of paralleled phases. Pick the corresponding

dutycycleandthenumberofphasestoarriveatthecorrect

output ripple current ratio value. If a 2-phase operation is

chosen at a duty cycle of 21%, then 0.6 is the ratio. This

0.6 ratio of output ripple current to inductor ripple of 2A

equals 1.2A of effective output ripple current. Refer to Ap-

plicationNote77foradetailedexplanationofoutputripple

current reduction as a function of paralleled phases.

Foldback

The LTM4603HV has a current mode controller, which

inherently limits the cycle-by-cycle inductor current not

only in steady-state operation, but also in transient.

Tofurtherlimitcurrentintheeventofanoverloadcondition,

the LTM4603HV provides foldback current limiting. If the

output voltage falls by more than 50%, then the maximum

output current is progressively lowered to about one sixth

of its full current limit value.

The output voltage ripple has two components that are

related to the amount of bulk capacitance and effective

series resistance (ESR) of the output bulk capacitance.

Therefore, the output voltage ripple can be calulated with

the known effective output ripple current. The equation:

Soft-Start and Tracking

The TRACK/SS pin provides a means to either soft-start

the regulator or track it to a different power supply. A

capacitor on this pin will program the ramp rate of the

output voltage. A 1.5μA current source will charge up the

external soft-start capacitor to 80% of the 0.6V internal

voltagereferenceminusanymargindelta.Thiswillcontrol

ΔV

≈ (ΔI /(8 • f • m • C ) + ESR • ΔI ), where f

OUT(P-P)

L OUT L

is frequency and m is the number of parallel phases. This

calclation process can be easily fulﬁlled using the Linear

Technology μModule design tool.

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Run Enable

the ramp of the internal reference and the output voltage.

The total soft-start time can be calculated as:

The RUN pin is used to enable the power module. The

pin has an internal 5.1V zener to ground. The pin can be

driven with a logic input not to exceed 5V.

C_SS

1.5µA

t_SOFTSTART= 0.8V • 0.6V – V

•

(

)

OUT(MARGIN)

The RUN pin can also be used as an undervoltage lock out

(UVLO) function by connecting a resistor divider from the

input supply to the RUN pin:

When the RUN pin falls below 1.5V, then the TRACK/SS

pin is reset to allow for proper soft-start control when

the regulator is enabled again. Current foldback and force

continuous mode are disabled during the soft-start pro-

cess. The soft-start function can also be used to control

the output ramp up time, so that another regulator can

be easily tracked to it.

R1+R2

V_UVLO

=

•1.5V

R2

Power Good

The PGOOD pin is an open-drain pin that can be used to

monitor valid output voltage regulation. This pin monitors

a 10% window around the regulation point and tracks

with margining.

Output Voltage Tracking

Output voltage tracking can be programmed externally

usingtheTRACK/SSpin. Theoutputcanbetrackedupand

downwithanotherregulator.Themasterregulator’soutput

is divided down with an external resistor divider that is the

same as the slave regulator’s feedback divider. Figure 5

shows an example of coincident tracking. Ratiometric

modes of tracking can be achieved by selecting different

resistor values to change the output tracking ratio. The

master output must be greater than the slave output for

the tracking to work. Figure 6 shows the coincident output

tracking characteristics.

COMP Pin

This pin is the external compensation pin. The module

has already been internally compensated for most output

voltages. Table 2 is provided for most application require-

ments. A spice model will be provided for other control

loop optimization.

PLLIN

MASTER

OUTPUT

Thepowermodulehasaphase-lockedloopcomprisedofan

internal voltage controlled oscillator and a phase detector.

This allows the internal top MOSFET turn-on to be locked

R2

60.4k

TRACK CONTROL

V

IN

R1

40.2k

60.4k FROM

TO V

100k

V

PLLIN TRACK/SS

V

IN

OUT

FB

MASTER OUTPUT

SLAVE OUTPUT

PGOOD

V

OUT

MPGM

RUN

COMP

V

C

FB

OUT

MARG0

MARG1

V

OUT_LCL

SLAVE OUTPUT

LTM4603HV

C

IN

OUTPUT

VOLTAGE

INTV

CC

DRV

DIFFV

V

OUT

+

OSNS

–

OSNS

f

SGND PGND

SET

R

SET

40.2k

4603HV F05

4603HV F06

TIME

Figure 6

Figure 5

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to the rising edge of the external clock. The frequency

range is 30% around the operating frequency of 1MHz.

A pulse detection circuit is used to detect a clock on the

PLLIN pin to turn on the phase lock loop. The pulse width

of the clock has to be at least 400ns and 2V in amplitude.

During the start-up of the regulator, the phase-lock loop

function is disabled.

current sharing. This will balance the thermals on the

design. The voltage feedback equation changes with the

variable n as modules are paralleled:

60.4k

+R_SET

n

V_OUT= 0.6V

R_SET

n is the number of paralleled modules.

INTV and DRV Connection

CC

An internal low dropout regulator produces an internal

5V supply that powers the control circuitry and DRV

for driving the internal power MOSFETs. Therefore, if the

system does not have a 5V power rail, the LTM4603HV

can be directly powered by Vin. The gate driver current

through the LDO is about 20mA. The internal LDO power

dissipation can be calculated as:

Thermal Considerations and Output Current Derating

CC

The power loss curves in Figures 7 and 8 can be used

in coordination with the load current derating curves in

Figures 9 to 12, and Figures 13 to 16 for calculating an

approximate θ for the module with various heat sinking

JA

methods. Thermal models are derived from several tem-

peraturemeasurementsatthebenchandthermalmodeling

analysis.ThermalApplicationNote103providesadetailed

explanation of the analysis for the thermal models and the

derating curves. Tables 3 and 4 provide a summary of the

P

= 20mA • (V – 5V)

IN

LDO_LOSS

The LTM4603HV also provides the external gate driver

voltage pin DRV . If there is a 5V rail in the system, it is

CC

equivalent θ for the noted conditions. These equivalent

JA

recommended to connect DRV pin to the external 5V

CC

θ

JA

parameters are correlated to the measured values,

rail. This is especially true for higher input voltages. Do

and are improved with air ﬂow. The case temperature is

maintained at 100°C or below for the derating curves.

This allows for 4W maximum power dissipation in the

total module with top and bottom heatsinking, and 2W

power dissipation through the top of the module with an

not apply more than 6V to the DRV pin. A 5V output can

CC

be used to power the DRV pin with an external circuit

CC

as shown in Figure 18.

Parallel Operation of the Module

approximate θ between 6°C/W to 9°C/W. This equates

JC

The LTM4603HV device is an inherently current mode

controlled device. Parallel modules will have very good

to a total of 124°C at the junction of the device.

2.5

2.0

1.5

1.0

0.5

0

3.5

3.0

6

5

24V LOSS

12V LOSS

2.5

2.0

1.5

1.0

0.5

4

3

12V LOSS

5V LOSS

2

1

0

5V , 1.5V , 0LFM

IN

OUT

5V , 1.5V , 200LFM

5V , 1.5V , 400LFM

IN

0

4

OUTPUT CURRENT (A)

6

7

4

OUTPUT CURRENT (A)

6

7

75

80

85

90

95

0

1

2

3

5

0

1

2

3

5

AMBIENT TEMPERATURE (°C)

4603HV F07

4603HV F08

4603HV F09

Figure 7. 1.5V Power Loss

Figure 8. 3.3V Power Loss

Figure 9. No Heat Sink

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6

5

6

5

4

3

4

3

4

3

2

1

0

2

1

0

2

1

0

5V , 1.5V , 0LFM

12V , 1.5V , 0LFM

IN

OUT

IN

OUT

5V , 1.5V , 200LFM

12V , 1.5V , 200LFM

IN

OUT

IN

OUT

5V , 1.5V , 400LFM

12V , 1.5V , 400LFM

75

80

85

90

95

70

75

80

85

90

95

70

75

80

85

90

95

AMBIENT TEMPERATURE (°C)

4603HV F10

4603HV F12

4603HV F11

12V , 1.5V , 0LFM

IN

OUT

12V , 1.5V , 200LFM

IN

OUT

Figure 10. BGA Heat Sink

Figure 12. BGA Heat Sink

12V , 1.5V , 400LFM

IN

OUT

Figure 11. No Heat Sink

6

5

6

5

4

3

4

3

2

1

0

12V , 3.3V , 0LFM

1

0

IN

OUT

IN

OUT

12V , 3.3V , 200LFM

IN

OUT

12V , 3.3V , 400LFM

IN

70

75

80

85

90

95

70

75

80

85

90

95

AMBIENT TEMPERATURE (°C)

4603HV F13

4603HV F14

Figure 13. No Heat Sink

Figure 14. BGA Heat Sink

6

5

4

3

2

1

0

5

4

3

2

1

0

24V , 3.3V , 0LFM

IN

OUT

24V , 3.3V , 0LFM

IN

OUT

24V , 3.3V , 200LFM

IN

OUT

24V , 3.3V , 200LFM

IN OUT

24V , 3.3V , 400LFM

IN OUT

60

65

70

75

80

85

60

70

75

80

85

90

65

AMBIENT TEMPERATURE (°C)

4603HV F15

1635 G24

Figure 15. No Heat Sink

Figure 16. BGA Heat Sink

4603hvf

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LTM4603HV

Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 20)

TYPICAL MEASURED VALUES

C

VENDORS

PART NUMBER

C

OUT2

VENDORS

PART NUMBER

OUT1

TAIYO YUDEN

TDK

JMK316BJ226ML-T501 (22μF, 6.3V)

JMK325BJ476MM-T (47μF, 6.3V)

C3225X5R0J476M (47μF, 6.3V)

SANYO POSCAP

6TPE220MIL (220μF, 6.3V)

2R5TPE330M9 (330μF, 2.5V)

4TPE330MCL (330μF, 4V)

V

C

V

(V)

DROOP

(mV)

PEAK TO

PEAK (mV)

RECOVERY

TIME (μs)

LOAD STEP

(A/μs)

R

SET

OUT

IN

OUT1

OUT2

IN

(V)

1.2

1.5

1.8

2.5

3.3

5

(CERAMIC)

(BULK)

(CERAMIC)

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

1 × 22μF 6.3V

1 × 47μF 6.3V

2 × 47μF 6.3V

4 × 47μF 6.3V

(BULK)

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

(kΩ)

60.4

40.2

30.1

19.1

13.3

8.25

2 × 10μF 35V 150μF 35V

5

34

22

68

40

30

26

24

18

30

26

24

18

30

26

30

26

37

30

26

37

30

26

40

34

28

12

40

34

28

18

40

32

28

14

40

32

28

22

20

3

5

20

40

5

32

60

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

12

5

34

68

22

40

20

39

29.5

35

55

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

70

5

25

48

5

24

47.5

68

5

36

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

12

5

35

70

25

48

24

45

32.6

38

61.9

76

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

5

29.5

28

57.5

55

5

43

80

330μF 4V

330μF 2.5V

220μF 6.3V

NONE

12

5

38

76

28

55

27

52

36.4

38

70

330μF 4V

220μF 6.3V

NONE

78

5

37.6

39.5

66

74

5

78.1

119

78

5

330μF 4V

220μF 6.3V

NONE

12

7

38

34.5

35.8

50

66.3

68.8

98

330μF 4V

220μF 6.3V

NONE

42

86

7

47

89

7

50

94

7

75

141

86

330μF 4V

220μF 6.3V

NONE

12

15

20

42

47

88

50

94

69

131

215

217

NONE

110

5

NONE

4603hvf

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Table 3. 1.5V Output

DERATING CURVE

Figures 9, 11

V

(V)

POWER LOSS CURVE

Figure 7

AIR FLOW (LFM)

HEAT SINK

None

θ

JA

(°C/W)

IN

5, 12

0

15.2

14

Figures 9, 11

Figure 7

200

400

0

None

Figures 9, 11

5, 12

Figure 7

None

12

Figures 10, 12

5, 12, 20

Figure 7

BGA Heat Sink

13.9

11.3

10.25

Figure 7

200

400

Figure 7

Table 4. 3.3V Output

DERATING CURVE

Figures 13, 15

V

(V)

POWER LOSS CURVE

Figure 8

AIR FLOW (LFM)

HEAT SINK

None

θ

JA

(°C/W)

IN

12, 24

0

15.2

14.6

13.4

13.9

11.1

10.5

Figures 13, 15

Figure 8

200

400

0

None

Figures 13, 15

Figure 8

None

Figures 14, 16

Figure 8

BGA Heat Sink

Figures 14, 16

Figure 8

200

400

Figures 14, 16

Figure 8

Heat Sink Manufacturer

Wakeﬁeld Engineering

Part No: 20069

Phone: 603-635-2800

4603hvf

17

LTM4603HV

U

W U U

APPLICATIO S I FOR ATIO

Safety Considerations

• Do not put vias directly on pads.

The LTM4603HV modules do not provide isolation from

• If vias are placed onto the pads, the the vias must be

capped.

V to V . There is no internal fuse. If required, a slow

IN

OUT

blow fuse with a rating twice the maximum input current

needstobeprovidedtoprotecteachunitfromcatastrophic

failure.

• Interstitialvia placementcan also beused if necessary.

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to PGND underneath the unit.

Layout Checklist/Example

The high integration of LTM4603HV makes the PCB board

layoutverysimpleandeasy.However,tooptimizeitselectri-

cal and thermal performance, some layout considerations

are still necessary.

Figure 17 gives a good example of the recommended

layout.

Frequency Adjustment

The LTM4603HV is designed to typically operate at 1MHz

• Use large PCB copper areas for high current path, in-

cluding V , PGND and V . It helps to minimize the

across most input conditions. The f pin is typically left

SET

IN

OUT

open or decoupled with an optional 1000pF capacitor. The

switching frequency has been optimized for maintaining

constant output ripple noise over most operating ranges.

The 1MHz switching frequency and the 400ns minimum

off time can limit operation at higher duty cycles like 5V to

3.3V, and produce excessive inductor ripple currents for

lower duty cycle applications like 28V to 5V. The 5V and

3.3V drop out curves are modiﬁed by adding an external

PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci-

tors next to the V , PGND and V

pins to minimize

IN

OUT

high frequency noise.

• Place a dedicated power ground layer underneath the

unit.

• Tominimizetheviaconductionlossandreducemodule

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

resistor on the f

operations.

pin to allow for wider input voltage

SET

V

IN

C

IN

GND

SIGNAL

GND

C

OUT

V

OUT

4603HV F17

Figure 17. Recommended Layout

4603hvf

18

LTM4603HV

U

W U U

APPLICATIO S I FOR ATIO

Example for 5V Output

Example for 3.3V Output

LTM4603HV minimum on-time = 100ns;

= ((3.3 • 10pF)/I

LTM4603HV minimum on-time = 100ns;

t

= ((4.8 • 10pf)/I

)

t

)

fSET

ON

fSET

ON

LTM4603HV minimum off-time = 400ns;

= t– t , where t = 1/Frequency

LTM4603HV minimum off-time = 400ns;

= t – t , where t = 1/Frequency

t

OFF

ON

Duty Cycle = t /t or V /V

Duty Cycle (DC) = t /t or V /V

ON OUT IN

ON

OUT IN

Equations for setting frequency:

= (V /(3 • R )), for 28V input operation, I

Equations for setting frequency:

= (V /(3 • R )), for 28V input operation, I

I

=

I

=

fSET

IN

fSET

IN

fSET

281μA, t = ((4.8 • 10pF)/I ), t = 171ns, where the

281μA, t = ((3.3 • 10pf)/I ), t = 117ns, where the

ON

fSET ON

ON fSET ON

internal R

is 33.2k. Frequency = (V /(V • t )) =

internal R is 33.2k. Frequency = (V /(V • t )) =

fSET OUT IN ON

fSET

OUT IN ON

(5V/(28 • 171ns)) ~ 1MHz. The inductor ripple current

begins to get high at the higher input voltages due to a

larger voltage across the inductor. This is shown in the

“Inductor Ripple Current vs Duty Cycle” graph as ~4A at

25%dutycycle.Theinductorripplecurrentcanbelowered

at the higher input voltages by adding an external resistor

(3.3V/(28 • 117ns)) ~ 1MHz. The minimum on-time and

minimum-off time are within speciﬁcation at 118ns and

882ns. But the 4.5V minimum input for converting 3.3V

outputwillnotmeettheminimumoff-timespeciﬁcationof

400ns. t = 733ns, Frequency = 1MHz, t = 267ns.

ON

OFF

Solution

from f to ground to increase the switching frequency.

SET

A 3A ripple current is chosen, and the total peak current

is equal to 1/2 of the 3A ripple current plus the output

current. The 5V output current is limited to 5A, so total

peak current is less than 6.5A. This is below the 8A peak

Lower the switching frequency at lower input voltages to

allow for higher duty cycles, and meet the 400ns mini-

mum off-time at 4.5V input voltage. The off-time should

be about 500ns with 100ns guard band. The duty cycle

specified value. A 150k resistor is placed from f

to

SET

for (3.3V/4.5) = ~73%. Frequency = (1 – DC)/t

or

OFF

ground, and the parallel combination of 150k and 33.2k

(1–0.73)/500ns=540kHz.Theswitchingfrequencyneeds

tobeloweredto540kHzat4.5Vinput. t =DC/frequency,

equates to 27.2k. The I

calculation with 27.2k and

fSET

ON

28V input voltage equals 343μA. This equates to a t of

ON

or 1.35μs. The f

pin voltage compliance is 1/3 of V ,

SET

IN

140ns. This will increase the switching frequency from

1MHz to ~1.28MHz for the 28V to 5V conversion. The

minimum on time is above 100ns at 28V input. Since

the switching frequency is approximately constant over

input and output conditions, then the lower input voltage

range is limited to 10V for the 1.28MHz operation due to

and the I

current equates to 45μA with the internal

fSET

33.2k. The I

current needs to be 24μA for 540kHz

fSET

operation. A resistor can be placed from V

to f

to

OUT

SET

lower the effective I

current out of the f pin to 24μA.

fSET

The f

pin is 4.5V/3 =1.5V and V

= 3.3V, therefore

OUT

SET

an 82.5k resistor will source 21μA into the f node and

SET

the 400ns minimum off time. Equation: t = (V /V ) •

ON

OUT IN

lower the I

current to 24μA. This enables the 540kHz

fSET

(1/Frequency) equates to a 382ns on time, and a 400ns off

operation and the 4.5V to 28V input operation for down

converting to 3.3V output as shown in Figure 19. The

frequency will scale from 540kHz to 1.27MHz over this

input range. This provides for an effective output current

of 5A over the input range.

time. The “V to V Step-Down Ratio” curve reﬂects an

IN

OUT

operatingrangeof10Vto28Vfor1.28MHzoperationwitha

150kresistortoground(showninFigure18), andan8Vto

16V operating range for f ﬂoating. These modiﬁcations

SET

are made to provide wider input voltage ranges for the 5V

output designs while limiting the inductor ripple current,

and maintaining the 400ns minimum off time.

4603hvf

19

LTM4603HV

U

W U U

APPLICATIO S I FOR ATIO

V

OUT

TRACK/SS CONTROL

V

IN

10V TO 28V

REVIEW TEMPERATURE

DERATING CURVE

R2

R4

V

PLLIN TRACK/SS

V

5V

5A

IN

100k 100k

OUT

PGOOD

V

OUT

C6 100pF

MPGM

RUN

V

FB

REFER TO

TABLE 2

MARG0

MARG1

V

OUT_LCL

C3

COMP

INTV

DRV

+

LTM4603HV

100μF

CC

6.3V

5% MARGIN

DIFFV

SANYO POSCAP

CC

OUT

+

R1

392k

1%

V

OSNS

C2

–

OSNS

10μF

f

SGND PGND

SET

35V

C1

10μF

R

SET

8.25k

fSET

35V

150k

MARGIN CONTROL

IMPROVE

EFFICIENCY

SOT-323

FOR ≥12V INPUT

DUAL

CMSSH-3C3

4603HV F18

Figure 18. 5V at 5A Design

V

OUT

TRACK/SS CONTROL

V

IN

4.5V TO 28V

REVIEW TEMPERATURE

DERATING CURVE

R2

R4

V

PLLIN TRACK/SS

V

3.3V

5A

IN

100k 100k

OUT

PGOOD

V

OUT

C6 100pF

PGOOD

MPGM

RUN

V

FB

C3

MARG0

MARG1

V

OUT_LCL

+

100μF

COMP

INTV

DRV

LTM4603HV

6.3V

CC

SANYO POSCAP

DIFFV

OUT

+

C2

V

OSNS

R1

392k

10μF

35V

–

OSNS

R

f

fSET

C1

10μF

35V

SGND PGND

SET

R

SET

82.5k

13.3k

5% MARGIN

MARGIN CONTROL

4603HV F19

Figure 19. 3.3V at 5A Design

4603hvf

20

LTM4603HV

U

W U U

APPLICATIO S I FOR ATIO

CLOCK SYNC

C5

V

OUT

0.01μF

V

IN

4.5V TO 28V

REVIEW TEMPERATURE

R2

100k

R4

100k

V

PLLIN TRACK/SS

V

1.5V

6A

IN

DERATING CURVE

C3 100pF

OUT

PGOOD

V

OUT

+

C

PGOOD

MPGM

RUN

COMP

V

OUT1

OUT2

FB

22μF

470μF

MARG0

MARG1

V

OUT_LCL

MARGIN

CONTROL

6.3V

ON/OFF

LTM4603HV

INTV

DRV

CC

DIFFV

V

OUT

+

C

IN

+

R1

BULK

OPT.

OSNS

–

392k

V

OSNS

C

IN

TABLE 2

f

10μF

35V

SGND PGND

SET

R

REFER TO

TABLE 2

SET

100k*

40.2k

V

×2 CER

IN

4603 F18

*100k NEEDED ONLY FOR

≥20V INPUT

5% MARGIN

Figure 20. Typical 4.5V-28V_IN, 1.5V at 6A Design

V

OUT

V

IN

4.5V TO 28V

0° PHASE

PLLIN

R3

R4

V

100k 100k

IN

C1

V

2.5V

12A

OUT

10μF

35V

×2

PGOOD

RUN

COMP

V

OUT

C8

C2

100μF

6.3V

C4

220μF

6.3V

V

FB

V

OUT_LCL

100pF

R

SET

9.53k

INTV

DIFFV

CC

OUT

LTM4603HV

+

DRV

V

CC

MPGM

OSNS

–

OSNS

R2

392k

f

MARG0

MARG1

MARGIN

CONTROL

SET

LTC6908-1

+

TRACK/SS

V

OUT1

GND OUT2

SET MOD

C3

0.33μF

SGND PGND

C3

0.1μF

R9

118k

2-PHASE

OSCILLATOR

180° PHASE

PLLIN

R7

100k

V

IN

PGOOD

RUN

COMP

V

OUT

C6

220μF

6.3V

C7

100μF

6.3V

V

FB

V

OUT_LCL

C5

INTV

DIFFV

LTM4603HV

CC

OUT

10μF

35V

×2

+

DRV

V

CC

OSNS

–

MPGM

OSNS

R6

392k

f

MARG0

MARG1

SET

TRACK/SS

SGND PGND

4603HV F21

5% MARGIN

Figure 21. 2-Phase, Parallel 2.5V at 12A Design

4603hvf

21

LTM4603HV

TYPICAL APPLICATIONS

LTC6908-1

0° PHASE

+

V

OUT1

GND OUT2

SET MOD

C8

0.1μF

R9

118k

2-PHASE

OSCILLATOR

3.3V

V

IN

5V TO 28V

180° PHASE

PLLIN

R3

R4

R7

R8

V

IN

PGOOD

RUN

LTM4603HV

COMP

PLLIN

100k 100k

IN

100k 100k

C1

V

3.3V

6A

V

2.5V

6A

OUT1

OUT2

10μF

35V

×2

PGOOD

RUN

V

OUT

V

FB

C8

C9

C2

100μF

6.3V

C4

220μF

6.3V

C6

100μF

6.3V

C7

220μF

6.3V

V

FB

22pF

LTM4603HV

COMP

C5

R

SET2

19.1k

SET1

13.3k

V

OUT_LCL

DIFFV

OUT_LCL

10μF

35V

×2

INTV

DRV

DIFFV

INTV

DRV

CC

OUT

+

CC

OUT

+

3.3V

TRACK

V

CC

MPGM

OSNS

CC

MPGM

OSNS

–

OSNS

R16

60.4k

R2

392k

f

MARG0

MARG1

f

MARG0

MARG1

MARGIN

CONTROL

MARGIN

CONTROL

SET

392k

TRACK/SS

C3

0.15μF

R15

19.1k

SGND PGND

4603HV F22

Figure 22. 2-Phase, 3.3V and 2.5V at 6A with Tracking

LTC6908-1

+

0° PHASE

V

OUT1

GND OUT2

SET MOD

C8

0.1μF

R9

182k

2-PHASE

OSCILLATOR

1.8V

V

IN

4.5V TO 28V

180° PHASE

PLLIN

R3

R4

R7

R8

V

IN

PGOOD

RUN

LTM4603HV

COMP

PLLIN

100k 100k

IN

100k 100k

C1

V

1.8V

6A

V

1.5V

6A

OUT1

OUT2

10μF

35V

×2

PGOOD

RUN

V

OUT

V

FB

C8

C9

C2

100μF

6.3V

C4

220μF

6.3V

C6

C7

V

FB

100pF

100μF

220μF

LTM4603HV

COMP

6.3V

C5

R

SET2

40.2k

SET1

30.1k

V

OUT_LCL

DIFFV

OUT_LCL

10μF

35V

×2

INTV

DRV

DIFFV

INTV

DRV

CC

OUT

+

CC

OUT

+

1.8V

TRACK

V

CC

MPGM

OSNS

CC

MPGM

OSNS

–

OSNS

R16

60.4k

R6

R2

392k

f

MARG0

MARG1

f

MARG0

MARG1

MARGIN

CONTROL

MARGIN

CONTROL

SET

392k

TRACK/SS

C3

0.15μF

R15

40.2k

SGND PGND

4603HV F23

Figure 23. 2-Phase, 1.8V and 1.5V at 6A with Tracking

4603hvf

22

LTM4603HV

U

PACKAGE DESCRIPTIO

Z

b b b

Z

6 . 9 8 5 0

5 . 7 1 5 0

4 . 4 4 5 0

3 . 1 7 5 0

1 . 9 0 5 0

0 . 6 3 5 0

0 . 0 0 0 0

0 . 6 3 5 0

1 . 9 0 5 0

3 . 1 7 5 0

4 . 4 4 5 0

5 . 7 1 5 0

6 . 9 8 5 0

4603hvf

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTM4603HV

RELATED PARTS

PART NUMBER

LTC2900

DESCRIPTION

COMMENTS

Quad Supply Monitor with Adjustable Reset Timer

Power Supply Tracking Controller

Synchronous Isolated Flyback Controllers

10A DC/DC μModule

Monitors Four Supplies; Adjustable Reset Timer

Tracks Both Up and Down; Power Supply Sequencing

No Optocoupler Required; 3.3V, 12A Output; Simple Design

Fast Transient Response

LTC2923

LT3825/LT3837

LTM4600

LTM4601

12A DC/DC μModule

with PLL, Output Tracking and Margining, LTM4603HV Pin Compatible

Pin Compatible with the LTM4600

LTM4602

6A DC/DC μModule

LTM4603

6A DC/DC μModule with Tracking PLL/Margining

Pin Compatible with the LTM4601

4603hvf

LT 0607 • PRINTED IN USA

24 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTM4603HVIV-PBF
厂家：	Linear
描述：	6A, 28VIN DC/DC μModule with PLL, Output Tracking and Margining 6A ， 28VIN DC / DC微型模块与PLL ，输出跟踪和裕
文件：	总24页 (文件大小：330K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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