LTM4603_15 [Linear]
20V, 6A DC/DC Module Regulator with PLL, Output Tracking and Margining;
| 型号： | LTM4603_15 |
| 厂家： | 
Linear |
| 描述： | 20V, 6A DC/DC Module Regulator with PLL, Output Tracking and Margining |
| 文件： | 总26页 (文件大小：448K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM4603/LTM4603-1
20V, 6A DC/DC µModule
Regulator with PLL, Output
Tracking and Margining
Features
Description
n
Complete Switch Mode Power Supply
The LTM®4603 is a complete 6A step-down switch mode
DC/DC µModule® regulator with onboard switching con-
troller, MOSFETs, inductor and all support components.
The device is housed in a small surface mount 15mm ×
15mm × 2.82mm LGA package. Operating over an input
voltage range of 4.5V to 20V, the LTM4603 supports an
output voltage range of 0.6V to 5V as well as output volt-
age tracking and margining. The high efficiency design
delivers 6A continuous current (8A peak). Only bulk input
and output capacitors are needed to complete the design.
n
Wide Input Voltage Range: 4.5V to 20V
n
6A DC Typical, 8A Peak Output Current
n
0.6V to 5V Output Voltage
Output Voltage Tracking and Margining
n
n
Remote Sensing for Precision Regulation (LTM4603
Only)
n
Typical Operating Frequency: 1MHz
n
PLL Frequency Synchronization
n
1.5% Regulation
n
Current Foldback Protection (Disabled at Start-Up)
The low profile (2.82mm) and light weight (1.7g) package
easily mounts on the unused space on the back side of
PC boards for high density point of load regulation. The
µModule regulator can be synchronized with an external
clock for reducing undesirable frequency harmonics and
allows PolyPhase® operation for high load currents.
n
Pin Compatible with the LTM4601
n
Pb-Free (e4) RoHS Compliant Package with Gold
Finish Pads
n
Ultrafast Transient Response
n
Current Mode Control
n
Up to 93% Efficiency at 5V , 3.3V
IN
OUT
n
n
n
A high switching frequency and adaptive on-time current
mode architecture deliver a very fast transient response
to line and load changes without sacrificing stability. An
onboard remote sense amplifier can be used to accurately
regulate an output voltage independent of load current.
The onboard remote sense amplifier is not available in the
LTM4603-1. TheLTM4603/LTM4603-1arepincompatible
with the 12A LTM4601/LTM4601-1.
Programmable Soft-Start
Output Overvoltage Protection
Small Footprint, Low Profile (15mm × 15mm ×
2.82mm) Surface Mount LGA Package
applications
n
Telecom and Networking Equipment
n
Servers
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and PolyPhase are registered
trademarks and LTpowerCAD is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
Industrial Equipment
Point of Load Regulation
n
typical application
Efficiency vs Load Current with 12VIN
1.5V/6A Power Supply with 4.5V to 20V Input
100
95
90
85
80
75
70
65
CLOCK SYNC
TRACK/SS CONTROL
V
IN
4.5V TO 20V
V
IN
PLLIN TRACK/SS
V
1.5V
6A
OUT
PGOOD
V
OUT
100pF
V
FB
ON/OFF
RUN
COMP
INTV
MARG0
MARG1
V
OUT_LCL
MARGIN
CONTROL
12V , 1.2V
IN
OUT
OUT
OUT
OUT
OUT
C
OUT
LTM4603
60
55
50
45
40
C
IN
12V , 1.5V
IN
CC
12V , 1.8V
IN
40.2k
DRV
DIFFV
CC
OUT
+
12V , 2.5V
IN
MPGM
SGND PGND
V
V
OSNS
12V , 3.3V
IN
–
12V , 5V
IN
OSNS
OUT
392k
f
SET
0
2
3
4
5
6
7
1
5% MARGIN
LOAD CURRENT (A)
4603 TA01a
4603 TA01b
4603fb
1
LTM4603/LTM4603-1
absolute MaxiMuM ratings
pin conFiguration
(Note 1)
INTV , DRV , V
, V (V ≤ 3.3V
TOP VIEW
CC
CC OUT_LCL OUT OUT
with Remote Sense Amp)............................. –0.3V to 6V
PLLIN, TRACK/SS, MPGM, MARG0, MARG1,
PGOOD, f
..............................–0.3V to INTV + 0.3V
SET
CC
V
f
IN
SET
RUN ............................................................. –0.3V to 5V
MARG0
MARG1
DRV
V , COMP................................................ –0.3V to 2.7V
FB
CC
V ............................................................. –0.3V to 20V
IN
OSNS
V
FB
+
–
PGND
V
, V
..........................–0.3V to INTV + 0.3V
OSNS CC
PGOOD
SGND
+
Operating Temperature Range (Note 2)....–40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range .................. –55°C to 125°C
V
/NC2*
OSNS
DIFFV /NC3*
OUT
V
V
V
OUT
OUT_LCL
–
/NC1*
OSNS
LGA PACKAGE
118-LEAD (15mm × 15mm × 2.82mm)
T
= 125°C, θ = 15°C/W, θ = 6°C/W
JA JC
JMAX
θ
JA
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS, WEIGHT = 1.7g
*LTM4603-1 ONLY
orDer inForMation
†
LEAD FREE FINISH
LTM4603EV#PBF
LTM4603IV#PBF
LTM4603EV-1#PBF
LTM4603IV-1#PBF
TRAY
PART MARKING*
LTM4603V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTM4603EV#PBF
LTM4603IV#PBF
LTM4603EV-1#PBF
LTM4603IV-1#PBF
118-Lead (15mm × 15mm × 2.82mm) LGA
118-Lead (15mm × 15mm × 2.82mm) LGA
118-Lead (15mm × 15mm × 2.82mm) LGA
118-Lead (15mm × 15mm × 2.82mm) LGA
LTM4603V
–40°C to 85°C
LTM4603V-1
LTM4603V-1
–40°C to 85°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
†
See Note 2.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
The l denotes the specifications which apply over the –40°C to 85°C
electrical characteristics
operating temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page)
configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Input DC Voltage
Output Voltage
4.5
20
V
IN(DC)
V
C
= 10µF ×2, C
= 2× 100µF X5R Ceramic
OUT(DC)
IN
OUT
l
l
1.478
1.478
1.5
1.5
1.522
1.522
V
V
V
V
= 5V, V
= 1.5V, I
= 0A
OUT
IN
OUT
= 12V, V
= 1.5V, I
= 0A
OUT
IN
OUT
Input Specifications
V
Undervoltage Lockout Threshold
Input Inrush Current at Start-Up
I
I
= 0A
3.2
4
V
IN(UVLO)
OUT
OUT
I
= 0A. V
= 1.5V
OUT
INRUSH(VIN)
V
= 5V
= 12V
0.6
0.7
A
A
IN
IN
V
4603fb
2
LTM4603/LTM4603-1
The l denotes the specifications which apply over the –40°C to 85°C
electrical characteristics
operating temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page)
configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input Supply Bias Current
V
V
V
V
= 12V, No Switching
3.8
25
mA
mA
Q(VIN,NOLOAD)
IN
IN
IN
IN
= 12V, V
= 1.5V, Switching Continuous
OUT
= 5V, No Switching
= 5V, V = 1.5V, Switching Continuous
2.5
43
mA
mA
OUT
Shutdown, RUN = 0, V = 12V
IN
22
µA
I
Input Supply Current
V
IN
V
IN
V
IN
= 12V, V
= 12V, V
= 1.5V, I
= 3.3V, I
= 6A
= 6A
0.92
1.83
2.12
A
A
A
S(VIN)
OUT
OUT
OUT
OUT
= 5V, V
= 1.5V, I
= 6A
OUT
OUT
INTV
V
= 12V, RUN > 2V
IN
No Load
4.7
0
5
5.3
V
CC
Output Specifications
I
Output Continuous Current Range
Line Regulation Accuracy
V
V
= 12V, V = 1.5V (Note 5)
OUT
6
A
OUTDC
IN
l
∆V
OUT(LINE)
= 1.5V, I
= 0A, V = 4.5V to 20V
0.3
%
OUT
OUT
IN
V
OUT
∆V
Load Regulation Accuracy
Output Ripple Voltage
V
I
= 1.5V, I
IN
IN
= 0A to 6A (Note 5)
OUT(LOAD)
OUT
OUT
V
= 12V, with Remote Sense Amp
= 12V, LTM4603-1
l
l
0.25
0.5
%
%
V
OUT
V
V
= 0A, C
= 2× 100µF X5R Ceramic
= 1.5V
OUT
OUT(AC)
OUT
OUT
10
10
mV
mV
V
IN
= 12V, V
= 5V, V
P-P
P-P
IN
V
= 1.5V
OUT
f
Output Ripple Voltage Frequency
Turn-On Overshoot
I
= 3A, V = 12V, V = 1.5V
OUT
1000
kHz
S
OUT
IN
C
= 200µF, V
= 1.5V, I
= 0A,
OUT
ΔV
OUT
OUT
OUT(START)
TRACK/SS = 10nF
V
IN
V
IN
= 12V
= 5V
20
20
mV
mV
t
Turn-On Time
C
= 200µF, V
= 1.5V, TRACK/SS = Open,
START
OUT
OUT
OUT
I
= 1A Resistive Load
V
IN
V
IN
= 12V
= 5V
0.5
0.5
ms
ms
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load,
= 2 × 22µF Ceramic, 470µF 4V
ΔV
OUTLS
C
OUT
Sanyo POSCAP
V
IN
V
IN
= 12V
= 5V
35
35
mV
mV
t
I
Settling Time for Dynamic Load Step Load: 0% to 50% to 10% of Full Load
SETTLE
V
= 12V
25
µs
IN
Output Current Limit
C
= 2× 100µF X5R Ceramic
OUTPK
OUT
8
8
A
A
V
V
= 12V, V
= 1.5V
IN
IN
OUT
= 5V, V
= 1.5V
OUT
Remote Sense Amp (LTM4603 Only, Not Supported in the LTM4603-1) (Note 3)
+
–
V
, V
Common Mode Input Voltage Range
V
= 12V, RUN > 2V
0
0
INTV – 1
V
OSNS
OSNS
IN
CC
CM Range
DIFFV Range
Output Voltage Range
Input Offset Voltage Magnitude
Differential Gain
V
= 12V, DIFFV
Load = 100k
INTV – 1
V
mV
OUT
IN
OUT
CC
V
OS
1.25
AV
1
3
2
V/V
GBP
SR
Gain Bandwidth Product
Slew Rate
MHz
V/µs
4603fb
3
LTM4603/LTM4603-1
The l denotes the specifications which apply over the –40°C to 85°C
electrical characteristics
operating temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page)
configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
20
MAX
UNITS
kW
+
R
Input Resistance
V
to GND
IN
OSNS
CMRR
Common Mode Rejection Ratio
100
dB
Control Stage
l
V
FB
Error Amplifier Input Voltage
Accuracy
I
= 0A, V
= 1.5V
0.594
0.6
0.606
V
OUT
OUT
V
RUN Pin On/Off Threshold
Soft-Start Charging Current
Minimum On Time
1
1.5
–1.5
50
1.9
–2
V
µA
ns
ns
kW
mA
kW
V
RUN
I
t
t
V
= 0V
TRACK/SS
–1
TRACK/SS
ON(MIN)
OFF(MIN)
(Note 4)
(Note 4)
100
400
Minimum Off Time
250
50
R
PLLIN Input Resistance
PLLIN
I
Current into DRV Pin
V
= 1.5V, I
= 1A, DRV = 5V
20
27
DRVCC
CC
OUT
OUT
CC
R
Resistor Between V
and V
FB
60.098
60.4
1.18
1.4
60.702
FBHI
OUT_LCL
V
V
Margin Reference Voltage
MPGM
, V
MARG0, MARG1 Voltage Thresholds
V
MARG0 MARG1
PGOOD Output
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
V
V
V
Rising
Falling
7
10
–10
1.5
13
–13
3
%
%
%
V
ΔV
FB
FBH
–7
ΔV
FBL
FB
Returning (Note 4)
ΔV
FB(HYS)
FB
V
PGL
PGOOD Low Voltage
I
= 5mA
0.15
0.4
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: Remote sense amplifier recommended for ≤3.3V output.
Note 4: 100% tested at wafer sort only.
Note 5: See output current derating curves for different V , V
and T .
IN OUT
A
Note 2: The LTM4603/LTM4603-1 is tested under pulsed load conditions
such that T ≈ T . The LTM4603E/LTM4603E-1 are guaranteed to meet
J
A
performance specifications from 0°C to 85°C. Specifications over the
–40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM4603I/LTM4603I-1 are guaranteed over the –40°C to 85°C operating
temperature range.
4603fb
4
LTM4603/LTM4603-1
(See Figure 18 for all curves)
typical perForMance characteristics
Efficiency vs Load Current
with 20VIN
Efficiency vs Load Current
with 5VIN
Efficiency vs Load Current
with 12V
100
95
90
85
80
75
70
65
60
55
50
45
40
100
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
12V , 1.2V
60
55
50
45
40
5V , 0.6V
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
12V , 1.5V
IN
20V , 1.5V
IN
5V , 1.2V
IN
OUT
OUT
OUT
OUT
12V , 1.8V
IN
20V , 1.8V
IN
5V , 1.5V
IN
12V , 2.5V
IN
20V , 2.5V
IN
5V , 1.8V
IN
12V , 3.3V
20V , 3.3V
5V , 2.5V
IN
IN
IN
12V , 5V
20V , 5V
5V , 3.3V
IN
IN
OUT
IN
OUT
0
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
2
3
4
5
6
7
1
1
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
4603 G01
4603 G02
4603 G03
1.2V Transient Response
1.5V Transient Response
1.8V Transient Response
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
V
V
V
OUT
OUT
OUT
50mV/DIV
50mV/DIV
50mV/DIV
4603 G05
4603 G04
4603 G06
25µs/DIV
25µs/DIV
25µs/DIV
1.5V AT 3A/µs LOAD STEP
1.2V AT 3A/µs LOAD STEP
1.8V AT 3A/µs LOAD STEP
C
: 1× 22µF, 6.3V CERAMIC
C
: 1× 22µF, 6.3V CERAMIC
C
: 1× 22µF, 6.3V CERAMIC
OUT
OUT
OUT
1× 330µF, 4V SANYO POSCAP
1× 330µF, 4V SANYO POSCAP
1× 330µF, 4V SANYO POSCAP
2.5V Transient Response
3.3V Transient Response
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
V
V
OUT
OUT
50mV/DIV
50mV/DIV
4603 G08
4603 G07
25µs/DIV
25µs/DIV
3.3V AT 3A/µs LOAD STEP
2.5V AT 3A/µs LOAD STEP
C
: 1× 22µF, 6.3V CERAMIC
C
: 1× 22µF, 6.3V CERAMIC
OUT
OUT
1× 330µF, 4V SANYO POSCAP
1× 330µF, 4V SANYO POSCAP
4603fb
5
LTM4603/LTM4603-1
typical perForMance characteristics
Start-Up, IOUT = 6A
(See Figure 18 for all curves)
Short-Circuit Protection,
IOUT = 0A
Start-Up, IOUT = 0A
(Resistive Load)
V
V
V
OUT
0.5V/DIV
OUT
OUT
0.5V/DIV
0.5V/DIV
I
IN
I
0.5A/DIV
IN
I
IN
2A/DIV
0.5A/DIV
4603 G10
4603 G09
4603 G11
1ms/DIV
1ms/DIV
V
V
C
= 12V
OUT
OUT
100µs/DIV
V
V
C
= 12V
OUT
OUT
V
V
C
= 12V
IN
OUT
OUT
IN
IN
= 1.5V
= 1.5V
= 1.5V
= 1× 22µF, 6.3V CERAMIC
= 1× 22µF, 6.3V CERAMIC
= 1× 22µF, 6.3V CERAMIC
1× 330µF, 4V SANYO POSCAP
1× 330µF, 4V SANYO POSCAP
1× 330µF, 4V SANYO POSCAP
SOFT-START = 3.9nF
SOFT-START = 3.9nF
SOFT-START = 3.9nF
Short-Circuit Protection,
OUT = 6A
I
VIN to VOUT Step-Down Ratio
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3.3V OUTPUT WITH
82.5k FROM V
OUT
TO f
SET
V
OUT
5V OUTPUT WITH
150k RESISTOR
0.5V/DIV
ADDED FROM f
TO GND
SET
5V OUTPUT WITH
NO RESISTOR ADDED
FROM f TO GND
I
IN
SET
2A/DIV
2.5V OUTPUT
1.8V OUTPUT
1.5V OUTPUT
1.2V OUTPUT
4603 G12
100µs/DIV
V
V
C
= 12V
OUT
OUT
IN
= 1.5V
= 1× 22µF, 6.3V CERAMIC
1× 330µF, 4V SANYO POSCAP
0
2
4
6
8
10 12 14 16 18 20
SOFT-START = 3.9nF
INPUT VOLTAGE (V)
4603 G13
4603fb
6
LTM4603/LTM4603-1
(See Package Description for Pin Assignment)
pin Functions
V (Bank 1): Power Input Pins. Apply input voltage be-
DRV (Pin E12): This pin normally connects to INTV
CC CC
IN
tween these pins and PGND pins. Recommend placing
for powering the internal MOSFET drivers. This pin can
be biased up to 6V from an external supply with about
50mA capability, or an external circuit shown in Figure
16. This improves efficiency at the higher input voltages
by reducing power dissipation in the module.
input decoupling capacitance directly between V pins
IN
and PGND pins.
V
(Bank 3): Power Output Pins. Apply output load
OUT
between these pins and PGND pins. Recommend placing
outputdecouplingcapacitancedirectlybetweenthesepins
and PGND pins. See Figure 15.
INTV (Pin A7): This pin is for additional decoupling of
CC
the 5V internal regulator.
PGND (Bank 2): Power ground pins for both input and
PLLIN (Pin A8): External Clock Synchronization Input
to the Phase Detector. This pin is internally terminated
to SGND with a 50k resistor. Apply a clock with a high
output returns.
–
V
(Pin M12): (–) Input to the Remote Sense Ampli-
OSNS
level above 2V and below INTV . See the Applications
CC
fier. This pin connects to the ground remote sense point.
Information section.
The remote sense amplifier is used for V ≤ 3.3V. Tie
OUT
to INTV if not used.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-
Start Pin. When the module is configured as a master
output, then a soft-start capacitor is placed on this pin
to ground to control the master ramp rate. A soft-start
capacitor can be used for soft-start turn on as a stand
alone regulator. Slave operation is performed by putting
a resistor divider from the master output to ground, and
connecting the center point of the divider to this pin. See
the Applications Information section.
CC
NC1(PinM12):NointernalconnectionontheLTM4603-1.
+
V
(Pin J12): (+) Input to the Remote Sense Ampli-
OSNS
fier. This pin connects to the output remote sense point.
The remote sense amplifier is used for V
to ground if not used.
≤ 3.3V. Tie
OUT
NC2 (Pin J12): No internal connection on the LTM4603-1.
DIFFV (Pin K12): Output of the Remote Sense Ampli-
OUT
MPGM (Pin A12): Programmable Margining Input. A re-
sistor from this pin to ground sets a current that is equal
to 1.18V/R. This current multiplied by 10kW will equal a
value in millivolts that is a percentage of the 0.6V refer-
ence voltage. See Applications Information. To parallel
LTM4603s, each requires an individual MPGM resistor.
Do not tie MPGM pins together.
fier. This pin connects to the V
if remote sense amplifier is not used.
pin. Leave floating
OUT_LCL
NC3 (Pin K12): No internal connection on the LTM4603-1.
TOP VIEW
A
B
C
D
E
V
IN
f
SET
BANK 1
MARG0
MARG1
DRV
CC
PGND
BANK 2
F
V
FB
G
H
J
PGOOD
SGND
+
V
(NC2, LTM4603-1)
(NC3, LTM4603-1)
OSNS
K
L
M
DIFFV
V
OUT
OUT
BANK 3
V
V
OUT_LCL
–
(NC1, LTM4603-1)
OSNS
1
2 3 4 5 6 7 8 9 10 11 12
4603fb
7
LTM4603/LTM4603-1
(See Package Description for Pin Assignment)
pin Functions
f
(Pin B12): Frequency Set Internally to 1MHz. An
COMP (Pin A11): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.7V corresponding to zero
sense voltage (zero current).
SET
external resistor can be placed from this pin to ground
to increase frequency. See the Applications Information
section for frequency adjustment.
V
(Pin F12): The Negative Input of the Error Ampli-
FB
fier. Internally, this pin is connected to V
with a
PGOOD (Pin G12): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within 10% of the regulation point,
after a 25µs power bad mask timer expires.
OUT_LCL
60.4k precision resistor. Different output voltages can be
programmed with an additional resistor between V and
FB
SGND pins. See the Applications Information section.
MARG0 (Pin C12): This pin is the LSB logic input for the
margining function. Together with the MARG1 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See the Applications Information section.
RUN (Pin A10): Run Control Pin. A voltage above 1.9V
will turn on the module, and when below 1V, will turn
off the module. A programmable UVLO function can be
accomplished by connecting to a resistor divider from
V to ground. See Figure 1. This pin has a 5.1V Zener to
IN
ground. Maximum pin voltage is 5V. Limit current into the
RUN pin to less than 1mA.
MARG1 (Pin D12): This pin is the MSB logic input for the
margining function. Together with the MARG0 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See the Applications Information section.
V
(Pin L12): V
connects directly to this pin to
OUT
OUT_LCL
bypass the remote sense amplifier, or DIFFV
connects
OUT
to this pin when the remote sense amplifier is used.
V
V
can be connected to V
is internally connected to V
on the LTM4603-1.
OUT_LCL
OUT_LCL
OUT
OUT
SGND (Pin H12): Signal Ground. This pin connects to
PGND at output capacitor point.
through 50W in
the LTM4603-1.
4603fb
8
LTM4603/LTM4603-1
siMpliFieD block DiagraM
V
OUT_LCL
V
IN
V
OUT
1M
>1.9V = ON
<1V = OFF
MAX = 5V
(50Ω, LTM4603-1)
R1
R2
RUN
PGOOD
COMP
UVLO
FUNCTION
V
IN
4.5V TO 20V
+
5.1V
ZENER
1.5µF
C
IN
60.4k
INTERNAL
COMP
POWER CONTROL
Q1
Q2
SGND
1µH
V
1.5V
6A
OUT
MARG1
MARG0
22µF
V
FB
50k 50k
+
f
SET
R
SET
C
OUT
40.2k
33.2k
PGND
MPGM
TRACK/SS
PLLIN
INTV
CC
10k
–
C
NOT INCLUDED
10k
SS
V
V
OSNS
–
+
IN THE LTM4603-1
–
+
50k
10k
4.7µF
OSNS
V
V
= NC1
= NC2
OUT
OSNS
OSNS
+
INTV
DRV
CC
CC
DIFFV
= NC3
10k
DIFFV
OUT
4603 F01
Figure 1. Simplified LTM4603/LTM4603-1 Block Diagram
T = 25°C, VIN = 12V. Use Figure 1 configuration.
Decoupling requireMents
A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
IN
External Input Capacitor Requirement
IN
I
= 6A
20
µF
OUT
(V = 4.5V to 20V, V
= 1.5V)
OUT
C
OUT
External Output Capacitor Requirement
(V = 4.5V to 20V, V = 1.5V)
I
= 6A
100
200
µF
OUT
IN
OUT
4603fb
9
LTM4603/LTM4603-1
operation
Power Module Description
off and bottom FET Q2 is turned on and held on until the
overvoltage condition clears.
The LTM4603 is a standalone nonisolated switching mode
DC/DC power supply. It can deliver up to 6A of DC output
current with few external input and output capacitors.
This module provides precisely regulated output voltage
Pulling the RUN pin below 1V forces the controller into its
shutdown state, turning off both Q1 and Q2. At low load
current, the module works in continuous current mode by
default to achieve minimum output ripple voltage.
programmable via one external resistor from 0.6V to
DC
5.0V over a 4.5V to 20V wide input voltage. The typical
DC
When DRV pin is connected to INTV an integrated
CC
CC
application schematic is shown in Figure 18.
5V linear regulator powers the internal gate drivers. If a
The LTM4603 has an integrated constant on-time current
mode regulator, ultralow R
5V external bias supply is applied on the DRV pin, then
CC
FETs with fast switching
an efficiency improvement will occur due to the reduced
powerlossintheinternallinearregulator.Thisisespecially
true at the high end of the input voltage range.
DS(ON)
speedandintegratedSchottkydiodes.Thetypicalswitching
frequency is 1MHz at full load. With current mode control
and internal feedback loop compensation, the LTM4603
modulehassufficientstabilitymarginsandgoodtransient
performance under a wide range of operating conditions
andwithawiderangeofoutputcapacitors,evenallceramic
output capacitors.
The LTM4603 has a very accurate differential remote
sense amplifier with very low offset. This provides for
very accurate output voltage measurement at the load.
The MPGM pin, MARG0 pin and MARG1 pin are used to
supportvoltagemargining,wherethepercentageofmargin
is programmed by the MPGM pin, and the MARG0 and
MARG1 select margining.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limit. Besides, foldback current limiting is provided in an
overcurrent condition while V drops. Internal overvolt-
age and undervoltage comparators pull the open-drain
PGOOD output low if the output feedback voltage exits a
10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET Q1 is turned
FB
The PLLIN pin provides frequency synchronization of the
device to an external clock. The TRACK/SS pin is used
for power supply tracking and soft-start programming.
4603fb
10
LTM4603/LTM4603-1
applications inForMation
The typical LTM4603 application circuit is shown in Fig-
ure 18. External component selection is primarily deter-
mined by the maximum load current and output voltage.
RefertoTable2forspecificexternalcapacitorrequirements
for a particular application.
where %V
is the percentage of V
OUT(MARGIN)
you want to
OUT
margin, and V
OUT
is the margin quantity in volts:
VOUT
1.18V
RPGM
=
•
•10k
0.6V VOUT(MARGIN)
where R
is the resistor value to place on the MPGM
PGM
pin to ground.
V to V
Step-Down Ratios
IN
OUT
There are restrictions in the maximum V and V
step
IN
OUT
The margining voltage, V
, will be added or
OUT(MARGIN)
down ratio that can be achieved for a given input voltage.
subtractedfromthenominaloutputvoltageasdetermined
by the state of the MARG0 and MARG1 pins. See the truth
table below:
These constraints are shown in the Typical Performance
Characteristics curves labeled V to V
Step-Down
OUT
IN
Ratio.Notethatadditionalthermalderatingmayapply.See
the Thermal Considerations and Output Current Derating
section of this data sheet.
MARG1
LOW
MARG0
LOW
MODE
NO MARGIN
MARGIN UP
MARGIN DOWN
NO MARGIN
LOW
HIGH
LOW
Output Voltage Programming and Margining
HIGH
HIGH
HIGH
ThePWMcontrollerhasaninternal0.6Vreferencevoltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
Input Capacitors
internal feedback resistor connects V
together. The V
and V pins
OUT
FB
pin is connected between the 1M
LTM4603 module should beconnected to alowACimped-
anceDCsource. Inputcapacitorsarerequiredtobeplaced
adjacenttothemodule.InFigure18,the10µFceramicinput
capacitors are selected for their ability to handle the large
RMS current into the converter. An input bulk capacitor
of 100µF is optional. This 100µF capacitor is only needed
if the input source impedance is compromised by long
inductive leads or traces.
OUT_LCL
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the V
OUT_LCL
pin is not connected to the output, or if the remote sense
amplifier output is not connected to V
. In these
OUT_LCL
cases, the output voltage will default to 0.6V. Adding a
resistor R from the V pin to SGND pin programs
SET
FB
the output voltage:
For a buck converter, the switching duty-cycle can be
estimated as:
60.4k + RSET
VOUT = 0.6
RSET
VOUT
D =
Table 1. RSET Standard 1% Resistor Values vs VOUT
VIN
R
SET
(kW)
Open 60.4
0.6 1.2
40.2
1.5
30.1
1.8
25.5
2
19.1
2.5
13.3
3.3
8.25
5
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
V
OUT
(V)
IOUT(MAX)
ICIN(RMS)
=
• D•(1− D)
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference
offset for margining. A 1.18V reference divided by the
η%
In the above equation, η% is the estimated efficiency of
R
resistor on the MPGM pin programs the current.
PGM
Calculate V
the power module. C can be a switcher-rated electrolytic
IN
:
OUT(MARGIN)
aluminum capacitor, OS-CON capacitor or high value ce-
ramic capacitor. Note the capacitor ripple current ratings
are often based on temperature and hours of life. This
%VOUT
100
VOUT(MARGIN)
=
• VOUT
makes it advisable to properly derate the input capacitor,
4603fb
11
LTM4603/LTM4603-1
applications inForMation
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
Output Capacitors
The LTM4603 is designed for low output ripple voltage.
The bulk output capacitors defined as C
are chosen
OUT
In Figure 18, the 10µF ceramic capacitors are together
used as a high frequency input decoupling capacitor. In a
typical 6A output application, two very low ESR, X5R or
X7R, 10µF ceramic capacitors are recommended. These
decoupling capacitors should be placed directly adjacent
to the module input pins in the PCB layout to minimize
the trace inductance and high frequency AC noise. Each
10µF ceramic is typically good for 2A to 3A of RMS ripple
current. Refer to your ceramics capacitor catalog for the
RMS current ratings.
with low enough effective series resistance (ESR) to meet
theoutputripplevoltageandtransientrequirements. C
OUT
can be a low ESR tantalum capacitor, a low ESR polymer
capacitororaceramiccapacitor. Thetypicalcapacitanceis
200µF if all ceramic output capacitors are used. Additional
output filtering may be required by the system designer
if further reduction of output ripple or dynamic transient
spikes is required. Table 2 shows a matrix of different
output voltages and output capacitors to minimize the
voltage droop and overshoot during a 2.5A/µs transient.
The table optimizes total equivalent ESR and total bulk
capacitance to maximize transient performance.
Multiphase operation with multiple LTM4603 devices in
parallelwilllowertheeffectiveinputRMSripplecurrentdue
to the interleaving operation of the regulators. Application
Note 77 provides a detailed explanation. Refer to Figure 2
for the input capacitor ripple current reduction as a func-
tion of the number of phases. The figure provides a ratio
of RMS ripple current to DC load current as a function of
duty cycle and the number of paralleled phases. Pick the
corresponding duty cycle and the number of phases to
arrive at the correct ripple current value. For example, the
2-phase parallel LTM4603 design provides 10A at 2.5V
output from a 12V input. The duty cycle is DC = 2.5V/12V
= 0.21. The 2-phase curve has a ratio of ~0.25 for a duty
cycle of 0.21. This 0.25 ratio of RMS ripple current to a
DC load current of 10A equals ~2.5A of input RMS ripple
current for the external input capacitors.
Multiphase operation with multiple LTM4603 devices in
parallel will lower the effective output ripple current due to
the interleaving operation of the regulators. For example,
each LTM4603’s inductor current in a 12V to 2.5V multi-
phasedesigncanbereadfromtheInductorRippleCurrent
vs Duty Cycle graph (Figure 3). The large ripple current
at low duty cycle and high output voltage can be reduced
by adding an external resistor from f to ground which
SET
increases the frequency. If we choose the duty cycle of
DC = 2.5V/12V = 0.21, the inductor ripple current for 2.5V
output at 21% duty cycle is ~3A in Figure 3.
0.6
5
2.5V OUTPUT
0.5
5V OUTPUT
4
1.8V OUTPUT
1.5V OUTPUT
1-PHASE
0.4
2-PHASE
3
1.2V OUTPUT
3-PHASE
4-PHASE
6-PHASE
0.3
0.2
0.1
0
3.3V OUTPUT WITH
82.5k ADDED FROM
2
V
TO f
OUT
SET
5V OUTPUT WITH
150k ADDED FROM
1
0
f
TO GND
SET
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
0.2
0.4
0.6
)
0.8
DUTY CYCLE (V /V
)
DUTY CYCLE (V /V
OUT IN
OUT IN
4603 F02
4603 F03
Figure 3. Inductor Ripple Current vs Duty Cycle
Figure 2. Normalized Input RMS Ripple Current
vs Duty Cycle for One to Six Modules (Phases)
4603fb
12
LTM4603/LTM4603-1
applications inForMation
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V /V
)
IN
4603 F04
O
Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI
Figure 4 provides a ratio of peak-to-peak output ripple cur-
Fault Conditions: Current Limit and Overcurrent
rent to the inductor current as a function of duty cycle and
the number of paralleled phases. Pick the corresponding
dutycycleandthenumberofphasestoarriveatthecorrect
output ripple current ratio value. If a 2-phase operation
is chosen at a duty cycle of 21%, then 0.6 is the ratio.
This 0.6 ratio of output ripple current to inductor ripple
of 3A equals 8A of effective output ripple current. Refer
to Application Note 77 for a detailed explanation of output
ripple current reductionas afunctionofparalleled phases.
Foldback
The LTM4603 has a current mode controller which inher-
ently limitsthe cycle-by-cycle inductorcurrent, not only in
steady-state operation but also in response to transients.
To further limit current in the event of an overload condi-
tion,theLTM4603providesfoldbackcurrentlimiting.Ifthe
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
The output ripple voltage has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
Therefore, the output ripple voltage can be calculated with
the known effective output ripple current. The equation:
Soft-Start and Tracking
The TRACK/SS pin provides a means to either soft-start
the regulator or track it to a different power supply. A
capacitor on this pin will program the ramp rate of the
output voltage. A 1.5µA current source will charge up the
external soft-start capacitor to 80% of the 0.6V internal
voltage reference plus or minus any margin delta. This will
ΔV
≈ (ΔI /(8 • f • m • C ) + ESR • ΔI ), where
OUT(P-P)
L OUT L
f is frequency and m is the number of parallel phases.
This calculation process can be easily accomplished by
LTpowerCAD™.
4603fb
13
LTM4603/LTM4603-1
applications inForMation
MASTER
OUTPUT
control the ramp of the internal reference and the output
voltage. The total soft-start time can be calculated as:
R
T
60.4k
TRACK CONTROL
CSS
V
IN
tSOFTSTART = 0.8 • 0.6V ± V
•
(
)
OUT(MARGIN)
R
B
1.5µA
40.2k
100k
V
PLLIN TRACK/SS
IN
SLAVE OUTPUT
PGOOD
V
OUT
When the RUN pin falls below 1.5V, then the TRACK/SS
pin is reset to allow for proper soft-start control when the
regulator is enabled again. Current foldback and forced
continuous mode are disabled during the soft-start pro-
cess. The soft-start function can also be used to control
the output ramp up time, so that another regulator can
be easily tracked to it.
MPGM
RUN
COMP
V
C
OUT
FB
MARG0
MARG1
V
OUT_LCL
LTM4603
C
IN
INTV
CC
CC
DRV
DIFFV
OUT
+
V
V
OSNS
–
OSNS
f
SGND PGND
SET
R
SET
40.2k
4603 F05
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK/SS pin. The output can be tracked up
and down with another regulator. Figure 5 shows an ex-
ample of coincident tracking where the master regulator’s
output is divided down with an external resistor divider
that is the same as the slave regulator’s feedback divider.
The master output must be greater than the slave output
for the tracking to work. Figure 6 shows the coincident
output tracking characteristics.
Figure 5. Coincident Tracking Schematic
MASTER OUTPUT
SLAVE OUTPUT
OUTPUT
VOLTAGE
Ratiometric tracking can be achieved by a few simple
calculationsandtheslewratevalueappliedtothemaster’s
TRACK/SS pin. The TRACK/SS pin has a control range
from 0V to 0.6V. The master’s TRACK/SS pin slew rate
is directly equal to the master’s output slew rate in volts/
time. The equation:
4603 F06
TIME
Figure 6. Coincident Output Tracking Characteristics
Inratiometrictracking, adifferentslewratemaybedesired
MR
SR
• 60.4k = RT
for the slave regulator. R can be solved for when SR is
T
slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach its final value before the master output.
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in volts/time. When coincident
tracking is desired, then MR and SR are equal, thus R
is equal to 60.4k. R is derived from equation:
TB
For example, MR = 1.5V/ms, and SR = 1.2V/ms. Then R
T
B
= 75k. Solve for R to equal 51.1k.
B
0.6V
VFB
60.4k RFB(Slave)
Forapplicationsthatdonotrequiretrackingorsequencing,
RB
=
VFB
VTRACK
RTB
simply tie the TRACK/SS pin to INTV to let RUN control
CC
+
–
the turn on/off. When the RUN pin is below its threshold
or V is below the undervoltage lockout threshold, then
IN
where V is the feedback voltage reference of the regula-
FB
TRACK
TRACK/SS is pulled low.
tor, and V
is 0.6V.
4603fb
14
LTM4603/LTM4603-1
applications inForMation
Run Enable
the system does not have a 5V power rail, the LTM4603
can be directly powered by Vin. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with a logic input not to exceed 5V.
P
= 20mA • (V – 5V)
IN
LDO_LOSS
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
TheLTM4603alsoprovidestheexternalgatedrivervoltage
pin DRV . If there is a 5V rail in the system, it is recom-
CC
mended to connect the DRV pin to the external 5V rail.
CC
R1+ R2
This is especially true for higher input voltages. Do not
VUVLO
=
•1.5V
R2
apply more than 6V to the DRV pin. A 5V output can be
CC
used to power the DRV pin with an external circuit as
CC
See the Simplified Block Diagram (Figure 1).
shown in Figure 16.
Power Good
Parallel Operation of the Module
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a 10% window around the regulation point and tracks
with margining.
The LTM4603 device is an inherently current mode con-
trolleddevice.Parallelmoduleswillhaveverygoodcurrent
sharing. This will balance the thermals on the design. The
voltage feedback equation changes with the variable n as
modules are paralleled:
COMP Pin
60.4k
This pin is the external compensation pin. The module has
already been internally compensated for most output volt-
ages.Table2isprovidedformostapplicationrequirements.
LTpowerCAD is available for control loop optimization.
+ R
FB
n
V
= 0.6V
OUT
R
FB
or equivalently,
60.4k
PLLIN
n
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of an external clock. The
frequency range is 30% around the operating frequency
of 1MHz. A pulse detection circuit is used to detect a clock
on the PLLIN pin to turn on the phase-locked loop. The
pulse width of the clock has to be at least 400ns and the
amplitude at least 2V. The PLLIN pin must be driven from a
lowimpedancesourcesuchasalogicgatelocatedcloseto
the pin. During start-up of the regulator, the phase-locked
loop function is disabled.
RFB
=
VOUT
− 1
0.6V
where n is the number of paralleled modules.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 12, and Figures 13 to 14 for calculating an
approximate θ for the module with various heat sinking
JA
methods. Thermal models are derived from several tem-
peraturemeasurementsatthebenchandthermalmodeling
analysis.ThermalApplicationNote103providesadetailed
explanation of the analysis for the thermal models and the
derating curves. Tables 3 and 4 provide a summary of the
INTV and DRV Connection
CC
CC
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
CC
equivalent θ for the noted conditions. These equivalent
JA
for driving the internal power MOSFETs. Therefore, if
θ
parameters are correlated to the measured values,
JA
4603fb
15
LTM4603/LTM4603-1
applications inForMation
3.5
3.5
6
5
3.0
3.0
20V
20V
IN
IN
2.5
2.0
1.5
1.0
0.5
2.5
2.0
1.5
1.0
0.5
12V
4
3
IN
12V
IN
5V
IN
2
1
0
5V , 1.5V , 0LFM
IN
OUT
5V , 1.5V , 200LFM
IN
IN
OUT
OUT
5V , 1.5V , 400LFM
0
0
4
6
7
0
1
2
3
5
4
6
7
0
1
2
3
5
75
80
85
90
95
LOAD CURRENT (A)
LOAD CURRENT (A)
AMBIENT TEMPERATURE (°C)
4603 F08
4603 F07
4603 F09
Figure 7. 1.5V Power Loss
Figure 8. 3.3V Power Loss
Figure 9. No Heat Sink 5VIN
6
5
6
5
6
5
4
3
4
3
4
3
2
1
0
2
1
0
2
1
0
12V , 1.5V , 0LFM
5V , 1.5V , 0LFM
IN
OUT
IN
OUT
12V , 1.5V , 200LFM
5V , 1.5V , 200LFM
IN
IN
OUT
OUT
IN
IN
OUT
OUT
12V , 1.5V , 400LFM
5V , 1.5V , 400LFM
70
75
80
85
90
95
70
75
80
85
90
95
75
80
85
90
95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4603 F12
4603 F11
4603 F10
12V , 1.5V , 0LFM
IN
OUT
12V , 1.5V , 200LFM
IN
OUT
Figure 10. BGA Heat Sink 5VIN
Figure 12. BGA Heat Sink 12VIN
12V , 1.5V , 400LFM
IN
OUT
Figure 11. No Heat Sink 12VIN
6
5
6
5
4
3
4
3
2
2
1
0
12V , 3.3V , 0LFM
12V , 3.3V , 0LFM
1
0
IN
OUT
IN
IN
OUT
OUT
OUT
12V , 3.3V , 200LFM
12V , 3.3V , 200LFM
IN
IN
OUT
OUT
12V , 3.3V , 400LFM
12V , 3.3V , 400LFM
IN
70
75
80
85
90
95
70
75
80
85
90
95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4603 F13
4603 F14
Figure 14. 12VIN, 3.3VOUT BGA Heat Sink
Figure 13. 12VIN, 3.3VOUT No Heat Sink
4603fb
16
LTM4603/LTM4603-1
applications inForMation
Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18)
TYPICAL MEASURED VALUES
C
VENDORS
PART NUMBER
C
OUT2
VENDORS
PART NUMBER
OUT1
TAIYO YUDEN
TAIYO YUDEN
TDK
JMK316BJ226ML-T501 (22µF, 6.3V)
JMK325BJ476MM-T (47µF, 6.3V)
C3225X5R0J476M (47µF, 6.3V)
SANYO POSCAP
SANYO POSCAP
SANYO POSCAP
6TPE220MIL (220µF, 6.3V)
2R5TPE330M9 (330µF, 2.5V)
4TPE330MCL (330µF, 4V)
V
C
C
C
C
V
(V)
DROOP
(mV)
PEAK TO
PEAK (mV)
RECOVERY
TIME (µs)
LOAD STEP
(A/µs)
R
SET
OUT
IN
IN
OUT1
OUT2
IN
(V)
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
5
(CERAMIC)
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
(BULK)
(CERAMIC)
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
4 × 47µF 6.3V
4 × 47µF 6.3V
(BULK)
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
(kW)
60.4
60.4
60.4
60.4
60.4
60.4
60.4
60.4
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
30.1
30.1
30.1
30.1
30.1
30.1
30.1
30.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
13.3
13.3
13.3
13.3
13.3
13.3
13.3
13.3
8.25
8.25
150µF 35V
150µF 35V
150µF 35V
150µF 35V
5
34
22
68
40
30
26
24
18
30
26
24
18
30
30
26
26
30
30
26
26
37
30
26
26
37
30
26
26
40
34
28
12
40
34
28
18
40
32
28
14
40
32
28
22
20
20
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
5
5
20
40
5
32
60
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
2 × 10µF 25V 150µF 35V
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
12
12
12
12
5
34
68
22
40
20
39
29.5
35
55
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
70
5
25
48
5
24
47.5
68
5
36
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
12
12
12
12
5
35
70
25
48
24
45
32.6
38
61.9
76
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
5
29.5
28
57.5
55
5
5
43
80
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
12
12
12
12
5
38
76
28
55
27
52
36.4
38
70
330µF 4V
330µF 4V
220µF 6.3V
NONE
78
5
37.6
39.5
66
74
5
78.1
119
78
5
330µF 4V
330µF 4V
220µF 6.3V
NONE
12
12
12
12
7
38
34.5
35.8
50
66.3
68.8
98
330µF 4V
330µF 4V
220µF 6.3V
NONE
42
86
7
47
89
7
50
94
7
75
141
86
330µF 4V
330µF 4V
220µF 6.3V
NONE
12
12
12
12
15
20
42
47
88
50
94
69
131
215
217
NONE
110
110
5
NONE
4603fb
17
LTM4603/LTM4603-1
applications inForMation
Table 3. 1.5V Output
DERATING CURVE
Figures 9, 11
Figures 9, 11
Figures 9, 11
Figures 10, 12
Figures 10, 12
Figures 10, 12
V
(V)
POWER LOSS CURVE
Figure 7
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
IN
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
0
15.2
14
Figure 7
200
400
0
None
Figure 7
None
12
Figure 7
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
13.9
11.3
10.25
Figure 7
200
400
Figure 7
Table 4. 3.3V Output
DERATING CURVE
Figure 13
V
(V)
POWER LOSS CURVE
Figure 8
AIR FLOW (LFM)
HEAT SINK
None
θ
(°C/W)
IN
JA
12
0
15.2
14.6
13.4
13.9
11.1
10.5
Figure 13
12
12
12
12
12
Figure 8
200
400
0
None
Figure 13
Figure 8
None
Figure 14
Figure 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
Figure 14
Figure 8
200
400
Figure 14
Figure 8
Heat Sink Manufacturer
Aavid Thermalloy
Part No: 375424B00034G
Phone: 603-224-9988
4603fb
18
LTM4603/LTM4603-1
applications inForMation
and are improved with air flow. The case temperature is
maintained at 100°C or below for the derating curves.
This allows for 4W maximum power dissipation in the
total module with top and bottom heat sinking, and 2W
power dissipation through the top of the module with an
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on pads.
• If vias are placed onto the pads, the the vias must be
approximate θ between 6°C/W to 9°C/W. This equates
JC
capped.
to a total of 124°C at the junction of the device.
• Interstitialvia placement can also beusedifnecessary.
Safety Considerations
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
The LTM4603 modules do not provide isolation from V
IN
to V . There is no internal fuse. If required, a slow blow
OUT
fuse with a rating twice the maximum input current needs
Figure15givesagoodexampleoftherecommendedlayout.
tobeprovidedtoprotecteachunitfromcatastrophicfailure.
Frequency Adjustment
Layout Checklist/Example
The LTM4603 is designed to typically operate at 1MHz
The high integration of LTM4603 makes the PCB board
layoutverysimpleandeasy.However,tooptimizeitselectri-
cal and thermal performance, some layout considerations
are still necessary.
across most input conditions. The f
pin is typically
SET
left open. The switching frequency has been optimized
for maintaining constant output ripple noise over most
operating ranges. The 1MHz switching frequency and
the 400ns minimum off time can limit operation at higher
• Use large PCB copper areas for high current path, in-
cluding V , PGND and V . It helps to minimize the
IN
OUT
duty cycles like 5V to 3.3V , and produce excessive
IN
OUT
PCB conduction loss and thermal stress.
inductor ripple currents for lower duty cycle applications
• Place high frequency ceramic input and output capaci-
such as 20V to 5V . The 5V and 3.3V drop
IN
OUT
OUT
OUT
tors next to the V , PGND and V
pins to minimize
out curves are modified by adding an external resistor on
IN
OUT
high frequency noise.
the f pin to allow for lower input voltage operation, or
SET
higher input voltage operation.
• Place a dedicated power ground layer underneath the
unit.
V
IN
C
C
IN
IN
GND
SIGNAL
GND
C
C
OUT
OUT
V
OUT
4603 F15
Figure 15. Recommended Layout
4603fb
19
LTM4603/LTM4603-1
applications inForMation
Example for 5V Output
Example for 3.3V Output
LTM4603 minimum on-time = 100ns
LTM4603 minimum on-time = 100ns
t
= [(V
• 10pF)/I
], for V
> 4.8V use 4.8V
t
= [(V
• 10pF)/I
]
ON
OUT
fSET
OUT
ON
OUT
fSET
LTM4603 minimum off-time = 400ns
= t – t , where t = 1/Frequency
LTM4603 minimum off-time = 400ns
t = t – t , where t = 1/Frequency
OFF
t
OFF
ON
ON
Duty Cycle = t /t or V /V
Duty Cycle (DC) = t /t or V /V
ON OUT IN
ON
OUT IN
Equations for setting frequency:
=(V /(3•R )),for20Voperation,I
Equations for setting frequency:
I
=201µA,t
I
t
= [V /(3 • R
)], for 20V operation, I
fSET ON
= 201µA,
fSET
fSET
IN
fSET
fSET
ON
fSET
IN
fSET
=[(4.8•10pF)/I ], t =239ns, wheretheinternalR
= [(3.3 • 10pF)/I
], t = 164ns, where the internal
fSET ON
fSET
ON
is33.2k.Frequency=(V /(V • t ))=(5V/(20•239ns))
R
is 33.2k. Frequency = [V /(V • t )] = [3.3V/
OUT IN ON
fSET OUT IN ON
~ 1MHz. The inductor ripple current begins to get high at
the higherinputvoltagesduetoa largervoltageacross the
inductor. This is noted in the Inductor Ripple Current vs
Duty Cycle graph at ~5A at 25% duty cycle. The inductor
ripplecurrentcanbeloweredatthehigherinputvoltagesby
(20•164ns)]~1MHz.Theminimumon-timeandminimum
off-time are within specification at 164ns and 836ns.
However, the4.5Vinputto3.3Voutputcircuitwillnotmeet
theminimumoff-timespecificationof400ns(t =733ns,
ON
Frequency = 1MHz, t = 267ns).
OFF
addinganexternalresistorfromf togroundtoincrease
SET
Solution
theswitchingfrequency.A3Aripplecurrentischosen,and
thetotalpeakcurrentisequalto1/2ofthe3Aripplecurrent
plus the output current. The 5V output current is limited
to 5A, so total peak current is less than 6.5A. This is below
the 7A peak specified value. A 150k resistor is placed from
Lower the switching frequency at lower input voltages to
allowforhigherdutycycles,andmeetthe400nsminimum
off-timeat4.5Vinputvoltage.Theoff-timeshouldbeabout
500ns with 100ns guard band included. The duty cycle
f
to ground, and the parallel combination of 150k and
SET
for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/t , or
OFF
33.2k equates to 27.2k. The I
calculation with 27.2k
fSET
(1–0.73)/500ns=540kHz.Theswitchingfrequencyneeds
and 20V input voltage equals 245µA. This equates to a t
ON
tobeloweredto540kHzat4.5Vinput. t =DC/frequency,
ON
of 196ns. This will increase the switching frequency from
1MHz to ~1.28MHz for the 20V to 5V conversion. The
minimum on time is above 100ns at 20V input. Since
the switching frequency is approximately constant over
input and output conditions, then the lower input voltage
range is limited to 10V for the 1.28MHz operation due to
or 1.35µs. The f pin voltage is 1/3 of V , and the I
SET
IN
fSET
fSET
current equates to 45µA with the internal 33.2k. The I
current needs to be 24µA for 540kHz operation. A resistor
can be placed from V to f to lower the effective I
OUT
SET
fSET
current out of the f pin to 24µA. The f pin is 4.5V/3
SET
SET
=1.5V and V
= 3.3V, therefore 82.5k will source 21µA
node and lower the I
OUT
the 400ns minimum off time. Equation: t = (V /V )
ON
OUT IN
into the f
current to 24µA.
SET
fSET
• (1/Frequency) equates to a 382ns on time, and a 400ns
This enables the 540kHz operation and the 4.5V to 20V
input operation for down converting to 3.3V output. The
frequency will scale from 540kHz to 1.2MHz over this
input range. This provides for an effective output current
of 5A over the input range.
off time. The V to V Step-Down Ratio curve reflects
IN
OUT
an operating range of 10V to 20V for 1.28MHz operation
with a 150k resistor to ground, and an 8V to 16V operation
for f floating. These modifications are made to provide
SET
wider input voltage ranges for the 5V output designs while
limiting the inductor ripple current, and maintaining the
400ns minimum off time.
4603fb
20
LTM4603/LTM4603-1
applications inForMation
V
OUT
TRACK/SS CONTROL
V
IN
10V TO 20V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
5V
5A
IN
100k 100k
OUT
PGOOD
V
OUT
C3
C6 100pF
+
100µF
6.3V
MPGM
RUN
V
FB
REFER TO
MARG0
MARG1
V
OUT_LCL
SANYO POSCAP TABLE 2
COMP
INTV
DRV
LTM4603
CC
CC
5% MARGIN
DIFFV
V
OUT
–
R1
392k
1%
INTV
CC
OSNS
C2
10µF
25V
V
+
OSNS
f
SGND PGND
SET
C1
10µF
25V
R
R
SET
8.25k
fSET
150k
MARGIN CONTROL
IMPROVE
EFFICIENCY
SOT-323
FOR ≥12V INPUT
DUAL
CMSSH-3C3
4603 F16
Figure 16. 5V at 5A Design Without Differential Amplifier
V
OUT
TRACK/SS CONTROL
V
IN
4.5V TO 20V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
3.3V
5A
IN
100k 100k
OUT
PGOOD
V
OUT
C6 100pF
PGOOD
MPGM
RUN
V
FB
C3
MARG0
MARG1
V
OUT_LCL
+
100µF
COMP
INTV
DRV
LTM4603
6.3V
CC
CC
SANYO POSCAP
DIFFV
OUT
+
C2
V
V
OSNS
R1
392k
10µF
25V
–
OSNS
R
f
fSET
C1
10µF
25V
SGND PGND
SET
R
SET
82.5k
13.3k
5% MARGIN
MARGIN CONTROL
4603 F17
Figure 17. 3.3V at 5A Design
4603fb
21
LTM4603/LTM4603-1
applications inForMation
CLOCK SYNC
C5
V
OUT
0.01µF
V
IN
4.5V TO 20V
REVIEW TEMPERATURE
R2
100k
R4
V
PLLIN TRACK/SS
V
1.5V
6A
IN
DERATING CURVE
C3 100pF
100k
OUT
PGOOD
V
OUT
+
C
22µF
6.3V
C
OUT2
470µF
6.3V
PGOOD
MPGM
RUN
V
OUT1
FB
MARG0
MARG1
V
OUT_LCL
MARGIN
CONTROL
ON/OFF
COMP
INTV
DRV
LTM4603
CC
CC
DIFFV
V
OUT
+
C
IN
+
R1
392k
BULK
O PT.
OSNS
–
V
OSNS
C
IN
TABLE 2
f
10µF
SGND PGND
SET
R
SET
40.2k
REFER TO
TABLE 2
25V
×2 CER
4603 F18
5% MARGIN
Figure 18. Typical 4.5V to 20VIN, 1.5V at 6A Design
CLOCK SYNC 0° PHASE
2.5V
R10
60.4k
1.2V
R9
60.4k
4.5V TO 16V
R1
R2
V
PLLIN TRACK/SS
IN
1.2V AT 6A
100k 100k
C10
10µF
25V
C1
10µF
25V
PGOOD
V
OUT
C6 100pF
C4
22µF
6.3V
MPGM
RUN
V
FB
MARG0
MARG1
V
OUT_LCL
MARGIN
CONTROL
COMP
INTV
DRV
LTM4603
+
C5
470µF
6.3V
CC
CC
C12
0.1µF
DIFFV
OUT
+
V
V
OSNS
LTC6908-1
+
–
OSNS
1
2
3
4
5
6
V
OUT1
R5
392k
f
SGND PGND
SET
R7
60.4k
R11
118k
GND OUT2
SET MOD
2-PHASE
CLOCK SYNC 180° PHASE
2.5V
R4
OSCILLATOR
C3
0.01µF
4.5V TO 16V
R3
V
PLLIN TRACK/SS
IN
2.5V AT 6A
100k 100k
C11*
100µF
25V
C2
10µF
25V
+
PGOOD
V
OUT
C6 100pF
C7
22µF
6.3V
MPGM
RUN
V
FB
MARG0
MARG1
MARGIN
CONTROL
COMP
LTM4603
+
C8
470µF
6.3V
INTV
V
OUT_LCL
CC
CC
DRV
DIFFV
OUT
+
V
V
OSNS
–
OSNS
R6
392k
f
SGND PGND
SET
R8
19.1k
4603 F19
*C11 OPTIONAL TO REDUCE LC RINGING.
NOT NEEDED FOR LOW INDUCTANCE PLANE CONNECTIONS
Figure 19. 2-Phase, 2.5V and 1.2V at 6A with Coincident Tracking
4603fb
22
LTM4603/LTM4603-1
typical application
4603fb
23
LTM4603/LTM4603-1
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Z
b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
4603fb
24
LTM4603/LTM4603-1
revision history (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
8/11
Updated Note 2 test parameters.
Updated the usage of Remote Sense Amplifier pins.
4
7
Updated the f pin description.
8
SET
Updated the Simplified Block Diagram.
Added additional information for the tracking applications.
Updated the Frequency Adjustment section and equations.
Updated the example circuits.
9
14
19, 20
22, 23
26
Added a package photo.
Updated the Related Parts information.
26
4603fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LTM4603/LTM4603-1
typical application
3.3V at 5A, LTM4603-1 (No Remote Sense Amplifier)
TRACK/SS
CONTROL
V
IN
4.5V TO 20V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
3.3V
5A
IN
100k 100k
OUT
PGOOD
V
OUT
C6
100pF
PGOOD
MPGM
RUN
V
+
C3
100µF
6.3V
FB
MARG0
MARG1
COMP
INTV
DRV
LTM4603-1
V
CC
CC
OUT_LCL
NC3
R
R1
392k
R
fSET
SET
C2
NC2
NC1
82.5k
13.3k
10µF
35V
f
C1
SGND PGND
SET
10µF
35V
4603 TA05
5% MARGIN
MARGIN CONTROL
package photograph
2.82mm
15mm
15mm
relateD parts
PART NUMBER
DESCRIPTION
COMMENTS
LTM4628
Dual 8A, 26V, DC/DC µModule Regulator
0.6V ≤ V
≤ 5V, Remote Sense Amplifier, Internal Temperature Sensing
OUT
Output, 15mm × 15mm × 4.32mm LGA
LTM4627
20V, 15A DC/DC µModule Regulator
26V, 6A DC/DC µModule Regulator
0.6V ≤ V ≤ 5V, PLL Input, Remote Sense Amplifier, V
Tracking,
OUT
OUT
15mm × 15mm × 4.32mm LGA
LTM4618
LTM4606
0.8V ≤ V
≤ 5V, PLL Input, V
Tracking, 9mm × 15mm × 4.32mm LGA
Tracking and Margining,
OUT
OUT
28V, 6A EN55022 Class B DC/DC µModule Regulator
0.6V ≤ V
≤ 5V, PLL Input, V
OUT
OUT
15mm × 15mm × 2.82mm LGA
LTM4601AHV
28V, 12A DC/DC µModule Regulator
0.6V ≤ V ≤ 5V, PLL Input, Remote Sense Amplifier, V
Tracking and
OUT
OUT
Margining, 15mm × 15mm × 2.82mm LGA
LTM8025
LTM6908
36V , 3A DC/DC µModule Regulator
0.8V ≤ V ≤ 24V, CLK Input, 9mm × 15mm × 4.32mm LGA Package
IN
OUT
50kHz to 10MHz Dual Output Oscillator
90° or 180° Phase Shift Between Outputs, Optional Spread Spectrum
Frequency Modulation, 2mm × 3mm DFN
4603fb
LT 0811 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
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LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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