LTM4608EV-PBF [Linear]
Low VIN, 8A DC/DC μModuleTM with Tracking, Margining, and Frequency Synchronization; 低VIN , 8A DC / DC μModuleTM与跟踪,裕度调节和频率同步型号: | LTM4608EV-PBF |
厂家: | Linear |
描述: | Low VIN, 8A DC/DC μModuleTM with Tracking, Margining, and Frequency Synchronization |
文件: | 总24页 (文件大小:302K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTM4608
Low V , 8A DC/DC
IN
µModuleTM with Tracking, Margining,
and Frequency Synchronization
FEATURES
DESCRIPTION
TheLTM®4608isacomplete8AswitchmodeDC/DCpower
supply. Included in the package are the switching control-
ler, power FETs, inductor and all support components.
Operating over an input voltage range of 2.375V to 5.5V,
the LTM4608 supports an output voltage range of 0.6V
■
Complete Standalone Power Supply
■
1.5% Output Voltage Regulation
■
2.375V to 5.5V Input Voltage Range
■
8A DC, 10A Peak Output Current
■
0.6V Up to 5V Output
■
Output Voltage Tracking and Margining
Power Good Tracks Margining
to 5V, set by a single external resistor. This high efficiency
design delivers up to 8A continuous current (10A peak).
Only bulk input and output capacitors are needed.
■
■
■
■
■
■
■
■
■
■
■
Multiphase Operation
Parallel Current Sharing
The low profile package (2.8mm) enables utilization of
unused space on the back side of PC boards for high
density point-of-load regulation. The high switching
frequency and a current mode architecture enable a very
fast transient response to line and load changes without
sacrificing stability. The device supports frequency syn-
chronization, programmable multiphase and/or spread
spectrum operation, output voltage tracking for supply
rail sequencing and voltage margining.
Onboard Frequency Synchronization
Spread Spectrum Frequency Modulation
Overcurrent/Thermal Shutdown Protection
Current Mode Control/Fast Transient Response
Selectable Burst Mode® Operation
Up to 95% Efficiency
Output Overvoltage Protection
Small Surface Mount Footprint, Low Profile
(15mm × 9mm × 2.8mm) LGA Package
Fault protection features include overvoltage protection,
overcurrent protection and thermal shutdown. The power
module is offered in a compact and thermally enhanced
15mm × 9mm × 2.8mm LGA package. The LTM4608 is
Pb-free and RoHS compliant .
APPLICATIONS
■
Telecom, Networking and Industrial Equipment
Storage Systems
■
■
Point of Load Regulation
, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology
Corporation. μModule is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Efficiency vs Load Current
100
3V to 5.5V Input to 1.8V Output DC/DC μModule
95
CLKIN
V
= 3.3V
IN
CLKIN
90
85
V
V
IN
3V TO 5.5V
10μF
OUT
1.8V
100μF
V
V
IN
OUT
V
= 5V
IN
SV
FB
IN
4.87k
SW
I
TH
LTM4608
80
75
70
RUN
I
THM
PGOOD
PLLLPF
TRACK
PGOOD
MGN
V
OUT
V
= 1.8V
CLKOUT GND SGND
OUT
8
4608 TA01a
0
2
4
6
10
LOAD CURRENT (A)
4608 TA01b
4608f
1
LTM4608
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
V , SV ...................................................... –0.3V to 6V
TOP VIEW
IN
IN
A
B
C
D
E
F
G
CLKOUT ....................................................... –0.3V to 2V
GND
V
IN
CNTRL GND
PGOOD, PLLLPF, CLKIN, PHMODE, MODE...–0.3V to V
TH THM
IN
IN
1
2
I , I
, RUN, FB, TRACK,MGN, BSEL.......–0.3V to V
SW
V
, V .......................................–0.3V to (V + 0.3V)
OUT SW
IN
3
Operating Temperature Range (Note 2).... –40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range................... –55°C to 125°C
4
5
6
CNTRL
7
8
9
10
11
GND
V
OUT
LGA PACKAGE
68-PIN (15mm × 9mm × 2.8mm)
T
JMAX
= 125°C, θ = 25°C/W, θ = 7°C/W, θ = 50°C/W, WEIGHT = 1.0g
JA JP JC
ORDER INFORMATION
LEAD FREE FINISH
LTM4608EV#PBF
LTM4608IV#PBF
PART MARKING*
LTM4608V
PACKAGE DESCRIPTION
TEMPERATURE RANGE (NOTE 2)
68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 85°C
68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 85°C
LTM4608V
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
V
Input DC Voltage
Output Voltage
2.375
5.5
V
IN(DC)
V
C
= 10μF × 1, C
= 100μF Ceramic,
OUT(DC)
IN
OUT
FB
100μF POSCAP, R = 6.65k
V
= 2.375V to 5.5V, V
= 1.5V, I = 0A
OUT
1.475
1.468
1.49
1.49
1.505
1.512
V
V
IN
OUT
●
Input Specifications
V
Undervoltage Lockout Threshold SV Rising
2.05
1.85
2.2
2.0
2.35
2.15
V
V
IN(UVLO)
IN
SV Falling
IN
4608f
2
LTM4608
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input Supply Bias Current
V
IN
V
IN
V
IN
= 3.3V, V
= 3.3V, V
= 3.3V, V
= 1.5V, No Switching, Mode = V
IN
= 1.5V, No Switching, Mode = 0V
= 1.5V, Switching Continuous
400
1.15
55
μA
mA
mA
Q(VIN)
OUT
OUT
OUT
V
IN
V
IN
V
IN
= 5V, V
= 5V, V
= 5V, V
= 1.5V, No Switching, Mode = V
IN
= 1.5V, No Switching, Mode = 0V
= 1.5V, Switching Continuous
450
1.3
75
μA
mA
mA
OUT
OUT
OUT
Shutdown, RUN = 0, V = 5V
1
μA
IN
I
Input Supply Current
V
IN
V
IN
V
IN
= 2.375V, V
= 1.5V, I = 5A
OUT
3.75
4.5
2.93
A
A
A
S(VIN)
OUT
= 3.3V, V
= 1.5V, I
= 8A
OUT
OUT
= 5V, V
= 1.5V, I
= 8A
OUT
OUT
Output Specifications
I
Output Continuous Current Range V
(See Output Current Derating
= 1.5V
OUT(DC)
OUT
V
= 3.3V, 5.5V
0
0
8
5
A
A
IN
IN
Curves for Different V , V
V
= 2.375V
IN OUT
and T )
A
●
ΔV
Line Regulation Accuracy
Load Regulation Accuracy
V
V
= 1.5V, V from 2.375V to 5.5V, I
= 0A
0.1
0.2
%/V
OUT(LINE)
OUT
IN
OUT
V
OUT
ΔV
= 1.5V
OUT(LOAD)
OUT
V
V
●
●
= 3.3V, 5.5V, I
= 0A to 8A
LOAD
0.3
0.3
0.75
0.75
%
%
IN
IN
V
OUT
= 2.375V, I
= 0A to 5A
LOAD
V
Output Ripple Voltage
I
= 0A, C
= 1.5V
= 100μF/X5R/Ceramic, V = 5V,
OUT IN
OUT(AC)
OUT
OUT
V
10
mV
P-P
f
f
Switching Frequency
SYNC Capture Range
Turn-On Overshoot
I
= 8A, V = 5V, V = 1.5V
OUT
1.3
1.5
1.7
MHz
MHz
S
OUT
IN
0.75
2.25
SYNC
ΔV
C
= 100μF, V
IN
IN
= 1.5V, I
= 0A
OUT(START)
OUT(LS)
OUT
OUT
OUT
V
= 3.3V
= 5V
10
10
mV
mV
V
t
Turn-On Time
C
= 100μF, V
= 1.5V, I
= 1A,
START
OUT
OUT
OUT
Resistive Load, Track = V , V = 5V
100
15
μs
IN IN
ΔV
Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,
mV
C
V
= 100μF Ceramic, 100μF POSCAP,
OUT
= 5V, V
= 1.5V
OUT
IN
t
I
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load, V = 5V,
OUT
10
μs
SETTLE
IN
V
= 1.5V, C
= 100μF
OUT
Output Current Limit
C
= 100μF
OUT(PK)
OUT
V
= 2.375V, V
= 1.5V
OUT
8
11
13
A
A
A
IN
IN
IN
V
V
= 3.3V, V
= 5V, V
= 1.5V
OUT
= 1.5V
OUT
Control Section
V
FB
Voltage at FB Pin
I
= 0A, V
= 1.5V, V = 2.375V to 5.5V
0.592
0.589
0.596
0.596
0.600
0.603
V
V
OUT
OUT
IN
●
SS Delay
Internal Soft-Start Delay
90
μs
I
FB
0.2
μA
V
RUN Pin On/Off Threshold
RUN Rising
RUN Falling
1.4
1.3
1.55
1.4
1.7
1.5
V
V
RUN
4608f
3
LTM4608
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
CONDITIONS
RUN = V
MIN
TYP
MAX
UNITS
TRACK
Tracking Threshold (Rising)
Tracking Threshold (Falling)
Tracking Disable Threshold
0.57
0.18
V
V
V
IN
RUN = 0V
V
– 0.5
IN
R
FBHI
Resistor Between V
and FB
OUT
9.95
10
10.05
kΩ
Pins
ΔV
PGOOD Range
10
%
PGOOD
%Margining
Output Voltage Margining
Percentage
MGN = V , BSEL = 0V
4
9
14
–4
–9
–14
5
6
%
%
%
%
%
%
IN
MGN = V , BSEL = V
10
11
IN
IN
MGN = V , BSEL = Float
15
–5
–10
–15
16
–6
–11
–16
IN
MGN = 0V, BSEL = 0V
MGN = 0V, BSEL = V
IN
MGN = 0V, BSEL = Float
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4608E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTM4608I is guaranteed and tested
over the –40°C to 85°C temperature range.
4608f
4
LTM4608
TYPICAL PERFORMANCE CHARACTERISTICS per Figure 18 Typcial Application
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Load Current
100
95
90
85
80
75
70
100
95
100
95
CONTINUOUS MODE
CONTINUOUS MODE
CONTINUOUS MODE
90
85
90
85
80
75
70
80
75
70
5V 1.2V
IN
OUT
OUT
OUT
OUT
OUT
3.3V 1.2V
IN
OUT
OUT
OUT
OUT
5V 1.5V
IN
2.5V 1.0V
3.3V 1.5V
IN
IN
OUT
OUT
OUT
5V 1.8V
IN
2.5V 1.5V
IN
3.3V 1.8V
IN
3.3V 2.5V
IN
5V 2.5V
IN
2.5V 1.8V
IN
5V 3.3V
IN
0
2
3
4
5
6
7
0
2
4
6
8
1
0
2
4
6
8
LOAD CURRENT (A)
LOAD CURRENT
LOAD CURRENT
4608 G03
4608 G02
4608 G01
Burst Mode Efficiency with
5V Input
VIN to VOUT Step-Down Ratio
VIN to VOUT Step-Down Ratio
100
90
80
70
60
50
40
4.0
3.5
3.0
2.5
4.0
3.5
3.0
2.5
I
= 5A
I
= 8A
OUT
OUT
V
V
V
V
V
= 1.2V
= 1.5V
= 1.8V
= 2.5V
= 3.3V
V
V
V
V
V
= 1.2V
= 1.5V
= 1.8V
= 2.5V
= 3.3V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2.0
1.5
2.0
1.5
1.0
0.5
0
1.0
0.5
0
V
V
V
= 1.5V
= 2.5V
= 3.3V
OUT
OUT
OUT
1
2
4
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
LOAD CURRENT (A)
1
2
4
0
5
6
0
5
6
3
3
V
(V)
V
(V)
IN
IN
4608 G04
4608 G06
4608 G05
Supply Current vs VIN
Load Transient Response
Load Transient Response
1.6
1.4
1.2
1
1A/DIV
V
O
= 1.2V PULSE-SKIPPING MODE
2A/DIV
20mV/DIV
20mV/DIV
0.8
0.6
0.4
0.2
0
V
O
= 1.2V BURST MODE
4608 G08
4608 G09
V
V
= 5V
20μs/DIV
V
V
= 5V
20μs/DIV
IN
OUT
IN
OUT
= 3.3V
= 2.5V
2A/μs STEP
= 100μF X5R
2.5A/μs STEP
= 100μF X5R
C
C
OUT
OUT
C1 = 100pF, C3 = 22pF FROM FIGURE 18
C1 = 120pF, C3 = 47pF FROM FIGURE 18
2.5
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE (V)
4608 G07
4608f
5
LTM4608
TYPICAL PERFORMANCE CHARACTERISTICS per Figure 18 Typcial Application
Load Transient Response
Load Transient Response
Load Transient Response
2A/DIV
2A/DIV
2A/DIV
20mV/DIV
20mV/DIV
20mV/DIV
4608 G10
4608 G11
4608 G12
V
V
= 5V
20μs/DIV
V
V
= 5V
20μs/DIV
V
V
= 5V
20μs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.8V
= 1.5V
= 1.2V
2.5A/μs STEP
= 100μF X5R
2.5A/μs STEP
= 100μF X5R
2.5A/μs STEP
= 2 × 100μF
C
C
C
OUT
OUT
OUT
C1 = NONE, C3 = NONE FROM FIGURE 18
C1 = NONE, C3 = NONE FROM FIGURE 18
C1 = 100pF, C3 = NONE FROM FIGURE 18
Start-Up
VFB vs Temperature
Load Regulation vs Current
0.5
0.4
602
600
598
596
594
592
590
FC MODE
V
V
= 3.3V
IN
OUT
= 1.8V
V
OUT
0.3
V
= 5.5V
IN
0.5V/DIV
0.2
V
IN
= 3.3V
0.1
V
IN
0
2V/DIV
V
= 2.375V
IN
–0.1
–0.2
–0.3
–0.4
–0.5
4608 G13
V
V
C
= 5V
50μs/DIV
IN
= 1.5V
OUT
OUT
= 100μF NO LOAD AND 8A LOAD
(DEFAULT 100μs SOFT-START)
–25
0
50
–50
75
100
25
0
1
2
3
4
5
6
7
8
LOAD CURRENT (A)
TEMPERATURE (°C)
4608 G14
4608 G15
Short-Circuit Protection
(2.5V Short, No Load)
Short-Circuit Protection
(2.5V Short, 4A Load)
2.5V Output Current
3.0
2.5
V
IN
5V/DIV
5V/DIV
2V/DIV
2V/DIV
V
V
IN
OUT
V
OUT
OUT
2.0
1.5
I
LOAD
OUT
5A/DIV
5A/DIV
5A/DIV
I
I
SHORT
OUT
1.0
0.5
0
4608 G17
4608 G18
V
V
= 5V
50μs/DIV
V
V
= 5V
50μs/DIV
IN
OUT
IN
OUT
= 2.5V
= 2.5V
0
5
10
15
20
OUTPUT CURRENT (A)
4608 G16
4608f
6
LTM4608
PIN FUNCTIONS
PHMODE (B4): Phase Selector Input. This pin determines
the phase relationship between the internal oscillator and
CLKOUT. Tie it high for 2-phase operation, tie it low for
V (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input
IN
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
3-phase operation, and float or tie it to V /2 for 4-phase
directly between V pins and GND pins.
IN
IN
operation.
V
(C10-C11, D10-D11, E9-E11, F9-F11, G9-G11):
OUT
MGN (B8): Margining Pin. Tie this pin to V
to disable
Power Output Pins. Apply output load between these pins
and GND pins. Recommend placing output decoupling
capacitance directly between these pins and GND pins.
See Table 1.
OUT
margining. For margining, connect a voltage divider from
V to GND with the center point connected to the MGN
IN
pin. Each resistor ≈ 50k. See Applications Information
and Figure 18.
GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power
Ground Pins for Both Input and Output Returns.
BSEL(B7):MarginingBitSelectPin.TyingBSELlowselects
5%, tying it high selects 10%. Floating it or tying it to
SV (F4): Signal Input Voltage. This pin is internally con-
IN
V /2 selects 15%.
IN
nected to V through a lowpass filter.
IN
TRACK (E5): Output Voltage Tracking Pin. Voltage track-
ing is enabled when the TRACK voltage is below 0.57V.
If tracking is not desired, then connect the TRACK pin to
SGND (E1): Signal Ground Pin. Return ground path for all
analog and low power circuitry. Tie a single connection to
GND in the application.
SV . If TRACK is not tied to SV , then the TRACK pin’s
IN
IN
MODE(B5):ModeSelectInput.Tyingthispinhighenables
voltage needs to be below 0.18V before the chip shuts
down even though RUN is already low. Do not float this
pin. A resistor divider and capacitor can be applied to the
TRACK pin to increase the soft-start time of the regulator.
See Applications Information. Can tie together for parallel
operation and tracking. Load current needs to be present
during track down.
Burst Mode operation. Tying this pin low enables forced
continuous operation. Floating this pin or tying it to V /2
IN
enables pulse-skipping operation.
CLKIN (B3): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with a
50k resistor. The phase locked loop will force the internal
top power PMOS turn on to be synchronized with the
FB(E7):TheNegativeInputoftheErrorAmplifier.Internally,
rising edge of the CLKIN signal. Connect this pin to SV
this pin is connected to V
with a 10k precision resistor.
IN
OUT
to enable spread spectrum modulation. During external
Different output voltages can be programmed with an ad-
ditional resistor between FB and GND pins. In PolyPhase®
operation, tie FB pins together for parallel operation. See
Applications Information for details.
synchronization, make sure the PLLLPF pin is not tied to
V or GND.
IN
PLLLPF (E3): Phase Locked Loop Lowpass Filter. An in-
ternal lowpass filter is tied to this pin. In spread spectrum
mode, placing a capacitor here to SGND controls the slew
rate from one frequency to the next. Alternatively, float-
ing this pin allows normal running frequency at 1.5MHz,
I
(F6): Current Control Threshold and Error Amplifier
TH
Compensation Point. The current comparator threshold
increases with this control voltage. Tie together in parallel
operation.
tying this pin to SV forces the part to run at 1.33 times
IN
I
(F5): Negative Input to the Internal I Differential
TH
THM
its normal frequency (2MHz), tying it to ground forces
the frequency to run at 0.67 times its normal frequency
(1MHz).
Amplifier. Tie this pin to SGND for single phase operation.
For PolyPhase operation, tie the master’s I
while connecting all of the I
to SGND
THM
pins together.
THM
PolyPhase is a registered trademark of Linear Technology Corporation.
4608f
7
LTM4608
PIN FUNCTIONS
SW (C3-C5): Switching Node of the Circuit is Used for
Testing Purposes. This can be connected to copper on
the board for improved thermal performance.
PGOOD (C7): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within 10% of the regulation point.
Disabled during margining.
CLKOUT (F2): Output Clock Signal for PolyPhase Opera-
tion. The phase of CLKOUT is determined by the state of
the PHMODE pin.
RUN (F1): Run Control Pin. A voltage above 1.5V will turn
on the module.
TOP VIEW
A
B
C
D
E
F
G
GND
V
IN
CNTRL GND
1
2
SW
3
4
5
6
CNTRL
7
8
9
10
11
GND
V
OUT
LGA PACKAGE
68-PIN (15mm × 9mm × 2.8mm)
4608f
8
LTM4608
SIMPLIFIED BLOCK DIAGRAM
SV
V
IN
IN
V
INTERNAL
FILTER
IN
2.375 TO 5.5V
+
TRACK
10μF
10μF
10μF
C
IN
MGN
BSEL
SW
M1
M2
PGOOD
MODE
L
V
1.5V
8A
OUT
V
OUT
POWER
CONTROL
RUN
CLKIN
CLKOUT
PHMODE
22μF
22pF
C
OUT
GND
FB
I
TH
10k
INTERNAL
COMP
PLLLPF
R
FB
INTERNAL
FILTER
6.65k
I
THM
SGND
4608 BD
Figure 1. Simplified LTM4608 Block Diagram
Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
10
TYP
MAX
UNITS
C
External Input Capacitor Requirement
I
= 8A
μF
IN
OUT
(V = 2.375V to 5.5V, V
= 1.5V)
IN
OUT
C
External Output Capacitor Requirement
(V = 2.375V to 5.5V, V = 1.5V)
I
= 8A
100
μF
OUT
OUT
IN
OUT
OPERATION
1.5MHz. For switching noise sensitive applications, it can
be externally synchronized from 0.75MHz to 2.25MHz.
Even spread spectrum switching can be implemented in
the design to reduce noise.
The LTM4608 is a standalone nonisolated switch mode
DC/DC power supply. It can deliver up to 8A of DC output
current with few external input and output capacitors.
This module provides precisely regulated output voltage
programmable via one external resistor from 0.6V DC to
5.0V DC over a 2.375V to 5.5V input voltage. The typical
application schematic is shown in Figure 18.
With current mode control and internal feedback loop
compensation, the LTM4608 module has sufficient stabil-
ity margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
TheLTM4608hasanintegratedconstantfrequencycurrent
mode regulator and built-in power MOSFET devices with
fast switching speed. The typical switching frequency is
4608f
9
LTM4608
OPERATION
Multiphase operation can be easily employed with the
synchronizationandphasemodecontrols.Upto12phases
canbecascadedtorunsimultaneouslywithrespecttoeach
otherbyprogrammingthePHMODEpintodifferentlevels.
The LTM4608 has clock in and clock out for poly phasing
multiple devices or frequency synchronization.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limit and thermal shutdown in an overcurrent condition.
Internalovervoltageandundervoltagecomparatorspullthe
open-drain PGOOD output low if the output feedback volt-
age exits a 10% window around the regulation point.
Pulling the RUN pin below 1.3V forces the controller into
its shutdown state, by turning off both M1 and M2 at low
load current. The TRACK pin is used for programming the
output voltage ramp and voltage tracking during start-up.
See Applications Information.
High efficiency at light loads can be accomplished with
selectableBurstModeoperationusingtheMODEpin.These
light load features will accommodate battery operation.
Efficiency graphs are provided for light load operation in
the Typial Performance Characteristics.
The LTM4608 is internally compensated to be stable over
all operating conditions. Table 3 provides a guideline for
input and output capacitances for several operating con-
ditions. The Linear Technology μModule Power Design
Tool is provided for transient and stability analysis. The
FB pin is used to program the output voltage with a single
external resistor to ground.
Output voltage margining is supported, and can be pro-
gramedfrom 5%to 15%usingtheMGNandBSELpins.
The PGOOD pin is disabled during margining
APPLICATIONS INFORMATION
The typical LTM4608 application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 3 for specific external capacitor
requirements for a particular application.
10k +RFB
VOUT = 0.596V •
RFB
Table 2. RFB Resistor vs Output Voltage
V
0.596V
Open
1.2V
10k
1.5V
1.8V
2.5V
3.3V
OUT
R
6.65k
4.87k
3.09k
2.21k
FB
V to V
Step-Down Ratios
IN
OUT
There are restrictions in the maximum V to V
step-
IN
OUT
Input Capacitors
down ratio that can be achieved for a given input voltage.
The LTM4608 is 100% duty cycle, but the V to V
The LTM4608 module should be connected to a low AC
impedance DC source. Three 10μF ceramic capacitors
are included inside the module. Additional input capaci-
tors are only needed if a large load step is required up to
the 4A level. A 47μF to 100μF surface mount aluminum
electrolytic bulk capacitor can be used for more input bulk
capacitance. This bulk input capacitor is only needed if
the input source impedance is compromised by long in-
ductive leads, traces or not enough source capacitance.
If low impedance power planes are used, then this 47μF
capacitor is not needed.
IN
OUT
minimum drop out is still shown as a function of its load
current. For 5V input, all outputs can deliver 8A. For 3.3V
input, all outputs can deliver 8A, except 2.5V which is
limited to 6A.
Output Voltage Programming
The PWM controller has an internal 0.596V reference
voltage. As shown in the Block Diagram, a 10kΩ/0.5%
internal feedback resistor connects V
and FB pins
OUT
together. The output voltage will default to 0.596V with
For a buck converter, the switching duty-cycle can be
estimated as:
no feedback resistor. Adding a resistor R from FB pin
to GND programs the output voltage:
FB
4608f
10
LTM4608
APPLICATIONS INFORMATION
Burst Mode Operation
VOUT
D =
V
The LTM4608 is capable of Burst Mode operation in which
the power MOSFETs operate intermittently based on load
demand, thus saving quiescent current. For applications
where maximizing the efficiency at very light loads is a
high priority, Burst Mode operation should be applied. To
enable Burst Mode operation, simply tie the MODE pin to
IN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
IOUT(MAX)
ICIN(RMS)
=
• D • 1– D
(
)
η%
V . Duringthisoperation, thepeakcurrentoftheinductor
IN
is set to approximately 20% of the maximum peak current
In the above equation, η% is the estimated efficiency of
the power module. The bulk capacitor can be a switcher-
rated electrolytic aluminum capacitor, polymer capacitor
for bulk input capacitance due to high inductance traces
or leads. If a low inductance plane is used to power the
device, then only one 10μF ceramic is required. The three
internal 10μF ceramics are typically rated for 2A of RMS
ripple current, so the ripple current at the worse case for
8A maximum current is 4A or less.
value in normal operation even though the voltage at the
I
pin indicates a lower value. The voltage at the I pin
TH
TH
drops when the inductor’s average current is greater than
the load requirement. As the I voltage drops below 0.2V,
TH
the BURST comparator trips, causing the internal sleep
line to go high and turn off both power MOSFETs.
Insleepmode,theinternalcircuitryispartiallyturnedoff,re-
ducingthequiescentcurrenttoabout450μA.Theloadcur-
rentisnowbeingsuppliedfromtheoutputcapacitor.When
Output Capacitors
the output voltage drops, causing I to rise above 0.25V,
TH
theinternalsleeplinegoeslow, andtheLTM4608resumes
normal operation. The next oscillator cycle will turn on the
top powerMOSFET and theswitching cycle repeats.
The LTM4608 is designed for low output voltage ripple
noise. The bulk output capacitors defined as C
are
OUT
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient require-
Pulse-Skipping Mode Operation
ments. C
can be a low ESR tantalum capacitor, a low
OUT
ESR polymer capacitor or ceramic capacitor. The typical
outputcapacitancerangeisfrom47μFto220μF.Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikesisrequired.Table3showsamatrixofdifferentoutput
voltages and output capacitors to minimize the voltage
droop and overshoot during a 3A/μs transient. The table
optimizes total equivalent ESR and total bulk capacitance
tooptimizethetransientperformance.Stabilitycriteriaare
consideredintheTable3matrix,andtheLinearTechnology
μModule Power Design Tool will be provided for stability
analysis.Multiphaseoperationwillreduceeffectiveoutput
ripple as a function of the number of phases. Application
Note 77 discusses this noise reduction versus output
ripple current cancellation, but the output capacitance
will be more a function of stability and transient response.
The Linear Technology μModule Power Design Tool will
calculatetheoutputripplereductionasthenumberphases
implemented increases by N times.
Inapplicationswherelowoutputrippleandhighefficiency
atintermediatecurrentsaredesired, pulse-skippingmode
should be used. Pulse-skipping operation allows the
LTM4608toskipcyclesatlowoutputloads,thusincreasing
efficiency by reducing switching loss. Floating the MODE
pin or tying it to V /2 enables pulse-skipping operation.
IN
Thisallowsdiscontinuousconductionmode(DCM)opera-
tion down to near the limit defined by the chip’s minimum
on-time (about 100ns). Below this output current level,
the converter will begin to skip cycles in order to main-
tain output regulation. Increasing the output load current
slightly, above the minimum required for discontinuous
conduction mode, allows constant frequency PWM.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
outputrippleisdesired,forcedcontinuousoperationshould
be used. Forced continuous operation can be enabled by
4608f
11
LTM4608
APPLICATIONS INFORMATION
Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step
TYPICAL MEASURED VALUES
C
VENDORS
VALUE
PART NUMBER
C
VENDORS
VALUE
PART NUMBER
10TPD150M
PART NUMBER
10CE100FH
OUT1
OUT2
TDK
22μF, 6.3V
22μF
C3216X7S0J226M
GRM31CR61C226KE15L
C4532X5R0J107MZ
GRM32ER60J107M
Sanyo POSCAP
150μF, 10V
Murata
TDK
C (BULK) VENDORS VALUE
IN
100μF, 6.3V
100μF, 6.3V
Sanyo
100μF, 10V
Murata
V
C
C
C
C
V
(V)
DROOP PEAK-TO- PEAK
RECOVERY
TIME (μs)
LOAD STEP
(A/μs)
R
FB
OUT
IN
IN
OUT1
OUT2
IN
(V)
1.0
1.0
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
3.3
3.3
(CERAMIC) (BULK)* (CERAMIC)
(BULK)
I
C1
C3
(mV)
13
17
13
17
13
17
16
20
16
20
16
16
18
20
16
20
18
20
22
21
21
21
22
21
28
33
30
21
38
39
DEVIATION (mV)
(kΩ)
14.7
14.7
14.7
14.7
14.7
14.7
10
TH
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 1
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 1
22μF × 1
100μF × 1
22μF × 1
100μF × 1
22μF × 1
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
100pF
None
68pF
None
100pF
None
100pF
None
100pF
None
100pF
None
100pF
None
None
None
47pF
None
47pF
None
None
None
47pF
None
47pF
None
None
None
None
None
None
None
None
5
26
34
26
34
26
34
32
41
32
41
32
32
36
41
32
41
36
41
42
42
43
41
44
42
42
60
60
41
74
75
7
3
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 1
150μF × 1
150μF × 1
None
68pF
5
8
3
3.3
3.3
2.5
2.5
5
7
3
None
68pF
10
7
3
3
None
100pF
None
100pF
None
100pF
47pF
8
3
8
3
5
10
8
3
10
3.3
3.3
2.5
2.5
5
3
10
10
10
8
3
10
3
10
3
10
100pF
None
100pF
None
100pF
None
47pF
8
3
6.65
6.65
6.65
6.65
6.65
6.65
4.87
4.87
4.87
4.87
4.87
4.87
3.09
3.09
3.09
3.09
3.09
3.09
5
12
10
12
10
12
8
3
3.3
3.3
2.5
2.5
5
3
3
3
3
3
None
120pF
None
120pF
None
100pF
22pF
5
12
12
12
12
14
10
10
10
10
10
12
3
3.3
3.3
2.5
2.5
5
3
3
3
3
3
5
3
100pF
22pF
3.3
3.3
5
3
3
22pF
3
None
5
3
*Bulk capacitance is optional if V has very low input impedance.
IN
tying the MODE pin to GND. In this mode, inductor cur-
rent is allowed to reverse during low output loads, the I
voltage is in control of the current comparator threshold
throughout,andthetopMOSFETalwaysturnsonwitheach
oscillatorpulse.Duringstart-up,forcedcontinuousmodeis
disabled and inductor current is prevented from reversing
until the LTM4608’s output voltage is in regulation.
Multiphase Operation
TH
For output loads that demand more than 8A of current,
multiple LTM4608s can be cascaded to run out of phase
to provide more output current without increasing input
and output voltage ripples. The CLKIN pin allows the
LTC4608 to synchronize to an external clock (between
0.75MHz and 2.25MHz) and the internal phase locked
4608f
12
LTM4608
APPLICATIONS INFORMATION
loop allows the LTM4608 to lock onto CLKIN’s phase as
well. The CLKOUT signal can be connected to the CLKIN
pin of the following LTM4608 stage to line up both the
frequency and the phase of the entire system. Tying the
the 6th stage (PHMODE is floating) goes back to the 1st
stage. Figure 3 shows the configuration for a 12 phase
configuration
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The RMS input ripple current is reduced by,
and the effective ripple frequency is multiplied by, the
number of phases used (assuming that the input voltage
isgreaterthanthenumberofphasesusedtimestheoutput
voltage). The output ripple amplitude is also reduced by
the number of phases used.
PHMODEpintoSV , SGNDorSV /2(floating)generates
IN
IN
a phase difference (between CLKIN and CLKOUT) of 180°,
120° or 90° respectively, which corresponds to a 2-phase,
3-phase or 4-phase operation. A total of 12 phases can
be cascaded to run simultaneously with respect to each
other by programming the PHMODE pin of each LTM4608
to different levels. For a 6-phase example in Figure 2, the
2nd stage that is 120° out of phase from the 1st stage
can generate a 240° (PHMODE = 0) CLKOUT signal for
the 3rd stage, which then can generate a CLKOUT signal
The LTM4608 device is an inherently current mode con-
trolleddevice.Parallelmoduleswillhaveverygoodcurrent
sharing. This will balance the thermals on the design.
that’s 420°, or 60° (PHMODE = SV ) for the 4th stage.
IN
Tie the I pins of each LTM4608 together to share the
With the 60° CLKIN input, the next two stages can shift
120° (PHMODE = 0) for each to generate a 300° signal for
the 6th stage. Finally, the signal with a 60° phase shift on
TH
current evenly. To reduce ground potential noise, tie the
I
pins of all LTM4608s together and then connect to
THM
(420)
60
0
120
240
180
300
+120
+120
+180
+120
+120
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 1
PHMODE
PHASE 3
S
PHMODE
PHASE 5
PHMODE
PHASE 2
PHMODE
PHASE 4
PHMODE
PHASE 6
VIN
4608 F02
Figure 2. 6-Phase Operation
(390)
30
0
90
180
270
+90
+90
+90
+120
+90
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 1
PHMODE
PHASE 4
PHMODE
PHASE 7
PHMODE
PHASE 10
PHMODE
PHASE 2
(420)
60
120
210
300
150
+90
+90
+120
+90
+90
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 5
PHMODE
PHASE 8
PHMODE
PHASE 11
PHMODE
PHASE 3
PHMODE
PHASE 6
4608 F03
240
330
+90
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 9
PHMODE
PHASE 12
Figure 3. 12-Phase Operation
4608f
13
LTM4608
APPLICATIONS INFORMATION
the SGND at only one point. Figure 19 shows a schematic
of the parallel design. The FB pins of the parallel module
are tied together. With parallel operation, input and out-
put capacitors may be reduced in part according to the
operating duty cycle.
frequency of operation (fundamental) and multiples of the
operating frequency (harmonics).
To reduce this noise, the LTM4608 can run in spread
spectrum operation by tying the CLKIN pin to SV .
IN
In spread spectrum operation, the LTM4608’s internal
oscillator is designed to produce a clock pulse whose
period is random on a cycle-by-cycle basis but fixed
between 70% and 130% of the nominal frequency. This
has the benefit of spreading the switching noise over a
rangeoffrequencies,thussignificantlyreducingthepeak
noise. Spread spectrum operation is disabled if CLKIN is
tied to ground or if it’s driven by an external frequency
synchronization signal. A capacitor value of 0.01μF must
be placed from the PLLLPF pin to ground to control the
slew rate of the spread spectrum frequency change.
Input RMS Ripple Current Cancellation
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current can-
cellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reductionasafunctionofthenumberofinterleavedphases.
Figure 4 shows this graph.
Spread Spectrum Operation
Switchingregulatorscanbeparticularlytroublesomewhere
electromagnetic interference (EMI) is concerned.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pin. The output can be tracked up and
downwithanotherregulator.Themasterregulator’soutput
is divided down with an external resistor divider that is the
Switching regulators operate on a cycle-by-cycle basis to
transfer power to an output. In most cases, the frequency
ofoperationisfixedbasedontheoutputload.Thismethod
of conversion creates large components of noise at the
0.60
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY FACTOR (V /V
)
IN
O
4608 F04
Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Modules (Phases)
4608f
14
LTM4608
APPLICATIONS INFORMATION
sameastheslaveregulator’sfeedbackdividertoimplement
coincident tracking. The LTM4608 uses an accurate 10k
resistor internally for the top feedback resistor. Figure 5
shows an example of coincident tracking:
Thetrackpinofthemastercanbecontrolledbyanexternal
ramp or by R and C in Figure 5 referenced to V . The
SR
SR
IN
RC ramp time can be programmed using equation:
ꢀ
ꢃ
ꢀ
ꢃ
0.596V
t = – ln 1–
•RSR • CSR
ꢂ
ꢅ
ꢀ
ꢂ
ꢁ
ꢃ
ꢅ
ꢂ
ꢅ
10k
V
ꢁ
ꢄ
ꢁ
ꢄ
IN
Slave = 1+
• VTRACK
R
FB4ꢄ
V
TRACK
is the track ramp applied to the slave’s track pin.
has a control range of 0V to 0.596V, or the internal
TRACK
V
MASTER OUTPUT
SLAVE OUTPUT
referencevoltage.WhentheMaster’soutputisdivideddown
withthesameresistorvaluesusedtosettheslave’soutput,
this resistor divider is connected to the slave’s track pin.
The slave will then coincident track with the master until it
reaches its final value. The master will continue to its final
value from the slave’s regulation point. Voltage tracking is
disabled when V
5 will be equal to R for coincident tracking.
is more than 0.596V. R in Figure
TRACK
FB4
FB2
TIME
4608 F06
Figure 6
MASTER
3.3V
7A
CLKIN
V
IN
V
V
I
IN
OUT
5V
C2
100μF
SV
IN
100pF
SW
FB
TIE TO V
IN
LTM4608
C3
R
FB1
FOR DISABLE
AND DEFAULT
RUN
RUN
I
TH
22pF
2.21k
PLLLPF
TRACK
MODE
100μs SOFT-START
THM
TRACK
PGOOD
R
C
SR
SR
BSEL
MGN
PHMODE
3.3V
APPLY A CONTROL
RAMP WITH R AND
CLKOUT GND SGND
SR
C
SR
TIED TO V WHERE
IN
t = –(ln (1 – 0.596/V ) • R • C )
SR
IN
SR
OR APPLY AN EXTERNAL TRACKING RAMP
SLAVE
1.5V
8A
CLKIN
V
V
IN
OUT
+
C4
100μF
POSCAP
C1
100μF
SV
IN
SW
FB
MASTER
LTM4608
3.3V
R
FB2
6.65k
RUN
RUN
I
TH
R
FB3
PLLLPF
TRACK
MODE
I
THM
10k
TRACK
PGOOD
BSEL
R
FB4
6.65k
PHMODE
MGN
1.5V
CLKOUT GND SGND
4608 F05
Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking
4608f
15
LTM4608
APPLICATIONS INFORMATION
Ratiometric tracking can be achieved by a few simple
calculationsandtheslewratevalueappliedtothemaster’s
trackpin.Asmentionedabove,theTRACKpinhasacontrol
range from 0V to 0.596V. The master’s TRACK pin slew
rate is directly equal to the master’s output slew rate in
Volts/Time:
For example: MR = 3.3V/ms and SR = 1.5V/ms. Then
= 22.1k. Solve for R to equal to 4.87k.
R
FB3
FB4
Forapplicationsthatdonotrequiretrackingorsequencing,
simply tie the TRACK pin to SV to let RUN control the
IN
turn on/off. Connecting TRACK to SV also enables the
IN
~100μs of internal soft-start during start-up. Load current
needs to be present during track down.
MR
SR
•10k = RFB3
Power Good
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a 10% window around the regulation point. As shown
in Figure 20, the sequencing function can be realized in a
dualoutputapplicationbycontrollingtheRUNpinsandthe
PGOOD signals from each other. The 1.5V output begins
its soft starting after the PGOOD signal of 3.3V output
becomes high, and 3.3V output starts its shut down after
the PGOOD signal of 1.5V output becomes low. This can
be applied to systems that require voltage sequencing
between the core and sub-power supplies.
tracking is desired, then MR and SR are equal, thus R
FB3
is equal the 10k. R is derived from equation:
FB4
0.596V
RFB4
=
VTRACK
RFB3
VFB VFB
+
–
10k RFB2
where V is the feedback voltage reference of the regula-
FB
tor and V
is 0.596V. Since R is equal to the 10k
TRACK
FB3
top feedback resistor of the slave regulator in equal slew
rate or coincident tracking, then R is equal to R with
FB4
FB2
V
FB
= V
. Therefore R = 10k and R = 6.65k in
TRACK FB3 FB4
Slope Compensation
Figure 5.
Inratiometrictracking, adifferentslewratemaybedesired
for the slave regulator. R can be solved for when SR
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
The module has already been internally compensated for
alloutputvoltages.Table3isprovidedformostapplication
requirements. A spice model will be provided for other
control loop optimization. For single module operation,
FB3
connect I
pin to SGND. For parallel operation, tie I
THM
THM
pins together and then connect to SGND at one point. Tie
I
pins together to share currents evenly for all phases.
TH
4.0
3.5
3.0
2.5
2.0
1.5
1.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.5
5V 1.5V
3.3V 1.5V
IN
OUT
OUT
IN
OUT
OUT
5V 3.3V
IN
3.3V 2.5V
IN
0
0
4
0
2
6
8
4
0
2
6
8
LOAD CURRENT (A)
LOAD CURRENT (A)
4608 F08
4608 F07
Figure 7. 3.3VIN, 2.5V and 1.5VOUT Power Loss
Figure 8. 5VIN, 3.3V and 1.5VOUT Power Loss
4608f
16
LTM4608
APPLICATIONS INFORMATION
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
400LFM
200LFM
0LFM
400LFM
200LFM
0LFM
1
0
80 90
40 50 60 70
100 110 120
80 90
40 50 60 70
100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4608 F10
4608 F09
Figure 9. No Heat Sink with 3.3VIN to 1.5VOUT
Figure 10. BGA Heat Sink with 3.3VIN to 1.5VOUT
9
8
7
6
5
4
3
9
8
7
6
5
4
3
2
2
400LFM
200LFM
0LFM
400LFM
200LFM
0LFM
1
0
1
0
80 90
40 50 60 70
100 110 120
80 90
40 50 60 70
100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4608 F12
4608 F11
Figure 11. No Heat Sink with 5VIN to 1.5VOUT
Figure 12. BGA Heat Sink with 5VIN to 1.5VOUT
9
8
7
6
5
4
3
9
8
7
6
5
4
3
2
2
400LFM
200LFM
0LFM
400LFM
200LFM
0LFM
1
0
1
0
80 90
40 50 60 70
100 110 120
80 90
40 50 60 70
100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4608 F14
4608 F13
Figure 13. No Heat Sink with 3.3VIN to 2.5VOUT
Figure 14. BGA Heat Sink with 3.3VIN to 2.5VOUT
4608f
17
LTM4608
APPLICATIONS INFORMATION
9
8
7
6
5
4
3
9
8
7
6
5
4
3
2
1
0
2
400LFM
200LFM
0LFM
400LFM
200LFM
0LFM
1
0
80 90
40 50 60 70
100 110 120
80 90
40 50 60 70
100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4608 F15
4608 F16
Figure 15. No Heat Sink with 5VIN to 3.3VOUT
Figure 16. BGA Heat Sink with 5VIN to 3.3VOUT
Table 4. 1.5V Output
DERATING CURVE
Figures 9, 11
Figures 9, 11
Figures 9, 11
Figures 10, 12
Figures 10, 12
Figures 10, 12
V
(V)
POWER LOSS CURVE
Figures 7, 8
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
25
IN
3.3, 5
3.3, 5
3.3, 5
3.3, 5
3.3, 5
3.3, 5
0
Figures 7, 8
200
400
0
None
21
Figures 7, 8
None
20
Figures 7, 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
23.5
22
Figures 7, 8
200
400
Figures 7, 8
22
Table 5. 3.3V Output
DERATING CURVE
Figure 15
V
IN
(V)
POWER LOSS CURVE
Figure 8
AIR FLOW (LFM)
HEAT SINK
None
θ
(°C/W)
JA
5
0
25
21
Figure 15
5
5
5
5
5
Figure 8
200
400
0
None
Figure 15
Figure 8
None
20
Figure 16
Figure 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
23.5
22
Figure 16
Figure 8
200
400
Figure 16
Figure 8
22
4608f
18
LTM4608
APPLICATIONS INFORMATION
Output Margining
electrical and thermal performance, some layout con-
siderations are still necessary.
For a convenient system stress test on the LTM4608’s
output, the user can program the LTM4608’s output to
5%, 10% or 15% of its normal operational voltage.
The margin pin with a voltage divider is driven with a small
three-stategateasshowninFigure18,forthethreemargin
states (high, low, no margin). When the MGN pin is low, it
forces negative margining in which the output voltage is
below the regulation point. When MGN is high, the output
voltageisforcedtoabovetheregulationpoint.Theamount
of output voltage margining is determined by the BSEL
pin. When BSEL is low, it is 5%. When BSEL is high, it is
10%. When BSEL is floating, it is 15%. When margining
isactive, theinternaloutputovervoltageandundervoltage
comparators are disabled and PGOOD remains high. Mar-
• Use large PCB copper areas for high current path,
including V , GND and V . It helps to minimize the
IN
OUT
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci-
tors next to the V , GND and V
pins to minimize
IN
OUT
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on the pads, unless they are
capped.
gining is disabled by tying the MGN pin to V
.
OUT
Thermal Considerations and Output Current Derating
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to GND underneath the unit.
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θ for the
JA
Figure 17 gives a good example of the recommended
layout.
modulewithvariousheatsinkingmethods.Thermalmodels
are derived from several temperature measurements at
the bench, and thermal modeling analysis. Thermal Ap-
plication Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
GND
V
OUT
C
OUT
OUT
OUT
Tables 4 and 5 provide a summary of the equivalent θ
C
JA
for the noted conditions. These equivalent θ parameters
JA
GND
are correlated to the measured values and improve with
air flow. The junction temperature is maintained at 125°C
or below for the derating curves.
C
C
IN
Safety Considerations
TheLTM4608modulesdonotprovideisolationfromV to
IN
V
.Thereisnointernalfuse.Ifrequired,aslowblowfuse
OUT
V
IN
with a rating twice the maximum input current needs to be
provided to protect each unit from catastrophic failure.
C
IN
Layout Checklist/Example
GND
4608 F17
The high integration of LTM4608 makes the PCB board
layout very simple and easy. However, to optimize its
Figure 17. Recommended PCB Layout
4608f
19
LTM4608
APPLICATIONS INFORMATION
CLKIN
V
2.5V
8A
8A AT 5V INPUT
6A AT 3.3V INPUT
OUT
CLKIN
V
IN
V
V
I
IN
OUT
FB
3V TO 5.5V
C
C1
C
OUT
IN
SV
IN
10μF
220pF
100μF
SW
LTM4608
C3
47pF
R
V
FB
IN
RUN
I
TH
3.09k
PLLLPF
TRACK
MODE
100k
THM
PGOOD
PGOOD
V
IN
(HIGH = 10%)
(FLOAT = 15%)
(LOW = 5%)
BSEL
50k
BSEL
MGN
MODE
PHMODE
OE
PHMODE
1
50k
5
V
OUT
2
4
CLKOUT GND SGND
U1
A
IN
U1: PERICON P1745T1G126CEX
OR TOSHIBA 7C75Z126AFE
3
4608 F18
OE
A
V
MGN
MARGIN VALUE
IN OUT
H
H
L
H
H
L
Z
H
L
IN
+ OF BSEL SELECTION
– OF BSEL SELECTION
NO MARGIN
L
X
V
/2
Figure 18. Typical 3V to 5.5VIN, 2.5V at 8A Design
V
1.5V
16A
OUT
CLKIN
V
IN
V
V
IN
OUT
3V TO 5.5V
C4
100pF
100μF
6.3V
X5R
10μF
SV
IN
SW
FB
LTM4608
3.32k
RUN
RUN
I
TH
PLLLPF
TRACK
MODE
I
THM
TRACK
PGOOD
BSEL
C3
PHMODE
MGN
V
OUT
100μF
6.3V
X5R
CLKOUT GND SGND
CLKIN
V
IN
V
OUT
C2
10μF
C1
SV
IN
100μF
6.3V
X5R
SW
FB
LTM4608
RUN
I
TH
PLLLPF
TRACK
MODE
I
THM
PGOOD
BSEL
V
OUT
PHMODE
MGN
CLKOUT GND SGND
4608 F19
Figure 19. Two LTM4608s in Parallel, 1.5V at 16A Design
4608f
20
LTM4608
APPLICATIONS INFORMATION
CLKIN
CLKIN
V
3.3V
7A
OUT2
V
IN
V
IN
V
OUT
5V
100μF
6.3V
X5R
C2
SV
IN
100pF
D1
MMSD4148
SW
FB
LTM4608
R
C3
22pF
FB1
2.21k
SHDN
RUN
I
TH
PLLLPF
TRACK
MODE
I
THM
PGOOD
BSEL
100k
SHDN
PHMODE
MGN
3.3V
R2
100k
CLKOUT GND SGND
3.3V
1.5V
R1
100k
V
1.5V
8A
OUT1
CLKIN
V
IN
V
OUT
C1
C4
+
SV
FB
IN
100μF
6.3V
X5R
100μF
SANYO
POSCAP
10mΩ
D2
R
FB2
MMSD4148
SW
I
TH
6.65k
LTM4608
SHDN
RUN
I
THM
PLLLPF
TRACK
MODE
100k
PGOOD
BSEL
4608 F20
PHMODE
MGN
1.5V
CLKOUT GND SGND
Figure 20. Dual LTM4608 Output Sequencing Application
CLKIN
V
OUT
CLKIN
V
1.2V/8A
5A AT
IN
V
V
IN
OUT
2.5V TO 5.5V
C2
C1
10μF
100pF
2.5V INPUT
SV
IN
100μF
6.3V
X5R
100μF
6.3V
X5R
SW
FB
LTM4608
10k
RUN
I
TH
PLLLPF
TRACK
MODE
I
THM
PGOOD
BSEL
1.2V
PGOOD
BSEL
MODE
PHMODE
PHMODE
MGN
CLKOUT GND SGND
4608 F21
Figure 21. 2.5V to 5.5VIN, 1.2VOUT Design
4608f
21
LTM4608
APPLICATIONS INFORMATION
4608f
22
LTM4608
PACKAGE DESCRIPTION
Z
b b b
Z
6 . 3 5 0
5 . 0 8 0
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 3 8 1
0 . 0 0 0
0 . 3 8 1
1 . 2 7 0
2 . 5 4 0
3 . 8 1 0
5 . 0 8 0
6 . 3 5 0
Z a a a
4608f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTM4608
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
A1 GND
A2 GND
A3 GND
A4 GND
A5 GND
A6 GND
A7 GND
A8 GND
A9 GND
A10 GND
A11 GND
PIN NAME
PIN NAME
PIN NAME
PIN NAME
E1 SGND
E2
E3 PLLLPF F3 GND
PIN NAME
PIN NAME
B1 GND
C1
C2
V
–
D1
D2
D3
D4
D5
D6
V
–
V
V
V
–
F1 RUN
G1 GND
IN
IN
B2
B3 CLKIN
B4 PHMODE C4 SW
B5 MODE C5 SW
B6 C6
–
–
F2 CLKOUT G2 GND
C3 SW
G3 GND
G4 GND
G5 GND
G6 GND
G7 GND
G8 GND
G9 VOUT
G10 VOUT
G11 VOUT
IN
IN
IN
E4
E5 TRACK
E6
E7 FB
E8
–
F4 SV
IN
THM
TH
F5
F6
I
I
–
–
–
B7 BSEL
B8 MGN
B9 GND
B10 GND
B11 GND
C7 PGOOD D7 VIN
F7 GND
F8 GND
F9 VOUT
F10 VOUT
F11 VOUT
C8
V
V
V
V
D8
D9
V
V
IN
IN
IN
IN
C9
V
E9 VOUT
E10 VOUT
E11 VOUT
IN
C10
C11
D10 VOUT
D11 VOUT
OUT
OUT
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4608f
LT 0907 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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