LTM4622EV#PBF_技术文档

LTM4622

Dual Ultrathin 2.5A or Single 5A

Step-Down DC/DC µModule Regulator

FEATURES

DESCRIPTION

2

The LTM^®4622 is a complete dual 2.5A step-down switch-

n

Complete Solution in <1cm

ing mode µModule^®(powermodule) regulator in a tiny

n

Wide Input Voltage Range: 3.6V to 20V

n

3.3V Input Compatible with V Tied to INTV

0.6V to 5.5V Output Voltage

Dual 2.5A (3A Peak) or Single 5A Output Current

1.5ꢀ Maꢁimum Total Output Voltage Regulation

Error Over Load, Line and Temperature

Current Mode Control, Fast Transient Response

External Frequency Synchronization

ultrathin 6.25mm × 6.25mm × 1.82mm LGA and 6.25mm

× 6.25mm × 2.42mm BGA packages. Included in the pack-

age are the switching controller, power FETs, inductor and

support components. Operating over an input voltage

range of 3.6V to 20V, the LTM4622 supports an output

voltage range of 0.6V to 5.5V, set by a single external

resistor. Its high efficiency design delivers dual 2.5A con-

tinuous, 3A peak, output current. Only a few ceramic input

and output capacitors are needed.

IN

CC

n

Multiphase Parallelable with Current Sharing

Output Voltage Tracking and Soft-Start Capability

Selectable Burst Mode^®Operation

The LTM4622 supports selectable Burst Mode operation

and output voltage tracking for supply rail sequencing.

Its high switching frequency and current mode control

enable a very fast transient response to line and load

changes without sacrificing stability.

Overvoltage Input and Overtemperature Protection

Power Good Indicators

6.25mm × 6.25mm × 1.82mm LGA and 6.25mm ×

6.25mm × 2.42mm BGA Packages

Fault protection features include input overvoltage, output

overcurrent and overtemperature protection.

APPLICATIONS

n

General Purpose Point-of-Load Conversion

The LTM4622 is available with SnPb (BGA) or RoHS com-

pliant terminal finish.

n

Telecom, Networking and Industrial Equipment

n

Medical Diagnostic Equipment

All registered trademarks and trademarks are the property of their respective owners.

n

Test and Debug Systems

TYPICAL APPLICATION

1.5V Output Efficiency vs Load Current

ꢓꢒ

1.5V and 1V Dual Output DC/DC Step-Down µModule Regulator

ꢓꢌ

ꢌ

ꢐꢑꢄꢆ

ꢑꢒ

ꢑꢌ

ꢗꢒ

ꢗꢌ

6ꢒ

6ꢌ

ꢖꢗꢐꢐꢘꢆ ꢖꢗꢐꢐꢘ2

ꢆ ꢒ 2ꢂꢋꢅ

ꢌ

ꢍꢎ

4ꢈꢉꢊ

ꢌ

ꢍꢎ

ꢐꢑꢄꢆ

ꢏꢂ6ꢌ ꢄꢐ 2ꢁꢌ

4ꢂꢈꢉꢊ

2ꢋꢌ

ꢚꢑꢎꢆ

ꢚꢑꢎ2

ꢌ

ꢐꢑꢄ2

ꢌ

ꢐꢑꢄ2

ꢆꢂꢋ ꢒ 2ꢂꢋꢅ

ꢙꢄꢕ4622

4ꢈꢉꢊ

ꢍꢎꢄꢌ

ꢔꢐꢕꢖꢆ

ꢔꢐꢕꢖ2

ꢊꢓꢆ

ꢔꢔ

ꢛꢜꢎꢔꢝꢕꢐꢘꢞ

ꢄꢚꢅꢔꢟꢝꢛꢛꢆ

ꢄꢚꢅꢔꢟꢝꢛꢛ2

ꢊꢚꢞꢠ

ꢊꢓ2

ꢙ

ꢚ ꢒꢙ

ꢚ ꢕ2ꢙ

ꢎꢈ

ꢗꢎꢘ

4ꢁꢂ2ꢃ

ꢀꢁꢂꢀꢃ

2ꢘꢒ

ꢌ

ꢌꢘꢒ

ꢕꢘꢌ

ꢕꢘꢒ

2ꢘꢌ

ꢔ

4622 ꢄꢅꢁꢆꢇ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

4622 ꢉꢂꢌꢕꢖ

4622fe

1

For more information www.linear.com/LTM4622

LTM4622

(Note 1)

ABSOLUTE MAXIMUM RATINGS

V ............................................................. –0.3V to 22V

OUT

Operating Internal Temperature Range

IN

V

............................................................. –0.3V to 6V

(Note 2).................................................. –40°C to 125°C

Storage Temperature Range .................. –55°C to 125°C

Peak Solder Reflow Body Temperature.................260°C

PGOOD1, PGOOD2..................................... –0.3V to 18V

RUN1, RUN2 .................................... –0.3V to V + 0.3V

IN

INTV , TRACK/SS1, TRACK/SS2............ –0.3V to 3.6V

CC

SYNC/MODE, COMP1, COMP2,

FB1, FB2............................................... –0.3V to INTV

CC

PIN CONFIGURATION ^{(See Pin Functions, Pin Configuration Table)}

ꢐꢑꢃ ꢒꢓꢆꢔ

ꢏꢐꢃ ꢑꢒꢆꢓ

ꢖꢗꢘꢄꢙ

ꢕꢖꢗꢄꢘ

ꢄꢑꢕꢃ2 ꢁꢘꢉ ꢕꢑꢉꢆ ꢁꢘꢉ ꢄꢑꢕꢃꢍ

ꢄꢐꢔꢃ2 ꢁꢗꢊ ꢔꢐꢊꢆ ꢁꢗꢊ ꢄꢐꢔꢃꢝ

ꢇ

ꢚꢛꢆꢜ

ꢙꢚꢆꢛ

ꢃꢁꢑꢑꢉ2

ꢚꢞ2

ꢃꢁꢐꢐꢊ2

ꢙꢀ2

ꢃꢁꢑꢑꢉꢍ

ꢃꢁꢐꢐꢊꢝ

ꢙꢀꢝ

4

ꢟ

2

ꢍ

4

ꢞ

2

ꢝ

ꢚꢞꢍ

ꢓꢘꢐꢒ

ꢒꢗꢏꢑ

ꢄꢄ

ꢒ

ꢑ

ꢒꢗ

ꢓꢘ

ꢐꢛꢂꢄꢅꢙꢖꢖ2

ꢏꢚꢂꢄꢅꢘꢕꢕ2

ꢐꢛꢂꢄꢅꢙꢖꢖꢍ

ꢛꢝꢘꢍ

ꢏꢚꢂꢄꢅꢘꢕꢕꢝ

ꢚꢜꢗꢝ

ꢒ

ꢑ

ꢒꢗ

ꢓꢘ

ꢛꢝꢘ2

ꢚꢜꢗ2

ꢒ

ꢑ

ꢒꢗ

ꢓꢘ

ꢒ

ꢑꢝꢐ2

ꢑ

ꢐꢜꢏ2

ꢁꢘꢉ

ꢁꢗꢊ

ꢓꢘ

ꢒꢗ

ꢒ

ꢑ

ꢐꢜꢏꢝ

ꢑꢝꢐꢍ

ꢂ

ꢞ

ꢄ

ꢉ

ꢆ

ꢂ

ꢀ

ꢄ

ꢊ

ꢆ

ꢀꢁꢂ ꢃꢂꢄꢅꢂꢁꢆ

2ꢇꢈꢀꢆꢂꢉ ꢊ6ꢋ2ꢇꢌꢌ × 6ꢋ2ꢇꢌꢌ × ꢍꢋꢎ2ꢌꢌꢏ

= 125°C, θ = 17°C/W, θ = 11°C/W,

ꢀꢁꢂ ꢃꢂꢄꢅꢂꢁꢆ

2ꢇꢈꢉꢆꢂꢊ ꢋ6ꢌ2ꢇꢍꢍ × 6ꢌ2ꢇꢍꢍ × 2ꢌ42ꢍꢍꢎ

= 125°C, θ = 17°C/W, θ = 11°C/W,

T

JMAX

JCtop

JCbottom

JCtop

JCbottom

θ

+ θ = 22°C/W, θ = 22°C/W,

θ

+ θ = 22°C/W, θ = 22°C/W,

JB

BA

JA

JB BA JA

WEIGHT = 0.21g

WEIGHT = 0.25g

http://www.linear.com/product/LTM4622#orderinfo

ORDER INFORMATION

PART MARKING*

PACKAGE

MSL

RATING

TEMPERATURE RANGE

(Note 2)

PART NUMBER

LTM4622EV#PBF

LTM4622IV#PBF

LTM4622EY#PBF

LTM4622IY#PBF

LTM4622IY

PAD OR BALL FINISH

Au (RoHS)

DEVICE

FINISH CODE

TYPE

LGA

BGA

LTM4622V

LTM4622Y

e4

e1

e0

4

–40°C to 125°C

Au (RoHS)

SAC305 (RoHS)

SnPb (63/37)

Consult Marketing for parts specified with wider operating temperature

ranges. *Device temperature grade is indicated by a label on the shipping

container. Pad or ball finish code is per IPC/JEDEC J-STD-609.

• Recommended LGA and BGA PCB Assembly and Manufacturing

Procedures:

www.linear.com/umodule/pcbassembly

• LGA and BGA Package and Tray Drawings:

www.linear.com/packaging

• Pb-free and Non-Pb-free Part Markings:

www.linear.com/leadfree

4622fe

2

For more information www.linear.com/LTM4622

LTM4622

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full internal

operating temperature range (Note 2). Specified as each individual output channel at T_A= 25°C, V_IN= 12V, unless otherwise noted per

the typical application shown in Figure 24.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Switching Regulator Section: per Channel

l

V

Input DC Voltage

3.6

3.1

20

3.5

V

IN

3.3V Input DC Voltage

Output Voltage Range

V

C

= INTV

CC

3.3

IN_3.3

IN

= 3.6V to 20V

= 22µF, C

MODE = INTV ,V = 3.6V to 20V, I

0.6

5.5

OUT(RANGE)

OUT(DC)

Output Voltage, Total Variation

with Line and Load

= 100µF Ceramic, R = 40.2k,

1.477

1.50

1.523

OUT

FB

= 0A to 2.5A

CC IN

OUT

V

RUN Pin On Threshold

RUN Threshold Rising

RUN Threshold Falling

1.20

0.97

1.27

1.00

1.35

1.03

V

RUN

I

Input Supply Bias Current

V

= 12V, V

= 1.5V, MODE = GND

11

500

45

mA

µA

Q(VIN)

IN

OUT

= 1.5V, MODE = INTV

CC

Shutdown, RUN1 = RUN2 = 0

I

Input Supply Current

V

= 12V, V

= 1.5V, I = 2.5A

OUT

0.35

A

S(VIN)

IN

OUT

l

Output Continuous Current Range

Line Regulation Accuracy

Load Regulation Accuracy

Output Ripple Voltage

= 1.5V (Note 3)

0

2.5

0.1

1.0

OUT(DC)

IN

ΔV

(Line)/V

= 1.5V, V = 3.6V to 20V, I = 0A

OUT

0.01

0.2

5

%/V

%

OUT

IN

(Load)/V

= 1.5V, I

= 0A to 2.5A

OUT

V

I

= 0A, C

= 1.5V

= 100µF Ceramic, V = 12V,

mV

OUT(AC)

OUT

IN

V

OUT

ΔV

Turn-On Overshoot

Turn-On Time

I

= 0A, C

= 1.5V

= 100µF Ceramic, V = 12V,

30

4.3

100

20

mV

ms

mV

µs

OUT(START)

OUTLS

OUT

IN

V

t

C

V

= 100µF Ceramic, No Load, TRACK/SS = 0.01µF,

= 1.5V

START

OUT

= 12V, V

IN

OUT

ΔV

Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, C

= 100µF

OUT

Ceramic, V = 12V, V

= 1.5V

IN

OUT

t

I

Settling Time for Dynamic Load

Step

Load: 0% to 50% to 0% of Full Load, C

Ceramic, V = 12V, V = 1.5V

= 100µF

SETTLE

OUT

IN

OUT

Output Current Limit

Voltage at FB Pin

Current at FB Pin

V

= 12V, V

= 1.5V

3

4

A

V

OUTPK

IN

OUT

l

V

I

= 0A, V

= 1.5V

0.592

0.60

0.608

30

FB

OUT

I

(Note 4)

nA

kΩ

FB

R

Resistor Between V

Pins

and FB

OUT

60.00

60.40

1.4

60.80

FBHI

I

Track Pin Soft-Start Pull-Up

Current

TRACK/SS = 0V

µA

TRACK/SS

t

Internal Soft-Start Time

Minimum On-Time

Minimum Off-Time

PGOOD Trip Level

10% to 90% Rise Time (Note 4)

400

20

700

μs

ns

SS

(Note 4)

ON(MIN)

OFF(MIN)

45

V

With Respect to Set Output

FB

PGOOD

FB

V

Ramping Negative

Ramping Positive

–8

8

–14

14

%

R

PGOOD Pull-Down Resistance

1mA Load

20

Ω

PGOOD

4622fe

3

For more information www.linear.com/LTM4622

LTM4622

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full internal

operating temperature range (Note 2). Specified as each individual output channel at T_A= 25°C, V_IN= 12V, unless otherwise noted per

the typical application shown in Figure 24.

SYMBOL

PARAMETER

Internal V Voltage

CONDITIONS

MIN

TYP

3.3

1.3

1

MAX

UNITS

V

= 3.6V to 20V

3.1

3.5

INTVCC

OSC

CC

IN

Load Reg INTV Load Regulation

I

= 0mA to 50mA

%

CC

f

I

Oscillator Frequency

Frequency Sync Range

MODE Input Current

MHz

%

With Respect to Set Frequency

MODE = INTV

30

SYNC

–1.5

µA

MODE

CC

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 3: See output current derating curves for different V , V

Note 4: 100% tested at wafer level.

Note 5: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

and T .

IN OUT A

Note 2: The LTM4622 is tested under pulsed load conditions such that

T ≈ T . The LTM4622E is guaranteed to meet performance specifications

J

A

over the 0°C to 125°C internal operating temperature range. Specifications

over the full –40°C to 125°C internal operating temperature range are

assured by design, characterization and correlation with statistical process

controls. The LTM4622I is guaranteed to meet specifications over the

full –40°C to 125°C internal operating temperature range. Note that the

maximum ambient temperature consistent with these specifications is

determined by specific operating conditions in conjunction with board

layout, the rated package thermal resistance and other environmental

factors.

4622fe

4

For more information www.linear.com/LTM4622

LTM4622

TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency vs Load Current

at 5V_IN

Efficiency vs Load Current

at 12V_IN

Efficiency vs Load Current

at 3.3V_IN

ꢕꢔ

ꢕꢑ

ꢓꢔ

ꢓꢑ

ꢗꢔ

ꢗꢑ

6ꢔ

6ꢑ

ꢔꢓ

ꢔꢑ

ꢒꢓ

ꢒꢑ

ꢖꢓ

ꢖꢑ

6ꢓ

6ꢑ

ꢕꢔ

ꢕꢑ

ꢓꢔ

ꢓꢑ

ꢗꢔ

ꢗꢑ

6ꢔ

6ꢑ

ꢁꢅꢉꢞꢅꢉꢟ

ꢁꢅꢉꢟꢅꢉꢠ

ꢓꢗꢑ ꢚ 2ꢗꢓꢛꢜꢝ

2ꢗꢓ ꢚ ꢘꢗꢓꢛꢜꢝ

ꢘꢗꢓ ꢚ ꢘꢛꢜꢝ

ꢘꢗꢑ ꢚ ꢘꢛꢜꢝ

ꢕꢗꢕ ꢚ 2ꢛꢜꢝ

ꢘꢗꢒ ꢚ ꢘꢛꢜꢝ

ꢘꢗ2 ꢚ ꢘꢛꢜꢝ

ꢖꢘꢖ ꢚ 2ꢛꢜꢝ

ꢒꢘꢓ ꢚ ꢒꢛꢜꢝ

ꢒꢘ2 ꢚ ꢒꢛꢜꢝ

2ꢘꢔ ꢚ ꢒꢘꢔꢛꢜꢝ

ꢒꢘꢔ ꢚ ꢒꢛꢜꢝ

ꢒꢘꢑ ꢚ ꢒꢛꢜꢝ

2ꢘꢔ ꢛ ꢙꢘꢔꢜꢝꢞ

ꢙꢘꢔ ꢛ ꢙꢜꢝꢞ

ꢙꢘꢑ ꢛ ꢙꢜꢝꢞ

ꢙꢘꢓ ꢛ ꢙꢜꢝꢞ

ꢙꢘ2 ꢛ ꢙꢜꢝꢞ

2ꢘꢔ

ꢑ

ꢑꢘꢔ

ꢒꢘꢑ

ꢒꢘꢔ

2ꢘꢑ

ꢖ

2ꢘꢔ

ꢑ

ꢑꢘꢔ

ꢙꢘꢑ

ꢙꢘꢔ

2ꢘꢑ

ꢖ

2ꢗꢓ

ꢑ

ꢑꢗꢓ

ꢘꢗꢑ

ꢘꢗꢓ

2ꢗꢑ

ꢕ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

4622 ꢐꢑꢒ

4622 ꢐꢑ2ꢒ

4622 ꢐꢑ2

Burst Mode Efficiency,

12V_IN, 1.5V_OUT

1.2V Output Transient Response

1V Output Transient Response

ꢓꢍꢍ

ꢒꢍ

ꢔꢍ

ꢖꢍ

6ꢍ

ꢕꢍ

4ꢍ

ꢌꢍ

2ꢍ

ꢓꢍ

ꢍ

ꢙꢚꢛꢜꢝ ꢞꢟꢠe ꢁꢡꢇꢆꢂꢉꢏꢁꢈ

V

ꢀ

OUT

ꢁꢂꢃ

100mV/DIV

ꢄꢅꢅꢆꢀꢇꢈꢉꢀ

AC-COUPLED

ꢊꢋꢌꢋꢁꢂꢍꢎꢏꢈ

LOAD STEP

1A/DIV

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

ꢄꢄꢞ

4622 G04

4622 ꢝꢅꢛ

V

F

= 12V

= 1V

20μs/DIV

ꢀ

ꢔ

ꢒ ꢄ2ꢀ

ꢒ ꢄꢓ2ꢀ

ꢒ ꢄꢕꢖꢗ

2ꢅꢚꢜꢇꢈꢉꢀ

IN

OUT

ꢉꢑ

ꢁꢂꢃ

ꢐ

= 1MHz

S

OUTPUT CAPACITOR = 1 × 47µF CERAMIC

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢘ ꢒ ꢄ × 4ꢙꢚꢔ ꢋꢏꢘꢊꢕꢉꢋ

LOAD STEP = 1.25A TO 2.5A

ꢎꢁꢊꢈ ꢐꢃꢏꢍ ꢒ ꢄꢓ2ꢛꢊ ꢃꢁ 2ꢓꢛꢊ

ꢍꢗꢍꢓ

ꢍꢗꢓ

ꢓ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

4622 ꢘꢍꢌ

2.5V Output Transient Response

1.8V Output Transient Response

1.5V Output Transient Response

ꢀ

ꢁꢂꢃ

ꢄꢅꢅꢆꢀꢇꢈꢉꢀ

ꢀ

ꢁꢂꢃ

ꢊꢋꢌꢋꢁꢂꢍꢎꢏꢈ

ꢄꢅꢅꢆꢀꢇꢈꢉꢀ

ꢊꢋꢌꢋꢁꢂꢍꢎꢏꢈ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

4622 ꢟꢅꢛ

4622 ꢝꢅꢞ

ꢀ

ꢕ

ꢒ ꢄ2ꢀ

ꢒ ꢄꢓꢔꢀ

ꢒ ꢄꢖꢗꢘ

2ꢅꢜꢞꢇꢈꢉꢀ

ꢀ

ꢕ

ꢒ ꢄ2ꢀ

ꢒ 2ꢓꢔꢀ

ꢒ ꢄꢓꢔꢖꢗꢘ

2ꢅꢛꢜꢇꢈꢉꢀ

ꢉꢑ

ꢁꢂꢃ

ꢐ

ꢉꢑ

ꢁꢂꢃ

ꢐ

4622 ꢞꢅ6

ꢀ

ꢐ

ꢒ ꢄ2ꢀ

ꢒ ꢄꢓꢔꢀ

ꢒ ꢄꢖꢗꢘ

2ꢅꢜꢝꢇꢈꢉꢀ

ꢉꢑ

ꢁꢂꢃ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢙ ꢒ ꢄ ꢚ 4ꢛꢜꢕ ꢋꢏꢙꢊꢖꢉꢋ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ ꢒ ꢄꢓ2ꢝꢊ ꢃꢁ 2ꢓꢝꢊ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢙ ꢒ ꢄ × 4ꢚꢛꢕ ꢋꢏꢙꢊꢖꢉꢋ

ꢕ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢙ ꢒ ꢄ ꢚ 4ꢛꢜꢕ ꢋꢏꢙꢊꢖꢉꢋ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ ꢒ ꢄꢓ2ꢔꢊ ꢃꢁ 2ꢓꢔꢊ

4622fe

5

For more information www.linear.com/LTM4622

LTM4622

TYPICAL PERFORMANCE CHARACTERISTICS

Start-Up with No Load Current

Applied

3.3V Output Transient Response

5V Output Transient Response

ꢀꢁ

ꢂꢃꢄꢅꢆꢇꢄ

ꢀ

ꢁꢂꢃ

ꢀ

ꢁꢂꢃ

ꢄꢅꢅꢆꢀꢇꢈꢉꢀ

ꢊꢋꢌꢋꢁꢂꢍꢎꢏꢈ

ꢄ

ꢈꢉꢊ

ꢂꢄꢅꢆꢇꢄ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ

ꢄꢊꢇꢈꢉꢀ

ꢋꢉꢌ

ꢂꢃꢄꢅꢆꢇꢄ

4622 ꢞꢄꢅ

ꢀ

ꢐ

ꢒ ꢄ2ꢀ

ꢒ ꢓꢀ

2ꢅꢜꢝꢇꢈꢉꢀ

ꢉꢑ

ꢁꢂꢃ

ꢒ 2ꢕꢓꢖꢗꢘ

4622 ꢟꢂꢂ

4622 ꢞꢅꢟ

ꢄ

ꢀ

ꢍ ꢂ2ꢄ

ꢍ ꢂꢎꢏꢄ

ꢍ ꢂꢑꢒꢓ

2ꢃꢝꢞꢅꢆꢇꢄ

ꢀ

ꢐ

ꢒ ꢄ2ꢀ

ꢒ ꢓꢔꢓꢀ

ꢒ 2ꢖꢗꢘ

2ꢅꢛꢝꢇꢈꢉꢀ

ꢇꢌ

ꢈꢉꢊ

ꢉꢑ

ꢁꢂꢃ

ꢔ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢙ ꢒ ꢄ ꢚ 4ꢛꢜꢔ ꢋꢏꢙꢊꢖꢉꢋ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ ꢒ ꢄꢕ2ꢓꢊ ꢃꢁ 2ꢕꢓꢊ

ꢕ

ꢐ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢙ ꢒ ꢄ × 4ꢚꢛꢕ ꢋꢏꢙꢊꢖꢉꢋ

ꢇꢌꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ 22ꢘꢐ

ꢎꢁꢊꢈ ꢐꢃꢏꢍ ꢒ ꢄꢔ2ꢜꢊ ꢃꢁ 2ꢔꢜꢊ

ꢈꢉꢊꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ22ꢘꢐ ꢙ ꢂ ꢗ4ꢚꢘꢐ ꢕꢛꢋꢖꢑꢇꢕ

ꢀꢈꢐꢊꢜꢀꢊꢖꢋꢊ ꢕꢖꢔ ꢍ ꢃꢎꢂꢘꢐ

Short-Circuit with 2.5A Load

Current Applied

Short-Circuit with No Load

Current Applied

Start-Up with 2.5A Load Current

Applied

ꢀꢁ

ꢂꢃꢄꢅꢆꢇꢄ

ꢀꢁ

ꢂꢃꢄꢅꢆꢇꢄ

ꢀꢁ

ꢂꢃꢄꢅꢆꢇꢄ

ꢄ

ꢈꢉꢊ

ꢂꢄꢅꢆꢇꢄ

ꢇ

ꢋꢉꢌ

ꢂꢃꢄꢅꢆꢇꢄ

ꢇꢋ

ꢌꢃꢃꢍꢎꢅꢆꢇꢄ

2ꢌꢅꢆꢇꢄ

4622 ꢟꢂ4

4622 ꢝꢂꢞ

4622 ꢟꢂ2

ꢄ

ꢒ

ꢏ ꢂ2ꢄ

ꢏ ꢂꢐꢑꢄ

ꢏ ꢂꢓꢔꢕ

2ꢃꢚꢞꢅꢆꢇꢄ

ꢄ

ꢐ

ꢍ ꢂ2ꢄ

ꢍ ꢂꢎꢏꢄ

ꢍ ꢂꢑꢒꢓ

2ꢃꢘꢜꢅꢆꢇꢄ

ꢄ

ꢐ

ꢍ ꢂ2ꢄ

ꢍ ꢂꢎꢏꢄ

ꢍ ꢂꢑꢒꢓ

2ꢃꢃꢝꢞꢅꢆꢇꢄ

ꢇꢋ

ꢈꢉꢊ

ꢀ

ꢇꢋ

ꢈꢉꢊ

ꢀ

ꢇꢌ

ꢈꢉꢊ

ꢀ

ꢇꢋꢖꢉꢊ ꢗꢎꢖꢎꢗꢇꢊꢈꢘ ꢏ ꢂ ꢙ 22ꢚꢒ

ꢇꢋꢔꢉꢊ ꢕꢌꢔꢌꢕꢇꢊꢈꢖ ꢍ ꢂ ꢗ 22ꢘꢐ

ꢇꢌꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ 22ꢘꢐ

ꢈꢉꢊꢖꢉꢊ ꢗꢎꢖꢎꢗꢇꢊꢈꢘ ꢏ ꢂ ꢙ22ꢚꢒ ꢛ ꢂ ꢙ4ꢜꢚꢒ ꢗꢝꢘꢎꢓꢇꢗ

ꢈꢉꢊꢔꢉꢊ ꢕꢌꢔꢌꢕꢇꢊꢈꢖ ꢍ ꢂ ꢗ22ꢘꢐ ꢙ ꢂ ꢗ4ꢚꢘꢐ ꢕꢛꢖꢌꢑꢇꢕ

ꢈꢉꢊꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ22ꢘꢐ ꢙ ꢂ ꢗ4ꢚꢘꢐ ꢕꢛꢋꢖꢑꢇꢕ

ꢀꢈꢐꢊꢜꢀꢊꢖꢋꢊ ꢕꢖꢔ ꢍ ꢃꢎꢂꢘꢐ

Recover from Short-Circuit with

No Load Current Applied

Steady-State Output Voltage

Ripple

Start-Up into Pre-Biased Output

ꢀꢁ

ꢂꢃꢄꢅꢆꢇꢄ

ꢀ

ꢁꢂꢃ

ꢄꢅꢆꢀꢇꢈꢉꢀ

ꢊꢋꢌꢋꢁꢂꢍꢎꢏꢈ

ꢄ

ꢈꢉꢊ

ꢂꢄꢅꢆꢇꢄ

ꢈꢉꢊ

ꢂꢄꢅꢆꢇꢄ

ꢐꢑ

ꢒꢀꢇꢈꢉꢀ

ꢇ

ꢋꢉꢌ

ꢂꢃꢄꢅꢆꢇꢄ

ꢇꢋ

2ꢌꢅꢆꢇꢄ

4622 ꢡꢄ6

4622 ꢝꢂꢞ

4622 ꢟꢂꢚ

ꢀ

ꢗ

ꢔ ꢄ2ꢀ

ꢔ ꢄꢕꢖꢀ

ꢔ ꢄꢘꢙꢚ

ꢄꢝꢠꢇꢈꢉꢀ

ꢄ

ꢐ

ꢍ ꢂ2ꢄ

ꢍ ꢂꢎꢏꢄ

ꢍ ꢂꢑꢒꢓ

2ꢃꢘꢜꢅꢆꢇꢄ

ꢄ

ꢐ

ꢍ ꢂ2ꢄ

ꢍ ꢂꢎꢏꢄ

ꢍ ꢂꢑꢒꢓ

ꢜꢃꢝꢞꢅꢆꢇꢄ

ꢉꢓ

ꢁꢂꢃ

ꢐ

ꢇꢋ

ꢈꢉꢊ

ꢀ

ꢇꢌ

ꢈꢉꢊ

ꢀ

ꢉꢓꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢛ ꢔ ꢄ ꢜ 22ꢝꢗ

ꢇꢋꢔꢉꢊ ꢕꢌꢔꢌꢕꢇꢊꢈꢖ ꢍ ꢂ ꢗ 22ꢘꢐ

ꢇꢌꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ 22ꢘꢐ

ꢁꢂꢃꢍꢂꢃ ꢋꢊꢍꢊꢋꢉꢃꢁꢛ ꢔ ꢄ ×22ꢝꢗ ꢞ ꢄ ×4ꢟꢝꢗ ꢋꢏꢛꢊꢘꢉꢋ

ꢈꢉꢊꢔꢉꢊ ꢕꢌꢔꢌꢕꢇꢊꢈꢖ ꢍ ꢂ ꢗ22ꢘꢐ ꢙ ꢂ ꢗ4ꢚꢘꢐ ꢕꢛꢖꢌꢑꢇꢕ

ꢈꢉꢊꢔꢉꢊ ꢕꢖꢔꢖꢕꢇꢊꢈꢋ ꢍ ꢂ ꢗ22ꢘꢐ ꢙ ꢂ ꢗ4ꢚꢘꢐ ꢕꢛꢋꢖꢑꢇꢕ

4622fe

6

For more information www.linear.com/LTM4622

LTM4622

PIN FUNCTIONS

PACKAGE ROW AND COLUMN LABELING MAY VARY

RUN1 (D2), RUN2 (B2): Run Control Input of Each

Switching Mode Regulator Channel. Enables chip opera-

tion by tying RUN above 1.27V. Tying this pin below 1V

shuts down the specific regulator channel. Do not float

this pin.

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

V_IN(A2, B3, D3, E2): Power Input Pins. Apply input

voltage between these pins and GND pins. Recommend

placing input decoupling capacitance directly between V_IN

pins and GND pins.

PGOOD1 (D4), PGOOD2 (B4): Output Power Good with

Open-Drain Logic of Each Switching Mode Regulator

Channel. PGOOD is pulled to ground when the voltage

on the FB pin is not within 8% (typical) of the internal

0.6V reference.

GND (C1 to C2, B5, D5): Power Ground Pins for Both

Input and Output Returns.

INTV (C3): Internal 3.3V Regulator Output. The internal

CC

power drivers and control circuits are powered from this

voltage. This pin is internally decoupled to GND with a

2.2µF low ESR ceramic capacitor. No additional external

decoupling capacitor needed.

TRACK/SS1 (E3), TRACK/SS2 (A3): Output Tracking and

Soft-Start Pin of Each Switching Mode Regulator Channel.

It allows the user to control the rise time of the output

voltage. Putting a voltage below 0.6V on this pin bypasses

the internal reference input to the error amplifier, instead

it servos the FB pin to the TRACK voltage. Above 0.6V,

the tracking function stops and the internal reference

resumes control of the error amplifier. There’s an internal

SYNC/MODE (C5): Mode Select and External

Synchronization Input. Tie this pin to ground to force

continuous synchronous operation at all output loads.

Floating this pin or tying it to INTV enables high effi-

CC

1.4µA pull-up current from INTV on this pin, so putting

CC

ciency Burst Mode operation at light loads. Drive this

pin with a clock to synchronize the LTM4622 switching

frequency. An internal phase-locked loop will force the

bottom power NMOS’s turn on signal to be synchronized

with the rising edge of the clock signal. When this pin is

driven with a clock, forced continuous mode is automati-

cally selected.

a capacitor here provides soft-start function. A default

internal soft-start ramp forces a minimum soft-start time

of 400µs.

FB1 (E4), FB2 (A4): The Negative Input of the Error

Amplifier for Each Switching Mode Regulator Channel.

Internally, this pin is connected to V_OUTwith a 60.4k preci-

sion resistor. Different output voltages can be programmed

with an additional resistor between FB and GND pins. In

PolyPhase^®operation, tying the FB pins together allows

for parallel operation. See the Applications Information

section for details.

V_OUT1(D1, E1), V_OUT2(A1, B1): Power Output Pins

of Each Switching Mode Regulator. Apply output load

between these pins and GND pins. Recommend placing

output decoupling capacitance directly between these

pins and GND pins.

COMP1 (E5), COMP2 (A5): Current Control Threshold and

Error Amplifier Compensation Point of Each Switching

Mode Regulator Channel. The current comparator’s trip

threshold is linearly proportional to this voltage, whose

normal range is from 0.3V to 1.8V. Tie the COMP pins

together for parallel operation. The device is internal com-

pensated. Do not drive this pin.

FREQ (C4): Frequency is set internally to 1MHz. An exter-

nal resistor can be placed from this pin to GND to increase

frequency, or from this pin to INTV_CCto reduce frequency.

See the Applications Information section for frequency

adjustment.

4622fe

7

For more information www.linear.com/LTM4622

LTM4622

BLOCK DIAGRAM

ꢑ

ꢁꢒꢇꢏ

ꢑ

ꢁꢒꢇ2

6ꢋꢌ4ꢍ

ꢏꢋꢍ

ꢀꢚꢁꢁꢙꢏ

ꢀꢚꢁꢁꢙ2

ꢉꢊꢏ

ꢐꢆꢇꢑ

ꢅꢅ

6ꢋꢌ4ꢍ

ꢉꢊ2

ꢐꢆꢇꢑ

ꢅꢅ

4ꢋꢌ2ꢍ

ꢅꢅ

ꢑ

ꢐꢆ

ꢑ

ꢐꢆ

2ꢌ2ꢎꢉ

ꢜꢌ6ꢑ ꢇꢁ 2ꢋꢑ

ꢋꢌ22ꢎꢉ

22ꢎꢉ

4ꢟꢎꢉ

ꢖꢗꢆꢅꢕꢘꢁꢙꢃ

ꢇꢄꢓꢅꢔꢕꢖꢖꢏ

ꢏꢎꢝ

ꢑ

ꢏꢌ2ꢑ

2ꢌꢛꢓ

ꢑ

ꢁꢒꢇꢏ

ꢚꢆꢙ

ꢋꢌꢏꢎꢉ

ꢏꢎꢉ

ꢇꢄꢓꢅꢔꢕꢖꢖ2

ꢄꢒꢆꢏ

ꢄꢒꢆ2

ꢋꢌ22ꢎꢉ

ꢅꢁꢘꢀꢏ

ꢀꢁꢂꢃꢄ ꢅꢁꢆꢇꢄꢁꢈ

ꢐꢆꢇꢃꢄꢆꢓꢈ

ꢅꢁꢘꢀ

ꢏꢎꢝ

ꢑ

ꢏꢌꢛꢑ

2ꢌꢛꢓ

ꢑ

ꢁꢒꢇ2

ꢚꢆꢙ

ꢅꢁꢘꢀ2

ꢉꢄꢃꢞ

ꢏꢎꢉ

4ꢟꢎꢉ

ꢐꢆꢇꢃꢄꢆꢓꢈ

ꢅꢁꢘꢀ

ꢜ24ꢍ

4622 ꢊꢙ

Figure 1. Simplified LTM4622 Block Diagram

DECOUPLING REQUIREMENTS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

C

External Input Capacitor Requirement

IN

I

= 2.5A

4.7

10

µF

IN

OUT

(V = 3.6V to 20V, V

= 1.5V)

OUT

External Output Capacitor Requirement

(V = 3.6V to 20V, V = 1.5V)

I

= 2.5A

22

47

µF

OUT

IN

OUT

4622fe

8

For more information www.linear.com/LTM4622

LTM4622

OPERATION

The LTM4622 is a dual output standalone non-isolated

switch mode DC/DC power supply. It can deliver two 2.5A

DC, 3A peak output current with few external input and

output ceramic capacitors. This module provides dual

precisely regulated output voltage programmable via

two external resistor from 0.6V to 5.5V over 3.6V to 20V

stability margins and good transient performance with

a wide range of output capacitors, even with all ceramic

output capacitors.

Current mode control provides cycle-by-cycle fast cur-

rent limiting. An internal overvoltage and undervoltage

comparators pull the open-drain PGOOD output low if

the output feedback voltage exits a 8% window around

the regulation point. Furthermore, an input overvoltage

protection been utilized by shutting down both power

input voltage range. With INTV tied to V , this module

CC

IN

is able to operate from 3.3V input. The typical application

schematic is shown in Figure 24.

The LTM4622 contains an integrated controlled on-time

valley current mode regulator, power MOSFETs, inductor,

and other supporting discrete components. The default

switching frequency is 1MHz. For output voltages between

2.5V and 5.5V, an external resistor is required between

FREQ and SGND pins to set the operating frequency to

higher frequency to optimize inductor current ripple.

For switching noise-sensitive applications, the switch-

ing frequency can be adjusted by external resistors and

the μModule regulator can be externally synchronized

to a clock within 30% of the set frequency. See the

Applications Information section.

MOSFETs when V rises above 22.5V to protect internal

IN

devices.

Multiphase operation can be easily employed by connect-

ing SYNC pin to an external oscillator. Up to 6 phases can

be paralleled to run simultaneously a good current sharing

guaranteed by current mode control loop.

Pulling the RUN pin below 1V forces the controller into

its shutdown state, turning off both power MOSFETs and

most of the internal control circuitry. At light load cur-

rents, Burst Mode operation can be enabled to achieve

higher efficiency compared to continuous mode (CCM) by

setting MODE pin to INTV . The TRACK/SS pin is used

CC

With current mode control and internal feedback loop

compensation, the LTM4622 module has sufficient

for power supply tracking and soft-start programming.

See the Applications Information section.

APPLICATIONS INFORMATION

where t

is the minimum off-time, 45ns typical for

OFF(MIN)

The typical LTM4622 application circuit is shown in

Figure 24. External component selection is primarily deter-

mined by the input voltage, the output voltage and the

maximum load current. Refer to Table 7 for specific exter-

nal capacitor requirements for a particular application.

LTM4622, and f_SWis the switching frequency. Conversely

the minimum on-time limit imposes a minimum duty

cycle of the converter which can be calculated as

D

MIN

= t

• f

ON(MIN) SW

where t

is the minimum on-time, 20ns typical for

ON(MIN)

V to V

Step-Down Ratios

IN

OUT

LTM4622. In the rare cases where the minimum duty

cycle is surpassed, the output voltage will still remain

in regulation, but the switching frequency will decrease

from its programmed value. Note that additional thermal

derating may be applied. See the Thermal Considerations

and Output Current Derating section in this data sheet.

There are restrictions in the maximum V and V

step

IN

OUT

down ratio that can be achieved for a given input voltage

due to the minimum off-time and minimum on-time limits

of the regulator. The minimum off-time limit imposes a

maximum duty cycle which can be calculated as

D

MAX

= 1 – t

• f

OFF(MIN) SW

4622fe

9

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

Output Voltage Programming

Output Decoupling Capacitors

The PWM controller has an internal 0.6V reference volt-

age. As shown in the Block Diagram, a 60.4k 0.5% internal

With an optimized high frequency, high bandwidth design,

only single piece of 22µF low ESR output ceramic capaci-

tor is required for each LTM4622 output to achieve low

output voltage ripple and very good transient response.

Additional output filtering may be required by the sys-

tem designer, if further reduction of output ripples or

dynamic transient spikes is required. Table 6 shows a

matrix of different output voltages and output capacitors

to minimize the voltage droop and overshoot during a

1.25A (50%) load step transient. Multiphase operation

will reduce effective output ripple as a function of the

number of phases. Application Note 77 discusses this

noise reduction versus output ripple current cancellation,

but the output capacitance will be more a function of sta-

bility and transient response. The Analog Devices, Inc.

LTpowerCAD^®Design Tool is available to download online

for output ripple, stability and transient response analysis

and calculating the output ripple reduction as the number

of phases implemented increases by N times.

feedback resistor connects V

and FB pins together.

OUT

Adding a resistor R from FB pin to GND programs the

FB

output voltage:

0.6V

R

=

• 60.4k

FB

V

– 0.6V

OUT

Table 1. V_FBResistor Table vs Various Output Voltages

(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3

(k) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25

V

5.0

OUT

R

FB

Pease note that for 2.5 to 5V output, a higher operating

frequency is required to optimize inductor current ripple.

See Operating Frequency section.

For parallel operation of N-channels LTM4622, the follow-

ing equation can be used to solve for R :

FB

0.6V

– 0.6V

60.4k

N

R

=

•

FB

V

OUT

Burst Mode Operation

In applications where high efficiency at intermediate cur-

rent are more important than output voltage ripple, Burst

Mode operation could be used by connecting SYNC/

Input Decoupling Capacitors

The LTM4622 module should be connected to a low

AC-impedance DC source. For each regulator channel,

one piece 4.7µF input ceramic capacitor is required for

RMS ripple current decoupling. Bulk input capacitor is

only needed when the input source impedance is com-

promised by long inductive leads, traces or not enough

source capacitance. The bulk capacitor can be an electro-

lytic aluminum capacitor and polymer capacitor.

MODE pin to INTV to improve light load efficiency. In

CC

Burst Mode operation, a current reversal comparator

(I ) detects the negative inductor current and shuts off

REV

the bottom power MOSFET, resulting in discontinuous

operation and increased efficiency. Both power MOSFETs

will remain off and the output capacitor will supply the

load current until the COMP voltage rises above the zero

current level to initiate another cycle.

Without considering the inductor current ripple, for each

output, the RMS current of the input capacitor can be

estimated as:

Force Continuous Current Mode (CCM) Operation

In applications where fixed frequency operation is more

critical than low current efficiency, and where the low-

est output ripple is desired, forced continuous opera-

tion should be used. Forced continuous operation can

be enabled by tying the SYNC/MODE pin to GND. In this

mode, inductor current is allowed to reverse during low

output loads, the COMP voltage is in control of the current

comparator threshold throughout, and the top MOSFET

I_OUT(MAX)

I_CIN(RMS)

=

• D• 1–D

( )

η%

where is the estimated efficiency of the power module.

4622fe

10

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

always turns on with each oscillator pulse. During start-

up, forced continuous mode is disabled and inductor

current is prevented from reversing until the LTM4622’s

output voltage is in regulation.

the set operating frequency. A pulse detection circuit is

used to detect a clock on the SYNC/MODE pin to turn

on the phase-locked loop. The pulse width of the clock

has to be at least 100ns. The clock high level must be

above 2V and clock low level below 0.3V. The presence

of an external clock will place both regulator channels into

forced continuous mode operation. During the start-up of

the regulator, the phase-locked loop function is disabled.

Operating Frequency

The operating frequency of the LTM4622 is optimized to

achieve the compact package size and the minimum out-put

ripple voltage while still keeping high efficiency. The default

operating frequency is internally set to 1MHz. In most appli-

cations, no additional frequency adjusting is required.

Multiphase Operation

For output loads that demand more than 2.5A of current,

two outputs in the LTM4622 or even multiple LTM4622s

can be paralleled to run out of phase to provide more

output current without increasing input and output volt-

age ripples.

If any operating frequency other than 1MHz is required

by application, the operating frequency can be increased

by adding a resistor, R

, between the FREQ pin and

FSET

SGND, as shown in Figure 26. The operating frequency

can be calculated as:

A multiphase power supply significantly reduces the

amount of ripple current in both the input and output

capacitors. The RMS input ripple current is reduced by,

and the effective ripple frequency is multiplied by, the

number of phases used (assuming that the input voltage

is greater than the number of phases used times the out-

put voltage). The output ripple amplitude is also reduced

by the number of phases used when all of the outputs

are tied together to achieve a single high output current

design.

3.2e11

f Hz =

(

)

324k ||R

Ω

_FSET( )

To reduce switching current ripple, 1.5MHz to 2.5MHz

operating frequency is required for 2.5V to 5.5V output

with R

to SGND.

FSET

0.6V to

1.8V

V

2.5V

3.3V

2MHz

324kΩ

5V

OUT

f

1MHz

Open

1.5MHz

649kΩ

2.5MHz

215kΩ

SW

The two switching mode regulator channels inside the

LTM4622 are internally set to operate 180° out of phase.

Multiple LTM4622s could easily operate 90 degrees,

60 degrees or 45 degrees shift which corresponds to

4-phase, 6-phase or 8-phase operation by letting SYNC/

MODE of the LTM4622 synchronize to an external multi-

phase oscillator like LTC^®6902. Figure 2 shows a 4-phase

design example for clock phasing.

R

FSET

The operating frequency can also be decreased by adding

a resistor between the FREQ pin and INTV , calculated

CC

as:

5.67e11

f Hz = 1MHz –

(

)

R

Ω

_FSET( )

ꢄꢄꢅ2ꢐꢑ ꢒꢅꢓꢔꢋꢕ

The programmable operating frequency range is from

800kHz to 4MHz.

ꢁꢖ

ꢃ

ꢄꢅꢄꢂ ꢆꢇꢈꢂ

ꢉꢉ

ꢂ

ꢌꢍꢈ

ꢌꢗꢇꢉꢘꢔꢙꢚꢍ

ꢂ

ꢒꢁꢜ

ꢙꢛꢈꢒ

ꢒꢝꢁꢖ

ꢊꢋ

ꢔꢙꢚ

Frequency Synchronization

ꢙꢛꢈ2

ꢎꢈꢉ6ꢏꢁ2

ꢏꢁꢖ

ꢁꢖ

The power module has a phase-locked loop comprised of

an internal voltage controlled oscillator and a phase detec-

tor. This allows the internal top MOSFET turn-on to be

locked to the rising edge of the external clock. The exter-

nal clock frequency range must be within 30% around

ꢂ

ꢙꢛꢈꢒ

ꢚꢆꢂ

ꢙꢛꢈꢒ

ꢙꢛꢈ2

ꢏꢁꢖ

2ꢟꢁꢖ

ꢞꢇꢚ

ꢙꢛꢈ2

4622 ꢀꢁ2

Figure 2. Eꢁample of Clock Phasing for 4-Phase

Operation with LTC6902

4622fe

11

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

The LTM4622 device is an inherently current mode con-

trolled device, so parallel modules will have very good

current sharing. This will balance the thermals on the

design. Please tie RUN, TRACK/SS, FB and COMP pin

of each paralleling channel together. Figure 28 shows an

example of parallel operation and pin connection.

capacitor on the TRACK/SS pin will program the ramp

rate of the output voltage. An internal 1.4µA current

source will charge up the external soft-start capacitor

towards INTV voltage. When the TRACK/SS voltage is

CC

below 0.6V, it will take over the internal 0.6V reference

voltage to control the output voltage. The total soft-start

time can be calculated as:

INPUT RMS Ripple Current Cancellation

C

SS

t

= 0.6 •

SS

Application Note 77 provides a detailed explanation of

multiphase operation. The input RMS ripple current can-

cellation mathematical derivations are presented, and

a graph is displayed representing the RMS ripple cur-

rent reduction as a function of the number of interleaved

phases. Figure 3 shows this graph.

1.4µA

where C_SSis the capacitance on the TRACK/SS pin.

Current foldback and force continuous mode are disabled

during the soft-start process.

The LTM4622 has internal 400μs soft-start time when

TRACK/SS leave floating.

Soft-Start and Output Voltage Tracking

Output voltage tracking can also be programmed exter-

nally using the TRACK/SS pin. The output can be tracked

The TRACK/SS pin provides a means to either soft-start

the regulator or track it to a different power supply. A

ꢀꢁ6ꢀ

ꢇꢜꢛꢝꢍꢚꢘ

2ꢜꢛꢝꢍꢚꢘ

ꢀꢁꢃꢃ

ꢆꢜꢛꢝꢍꢚꢘ

4ꢜꢛꢝꢍꢚꢘ

6ꢜꢛꢝꢍꢚꢘ

ꢀꢁꢃꢀ

ꢀꢁ4ꢃ

ꢀꢁ4ꢀ

ꢀꢁꢆꢃ

ꢀꢁꢆꢀ

ꢀꢁ2ꢃ

ꢀꢁ2ꢀ

ꢀꢁꢇꢃ

ꢀꢁꢇꢀ

ꢀꢁꢀꢃ

ꢀ

ꢀꢁꢇ ꢀꢁꢇꢃ ꢀꢁ2 ꢀꢁ2ꢃ ꢀꢁꢆ ꢀꢁꢆꢃ ꢀꢁ4 ꢀꢁ4ꢃ ꢀꢁꢃ ꢀꢁꢃꢃ ꢀꢁ6 ꢀꢁ6ꢃ ꢀꢁꢂ ꢀꢁꢂꢃ ꢀꢁꢄ ꢀꢁꢄꢃ ꢀꢁꢈ

ꢉꢊꢋꢌ ꢅꢍꢎꢋꢏꢐ ꢑꢒ ꢓꢒ

ꢖ

ꢏꢊꢋ ꢔꢕ

4622 ꢅꢀꢆ

Figure 3. Input RMS Current Ratios to DC Load Current as a Function of Duty Cycle

4622fe

12

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

up and down with another regulator. Figure 4 and Figure

5 show an example waveform and schematic of a

Ratiometric tracking where the slave regulator’s output

slew rate is proportional to the master’s.

The R_FB(SL)is the feedback resistor and the R_TR(TOP)

TR(BOT)

the slave regulator, as shown in Figure 5.

/

R

is the resistor divider on the TRACK/SS pin of

Following the upper equation, the master’s output slew

rate (MR) and the slave’s output slew rate (SR) in Volts/

Time is determined by:

Since the slave regulator’s TRACK/SS is connected to

the master’s output through a R

/R

resistor

TR(TOP) TR(BOT)

R

FB(SL)

R

+ 60.4k

MR

SR

FB(SL)

ꢂꢆꢄꢀꢃꢋ ꢈꢉꢀꢊꢉꢀ

=

R

TR(BOT)

ꢄꢅꢆꢇꢃ ꢈꢉꢀꢊꢉꢀ

R

+ R

TR(BOT)

TR(TOP)

For example, V_OUT(MA)= 1.5V, MR = 1.4V/1ms and

= 1.2V, SR = 1.2V/1ms. From the equation, we

V

OUT(SL)

could solve out that R_TR(TOP)= 60.4k and R_TR(BOT)= 40.2k

is a good combination for the Ratiometric tracking.

ꢀꢁꢂꢃ

4622 ꢍꢎ4

Figure 4. Output Ratiometric Tracking Waveform

The TRACK pins will have the 1.5µA current source on

when a resistive divider is used to implement tracking on

that specific channel. This will impose an offset on the

TRACK pin input. Smaller values resistors with the same

ratios as the resistor values calculated from the above

equation can be used. For example, where the 60.4k is

used then a 6.04k can be used to reduce the TRACK pin

offset to a negligible value.

ꢇ

ꢋꢌꢊꢅ

ꢓꢗꢋꢋꢘꢅ ꢓꢗꢋꢋꢘ2

4ꢏꢆꢃ

ꢅꢁꢄ ꢍ 2ꢁꢄꢎ

ꢇ

ꢈꢉ

4ꢇ ꢊꢋ 2ꢀꢇ

ꢇ

ꢈꢉ

ꢋꢌꢊꢅ

4ꢇ

ꢅꢀꢆꢃ

2ꢄꢇ

ꢔꢌꢉꢅ

ꢔꢌꢉ2

ꢈꢉꢊꢇ

ꢚꢛꢉꢑꢜꢒꢋꢘꢕ

ꢊꢔꢎꢑꢝꢜꢚꢚꢅ

ꢊꢔꢎꢑꢝꢜꢚꢚ2

ꢃꢔꢕꢖ

ꢇ

ꢋꢌꢊ2

ꢇ

ꢋꢌꢊ2

ꢅꢁ2 ꢍ 2ꢁꢄꢎ

ꢙꢊꢒ4622

4ꢏꢆꢃ

4ꢇ

ꢑꢋꢒꢓꢅ

ꢑꢋꢒꢓ2

ꢃꢐꢅ

ꢑꢑ

6ꢀꢁ4ꢂ

ꢇ

ꢋꢌꢊꢅ

ꢀꢁꢅꢆꢃ

ꢃꢐ2

ꢗꢉꢘ

6ꢀꢁ4ꢂ

4ꢀꢁ2ꢂ

The Coincident output tracking can be recognized as a

special Ratiometric output tracking which the master’s

output slew rate (MR) is the same as the slave’s output

slew rate (SR), as waveform shown in Figure 6.

4ꢀꢁ2ꢂ

4622 ꢃꢀꢄ

Figure 5. Eꢁample Schematic of Ratiometric

Output Voltage Tracking

divider and its voltage used to regulate the slave output

voltage when TRACK/SS voltage is below 0.6V, the slave

output voltage and the master output voltage should sat-

isfy the following equation during the start-up.

ꢂꢄꢅꢀꢃꢆ ꢇꢈꢀꢉꢈꢀ

ꢅꢊꢄꢋꢃ ꢇꢈꢀꢉꢈꢀ

R

FB(SL)

V

•

=

OUT(SL)

OUT(MA)

R

+ 60.4k

FB(SL)

R

TR(BOT)

ꢀꢁꢂꢃ

V

•

4622 ꢍꢎ6

R

+ R

TR(BOT)

TR(TOP)

Figure 6. Output Coincident Tracking Waveform

4622fe

13

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

From the equation, we could easily find out that, in the

Coincident tracking, the slave regulator’s TRACK/SS pin

resistor divider is always the same as its feedback divider.

Pre-Biased Output Start-Up

There may be situations that require the power supply to

start up with a pre-bias on the output capacitors. In this

case, it is desirable to start up without discharging that

output pre-bias. The LTM4622 can safely power up into

a pre-biased output without discharging it.

R

FB(SL)

TR(BOT)

=

R

+ 60.4k

R

+ R

TR(TOP) TR(BOT)

FB(SL)

For example, R

= 60.4k and R

= 60.4k is a

The LTM4622 accomplishes this by forcing discontinuous

mode (DCM) operation until the TRACK/SS pin voltage

reaches 0.6V reference voltage. This will prevent the BG

from turning on during the pre-biased output start-up

which would discharge the output.

TR(TOP)

TR(BOT)

good combination for Coincident tracking for V

=

OUT(MA)

1.5V and V

= 1.2V application.

OUT(SL)

Power Good

The PGOOD pins are open drain pins that can be used to

monitor valid output voltage regulation. This pin monitors

a 8% window around the regulation point. A resistor can

be pulled up to a particular supply voltage for monitoring.

To prevent unwanted PGOOD glitches during transients

Overtemperature Protection

The internal overtemperature protection monitors the

junction temperature of the module. If the junction

temperature reaches approximately 160°C, both power

switches will be turned off until the temperature drops

about 15°C cooler.

or dynamic V

changes, the LTM4622’s PGOOD falling

OUT

edge includes a blanking delay of approximately 40µs.

Input Overvoltage Protection

Stability compensation

In order to protect the internal power MOSFET devices

against transient voltage spikes, the LTM4622 constantly

monitors each V_INpin for an overvoltage condition. When

The LTM4622 module internal compensation loop is

designed and optimized for low ESR ceramic output

capacitors only application. Table 7 is provided for most

application requirements. The LTpowerCAD Design Tool

is available to down for control loop optimization.

V rises above 22.5V, the regulator suspends operation

IN

by shutting off both power MOSFETs on the correspond-

ing channel. Once V drops below 21.5V, the regulator

IN

immediately resumes normal operation. The regulator

executes its soft-start function when exiting an overvolt-

age condition.

RUN Enable

Pulling the RUN pin to ground forces the LTM4622 into

its shutdown state, turning off both power MOSFETs and

most of its internal control circuitry. Trying the RUN pin

voltage above 1.27V will turn on the entire chip.

Thermal Considerations and Output Current Derating

The thermal resistances reported in the Pin Configuration

section of the data sheet are consistent with those param-

eters defined by JESD51-9 and are intended for use with

finite element analysis (FEA) software modeling tools

that leverage the outcome of thermal modeling, simula-

tion, and correlation to hardware evaluation performed

on a µModule package mounted to a hardware test

Low Input Application

The LTM4622 is capable to run from 3.3V input when

the V pin is tied to INTV pin. See Figure 27 for the

IN

CC

application circuit. Please note the INTV pin has 3.6V

CC

ABS MAX voltage rating.

4622fe

14

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

ꢍꢇꢎꢌꢏꢋꢅꢎꢐꢏꢅꢐꢑꢄꢗꢋꢉꢎꢏ ꢏꢘꢉꢖꢄꢑꢈ ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ ꢌꢅꢄꢔꢅꢎꢉꢎꢏꢒ

ꢍꢇꢎꢌꢏꢋꢅꢎꢐꢏꢅꢐꢌꢑꢒꢉ ꢓꢏꢅꢔꢕ

ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

ꢌꢑꢒꢉ ꢓꢏꢅꢔꢕꢐꢏꢅꢐꢑꢄꢗꢋꢉꢎꢏ

ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

ꢍꢇꢎꢌꢏꢋꢅꢎꢐꢏꢅꢐꢗꢅꢑꢖꢆ ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

ꢍꢇꢎꢌꢏꢋꢅꢎ

ꢑꢄꢗꢋꢉꢎꢏ

ꢍꢇꢎꢌꢏꢋꢅꢎꢐꢏꢅꢐꢌꢑꢒꢉ

ꢓꢗꢅꢏꢏꢅꢄꢕ ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

ꢌꢑꢒꢉ ꢓꢗꢅꢏꢏꢅꢄꢕꢐꢏꢅꢐꢗꢅꢑꢖꢆ

ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

ꢗꢅꢑꢖꢆꢐꢏꢅꢐꢑꢄꢗꢋꢉꢎꢏ

ꢖꢉꢒꢋꢒꢏꢑꢎꢌꢉ

4622 ꢀꢁꢂ

ꢃꢄꢅꢆꢇꢈꢉ ꢆꢉꢊꢋꢌꢉ

Figure 7. Graphical Representation of JESD 51-12 Thermal Coefficients

board—also defined by JESD51-9 (Test Boards for Area

Array Surface Mount Package Thermal Measurements).

The motivation for providing these thermal coefficients in

found in JESD51-12 (Guidelines for Reporting and Using

Electronic Package Thermal Information).

2. θ_JCbottom, the thermal resistance from junction to

ambient, is the natural convection junction-to-ambi-

ent air thermal resistance measured in a one cubic

foot sealed enclosure. This environment is sometimes

referred to as still air although natural convection

causes the air to move. This value is determined with

the part mounted to a JESD 51-9 defined test board,

which does not reflect an actual application or viable

operating condition.

Many designers may opt to use laboratory equipment and

a test vehicle such as the demo board to anticipate the

µModule regulator’s thermal performance in their appli-

cation at various electrical and environmental operating

conditions to compliment any FEA activities. Without

FEA software, the thermal resistances reported in the

Pin Configuration section are in-and-of themselves not

relevant to providing guidance of thermal performance;

instead, the derating curves provided in the data sheet can

be used in a manner that yields insight and guidance per-

taining to one’s application usage, and can be adapted to

correlate thermal performance to one’s own application.

3. θ

, the thermal resistance from junction to top of

JCtop

the product case, is determined with nearly all of the

component power dissipation flowing through the top

of the package. As the electrical connections of the

typical µModule are on the bottom of the package, it

is rare for an application to operate such that most of

the heat flows from the junction to the top of the part.

As in the case of θ

, this value may be useful

JCbottom

for comparing packages but the test conditions don’t

generally match the user’s application.

The Pin Configuration section typically gives four thermal

coefficients explicitly defined in JESD 51-12; these coef-

ficients are quoted or paraphrased below:

4. θ_JB, the thermal resistance from junction to the

printed circuit board, is the junction-to-board thermal

resistance where almost all of the heat flows through

the bottom of the µModule and into the board, and

is really the sum of the θ_JCbottomand the thermal

resistance of the bottom of the part through the solder

joints and through a portion of the board. The board

temperature is measured a specified distance from

the package, using a two sided, two layer board. This

board is described in JESD 51-9.

1. θ , the thermal resistance from junction to ambient,

JA

is the natural convection junction-to-ambient air ther-

mal resistance measured in a one cubic foot sealed

enclosure. This environment is sometimes referred

to as still air although natural convection causes the

air to move. This value is determined with the part

mounted to a JESD 51-9 defined test board, which

does not reflect an actual application or viable operat-

ing condition.

4622fe

15

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

chamber to reasonably define and correlate the thermal

resistance values supplied in this data sheet: (1) Initially,

FEA software is used to accurately build the mechanical

geometry of the µModule and the specified PCB with all

of the correct material coefficients along with accurate

power loss source definitions; (2) this model simulates

a software-defined JEDEC environment consistent with

JSED51-12 to predict power loss heat flow and tempera-

ture readings at different interfaces that enable the cal-

culation of the JEDEC-defined thermal resistance values;

(3) the model and FEA software is used to evaluate the

µModule with heat sink and airflow; (4) having solved

for and analyzed these thermal resistance values and

simulated various operating conditions in the software

model, a thorough laboratory evaluation replicates the

simulated conditions with thermo-couples within a con-

trolled-environment chamber while operating the device

at the same power loss as that which was simulated. An

outcome of this process and due-diligence yields a set

of derating curves provided in other sections of this data

sheet. After these laboratory test have been performed

A graphical representation of the aforementioned ther-

mal resistances is given in Figure 7; blue resistances are

contained within the μModule regulator, whereas green

resistances are external to the µModule.

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD 51-12 or provided in the

Pin Configuration section replicates or conveys normal

operating conditions of a μModule. For example, in nor-

mal board-mounted applications, never does 100% of

the device’s total power loss (heat) thermally conduct

exclusively through the top or exclusively through bottom

of the µModule—as the standard defines for θ

and

JCtop

θ_JCbottom, respectively. In practice, power loss is ther-

mally dissipated in both directions away from the pack-

age—granted, in the absence of a heat sink and airflow,

a majority of the heat flow is into the board.

Within a SIP (system-in-package) module, be aware there

are multiple power devices and components dissipating

power, with a consequence that the thermal resistances

relative to different junctions of components or die are not

exactly linear with respect to total package power loss. To

reconcile this complication without sacrificing modeling

simplicity—but also, not ignoring practical realities—an

approach has been taken using FEA software modeling

along with laboratory testing in a controlled-environment

and correlated to the µModule model, then the θ and

JB

θ

are summed together to correlate quite well with the

BA

µModule model with no airflow or heat sinking in a prop-

erly define chamber. This θ + θ value is shown in the

Pin Configuration section ^Ja^Bnd should accurately equal

BA

the θ value because approximately 100% of power loss

JA

2ꢌꢋ

ꢍꢌꢎ

ꢍꢌ6

ꢍꢌ4

ꢍꢌ2

ꢍꢌꢋ

ꢋꢌꢎ

ꢋꢌ6

ꢋꢌ4

ꢋꢌ2

ꢋ

2ꢌꢋ

ꢍꢌꢎ

ꢍꢌ6

ꢍꢌ4

ꢍꢌ2

ꢍꢌꢋ

ꢋꢌꢎ

ꢋꢌ6

ꢋꢌ4

ꢋꢌ2

ꢋ

2ꢌꢍ

ꢍ2ꢖ

ꢒꢖ

ꢍ2ꢕ

ꢑꢕ

ꢎ2ꢔ

ꢕꢇ

ꢗꢇ

ꢖꢇ

ꢍꢔ

ꢕꢇ

2ꢌꢋ

ꢎꢌꢍ

ꢎꢌꢋ

ꢋꢌꢍ

ꢋ

4

ꢑ

4

ꢒ

4

ꢍ

ꢋ

ꢍ

2

ꢏ

ꢋ

ꢍ

2

ꢏ

ꢋ

ꢎ

2

ꢏ

ꢀꢁꢂꢃꢁꢂ ꢄꢁꢅꢅꢆꢇꢂ ꢈꢉꢊ

4622 ꢐꢋꢎ

4622 ꢐꢋꢑ

4622 ꢐꢎꢋ

Figure 8. 1V Output Power Loss

Figure 9. 1.5V Output Power Loss

Figure 10. 2.5V Output Power Loss

4622fe

16

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

ꢌꢍꢋ

2ꢍꢎ

ꢏꢍꢋ

ꢏꢍꢎ

ꢏꢍꢋ

ꢋꢍꢎ

ꢋ

ꢌꢍꢋ

2ꢍꢎ

ꢏꢍꢋ

ꢏꢍꢎ

ꢏꢍꢋ

ꢋꢍꢎ

ꢋ

6

5

4

3

2

1

0

ꢔ

ꢖ ꢏ2ꢔ

ꢏ2ꢔ

ꢕꢇ

ꢎꢔ

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

4

ꢎ

4

ꢎ

40

80

100 110 120

ꢋ

ꢏ

2

ꢌ

ꢋ

ꢏ

2

ꢌ

50 60 70

90

ꢀꢁꢂꢃꢁꢂ ꢄꢁꢅꢅꢆꢇꢂ ꢈꢉꢊ

AMBIENT TEMPERATURE (˚C)

4622 ꢐꢏꢏ

4622 ꢐꢏ2

4622 F13

Figure 11. 3.3V Output Power Loss

Figure 12. 5V Output Power Loss

Figure 13. 5V to 1V Derating Curve,

No Heat Sink

6

5

4

3

2

1

0

6

5

4

3

2

1

0

6

5

4

3

2

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

ꢀꢁꢂꢃ

1

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

0

40 50 60

80 90 100 110 120

40 50 60

80 90 100 110 120

40 50 60

80 90 100 110 120

70

AMBIENT TEMPERATURE (˚C)

4622 F14

4622 F15

4622 F16

Figure 14. 12V to 1V Derating Curve,

No Heat Sink

Figure 15. 5V to 1.5V Derating Curve,

No Heat Sink

Figure 16. 12V to 1.5V Derating

Curve, No Heat Sink

6

5

4

3

2

1

0

6

5

4

3

2

1

0

6

5

4

3

2

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

ꢀꢁꢂꢃ

1

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

0

40 50 60

80 90 100 110 120

40 50 60

80 90 100 110 120

40 50 60

80 90 100 110 120

70

AMBIENT TEMPERATURE (˚C)

4622 F17

4622 F18

4622 F19

Figure 17. 5V to 2.5V Derating Curve,

No Heat Sink

Figure 18. 12V to 2.5V Derating Curve,

No Heat Sink

Figure 19. 5V to 3.3V Derating Curve,

No Heat Sink

4622fe

17

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

6

5

4

3

2

6

5

4

3

2

1

0

ꢀꢁꢂꢃ

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

1

2ꢀꢀꢁꢂꢃ

4ꢀꢀꢁꢂꢃ

0

40 50 60

80 90 100 110 120

70

40 50 60

80 90 100 110

120

70

AMBIENT TEMPERATURE (˚C)

4622 F20

4622 F21

Figure 20. 12V to 3.3V Derating Curve,

No Heat Sink

Figure 21. 12V to 5V Derating Curve,

No Heat Sink

Table 2. 1V Output

DERATING CURVE

Figures 13, 14

V

(V)

POWER LOSS CURVE

Figure 8

AIR FLOW (LFM)

HEAT SINK

None

θ

JA(°C/W)

IN

5, 12

0

19 – 20

Figure 8

200

400

None

17 – 18

Figure 8

None

Table 3. 1.5V Output

DERATING CURVE

Figures 15, 16

V

(V)

POWER LOSS CURVE

Figure 9

AIR FLOW (LFM)

HEAT SINK

None

θ

JA(°C/W)

IN

5, 12

0

19 – 20

Figures 15, 16

5, 12

Figure 9

200

400

None

17 – 18

Figures 15, 16

Figure 9

None

Table 4. 2.5V Output

DERATING CURVE

Figures 17, 18

V

(V)

POWER LOSS CURVE

Figure 10

AIR FLOW (LFM)

HEAT SINK

None

θ

JA(°C/W)

IN

5, 12

0

19 – 20

Figures 17, 18

5, 12

Figure 10

200

400

None

17 – 18

Figures 17, 18

Figure 10

None

Table 5. 3.3V Output

DERATING CURVE

Figure 19, 20

V

(V)

POWER LOSS CURVE

Figure 11

AIR FLOW (LFM)

HEAT SINK

None

θ

JA(°C/W)

IN

5, 12

0

19 – 20

Figure 19, 20

5, 12

Figure 11

200

400

None

17 – 18

Figure 19, 20

Figure 11

None

Table 6. 5V Output

DERATING CURVE

Figure 21

V

(V)

POWER LOSS CURVE

Figure 12

AIR FLOW (LFM)

HEAT SINK

None

θ

JA(°C/W)

IN

12

0

19 – 20

Figure 21

12

Figure 12

200

400

None

17 – 18

Figure 21

Figure 12

None

4622fe

18

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

Table 7. Output Voltage Response for Each Regulator Channel vs Component Matriꢁ (Refer to Figure 24)

1.25A Load Step Typical Measured Values

C

OUT2

(BULK)

IN

OUT1

(CERAMIC) PART NUMBER

VALUE

(CERAMIC) PART NUMBER

VALUE

PART NUMBER VALUE

Murata

GRM188R61E475KE11# 4.7µF, 25V, Murata

0603, X5R

GRM21R60J476ME15# 47µF, 6.3V, Panasonic 6TPC150M

0805, X5R

150µF, 6.3V 3.5

× 2.8 × 1.4mm

Murata

GRM188R61E106MA73# 10µF, 25V, Murata

0603, X5R

GRM188R60J226MEA0# 22µF, 6.3V, Sanyo

0603, X5R

Taiyo Yuden TMK212BJ475KG-T

4.7µF, 25V, Taiyo

0805, X5R Yuden

JMK212BJ476MG-T

47µF, 6.3V,

0805, X5R

C

OUT2

P-P

DROOP DERIVATION RECOVERY

LOAD STEP

IN

OUT1

V

(CERAMIC)

(μF)

C

(CERAMIC) (BULK)

C

LOAD

TIME (μS) STEP (A)

SLEW RATE

(A/μS)

R

FB

OUT

IN

FF

(V)

(BULK)

(μF)

(pF)

V

(V)

(mV)

103

52

(kΩ)

90.9

60.4

40.2

30.1

19.1

13.3

8.25

IN

1

10

0

1 x 47

1 x 10

1 x 47

1 x 10

1 x 47

1 x 10

1 x 47

1 x 10

1 x 47

1 x 10

1 x 47

1 x 10

1 x 47

1 x 10

0

5, 12

0

4

1.25

10

1

150

0

10

4

1.2

1.5

1.8

2.5

3.3

5

0

113

56

150

0

10

8

0

131

61

150

0

14

8

0

150

67

150

0

16

8

0

184

78

150

0

20

12

35

12

60

0

200

78

150

0

309

114

5

150

0

4622fe

19

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

flows from the junction through the board into ambient

with no airflow or top mounted heat sink.

how much module temperature rise can be allowed. As an

example in Figure 15 the load current is derated to ~3A

at ~102°C with no air or heat sink and the power loss for

the 5V to 1.5V at 3A output is about 0.95W. The 0.95W

loss is calculated with the ~0.7W room temperature loss

from the 5V to 1.5V power loss curve at 3A, and the 1.35

multiplying factor. If the 102°C ambient temperature is

subtracted from the 120°C junction temperature, then the

The 1V, 1.5V, 2.5V, 3.3V and 5V power loss curves in

Figures 8 to 12 can be used in coordination with the

load current derating curves in Figures 13 to 21 for cal-

culating an approximate θ thermal resistance for the

LTM4622 (in two-phase s^Jin^Agle output operation) with

no heat sinking and various airflow conditions. The

power loss curves are taken at room temperature, and

are increased with multiplicative factors of 1.35 assum-

ing junction temperature at 120°C. The derating curves

are plotted with the output current starting at 5A and the

ambient temperature at 40°C. These output voltages are

chosen to include the lower and higher output voltage

ranges for correlating the thermal resistance. Thermal

models are derived from several temperature measure-

ments in a controlled temperature chamber along with

thermal modeling analysis. The junction temperatures

are monitored while ambient temperature is increased

with and without airflow. The power loss increase with

ambient temperature change is factored into the derating

curves. The junctions are maintained at 120°C maximum

while lowering output current or power with increasing

ambient temperature. The decreased output current will

decrease the internal module loss as ambient tempera-

ture is increased. The monitored junction temperature of

120°C minus the ambient operating temperature specifies

difference of 18°C divided by 0.95W equals a 19°C/W θ

JA

thermal resistance. Table 3 specifies a 19 – 20°C/W value

which is very close. Table 2 to 6 provide equivalent ther-

mal resistances for 1V, 1.5V, 2.5V, 3.3V and 5V outputs

with and without airflow. The derived thermal resistances

in Table 2 to 6 for the various conditions can be multiplied

by the calculated power loss as a function of ambient

temperature to derive temperature rise above ambient,

thus maximum junction temperature. Room temperature

power loss can be derived from the efficiency curves

in the Typical Performance Characteristics section and

adjusted with the above ambient temperature multiplica-

tive factors. The printed circuit board is a 1.6mm thick

four layer board with two ounce copper for the two outer

layers and one ounce copper for the two inner layers. The

PCB dimensions are 95mm × 76mm.

Figure 22 shows a measured temperature picture of the

LTM4622 with no heatsink and no airflow, from 12V input

down to 3.3V and 5V output with 2.5A DC current on each.

4622 F22

Figure 22. Thermal Picture, 12V Input, 3.3V and 5V Output, 2.5A DC Each Output with No Air Flow and No Heat Sink

4622fe

20

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

SAFETY CONSIDERATIONS

n

Place a dedicated power ground layer underneath

the unit.

To minimize the via conduction loss and reduce

module thermal stress, use multiple vias for

interconnection between top layer and other

power layers.

The LTM4622 modules do not provide galvanic isolation

from V to V . There is no internal fuse. If required,

IN

OUT

a slow blow fuse with a rating twice the maximum input

current needs to be provided to protect each unit from

catastrophic failure. The device does support thermal

shutdown and over current protection.

n

Do not put via directly on the pad, unless they are

capped or plated over.

Use a separated SGND ground copper area for

components connected to signal pins. Connect the

SGND to GND underneath the unit.

LAYOUT CHECKLIST/EXAMPLE

The high integration of LTM4622 makes the PCB board

layout very simple and easy. However, to optimize its

electrical and thermal performance, some layout consid-

erations are still necessary.

n

For parallel modules, tie the V , V , and COMP

OUT FB

pins together. Use an internal layer to closely con-

nect these pins together. The TRACK pin can be

tied a common capacitor for regulator soft-start.

Bring out test points on the signal pins for

monitoring.

n

Use large PCB copper areas for high current paths,

n

including V , GND, V

and V

. It helps to

IN

OUT1

OUT2

minimize the PCB conduction loss and thermal stress.

Place high frequency ceramic input and output

Figure 23 gives a good example of the recommended

layout.

n

capacitors next to the V , PGND and V

pins to

IN

OUT

minimize high frequency noise.

4622 ꢀ2ꢁ

Figure 23. Recommended PCB Layout

4622fe

21

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

ꢅ

ꢉꢊꢈꢋ

ꢔꢘꢉꢉꢙꢋ ꢔꢘꢉꢉꢙ2

ꢋ ꢌ 2ꢂꢍꢎ

ꢅ

ꢆꢇ

ꢋꢁꢏꢄ

ꢅ

ꢆꢇ

ꢉꢊꢈꢋ

4ꢅ ꢈꢉ 2ꢁꢅ

10µF

ꢕꢊꢇꢋ

ꢕꢊꢇ2

ꢅ

ꢉꢊꢈ2

ꢅ

ꢉꢊꢈ2

ꢋꢂꢐ ꢌ 2ꢂꢍꢎ

ꢚꢈꢓ4622

ꢋꢁꢏꢄ

ꢆꢇꢈꢅ

ꢒꢉꢓꢔꢋ

ꢒꢉꢓꢔ2

ꢄꢑꢋ

ꢒꢒ

ꢛꢜꢇꢒꢝꢓꢉꢙꢖ

ꢈꢕꢎꢒꢞꢝꢛꢛꢋ

ꢈꢕꢎꢒꢞꢝꢛꢛ2

ꢄꢕꢖꢗ

ꢁꢂꢋꢏꢄ

ꢄꢑ2

ꢘꢇꢙ

ꢟꢁꢂꢋꢃ

ꢀꢁꢂ6ꢃ

ꢁꢂꢋꢏꢄ

4622 ꢄ24

Figure 24. 4V_INto 20V_IN, 1V and 1.8V Output at 2.5A Design

ꢓꢗꢌꢌꢘ

ꢓꢗꢌꢌꢘꢆ ꢓꢗꢌꢌꢘ2

ꢈ

ꢌꢍꢋ

ꢉꢊ

ꢈ

ꢉꢊ

ꢌꢍꢋꢆ

ꢌꢍꢋ2

ꢆꢂ2 ꢎ ꢅꢏ

4ꢈ ꢋꢌ 2ꢁꢈ

22ꢇꢄ

ꢆꢁꢇꢄ

ꢔꢍꢊꢆ

ꢔꢍꢊ2

ꢈ

ꢙꢋꢒ4622

ꢑꢌꢒꢓꢆ

ꢑꢌꢒꢓ2

ꢉꢊꢋꢈ

ꢑꢑ

ꢚꢛꢊꢑꢜꢒꢌꢘꢕ

ꢋꢔꢏꢑꢝꢜꢚꢚꢆ

ꢋꢔꢏꢑꢝꢜꢚꢚ2

ꢄꢔꢕꢖ

ꢄꢐꢆ

ꢄꢐ2

ꢁꢂꢆꢇꢄ

ꢀꢁꢂ2ꢃ

ꢗꢊꢘ

4622 ꢄ2ꢅ

Figure 25. 4V_INto 20V_IN, 1.2V Two Phase in Parallel 5A Design

ꢇ

ꢌꢍꢋꢀ

ꢔꢘꢌꢌꢙꢀ ꢔꢘꢌꢌꢙ2

ꢁꢂꢁ ꢎ 2ꢂꢏꢐ

ꢇ

ꢈꢉ

ꢀꢄꢅꢆ

ꢇ

ꢈꢉ

ꢌꢍꢋꢀ

ꢊꢇ ꢋꢌ 2ꢄꢇ

ꢀꢄꢅꢆ

ꢕꢍꢉꢀ

ꢕꢍꢉ2

ꢇ

ꢌꢍꢋ2

ꢇ

ꢌꢍꢋ2

ꢏ ꢎ 2ꢂꢏꢐ

ꢚꢋꢓ4622

ꢀꢄꢅꢆ

ꢈꢉꢋꢇ

ꢒꢌꢓꢔꢀ

ꢒꢌꢓꢔ2

ꢆꢑꢀ

ꢒꢒ

ꢛꢜꢉꢒꢝꢓꢌꢙꢖ

ꢋꢕꢐꢒꢞꢝꢛꢛꢀ

ꢋꢕꢐꢒꢞꢝꢛꢛ2

ꢆꢕꢖꢗ

ꢄꢂꢀꢅꢆ

ꢆꢑ2

ꢘꢉꢙ

ꢊꢂ2ꢏꢃ

ꢀꢁꢂꢁꢃ

ꢄꢂꢀꢅꢆ

ꢁ24ꢃ

4622 F26

Figure 26. 8V_INto 20V_IN, 3.3V and 5V Output at 2.5A with 2MHz Switching Frequency

4622fe

22

For more information www.linear.com/LTM4622

LTM4622

APPLICATIONS INFORMATION

ꢆ

ꢇꢈꢉꢂ

ꢔꢘꢇꢇꢙꢂ ꢔꢘꢇꢇꢙ2

ꢂꢁꢎ ꢏ 2ꢁꢎꢐ

ꢆ

ꢋꢌ

ꢂꢀꢃꢄ

ꢆ

ꢋꢌ

ꢇꢈꢉꢂ

ꢍꢁꢍꢆ

ꢂꢀꢃꢄ

ꢕꢈꢌꢂ

ꢕꢈꢌ2

ꢆ

ꢇꢈꢉ2

ꢆ

ꢇꢈꢉ2

ꢂꢁ2 ꢏ 2ꢁꢎꢐ

ꢚꢉꢓ4622

ꢂꢀꢃꢄ

ꢋꢌꢉꢆ

ꢒꢇꢓꢔꢂ

ꢒꢇꢓꢔ2

ꢄꢑꢂ

ꢒꢒ

ꢛꢜꢌꢒꢝꢓꢇꢙꢖ

ꢉꢕꢐꢒꢞꢝꢛꢛꢂ

ꢉꢕꢐꢒꢞꢝꢛꢛ2

ꢄꢕꢖꢗ

ꢆ

ꢄꢑ2

ꢇꢈꢉꢂ

6ꢀꢁ4ꢅ

ꢀꢁꢂꢃꢄ

ꢘꢌꢙ

6ꢀꢁ4ꢅ

4ꢀꢁ2ꢅ

6ꢀꢁ4ꢅ

4622 ꢄ2ꢊ

Figure 27. 3.3V_IN, 1.5V and 1.2V Output at 2.5A Design with Output Coincident Tracking

ꢒꢖꢈꢈꢗ

ꢒꢖꢈꢈꢗꢋ ꢒꢖꢈꢈꢗ2

ꢄ

ꢈꢊꢇ

ꢅꢆ

ꢄ

ꢅꢆ

ꢈꢊꢇꢋ

ꢈꢊꢇ2

ꢋ ꢌ ꢋꢉꢍ

4ꢄ ꢇꢈ 2ꢉꢄ

22ꢂꢃ

4ꢎꢂꢃ

ꢓꢊꢆꢋ

ꢓꢊꢆ2

ꢄ

ꢘꢇꢑ4622

ꢐꢈꢑꢒꢋ

ꢐꢈꢑꢒ2

ꢐꢈꢑꢒ

ꢅꢆꢇꢄ

ꢐꢐ

ꢙꢚꢆꢐꢛꢑꢈꢗꢔ

ꢇꢓꢍꢐꢜꢛꢙꢙꢋ

ꢇꢓꢍꢐꢜꢛꢙꢙ2

ꢃꢓꢔꢕ

ꢞꢞꢀ2ꢁ

ꢃꢏꢋ

ꢃꢏ2

ꢃꢏ

22ꢀ6ꢁ

ꢘꢇꢐ6ꢟꢉ2

ꢙꢔꢇ

ꢖꢆꢗ

ꢠ

ꢅꢆꢇꢄ

ꢄ

ꢐꢐ

ꢋꢂꢃ

ꢗꢅꢄ

ꢒꢡ

ꢑꢈꢗ

ꢖꢆꢗ

ꢒꢖꢈꢈꢗ

ꢈꢊꢇꢋ

ꢈꢊꢇ2

ꢈꢊꢇ4

ꢈꢊꢇꢞ

ꢒꢖꢈꢈꢗꢋ ꢒꢖꢈꢈꢗ2

ꢄ

ꢅꢆ

ꢈꢊꢇꢋ

ꢈꢊꢇ2

ꢓꢊꢆꢋ

ꢓꢊꢆ2

ꢅꢆꢇꢄ

ꢙꢚꢆꢐꢛꢑꢈꢗꢔ

ꢇꢓꢍꢐꢜꢛꢙꢙꢋ

ꢇꢓꢍꢐꢜꢛꢙꢙ2

ꢃꢓꢔꢕ

ꢄ

ꢘꢇꢑ4622

ꢐꢈꢑꢒꢋ

ꢐꢈꢑꢒ2

ꢐꢈꢑꢒ

ꢃꢏ

ꢐꢐ

ꢃꢏꢋ

ꢃꢏ2

ꢉꢀꢋꢂꢃ

ꢖꢆꢗ

4622 ꢃ2ꢝ

Figure 28. 4 Phase, 1V Output at 10A Design with LTC6902

4622fe

23

For more information www.linear.com/LTM4622

LTM4622

PACKAGE DESCRIPTION

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

LTM4622 Component LGA and BGA Pinout

PIN ID

A1

FUNCTION

PIN ID

A2

FUNCTION

PIN ID

A3

FUNCTION

PIN ID

A4

FUNCTION

FB2

PIN ID

A5

FUNCTION

COMP2

GND

V

OUT2

V

OUT2

V

IN

TRACK/SS2

B1

B2

RUN2

GND

B3

V

B4

PGOOD2

FREQ

B5

IN

C1

GND

C2

C3

INTV

C4

C5

SYNC/MODE

GND

CC

D1

V

D2

RUN1

D3

V

IN

D4

PGOOD1

FB1

D5

OUT1

E1

V

E2

V

IN

E3

TRACK/SS1

E4

E5

COMP1

4622fe

24

For more information www.linear.com/LTM4622

LTM4622

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTM4622#packaging for the most recent package drawings.

ꢓ

ꢵ ꢵ ꢠ ꢠ ꢠ ꢓ

2 ꢜ ꢝ 4 ꢛ

ꢍ ꢜ 2 ꢞ ꢛ

ꢛ ꢜ ꢘ ꢍ ꢞ ꢝ

ꢛ ꢜ ꢛ ꢛ ꢛ

ꢛ ꢜ ꢘ ꢍ ꢞ ꢝ

ꢍ ꢜ 2 ꢞ ꢛ

2 ꢜ ꢝ 4 ꢛ

4622fe

25

For more information www.linear.com/LTM4622

LTM4622

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTM4622#packaging for the most recent package drawings.

ꢓ

ꢦ ꢦ ꢮ ꢮ ꢮ ꢓ

2 ꢜ ꢝ 4 ꢛ

ꢍ ꢜ 2 ꢞ ꢛ

ꢛ ꢜ ꢘ ꢍ ꢞ ꢝ

ꢛ ꢜ ꢛ ꢛ ꢛ

ꢛ ꢜ ꢘ ꢍ ꢞ ꢝ

ꢍ ꢜ 2 ꢞ ꢛ

2 ꢜ ꢝ 4 ꢛ

4622fe

26

For more information www.linear.com/LTM4622

LTM4622

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

1

A

08/15 Added “Single 5A” to Title and Features

01/16 Added BGA package

B

1, 2, 25, 26

C

11/16 Corrected equations of tracking start-up time from R

05/17 Changed MSL Rating from 3 to 4

/[R

+ R

] to R

/[R

+ R ]

TR(BOT)

13, 14

2

TR(TOP)

TR(BOT)

TR(TOP)

D

E

01/18 Removed unnecessary sentence from Prebiased Output Start-Up section

14

4622fe

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications

27

subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

For more information www.linear.com/LTM4622

LTM4622

PACKAGE PHOTO

DESIGN RESOURCES

SUBJECT

DESCRIPTION

µModule Design and Manufacturing Resources

Design:

Manufacturing:

• Selector Guides

• Quick Start Guide

• Demo Boards and Gerber Files

• Free Simulation Tools

• PCB Design, Assembly and Manufacturing Guidelines

• Package and Board Level Reliability

µModule Regulator Products Search

1. Sort table of products by parameters and download the result as a spread sheet.

2. Search using the Quick Power Search parametric table.

TechClip Videos

Quick videos detailing how to bench test electrical and thermal performance of µModule products.

Digital Power System Management

The Analog Devices, Inc. family of digital power supply management ICs are highly integrated

solutions that offer essential functions, including power supply monitoring, supervision, margining and

sequencing, and feature EEPROM for storing user configurations and fault logging.

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LTM4623

LTM4624

LTM4625

LTM4619

LTM4618

20V , 3A Step-Down µModule Regulator

4V ≤ V ≤ 20V, 0.6V ≤ V

≤ 5.5V, PLL Input, CLKOUT, V

Tracking, PGOOD,

6.25mm × 6.25mm × 5.01mm BGA

4V ≤ V ≤ 20V, 0.6V ≤ V ≤ 5.5V, PLL Input, CLKOUT, V Tracking, PGOOD,

OUT

IN

OUT

6.25mm × 6.25mm × 1.82mm LGA

4V ≤ V ≤ 14V, 0.6V ≤ V ≤ 5.5V, V Tracking, PGOOD,

OUT

14V , 4A Step-Down µModule Regulator

IN

OUT

20V , 5A Step-Down µModule Regulator

IN

OUT

6.25mm × 6.25mm × 5.01mm BGA

Dual 26V, 4A Step-Down µModule Regulator

4.5V ≤ V ≤ 26.5V, 0.8V ≤ V

≤ 5V, PLL Input, V

15mm × 15mm × 2.82mm LGA

4.5V ≤ V ≤ 26.5V, 0.8V ≤ V ≤ 5V, PLL Input, V

OUT

Tracking, PGOOD,

Tracking,

IN

OUT

26V , 6A Step-Down µModule Regulator

IN

9mm × 15mm × 4.32mm LGA

LTM4614

LTC6902

Dual 5V, 4A µModule Regulator

2.375V ≤ V ≤ 5.5V, 0.8V ≤ V

≤ 5V, 15mm × 15mm × 2.82mm LGA

OUT

IN

Multiphase Oscillator with Spread Spectrum

Frequency Modulation

LTM4642

LTM4631

LTM4643

20V , Dual 4A, Step-Down µModule Regulator

4.5V ≤ V ≤ 20V, 0.6V ≤ V

≤ 5.5V, 9mm × 11.25mm × 4.92mm BGA

≤ 1.8V, 16mm × 16mm × 1.91mm LGA

IN

OUT

Ultrathin, Dual 10A, Step-Down µModule Regulator 4.5V ≤ V ≤ 15V, 0.6V ≤ V

IN

OUT

Ultrathin, Quad 3A, Step-Down µModule Regulator 4V ≤ V ≤ 20V, 0.6V ≤ V

≤ 3.3V, 9mm × 15mm × 1.82mm LGA

IN

OUT

4622fe

LT 0118 REV E • PRINTED IN USA

www.linear.com/LTM4622

28

For more information www.linear.com/LTM4622


型号：	LTM4622EV#PBF
厂家：	Linear
描述：	LTM4622 - Dual Ultrathin 2.5A or Single 5A Step-Down DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 25; Temperature Range: -40°C to 85°C 开关输出元件
文件：	总28页 (文件大小：1732K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM4622EV#PBF [Linear]

相关型号：

LTM4622IY

LTM4622IY#PBF

LTM4623

LTM4623EV#PBF

LTM4623EY#PBF

LTM4623IY

LTM4623IY#PBF

LTM4624

LTM4624EY#PBF

LTM4626

LTM4627

LTM4627