LTM8025MPVPBF [Linear]
36V, 3A Step-Down μModule Converter; 36V ， 3A降压型μModule转换器
| 型号： | LTM8025MPVPBF |
| 厂家： | 
Linear |
| 描述： | 36V, 3A Step-Down μModule Converter |
| 文件： | 总20页 (文件大小：415K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8025
36V, 3A Step-Down
µModule Converter
FEATURES
DESCRIPTION
The LTM®8025 is a 36V , 3A step down μModule® con-
n
Complete Step-Down Switch Mode Power Supply
IN
n
Wide Input Voltage Range: 3.6V to 36V
verter.Includedinthepackagearetheswitchingcontroller,
power switches, inductor and all support components.
Operating over an input voltage range of 3.6V to 36V, the
LTM8025 supports an output voltage range of 0.8V to 24V
and a switching frequency range of 200kHz to 2.4MHz,
eachsetbyasingleresistor. Onlythebulkinputandoutput
filter capacitors are needed to finish the design.
n
Up to 3A Output Current
n
Parallelable for Increased Output Current
n
0.8V to 24V Output Voltage
n
Selectable Switching Frequency: 200kHz to 2.4MHz
n
Current Mode Control
n
(e4) RoHS Compliant Package with Gold Pad Finish
n
Programmable Soft-Start
The low profile package (4.32mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation.
n
Tiny, Low Profile (15mm × 9mm × 4.32mm) Surface
Mount LGA Package
TheLTM8025ispackagedinathermallyenhanced,compact
(15mm × 9mm) and low profile (4.32mm) over-molded
land grid array (LGA) package suitable for automated
assembly by standard surface mount equipment. The
LTM8025 is RoHS compliant.
APPLICATIONS
n
Automotive Battery Regulation
n
Power for Portable Products
n
Distributed Supply Regulation
Industrial Supplies
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Wall Transformer Regulation
TYPICAL APPLICATION
Efficiency
100
V
= 24V
IN
V
*
V
OUT
IN
V
V
OUT
90
80
70
60
50
40
IN
22V TO 36V
12V AT 3A
RUN/SS
AUX
LTM8025 BIAS
PGOOD
4.7μF
SHARE
RT
22μF
ADJ
SYNC GND
47.5k
34.8k
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA01a
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8025 TA01b
8025f
1
LTM8025
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
1
2
3
4
5
6
7
V , RUN/SS Voltage.................................................36V
IN
V
OUT
GND
ADJ, RT, SHARE Voltage.............................................6V
A
B
C
D
E
F
V
, AUX.................................................................25V
OUT
BANK 1
BANK 2
PGOOD, SYNC...........................................................30V
BIAS..........................................................................25V
V + BIAS.................................................................56V
IN
Maximum Junction Temperature (Note 2) ............ 125°C
RT
G
H
J
Solder Temperature............................................... 245°C
SHARE
PGOOD
ADJ
AUX
BIAS
K
L
BANK 3
V
RUN/SS SYNC
LGA PACKAGE
IN
70-PIN (15mm s 9mm s 4.32mm)
T
= 125°C, θ = 24.4°C/W, θ = 11.5°C/W,
JMAX
JA
JC(BOTTOM)
θ
= 42.7°C/W, θ = 18.7°C/W
JC(TOP)
JB
θ VALUES DETERMINED PER JESD51-9, MAX OUTPUT POWER
WEIGHT = 1.8 GRAMS
ORDER INFORMATION
LEAD FREE FINISH
LTM8025EV#PBF
LTM8025IV#PBF
LTM8025MPV#PBF
TRAY
PART MARKING
8025V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTM8025EV#PBF
LTM8025IV#PBF
LTM8025MPV#PBF
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
70-Lead (15mm × 9mm × 4.32mm) LGA
70-Lead (15mm × 9mm × 4.32mm) LGA
70-Lead (15mm × 9mm × 4.32mm) LGA
8025V
8025MPV
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V, BIAS = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Minimum Input Voltage
Output DC Voltage
3.6
V
0 < I
0 < I
≤ 3A; R
≤ 3A; R
Open
0.8
24
V
V
OUT
OUT
ADJ
ADJ
= 16.9k; V = 32V
IN
Output DC Current
V
OUT
= 3.3V
0
3
A
Quiescent Current into V
RUN/SS = 0V
Not Switching
BIAS = 0V, Not Switching
0.01
25
85
1
μA
μA
μA
IN
60
150
Quiescent Current into BIAS
RUN/SS = 0V
0.01
65
0
0.5
120
5
μA
μA
μA
Not Switching
BIAS = 0V, Not Switching
Line Regulation
Load Regulation
5.5V < V < 36V, I
= 1A
0.3
0.4
%
%
IN
OUT
0A < I
< 3A
OUT
8025f
2
LTM8025
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V, BIAS = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
0A < I < 3A
MIN
TYP
10
MAX
UNITS
mV
Output Voltage Ripple (RMS)
Switching Frequency
Voltage (at ADJ Pin)
OUT
R = 45.3k
T
775
790
kHz
775
770
805
810
mV
mV
l
Current Out of ADJ Pin
ADJ = 0V, V
= 1V
2
2
5
μA
V
OUT
Minimum BIAS Voltage for Proper Operation
RUN/SS Pin Current
2.8
10
RUN/SS = 2.5V
μA
V
RUN Input High Voltage
RUN Input Low Voltage
2.5
0.2
1
V
PGOOD Threshold (at ADJ Pin)
PGOOD Leakage Current
PGOOD Sink Current
V
OUT
Rising
710
0.1
mV
μA
μA
V
PGOOD = 30V
PGOOD = 0.4V
200
0.7
700
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Bias Current
f
f
= 550kHz
= 550kHz
0.5
SYNC
SYNC
V
SYNC = 0V
0.1
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8025E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8025I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. The LTM8025MP is
guaranteed to meet specifications over the full –55°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
8025f
3
LTM8025
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
2.5VOUT Efficiency
3.3VOUT Efficiency
5VOUT Efficiency
100
90
80
70
60
50
40
100
90
80
70
60
50
40
100
90
80
70
60
5V
5.5V
IN
IN
12V
24V
32V
12V
24V
32V
12V
24V
32V
IN
IN
IN
IN
IN
IN
50
40
IN
IN
IN
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G01
8025 G02
8025 G03
8VOUT Efficiency
12VOUT Efficiency
18VOUT Efficiency
100
90
80
70
60
50
40
100
90
80
70
60
50
40
100
90
80
70
60
50
40
12V
24V
32V
16V
24V
32V
IN
IN
IN
IN
IN
IN
24V
32V
IN
IN
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G04
8025 G05
8025 G06
Bias Current vs Load Current
2.5VOUT
Bias Current vs Load Current
3.3VOUT
Bias Current vs Load Current
5VOUT
25
20
15
10
5
30
25
20
15
10
5
40
35
30
25
20
15
10
5
12V
24V
12V
24V
12V
24V
IN
IN
IN
IN
IN
IN
0
0
0
0
1000
2000
3000
0
1000
2000
3000
0
1000
2000
3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G07
8025 G08
8025 G09
8025f
4
LTM8025
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Bias Current vs Load Current
8VOUT
Bias Current vs Load Current
12VOUT
Bias Current vs Load Current
18VOUT
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
120
100
80
60
40
20
0
12V
24V
IN
IN
24V
IN
24V
IN
0
1000
2000
3000
0
1000
2000
3000
0
500
1000
1500
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G10
8025 G11
8025 G12
Input Current vs Load Current
2.5VOUT
Input Current vs Load Current
3.3VOUT
Input Current vs Load Current
5VOUT
2500
2000
1500
1000
500
2500
2000
1500
1000
500
1600
1400
1200
1000
800
600
400
200
0
5V
5.5V
12V
24V
32V
IN
IN
IN
IN
IN
12V
24V
32V
12V
24V
32V
IN
IN
IN
IN
IN
IN
0
0
0
1000
2000
3000
0
1000
2000
3000
0
1000
2000
3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G13
8025 G14
8025 G15
Input Current vs Load Current
8VOUT
Input Current vs Load Current
12VOUT
Input Current vs Load Current
18VOUT
2500
2000
1500
1000
500
3000
2500
2000
1500
1000
500
3000
2500
2000
1500
1000
500
12V
24V
32V
16V
24V
32V
24V
32V
IN
IN
IN
IN
IN
IN
IN
IN
0
0
0
0
1000
2000
3000
0
1000
2000
3000
0
1000
2000
3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G16
8025 G17
8025 G18
8025f
5
LTM8025
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Input Voltage
Output Shorted
Minimum Input Running Voltage
vs VOUT, IOUT = 3A
Minimum Input Voltage vs Load
Current, 3.3VOUT
600
500
400
300
200
100
0
40
35
30
25
20
15
10
5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
TO RUN
TO START
RUN/SS CONTROLLED
0
0
10
20
30
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
0
1000
2000
3000
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
8025 G19
8025 G20
8025 G21
Minimum Input Voltage vs Load
Current, 5VOUT
Minimum Input Voltage vs Load
Current, 8VOUT
Minimum Input Voltage vs Load
Current, 12VOUT
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
11.0
10.5
10.0
9.5
22
21
20
19
18
17
16
15
14
13
12
TO RUN
TO START
RUN/SS CONTROLLED
TO RUN
TO START
RUN/SS CONTROLLED
TO RUN
TO START
RUN/SS CONTROLLED
9.0
8.5
8.0
0
1000
2000
3000
0
1000
2000
3000
0
1000
2000
3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G22
8025 G23
8025 G24
Minimum Input Voltage vs Load
Current, 18VOUT
Minimum Input Voltage vs Load
Current, –3.3VOUT
Minimum Input Voltage vs Load
Current, –5VOUT
10
9
8
7
6
5
4
3
2
1
0
14
12
10
8
TO RUN
TO START
RUN/SS CONTROLLED
TO RUN
TO START
RUN/SS CONTROLLED
32
27
22
17
12
6
4
TO RUN
TO START
RUN/SS CONTROLLED
2
0
0
1000
2000
3000
0
1000
2000
3000
0
1000
2000
3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G25
8025 G26
8025 G27
8025f
6
LTM8025
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage vs Load
Current, –8VOUT
Minimum Input Voltage vs Load
Minimum Input Voltage vs
Current, –12VOUT
Negative VOUT
20
15
10
5
30
25
20
15
10
5
25
20
15
10
5
TO RUN
TO START
RUN/SS CONTROLLED
TO RUN
TO START
RUN/SS CONTROLLED
1A
2A
3A
0
0
0
0
1000
2000
3000
0
1000
2000
3000
0
–5
–10
–15
LOAD CURRENT (mA)
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
8025 G28
8025 G29
8025 G13
Junction Temperature Rise vs
Load Current, 2.5VOUT
Junction Temperature Rise vs
Load Current, 3.3VOUT
Junction Temperature Rise vs
Load Current, 5VOUT
45
40
35
30
25
20
15
10
5
60
50
40
30
20
10
0
50
45
40
35
30
25
20
15
10
5
5V
5V
12V
24V
32V
IN
IN
IN
IN
IN
12V
24V
32V
12V
24V
32V
IN
IN
IN
IN
IN
IN
0
0
0
500 1000 1500 2000 2500 3000 3500
0
500 1000 1500 2000 2500 3000 3500
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G31
8025 G32
8025 G33
Junction Temperature Rise vs
Load Current, 8VOUT
Junction Temperature Rise vs
Load Current, 12VOUT
Junction Temperature Rise vs
Load Current, 18VOUT
80
70
60
50
40
30
20
10
0
120
100
80
60
40
20
0
100
80
60
40
20
0
12V
24V
32V
16V
24V
32V
24V
32V
IN
IN
IN
IN
IN
IN
IN
IN
0
500 1000 1500 2000 2500 3000 3500
0
500 1000 1500 2000 2500 3000
0
500
1000
1500
2000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8025 G34
8025 G35
8025 G36
8025f
7
LTM8025
PIN FUNCTIONS
V
(Bank 1): Power Output Pins. Apply the output filter
RUN/SS (Pin L5): Pull the RUN/SS pin below 0.2V to
shut down the LTM8025. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
OUT
capacitor and the output load between these pins and
GND pins.
to the V pin. RUN/SS also provides a soft-start function;
IN
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8025 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8025
is through these pads, so the printed circuit design has
a large impact on the thermal performance of the part.
See the PCB Layout and Thermal Considerations sections
see the Applications Information section.
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchroniza-
tion. Clock edges should have rise and fall times faster
than 1ꢀs. See the Synchronization section in Applications
Information.
for more details. Return the feedback divider (R ) to
this net.
ADJ
V (Bank3):TheV pinsuppliescurrenttotheLTM8025’s
IN
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
RT (Pin G7): The RT pin is used to program the switching
frequency of the LTM8025 by connecting a resistor from
this pin to ground. Table 2 gives the resistor values that
correspondtotheresultantswitchingfrequency.Minimize
the capacitance at this pin.
AUX (Pin G5): Low Current Voltage Source for BIAS. In
many designs, the BIAS pin is simply connected to V
.
OUT
and is placed
The AUX pin is internally connected to V
OUT
adjacent to the BIAS pin to ease printed circuit board rout-
SHARE (Pin H7): Tie this to the SHARE pin of another
LTM8025 when paralleling the outputs. Otherwise, do
not connect.
ing. Although this pin is internally connected to V , it
OUT
is not intended to deliver a high current, so do not draw
current from this pin to the load. If this pin is not tied to
BIAS, leave it floating.
PGOOD (Pin J7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low
until the ADJ pin is within 10% of the final regulation
BIAS(PinH5):TheBIASpinconnectstotheinternalpower
bus. Connect to a power source greater than 2.8V and less
than 25V. If the output is greater than 2.8V, connect this
pin there. If the output voltage is less, connect this to a
voltage source between 2.8V and 25V. Also, make sure
voltage. PGOOD output is valid when V is above 3.6V
IN
and RUN/SS is high. If this function is not used, leave
this pin floating.
ADJ (Pin K7): The LTM8025 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
that BIAS + V is less than 56V.
IN
valueofR isgivenbytheequationR =394.21/(V
ADJ
ADJ
OUT
– 0.79), where R
is in kΩ.
ADJ
8025f
8
LTM8025
BLOCK DIAGRAM
V
V
OUT
8.2μH
15pF
IN
499k
AUX
0.2μF
4.4μF
BIAS
RUN/SS
SHARE
SYNC
CURRENT
MODE
CONTROLLER
GND
RT
PGOOD
ADJ
8025 BD
OPERATION
The LTM8025 is a standalone nonisolated step-down
switching DC/DC power supply that can deliver up to 3A of
outputcurrent.Thismoduleprovidesapreciselyregulated
output voltage programmable via one external resistor
from 0.8V to 25V. The input voltage range is 3.6V to 36V.
Given that the LTM8025 is a step-down converter, make
sure that the input voltage is high enough to support the
desired output voltage and load current.
To further optimize efficiency, the LTM8025 automatically
switchestoBurstMode® operationinlightloadsituations.
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to 50ꢀA in a typical application.
TheoscillatorreducestheLTM8025’soperatingfrequency
when the voltage at the ADJ pin is low. This frequency
foldback helps to control the output current during start-
up and overload.
As shown in the Block Diagram, the LTM8025 contains a
current mode controller, power switching element, power
inductor, power Schottky diode and a modest amount of
input and output capacitance. The LTM8025 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
The LTM8025 contains a power good comparator which
trips when the ADJ pin is at roughly 90% of its regulated
value.ThePGOODoutputisanopen-collectortransistorthat
is off when the output is in regulation, allowing an external
resistor to pull the PGOOD pin high. Power good is valid
when the LTM8025 is enabled and V is above 3.6V.
IN
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator normally draws power from the V
The LTM8025 is equipped with a thermal shutdown that
will inhibit power switching at high junction tempera-
tures. The activation threshold of this function, however,
is above 125°C to avoid interfering with normal operation.
Thus, prolonged or repetitive operation under a condition
in which the thermal shutdown activates may damage or
impair the reliability of the device.
IN
pin, but if the BIAS pin is connected to an external volt-
age higher than 2.8V, bias power will be drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN/SS pin is used to place
the LTM8025 in shutdown, disconnecting the output and
reducing the input current to less than 1ꢀA.
Burst Mode is a registered trademark of Linear Technology Corporation.
8025f
9
LTM8025
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended C , C , R and R values.
IN OUT ADJ
T
3. Connect BIAS as indicated.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera-
ture, therelationshipbetweentheinputandoutputvoltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8025’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8025 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
If this audible noise is unacceptable, use a high perfor-
mance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
The maximum frequency (and attendant R value) at
T
which the LTM8025 should be allowed to switch is given
in Table 1 in the f
column, while the recommended
MAX
frequency (and R value) for optimal efficiency over the
T
given input condition is given in the f
column.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8025. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8025 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
OPTIMAL
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Capacitor Selection Considerations
The C and C
capacitor values in Table 1 are the
IN
OUT
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
Frequency Selection
The LTM8025 uses a constant frequency PWM architec-
ture that can be programmed to switch from 200kHz to
2.4MHz by using a resistor tied from the RT pin to ground.
Table 2 provides a list of R resistor values and their re-
T
sultant frequencies.
8025f
10
LTM8025
APPLICATIONS INFORMATION
Table 1: Recommended Component Values and Configuration (TA = 25°C)
V
V
C
C
R
BIAS
2.8V to 25V
2.8V to 25V
2.8V to 25V
2.8V to 25V
AUX
f
R
f
R
T(MIN)
IN
OUT
IN
OUT
ADJ
OPTIMAL
T(OPTIMAL)
MAX
3.6V to 36V
3.6V to 36V
3.6V to 36V
4.1V to 36V
5.3V to 36V
7.5V to 36V
10.5V to 36V
16V to 36V
23V to 36V
31V to 36V
3.6V to 15V
3.6V to 15V
3.6V to 15V
4.1V to 15V
5.3V to 15V
7.5V to 15V
10.5V to 15V
9V to 24V
0.8V
1.5V
1.8V
2.5V
3.3V
5V
10μF, 50V, 1210
10μF, 50V, 1210
10μF, 50V, 1210
4.7μF, 50V, 1206
4.7μF, 50V, 1206
4.7μF, 50V, 1206
4.7μF, 50V, 1206
2.2μF, 50V, 1206
2.2μF, 50V, 1206
1μF, 50V, 1206
Open
549k
383k
226k
154k
93.1k
54.9k
34.8k
22.6k
16.5k
Open
549k
383k
226k
154k
93.1k
54.9k
Open
549k
383k
226k
154k
93.1k
54.9k
34.8k
22.6k
Open
549k
383k
226k
154k
93.1k
54.9k
34.8k
154k
93.1k
54.9k
34.8k
230kHz
270kHz
285kHz
300kHz
345kHz
425kHz
550kHz
760kHz
800kHz
1MHz
182k
154k
147k
137k
118k
93.1k
69.8k
47.5k
44.2k
34k
250kHz
360kHz
420kHz
540kHz
675kHz
950kHz
1.45MHz
2.3MHz
2.4MHz
2.4MHz
575kHz
840kHz
1.0MHz
1.3MHz
1.6MHz
2.4MHz
2.4MHz
360kHz
550kHz
620kHz
800kHz
1MHz
169k
113k
95.3k
71.5k
54.9k
36.5k
20.5k
9.09k
8.25k
8.25k
66.5k
42.2k
34k
4× 100μF, 6.3V, 1210
4× 100μF, 6.3V, 1210
3× 100μF, 6.3V, 1210
2× 100μF, 6.3V, 1210
100μF, 6.3V, 1210
100μF, 6.3V, 1206
47μF, 16V, 1210
AUX
8V
AUX
12V
18V
24V
0.8V
1.5V
1.8V
2.5V
3.3V
5V
22μF, 16V, 1210
AUX
22μF, 25V, 1812
AUX
22μF, 25V, 1812
2.8V to 25V
10μF, 25V, 1210
10μF, 25V, 1210
10μF, 25V, 1210
4.7μF, 16V, 1206
4.7μF, 16V, 1206
4.7μF, 16V, 1206
2.2μV, 25V, 1206
4.7μF, 25V, 1206
4.7μF, 25V, 1206
4.7μF, 25V, 1206
4.7μF, 25V, 1206
4.7μF, 25V, 1206
4.7μF, 25V, 1206
2.2μF, 25V, 1206
2.2μF, 50V, 1206
2.2μF, 50V, 1206
1μF, 50V, 1206
V
IN
230kHz
270kHz
285kHz
300kHz
345kHz
425kHz
550kHz
270kHz
310kHz
330kHz
345kHz
425kHz
500kHz
590kHz
760kHz
800kHz
230kHz
270kHz
300kHz
345kHz
385kHz
500kHz
550kHz
760kHz
345kHz
425kHz
550kHz
760kHz
182k
154k
147k
137k
118k
93.1k
69.8k
154k
133k
124k
118k
93.1k
76.8k
64.9k
47.5k
44.2k
182k
154k
137k
118k
105k
76.8k
69.8k
47.5k
118k
93.1k
69.8k
47.5k
4× 100μF, 6.3V, 1210
4× 100μF, 6.3V, 1210
4× 100μF, 6.3V, 1210
2× 100μF, 6.3V, 1210
100μF, 6.3V, 1206
100μF, 6.3V, 1206
47μF, 16V, 1210
V
IN
V
IN
V
23.7k
17.8k
8.25k
8.25k
113k
69.8k
60.4k
44.2k
34k
IN
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
8V
0.8V
1.5V
1.8V
2.5V
3.3V
5V
4× 100μF, 6.3V, 1210
4× 100μF, 6.3V, 1210
3× 100μF, 6.3V, 1210
100μF, 6.3V, 1206
100μF, 6.3V, 1206
47μF, 16V, 1210
9V to 24V
9V to 24V
9V to 24V
9V to 24V
AUX
AUX
9V to 24V
1.4MHz
2.2MHz
2.3MHz
2.4MHz
250kHz
360kHz
420kHz
540kHz
675kHz
950kHz
1.45MHz
2.3MHz
675kHz
950kHz
1.45MHz
2.3MHz
21.5k
9.76k
9.09k
8.25k
169k
113k
95.3k
71.5k
54.9k
36.5k
20.5k
9.09k
54.9k
36.5k
20.5k
9.09k
10.5V to 24V
16V to 24V
23V to 24V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
8V
22μF, 16V, 1210
AUX
12V
18V
0.8V
1.5V
1.8V
2.5V
3.3V
5V
22μF, 16V, 1210
AUX
22μF, 25V, 1812
AUX
2.8V to 25V
2.8V to 25V
2.8V to 25V
2.8V to 25V
AUX
4× 100μF, 6.3V, 1210
4× 100μF, 6.3V, 1210
3× 100μF, 6.3V, 1210
100μF, 6.3V, 1206
100μF, 6.3V, 1206
47μF, 16V, 1210
1μF, 50V, 1206
1μF, 50V, 1206
1μF, 50V, 1206
1μF, 50V, 1206
1μF, 50V, 1206
AUX
8V
2.2μF, 50V, 1206
2.2μF, 50V, 1206
22μF, 16V, 1210
AUX
12V
22μF, 16V, 1210
AUX
4.75V to 32V –3.3V 4.7μF, 50V, 1206
100μF, 6.3V, 1210
100μF, 6.3V, 1210
47μF, 16V, 1210
AUX
7V to 31V
15V to 28V
20V to 24V
–5V
–8V
4.7μF, 50V, 1206
4.7μF, 50V, 1206
4.7μF, 50V, 1206
AUX
AUX
–12V
22μF, 16V, 1210
AUX
Note: An input bulk capacitance is required. Do not allow V + BIAS to exceed 56V. Refer to the Typical Performance Characteristics section for load
IN
conditions.
8025f
11
LTM8025
APPLICATIONS INFORMATION
Table 2. Switching Frequency vs RT Value
dependent upon many factors, such as load current, input
voltage, output voltage and switching frequency, but 4V to
5V works well in many applications. In all cases, ensure
that the maximum voltage at the BIAS pin is less than 25V
SWITCHING FREQUENCY
0.2MHz
R VALUE
T
215kꢁ
137kꢁ
100kꢁ
76.8kꢁ
63.4kꢁ
52.3kꢁ
44.2kꢁ
38.3kꢁ
34.0kꢁ
26.7kꢁ
21.5kꢁ
17.8kꢁ
14.7kꢁ
12.1kꢁ
9.76kꢁ
8.25kꢁ
0.3MHz
and that the sum of V and BIAS is less than 56V. If BIAS
IN
0.4MHz
power is applied from a remote or noisy voltage source, it
may be necessary to apply a decoupling capacitor locally
to the pin.
0.5MHz
0.6MHz
0.7MHz
0.8MHz
Load Sharing
0.9MHz
TwoormoreLTM8025’smaybeparalleledtoproducehigher
1MHz
currents. To do this, tie the V , ADJ, V
and SHARE
IN
OUT
1.2MHz
pins of all the paralleled LTM8025’s together. To ensure
thatparalleledmodulesstartuptogether, theRUN/SSpins
may be tied together, as well. If the RUN/SS pins are not
tied together, make sure that the same valued soft-start
capacitors are used for each module. Current sharing can
be improved by synchronizing the LTM8025s. An example
of two LTM8025s configured for load sharing is given in
the Typical Applications section.
1.4MHz
1.6MHz
1.8MHz
2MHz
2.2MHz
2.4MHz
Operating Frequency Tradeoffs
Burst Mode Operation
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8025 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8025 if the output is overloaded or short circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
capacitor.
To enhance efficiency at light loads, the LTM8025 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizingtheinputquiescentcurrent.DuringBurstMode
operation, the LTM8025 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
wheretheoutputpowerisdeliveredtotheloadbytheoutput
capacitor. In addition, V and BIAS quiescent currents are
IN
each reduced to microamps during the sleep time. As the
load current decreases towards a no load condition, the
percentage of time that the LTM8025 operates in sleep
mode increases and the average input current is greatly
reduced, resulting in higher efficiency.
BIAS Pin Considerations
BurstModeoperationisenabledbytyingSYNCtoGND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
The BIAS pin is used to provide drive power for the in-
ternal power switching stage and operate other internal
circuitry. For proper operation, it must be powered by at
least 2.8V. If the output voltage is programmed to 2.8V
Minimum Input Voltage
or higher, BIAS may be simply tied to AUX. If V
is less
OUT
The LTM8025 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
than 2.8V, BIAS can be tied to V or some other voltage
IN
source. If the BIAS pin voltage is too high, the efficiency
of the LTM8025 may suffer. The optimum BIAS voltage is
8025f
12
LTM8025
APPLICATIONS INFORMATION
on is higher than that required to run, and depends upon
whether the RUN/SS is used. As shown in the Typical
Performance Characteristics section, the minimum input
voltage to run a 3.3V output at light load is only about 3.6V,
totheloadunderfault. Duringthestart-uptime, frequency
foldback is also active to limit the energy delivered to the
potentially large output capacitance of the load.
Synchronization
but, if the RUN/SS is pulled up to V , it takes 5.5V to
IN
IN
start. If the LTM8025 is enabled with the RUN/SS pin, the
minimumvoltagetostartatlightloadsislower,about4.3V.
Similar curves detailing this behavior of the LTM8025 for
otheroutputsarealsoincludedintheTypicalPerformance
Characteristics section.
TheinternaloscillatoroftheLTM8025canbesynchronized
byapplyinganexternal250kHzto2MHzclocktotheSYNC
pin. Do not leave this pin floating. When synchronizing
the LTM8025, select an R resistor value that corresponds
T
to an operating frequency 20% lower than the intended
synchronization frequency (see the Frequency Selection
section).
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8025,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC filter to cre-
ate a voltage ramp at this pin. Figure 1 shows the start-up
and shutdown waveforms with the soft-start circuit. By
choosing an appropriate RC time constant, the peak start-
up current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20ꢀA when
the RUN/SS pin reaches 2.5V.
Inadditiontosynchronization,theSYNCpincontrolsBurst
Mode behavior. If the SYNC pin is driven by an external
clock, or pulled up above 0.7V, the LTM8025 will not en-
ter Burst Mode operation, but will instead skip pulses to
maintain regulation instead.
Shorted Input Protection
Care needs to be taken in systems where the output will be
held high when the input to the LTM8025 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode ORed with the LTM8025’s output. If the V pin is
IN
RUN
allowed to float and the SHDN pin is held high (either by a
I
L
1A/DIV
logicsignalorbecauseitistiedtoV ),thentheLTM8025’s
15k
IN
internal circuitry will pull its quiescent current through
its internal power switch. This is fine if your system can
tolerate a few milliamps in this state. If you ground the
SHDN pin, the SW pin current will drop to essentially zero.
RUN/SS
RUN
V
RUN/SS
2V/DIV
0.22μF
V
OUT
2V/DIV
However, if the V pin is grounded while the output is
IN
held high, then parasitic diodes inside the LTM8025 can
8025 F01
2ms/DIV
pull large currents from the output through the V pin.
IN
Figure 1. To Soft-Start the LTM8025, Add a Resistor and
Capacitor to the RUN/SS Pin
Figure 2 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.
Frequency Foldback
The LTM8025 is equipped with frequency foldback which
actstoreducethethermalandenergystressontheinternal
power elements during a short circuit or output overload
condition.IftheLTM8025detectsthattheoutputhasfallen
out of regulation, the switching frequency is reduced as a
function of how far the output is below the target voltage.
Thisinturnlimitstheamountofenergythatcanbedelivered
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8025. The LTM8025 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
8025f
13
LTM8025
APPLICATIONS INFORMATION
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
V
IN
V
OUT
V
V
OUT
IN
RUN/SS
AUX
BIAS
LTM8025
AUX
PGOOD
GND
GND
RT
ADJ
R
T
R
ADJ
SYNC GND
SYNC
SHDN
BIAS
8025 F02
Figure 2. The Input Diode Prevents a Shorted Input from
V
OUT
V
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8025 Runs Only When
the Input is Present.
IN
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout. Ensure that the grounding and
heatsinking are acceptable.
C
C
IN
OUT
GND
THERMAL VIAS TO GND
8025 F03
1. Place the R and R resistors as close as possible to
Figure 3. Layout Showing Suggested External Components, GND
Plane and Thermal Vias.
ADJ
T
their respective pins.
2. Place the C capacitor as close as possible to the V
Hot-Plugging Safely
IN
IN
and GND connection of the LTM8025.
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8025. However, these capacitors
can cause problems if the LTM8025 is plugged into a live
supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
3. Place the C
capacitor as close as possible to the
OUT
V
and GND connection of the LTM8025.
OUT
4. Place the C and C
capacitors such that their
IN
OUT
ground current flow directly adjacent or underneath
the LTM8025.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8025.
age at the V pin of the LTM8025 can ring to more than
IN
twice the nominal input voltage, possibly exceeding the
LTM8025’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8025 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
6. For good heatsinking, use vias to connect the GND cop-
per area to the board’s internal ground planes. Liberally
distributetheseGNDviastoprovidebothagoodground
connectionandthermalpathtotheinternalplanesofthe
printed circuit board. Pay attention to the location and
density of the thermal vias in Figure 3. The LTM8025
can benefit from the heat-sinking afforded by vias that
connecttointernalGNDplanesattheselocations,dueto
theirproximitytointernalpowerhandlingcomponents.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
accomplishedbyinstallingasmallresistorinseriestoV ,
IN
but the most popular method of controlling input voltage
overshoot is to add an electrolytic bulk capacitor to the
V net. This capacitor’s relatively high equivalent series
IN
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit.
8025f
14
LTM8025
APPLICATIONS INFORMATION
Thermal Considerations
The die temperature of the LTM8025 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8025. The bulk of the heat flow out of the LTM8025
is through the bottom of the module and the LGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
The LTM8025 output current may need to be derated if it is
requiredtooperateinahighambienttemperatureordeliver
alargeamountofcontinuouspower.Theamountofcurrent
deratingisdependentupontheinputvoltage,outputpower
and ambient temperature. The temperature rise curves
given in the Typical Performance Characteristics section
can be used as a guide. These curves were generated by a
2
LTM8025 mounted to a 58cm 4-layer FR4 printed circuit
board. Boards of other sizes and layer count can exhibit
differentthermalbehavior,soitisincumbentupontheuser
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
The LTM8025 is equipped with a thermal shutdown that
willinhibitpowerswitchingathighjunctiontemperatures.
Theactivationthresholdofthisfunction,however,isabove
125°C to avoid interfering with normal operation. Thus,
it follows that prolonged or repetitive operation under a
condition in which the thermal shutdown activates neces-
sarily means that the internal components are subjected
to temperatures above the 125°C rating for prolonged
or repetitive intervals, which may damage or impair the
reliability of the device.
The junction to air and junction to board thermal resis-
tances given in the Pin Configuration diagram may also
be used to estimate the LTM8025 internal temperature.
These thermal coefficients are determined for maximum
outputpowerperJESD51-9“JEDECStandard,TestBoards
for Area Array Surface Mount Package Thermal Measure-
ments” through analysis and physical correlation. Bear in
mind that the actual thermal resistance of the LTM8025
to the printed circuit board depends upon the design of
the circuit board.
Finally, be aware that at high ambient temperatures the
internalSchottkydiodewillhavesignificantleakagecurrent
increasing the quiescent current of the LTM8025.
8025f
15
LTM8025
TYPICAL APPLICATIONS
1.8V Step-Down Converter
V
V
OUT
1.8V AT 3A
IN
V
V
OUT
IN
3.6V TO 24V
RUN/SS
AUX
10μF
300μF
BIAS LTM8025
SHARE
PGOOD
ADJ
RT
SYNC GND
147k
383k
8025 TA02
2.5V Step-Down Converter
V
*
V
OUT
2.5V AT 3A
IN
V
V
OUT
IN
4.1V TO 36V
RUN/SS
AUX
4.7μF
200μF
3.3V
137k
BIAS LTM8025
SHARE
PGOOD
ADJ
RT
SYNC GND
226k
8025 TA03
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
3.3V Step-Down Converter
V
*
V
OUT
3.3V AT 3A
IN
V
V
OUT
IN
5.5V TO 36V
RUN/SS
AUX
LTM8025 BIAS
PGOOD
4.7μF
SHARE
RT
100μF
ADJ
SYNC GND
118k
154k
8025 TA04
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8V Step-Down Converter
V
*
V
OUT
8V AT 3A
IN
V
V
OUT
IN
11V TO 36V
RUN/SS
AUX
LTM8025 BIAS
PGOOD
4.7μF
69.8k
SHARE
RT
47μF
ADJ
SYNC GND
54.9k
8025 TA05
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025f
16
LTM8025
TYPICAL APPLICATIONS
–5V Negative Output Converter
V
*
IN
V
V
OUT
IN
7.5V TO 30V
RUN/SS
AUX
LTM8025 BIAS
PGOOD
4.7μF
SHARE
RT
100μF
ADJ
SYNC GND
93.1k
93.1k
V
OUT
–5V AT 2A
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA06
Two LTM8025s in Paralel, 2.5V at 5.5A
V
*
V
OUT
2.5V AT 5.6A
IN
V
V
OUT
IN
4.1V TO 36V
RUN/SS
AUX
LTM8025 BIAS
PGOOD
3V
SHARE
RT
2.2μF
ADJ
SYNC GND
137k
113k
OPTIONAL
SYNC
V
V
OUT
IN
RUN/SS
AUX
LTM8025 BIAS
PGOOD
300μF
SHARE
RT
2.2μF
ADJ
SYNC GND
137k
*RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION
SECTION FOR START-UP DETAILS
NOTE: SYNCHRONIZE THE TWO MODULES TO AVOID BEAT FREQUENCIES,
IF NECESSARY. OTHERWISE, TIE EACH SYNC TO GND
8025 TA07
8025f
17
LTM8025
PACKAGE DESCRIPTION
Z
/ / b b b
Z
6 . 3 5 0
5 . 0 8 0
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 0 0 0
1 . 2 7 0
2 . 5 4 0
3 . 8 1 0
5 . 0 8 0
6 . 3 5 0
8025f
18
LTM8025
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
E1 GND
E2 GND
E3 GND
E4 GND
E5 GND
E6 GND
E7 GND
PIN NAME
F1 GND
F2 GND
F3 GND
F4 GND
F5 GND
F6 GND
F7 GND
A1
A2
A3
A4
V
V
V
V
B1
B2
B3
B4
V
V
V
V
C1
C2
C3
C4
V
V
V
V
D1
D2
D3
D4
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A5 GND
A6 GND
A7 GND
B5 GND
B6 GND
B7 GND
C5 GND
C6 GND
C7 GND
D5 GND
D6 GND
D7 GND
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
G1 GND
G2 GND
G3 GND
G4 GND
G5 AUX
G6 GND
G7 RT
H1
H2
H3
H4
-
-
-
-
J1
J2
J3
J4
V
V
V
-
K1
K2
K3
K4
V
V
V
-
L1
L2
L3
L4
V
V
V
-
IN
IN
IN
IN
IN
IN
IN
IN
IN
H5 BIAS
H6 GND
J5 GND
J6 GND
K5 GND
K6 GND
L5 RUN/SS
L6 SYNC
L7 GND
H7 SHARE J7 PGOOD K7 ADJ
8025f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTM8025
PACKAGE PHOTOGRAPH
RELATED PARTS
PART NUMBER
LTM4600/LTM4602
LTM4601/LTM4603
LTM4604
DESCRIPTION
COMMENTS
Pin Compatible, 4.5V ≤ V ≤ 28V, 15mm × 15mm × 2.8mm LGA Package
10A and 6A DC/DC μModule
12A and 6A DC/DC μModule
IN
Pin Compatible; Remote Sensing; PLL, Tracking and Margining, 4.5V ≤ V ≤ 28V
IN
4A, Low V DC/DC μModule
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5V, 9mm × 15mm × 2.3mm LGA Package
IN
IN
OUT
LTM4606
Low EMI 6A, 28V DC/DC μModule
200mA, 36V DC/DC μModule
1A, 36V DC/DC μModule
4.5V ≤ V ≤ 28V, 0.6V ≤ V
≤ 5V, 15mm × 15mm × 2.8mm LGA Package
≤ 5V, 6.25mm × 6.25mm × 2.32mm LGA Package
≤ 10V, 11.25mm × 9mm × 2.82mm LGA Package
≤ 10V, 11.25mm × 9mm × 2.82mm, LGA Package
IN
OUT
LTM8020
4V ≤ V ≤ 36V, 1.25V ≤ V
IN
OUT
LTM8022
3.6V ≤ V ≤ 36V, 0.8V ≤ V
IN
OUT
OUT
LTM8023
2A, 36V DC/DC μModule
3.6V ≤ V ≤ 36V, 0.8V ≤ V
IN
8025f
LT 0709 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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