MAX17515 [MAXIM]
5A, 2.4V to 5.5V Input, High-Efficiency Power Module; 5A ， 2.4V至5.5V输入，高效率电源模块
| 型号： | MAX17515 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 5A, 2.4V to 5.5V Input, High-Efficiency Power Module |
| 文件： | 总15页 (文件大小：2139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
General Description
Benefits and Features
●ꢀ CompleteꢀSwitch-ModeꢀPowerꢀSupplyꢀinꢀOneꢀ
The MAX17515 is
a
fixed-frequency, step-down
power module in
a
thermally efficient system-
Package
in-package (SIP) package that operates from
a
●ꢀ 2.4Vꢀtoꢀ5.5VꢀInputꢀVoltageꢀRange
2.4V to 5.5V input supply voltage and supports
output currents up to 5A. The device includes switch-
mode power-supply controller, dual n-channel MOSFET
power switches, a fully shielded inductor, as well as
compensation components. The device supports 0.75V
to 3.6V programmable output voltage. The high level of
integration significantly reduces design complexity, manu-
facturing risks, and offers a true “plug-and-play” power-
supply solution, reducing the time to market.
●ꢀ 0.75Vꢀtoꢀ3.6VꢀProgrammableꢀOutputꢀVoltage
●ꢀ AutoꢀSwitchꢀLight-LoadꢀPulse-SkippingꢀMode
●ꢀ FaultꢀProtection
• Output Overvoltage Protection
• Output Undervoltage Protection
• Thermal-Fault Protection
• PeakꢀCurrentꢀLimit
●ꢀ EnableꢀInputꢀ
The device operates at a fixed 1MHz that requires smaller
input and output capacitor size. The internal fixed con-
stant gain at the error-amplifier output results in output-
voltage positioning with respect to the load current. The
fixed internal digital soft-start limits the input inrush cur-
rent at startup. The device also operates in pulse-skipping
mode at light loads to improve the light-load efficiency.
●ꢀ Upꢀtoꢀ94%ꢀEfficiency
●ꢀ Power-GoodꢀOutput
●ꢀ Voltage-ControlledꢀInternalꢀSoft-Start
●ꢀ High-ImpedanceꢀShutdown
●ꢀ <ꢀ1µAꢀShutdownꢀCurrent
●ꢀ PassesꢀEN55022ꢀ(CISPR22)ꢀClassꢀBꢀRadiatedꢀandꢀ
The MAX17515 is available in a thermally enhanced,
Conducted EMI Standard
compact 28-pin, 10mm
x 6.5mm x 2.8mm SIP
package and can operate over the -40°C to +85°C
industrial temperature range.
Typical Application Circuit
Applications
●ꢀ FPGAꢀandꢀDSPꢀPoint-of-LoadꢀRegulator
●ꢀ BaseꢀStationꢀPoint-of-LoadꢀRegulator
●ꢀ IndustrialꢀControlꢀEquipment
●ꢀ Servers
●ꢀ ATEꢀEquipment
●ꢀ MedicalꢀEquipment
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
FB
IN
IN
IN
IN
VIN
5V
22µF
VOUT
1.1V, 5A
MAX17515
VCC
22µF
220µF
VCC
EN
Ordering Information appears at end of data sheet.
22.1kΩ
47.5kΩ
1kΩ
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/MAX17515.related.
VCC
POK
GND
GND
GND
19-6711; Rev 0; 6/13
MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Absolute Maximum Ratings
INꢀtoꢀPGND .............................................................-0.3V to +6V
EP2ꢀtoꢀPGND ......................................... -0.3V to + (V + 0.3V)
IN
V
V
ꢀtoꢀGND ............................................................-0.3V to +6V
ꢀtoꢀIN.................................................................-0.3V to +6V
EP2ꢀtoꢀGND............................................ -0.6V to + (V + 0.3V)
CC
IN
ContinuousꢀPowerꢀDissipationꢀ(T = +70°C)
CC
A
ENꢀtoꢀGND ..............................................................-0.3V to +6V
FB,ꢀPOKꢀtoꢀGND...................................... -0.3V to (V + 0.3V)
28-Pin SIP (derate 37mW/°C above +70°C) ............2000mW
OperatingꢀTemperatureꢀRange........................... -40°C to +85°C
Junction Temperature......................................................+125°C
StorageꢀTemperatureꢀRange............................ -55°C to +150°C
LeadꢀTemperatureꢀ(soldering,ꢀ10s) .................................+245°C
CC
OUT,ꢀEP3ꢀtoꢀGND ......................................-0.6V to (V + 0.3V)
IN
PGNDꢀtoꢀGND......................................................-0.3V to +0.3V
EP1ꢀtoꢀGND..........................................................-0.3V to +0.3V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
(Note 1)
Package Thermal Characteristics
SIP
Junction-to-AmbientꢀThermalꢀResistanceꢀ(q )...........25°C/W
JA
Junction-to-CaseꢀThermalꢀResistanceꢀ(q ).................6°C/W
JC
Note 1:ꢀ PackageꢀthermalꢀresistancesꢀwereꢀobtainedꢀusingꢀtheꢀmethodꢀdescribedꢀinꢀJEDECꢀspecificationꢀJESD51-7,ꢀusingꢀaꢀfour-layerꢀ
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V = V
= V
= 5V,ꢀ-40°Cꢀ<ꢀT ꢀ<ꢀ+85°C.ꢀTypicalꢀvaluesꢀareꢀatꢀT = +25°C, unless otherwise noted.) (Typical Application Circuit)
IN
CC
EN
A
A
(Noteꢀ2)
PARAMETER
INPUT SUPPLY (V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
)
IN
2.4
4.5
5.5
5.5
2.4
5.5
INꢀInputꢀVoltageꢀRange
V
V
IN
V
= V
CC
IN
INꢀUndervoltageꢀThreshold
INꢀStandbyꢀSupplyꢀCurrent
Risingꢀedgeꢀ(100mVꢀhysteresis)
= V = 4.5V, no load
2.05
2.19
V
I
V
1
μA
Q
IN
CC
V
V
V
SUPPLY
CC
CC
CC
ꢀInputꢀVoltageꢀRange
Undervoltage Threshold
V
4.5
5.5
4.5
V
V
CC
Risingꢀedgeꢀ(160mVꢀhysteresis)
3.9
4.2
0.1
ENꢀ=ꢀGND,ꢀPOKꢀunconnected,ꢀmeasuredꢀ
V
V
Shutdown Supply Current
Supply Current
I
1.0
μA
μA
CC
VCC_SHD
at V , T = +25°C
CC
A
Regulatorꢀenabled,ꢀnoꢀload,ꢀnoꢀswitchingꢀ
(V = 1V)
I
62
135
CC
VCC
FB
OUTPUT
Output Voltage Programmable
Range
V
= V
= 5.2V, I
= 2A
LOAD
IN
CC
V
0.754
0.750
-7.5
3.6
0.786
-1
V
V
OUT
(see derating curve for V
> 2.5V)
OUT
UnityꢀGainꢀOutput-Voltageꢀ
Tolerance/FBꢀaccuracy
FBꢀ=ꢀOUT,ꢀnoꢀload
0.770
-4.4
FBꢀLoadꢀRegulationꢀAccuracyꢀ
(RDROOP)
2Aꢀ<ꢀI
ꢀ<ꢀ5A,ꢀFBꢀ=ꢀOUT
mV/A
OUT
FBꢀLineꢀRegulationꢀAccuracy
FBꢀInputꢀBiasꢀCurrent
FBꢀ=ꢀOUT,ꢀnoꢀload,ꢀ2.4Vꢀ<ꢀV <ꢀ5.5V
1.253
4.5
mV/V
IN
T ꢀ=ꢀ-40°Cꢀtoꢀ+85°Cꢀ(Noteꢀ3)
-0.1
-0.015
+0.1
μA
A
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Electrical Characteristics (continued)
(V = V
= V
= 5V,ꢀ-40°Cꢀ<ꢀT ꢀ<ꢀ+85°C.ꢀTypicalꢀvaluesꢀareꢀatꢀT = +25°C, unless otherwise noted.) (Typical Application Circuit)
IN
CC
EN
A
A
(Noteꢀ2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
AverageꢀOutputꢀCurrentꢀLimit
V
= 5V
5
8
A
IN
EFFICIENCY
V
V
= 5V, V
= 5V, V
= 1.1V, I
= 1.1V, I
= 2A
= 5A
86
77
IN
IN
OUT
OUT
Efficiency
%
OUT
OUT
SWITCHING FREQUENCY
Switching Frequency
f
0.9
1
1.1
MHz
SW
SOFT-START
Soft-StartꢀRampꢀTime
t
1.79
ms
ms
SS
Soft-StartꢀFaultꢀBlankingꢀTime
POWER-GOOD OUTPUT (POK)
t
3
SSLT
POKꢀUpperꢀTripꢀThresholdꢀandꢀ
Overvoltage-Fault Threshold
Risingꢀedge,ꢀ50mVꢀhysteresis
8.5
-14
12
14
%
POKꢀLowerꢀTripꢀThreshold
POKꢀLeakageꢀCurrent
Falling edge, 50mV hysteresis
-12
0.1
2
-6
1
%
μA
μs
I
T
= +25°C, V
= 5.5V
POK
POK
A
POK
POKꢀPropagationꢀDelayꢀTime
POKꢀOutputꢀLowꢀVoltage
t
FBꢀforcedꢀ50mVꢀbeyondꢀPOKꢀtripꢀthreshold
= 3mA
I
100
mV
SINK
Overvoltage-FaultꢀLatch-Delayꢀ
Time
FBꢀforcedꢀ50mVꢀaboveꢀPOKꢀupperꢀtripꢀ
threshold
2
μs
Undervoltage-FaultꢀLatch-Delayꢀ
Time
FBꢀforcedꢀ50mVꢀbelowꢀPOKꢀlowerꢀtripꢀ
threshold, TUV
1.6
ms
LOGIC INPUTS
ENꢀInputꢀHighꢀThreshold
ENꢀInputꢀLeakageꢀCurrent
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Rising,ꢀhysteresisꢀ=ꢀ215mVꢀ(typ)
1.0
1.4
0.1
1.6
1
V
T
= +25°C
μA
A
TSHDN
Hysteresis = 15°C
+160
°C
Note 2:ꢀ Limitsꢀareꢀ100%ꢀtestedꢀatꢀT = +25°C. Maximum and minimum limits are guaranteed by design and characterization over
A
temperature.
Note 3:ꢀ DesignꢀguaranteedꢀbyꢀATEꢀcharacterization.ꢀLimitsꢀareꢀnotꢀproductionꢀtested.
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Typical Operating Characteristics
(V
= 5V, V = 3.3V - 5V, V
ꢀ=ꢀ0.9Vꢀ-ꢀ3.3V,ꢀI
= 0–5A, T = +25°C, unless otherwise noted.)
CC
IN
OUT
OUT
A
EFFICIENCY
vs. OUTPUT CURRENT
EFFICIENCY
vs. OUTPUT CURRENT
LOAD REGULATION
(V = 0.75V)
OUT
100
100
95
90
85
80
75
70
65
60
0.775
0.770
0.765
0.760
0.755
0.750
0.745
0.740
0.735
V
= 2.5V
V
= 2.5V
V
= 3.3V
OUT
OUT
OUT
V
= 0.75V
= 5.0V
OUT
V
95
90
85
80
75
70
65
60
CC
V
= 5.0V
IN
V
= 1.2V
OUT
V
= 1.2V
OUT
V
= 1.8V
OUT
V
OUT
= 0.9V
V
= 1.8V
V
OUT
= 0.9V
OUT
V
IN
= 3.3V
V
= 3.3V
= 5.0V
IN
V
V
= 5.0V
= 5.0V
IN
CC
V
CC
100
1k
10k
100
1k
10k
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT CURRENT (A)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
LOAD REGULATION
LOAD REGULATION
LOAD REGULATION
(V
OUT
= 1.8V)
(V
OUT
= 2.5V)
(V
OUT
= 1.2V)
2.52
2.50
2.48
2.46
2.44
2.42
2.40
2.38
1.83
1.21
V
OUT
= 2.5V
= 5.0V
V
V
= 1.8V
= 5.0V
CC
V
= 1.2V
= 5.0V
OUT
OUT
1.82
1.81
1.80
1.79
1.78
1.77
1.76
1.75
1.74
1.73
V
CC
V
CC
1.20
1.19
1.18
1.17
1.16
1.15
1.14
V
= 5.0V
IN
V
= 5.0V
IN
V
IN
= 5.0V
V
IN
= 3.3V
V
= 3.3V
IN
V
= 3.3V
IN
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT CURRENT (A)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT CURRENT (A)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT CURRENT (A)
OUTPUT-VOLTAGE RIPPLE
INPUT-VOLTAGE RIPPLE
(V = 5V, V = 1.2V, I = 5A)
(V = 5V, V
= 1.2V, I
= 5A)
IN
OUT
OUT
IN
OUT
OUT
MAX17515 toc08
MAX17515 toc07
10mV/div
(AC-COUPLED)
50mV/div
(AC-COUPLED)
V
IN
V
OUT
1µs/div
1µs/div
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Typical Operating Characteristics (continued)
(V
= 5V, V = 3.3V - 5V, V
ꢀ=ꢀ0.9Vꢀ-ꢀ3.3V,ꢀI
= 0–5A, T = +25°C, unless otherwise noted.)
CC
IN
OUT
OUT A
LOAD CURRENT TRANSIENT RESPONSE
LOAD CURRENT TRANSIENT RESPONSE
(V = 3.3V, V
IN
= 1.2V, I
= 2.5 TO 5A)
(V = 5.0V, V
IN
= 1.2V, I
= 2.5 TO 5A)
OUT
MAX17515 toc10
OUT
OUT
OUT
MAX17515 toc09
2A/div
2A/div
I
I
OUT
OUT
50mV/div
(AC-COUPLED)
50mV/div
(AC-COUPLED)
V
OUT
V
OUT
2ms/div
2ms/div
LOAD CURRENT TRANSIENT RESPONSE
LOAD CURRENT TRANSIENT RESPONSE
(V = 3.3V, V
IN
= 2.5V, I
= 2.5 TO 5A)
(V = 5.0V, V
IN
= 2.5V, I
= 2.5 TO 5A)
OUT
MAX17515 toc12
OUT
OUT
OUT
MAX17515 toc11
I
2A/div
I
2A/div
OUT
OUT
50mV/div
(AC-COUPLED)
50mV/div
(AC-COUPLED)
V
OUT
V
OUT
2ms/div
2ms/div
STARTUP WAVEFORM
(V = 3.3V, V = 1.2V, I
SHUTDOWN WAVEFORM
(V = 3.3V, V = 1.2V, I = 30mA)
= 0A)
IN
OUT
OUT
IN
OUT
OUT
MAX17515 toc14
MAX17515 toc13
5V/div
5V/div
V
V
EN
EN
5V/div
5V/div
V
LX
V
LX
500mV/div
500mV/div
V
V
OUT
V
V
OUT
2V/div
2V/div
POK
POK
400µs/div
400µs/div
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Typical Operating Characteristics (continued)
(V
= 5V, V = 3.3V - 5V, V
ꢀ=ꢀ0.9Vꢀ-ꢀ3.3V,ꢀI
= 0–5A, T = +25°C, unless otherwise noted.)
CC
IN
OUT
OUT A
STARTUP WAVEFORM
(V = 3.3V, V = 1.2V, I
SHUTDOWN WAVEFORM
(V = 3.3V, V = 1.2V, I = 5A)
= 5A)
IN
OUT
OUT
IN
OUT
OUT
MAX17515 toc16
MAX17515 toc15
5V/div
5V/div
V
V
EN
EN
5V/div
5V/div
V
LX
V
LX
500mV/div
V
V
500mV/div
OUT
V
V
OUT
2V/div
2V/div
POK
POK
400µs/div
400µs/div
STARTUP WAVEFORM
(V = 5.0V, V = 1.2V, I
SHUTDOWN WAVEFORM
(V = 5.0V, V = 1.2V, I = 30mA)
= 0A)
IN
OUT
OUT
IN
OUT
OUT
MAX17515 toc18
MAX17515 toc17
5V/div
5V/div
V
V
EN
EN
5V/div
5V/div
V
LX
V
LX
500mV/div
V
500mV/div
OUT
V
V
OUT
2V/div
V
POK
2V/div
POK
400µs/div
400µs/div
STARTUP WAVEFORM
(V = 5.0V, V = 1.2V, I
SHUTDOWN WAVEFORM
(V = 5.0V, V = 1.2V, I = 5A)
= 5A)
IN
OUT
OUT
IN
OUT
OUT
MAX17515 toc20
MAX17515 toc19
5V/div
5V/div
V
V
EN
EN
5V/div
5V/div
V
LX
V
LX
500mV/div
V
V
500mV/div
OUT
V
V
OUT
2V/div
2V/div
POK
POK
400µs/div
400µs/div
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Typical Operating Characteristics (continued)
(V
= 5V, V = 3.3V - 5V, V
ꢀ=ꢀ0.9Vꢀ-ꢀ3.3V,ꢀI
= 0–5A, T = +25°C, unless otherwise noted.)
CC
IN
OUT
OUT A
LOAD SHORT-CIRCUIT
LOAD SHORT-CIRCUIT
(V = 5.0V, V = 1.2V, I = 5A)
OUT
(V = 5.0V, V
= 1.2V, I
= 0A)
IN
OUT
OUT
IN
OUT
MAX17515 toc21
MAX17515 toc22
I
I
OUT
OUT
5A/div
5V/div
5A/div
5V/div
V
LX
V
LX
V
V
V
OUT
V
POK
OUT
1V/div
2V/div
1V/div
2V/div
POK
400µs/div
400µs/div
OUTPUT CURRENT
vs. AMBIENT TEMPERATURE
(V = 5.0V NO AIR FLOW)
IN
6
5
4
3
2
1
0
V
= 1.1V
OUT
V
= 1.8V
OUT
V
= 3.3V
OUT
50
60
70
80
90 100 110 120
AMBIENT TEMPERATURE (°C)
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Pin Configuration
23
19
27
21
20
28
26
25
24
22
MAX17515
1
2
IN
IN
18 OUT
17 OUT
EP1
IN
3
4
EP2
EP3
16
OUT
POK
15 OUT
10
13
6
7
8
9
11
12
14
5
Pin Description
PIN
NAME
FUNCTION
InputꢀSupplyꢀConnection.ꢀBypassꢀtoꢀGNDꢀwithꢀaꢀ22µFꢀorꢀ2ꢀxꢀ10µFꢀceramicꢀcapacitor.ꢀSupplyꢀrangeꢀforꢀthisꢀ
1–3,
28
IN
pin is 4.5V to 5.5V. When V ꢀcanꢀbeꢀsuppliedꢀseparatelyꢀfromꢀaꢀ4.5Vꢀtoꢀ5.5Vꢀsource,ꢀtheꢀINꢀpinꢀcanꢀthenꢀbeꢀ
CC
powered from a 2.4V to 5.5V supply.
Open-DrainꢀPower-GoodꢀOutput.ꢀPOKꢀisꢀpulledꢀlowꢀifꢀFBꢀisꢀmoreꢀthanꢀ12%ꢀ(typ)ꢀaboveꢀorꢀbelowꢀtheꢀnominalꢀ
regulationꢀthreshold.ꢀPOKꢀisꢀheldꢀlowꢀinꢀshutdown.ꢀPOKꢀbecomesꢀhighꢀimpedanceꢀwhenꢀFBꢀisꢀinꢀregulationꢀ
range.ꢀPullꢀthisꢀpinꢀupꢀwithꢀ10kΩꢀ(typ)ꢀresistorꢀvalue.
4
5–7
8
POK
GND
GND.ꢀConnectꢀPGNDꢀandꢀGNDꢀtogetherꢀatꢀaꢀsingleꢀpoint.
5VꢀBiasꢀSupplyꢀInputꢀforꢀtheꢀInternalꢀSwitchingꢀRegulatorꢀDrivers.ꢀForꢀINꢀfromꢀ4.5Vꢀtoꢀ5.5V,ꢀV
can be
CC
V
connectedꢀtoꢀtheꢀINꢀsupply.ꢀForꢀINꢀsupplyꢀvoltagesꢀlowerꢀthanꢀtheꢀaboveꢀrange,ꢀV
should be powered from
CC
CC
aꢀseparateꢀ5Vꢀ±10%ꢀsupplyꢀandꢀbypassedꢀwithꢀaꢀ1µFꢀorꢀgreaterꢀceramicꢀcapacitor.
FeedbackꢀInputꢀforꢀtheꢀInternalꢀ5AꢀStep-DownꢀConverter.ꢀConnectꢀFBꢀtoꢀaꢀresistiveꢀdividerꢀbetweenꢀOUTꢀandꢀ
GNDꢀtoꢀadjustꢀtheꢀtypicalꢀoutputꢀvoltageꢀbetweenꢀ0.765Vꢀtoꢀ3.6V.ꢀKeepꢀequivalentꢀdividerꢀresistanceꢀlowerꢀ
thanꢀ50kΩ.
9
FB
RegulatorꢀEnableꢀInput.ꢀWhenꢀENꢀisꢀpulledꢀlow,ꢀtheꢀregulatorꢀisꢀdisabled.ꢀWhenꢀENꢀisꢀdrivenꢀhigh,ꢀtheꢀ
regulator is enabled.
10
EN
11, 12
13–20
N.C.
OUT
NoꢀConnection
RegulatorꢀOutputꢀPins.ꢀConnectꢀanꢀoutputꢀcapacitorꢀbetweenꢀOUTꢀandꢀPGNDꢀwithꢀaꢀ220µFꢀ(typ)ꢀPOSCAPꢀ
low-ESRꢀcapacitor.
21–27
—
PGND PowerꢀGNDꢀReturn.ꢀConnectꢀtoꢀGND.
EP1
EP2
EP3
ExposedꢀPadꢀ1.ꢀConnectꢀthisꢀpadꢀtoꢀtheꢀPGNDꢀandꢀGNDꢀgroundꢀplanesꢀofꢀ1inꢀbyꢀ1inꢀcopperꢀforꢀcooling.
ExposedꢀPadꢀ2.ꢀDoꢀnotꢀconnectꢀthisꢀpadꢀtoꢀanyꢀotherꢀnodeꢀonꢀtheꢀPCB.ꢀMinimizeꢀareaꢀofꢀcopperꢀisland.
Exposed Pad 3. Connect this pad to copper area of 1in by 1in. Electrically can be connected to the OUT pins.
—
—
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Functional Diagram
MAX17515
UVLO
POR
UVLO
VCC
IN
0.1µF
2.2µF
BST
EN
1µH
PWM
OUT
CONTROLLER
VCC
THERMAL FAULT
+160°C
2.2µF
OSC
POK
PGND
ZX
-
+
ILIM_VALLEY
ILIM_PEAK
ISKIP
-
+
GND
-
+
PWM
COMP
-
+
+
-
VREF
FB
OV
COMP
1.12 x VREF
+
-
UV
COMP
-
+
0.88 x VREF
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
The minimum input capacitor required can be calculated
by the following equation:
Design Procedure
Adjusting Output Voltage
I
(
×(1− D)
)
Theꢀ MAX17515ꢀ producesꢀ anꢀ adjustableꢀ 0.75Vꢀ toꢀ 3.6Vꢀ
output voltage from a 2.4V to 5.5V input voltage range by
usingꢀaꢀresistiveꢀfeedbackꢀdividerꢀfromꢀOUTꢀtoꢀFB.ꢀTheꢀ
device can deliver up to 5A output current up to an output
voltage of 2.5V at +70°C. The output current derates for
output voltages above 2.5V.
IN_AVG
C
=
IN
∆V × f
(
)
IN
SW
where:
I
is the average input current given by:
IN_AVGꢀ
P
OUT
Adjustingꢀtheꢀoutputꢀvoltageꢀofꢀtheꢀdeviceꢀrequiresꢀaꢀresis-
tiveꢀ dividerꢀ networkꢀ fromꢀ OUTꢀ toꢀ FB,ꢀ accordingꢀ toꢀ theꢀ
equation below. From the initial output voltage, the load-
line regulation reduces the effective feedback voltage by
a typical 5mV/A as the output current increases.
I
=
IN_Avg
η× V
IN
Dꢀ isꢀ theꢀ operatingꢀ dutyꢀ cycle,ꢀ whichꢀ isꢀ approximatelyꢀ
equal to V /V where:
OUT INꢀ
ꢀ
∆ꢀV is the required input-voltage ripple,
IN
V
OUT
R
= R
×
−1
f is the operating switching frequency,
SW
kΩ,ꢀwhereꢀR ꢀisꢀinꢀkΩ.
U
B
B
0.765
P
I
is the output power, which is equal to V
x
OUT
OUT
OUT,
Input Voltage Range
The maximum value (V
ꢀ
ηꢀisꢀtheꢀefficiency.
) and minimum value
IN(MAX)
(V
) must accommodate the worst-case conditions
Forꢀ theꢀ device’sꢀ systemꢀ (IN)ꢀ supply,ꢀ ceramicꢀ capaci-
tors are preferred due to their resilience to inrush surge
currents typical of systems, and due to their low parasitic
inductance, which helps reduce the high-frequency ring-
ingꢀ onꢀ theꢀ INꢀ supplyꢀ whenꢀ theꢀ internalꢀ MOSFETsꢀ areꢀ
turned off. Choose an input capacitor that exhibits less
thanꢀ+10°CꢀtemperatureꢀriseꢀatꢀtheꢀRMSꢀinputꢀcurrentꢀforꢀ
optimal circuit longevity.
IN(MIN)
accounting for the input voltage soars and drops. If there
is a choice at all, lower input voltages result in better
efficiency.ꢀWithꢀaꢀmaximumꢀdutyꢀcycleꢀofꢀ87.5%,ꢀV
is
OUT
limited to 0.875 x V .
IN
Input Capacitor Selection
The input capacitor must meet the ripple-current require-
ment (I ) imposed by the switching currents. The I
RMS
RMS
Output Capacitor Selection
requirements of the regulator can be determined by the
following equation:
The output capacitor selection requires careful evalua-
tion of several different design requirements (e.g., stabil-
ity, transient response, and output ripple voltage) that
place limits on the output capacitance and the effective
seriesꢀ resistanceꢀ (ESR).ꢀ Basedꢀ onꢀ theseꢀ requirements,ꢀ
aꢀcombinationꢀofꢀlow-ESRꢀpolymerꢀcapacitorsꢀ(lowerꢀcostꢀ
but higher output ripple voltage) and ceramic capacitors
(higher cost but low output ripple voltage) should be used
to achieve stability with low output ripple.
I
= I
× D ×(1− D)
OUT
RMS
Theꢀ worst-caseꢀ RMSꢀ currentꢀ requirementꢀ occursꢀ whenꢀ
operatingꢀwithꢀDꢀ=ꢀ0.5.ꢀAtꢀthisꢀpoint,ꢀtheꢀaboveꢀequationꢀ
simplifies to I
= 0.5 x I
.
RMS
OUT
VOUT
OUT
Loop Compensation
RU
RB
The gain portion of the loop gain is a result of error-
amplifier gain, current-sensing gain, and load with an
MAX17515
overallꢀ typicalꢀ valueꢀ atꢀ 1kHzꢀ ofꢀ 36dBꢀ atꢀ V = 5V, and
IN
FB
46dBꢀatꢀV = 3V, with a typical limit to the gain-bandwidth
IN
(GBW)ꢀproductꢀofꢀ120,000.ꢀTheꢀcrossoverꢀshouldꢀoccurꢀ
before this error-amplifier bandwidth limit of 120kHz
(gain = 1). The output capacitor and load introduces a
pole with the worst case at the maximum load (5A). If
the load pole location is further than a frequency where
Figure 1. Adjusting Output Voltage
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
theꢀgainꢀexceedsꢀtheꢀGBW,ꢀtheꢀgainꢀdropꢀstartsꢀearlierꢀatꢀ
the location where the loop gain is limited. This situation
applies typically to an output voltage less than 1.8V, so
zeroꢀfrequencyꢀfromꢀtheꢀESRꢀisꢀneededꢀtoꢀincreaseꢀtheꢀ
phase margin at the crossover frequency.
The actual capacitance value required relates to the
physicalꢀcaseꢀsizeꢀneededꢀtoꢀachieveꢀtheꢀESRꢀrequire-
ment, as well as to the capacitor chemistry. Thus, polymer
capacitorꢀselectionꢀisꢀusuallyꢀlimitedꢀbyꢀESRꢀandꢀvoltageꢀ
rating rather than by capacitance value.
Theꢀ recommendedꢀ relationshipꢀ betweenꢀ ESRꢀ andꢀ totalꢀ
output capacitance values are shown in Table 1. When
aꢀlow-ESRꢀtypeꢀcapacitorꢀisꢀusedꢀwithꢀaꢀceramicꢀcapaci-
tor,ꢀ aꢀ recommendedꢀ valueꢀ ofꢀ 44µFꢀ toꢀ 100µFꢀ ceramicꢀ
capacitor should be used to make up the total capaci-
tanceꢀvalueꢀwithꢀtheꢀrelationshipꢀbetweenꢀESRꢀandꢀtotalꢀ
output capacitance value, such that the zero frequency is
betweenꢀ32kHzꢀandꢀ40kHz.ꢀWhenꢀonlyꢀaꢀlow-ESRꢀtypeꢀ
capacitor is used, the zero frequency should be between
62kHz and 80kHz.
With ceramic capacitors, the ripple voltage due to capaci-
tance dominates the output ripple voltage. Therefore,
the minimum capacitance needed with ceramic output
capacitors is:
∆I
8 × fSW
1
L
COUT
=
×
V
RIPPLE
Alternatively,ꢀcombiningꢀceramicsꢀ(forꢀtheꢀlowꢀESR)ꢀandꢀ
polymers (for the bulk capacitance) helps balance the out-
put capacitance vs. output ripple-voltage requirements.
Optionally, for an output greater than or equal to 1.8V,
an all-ceramic capacitor solution can be used with a
minimum capacitance value that locates the pole location
below 1kHz with resistive load (5A), and with a simplified
Load-Transient Response
The load-transient response depends on the overall out-
put impedance over frequency, and the overall amplitude
and slew rate of the load step. In applications with large,
fast-loadꢀtransientsꢀ(loadꢀstepꢀ>ꢀ80%ꢀofꢀfullꢀloadꢀandꢀslewꢀ
rateꢀ >ꢀ 10A/μs),ꢀ theꢀ outputꢀ capacitor’sꢀ high-frequencyꢀ
responseꢀ (ESLꢀ andꢀ ESR)ꢀ needsꢀ toꢀ beꢀ considered.ꢀ Toꢀ
prevent the output voltage from spiking too low under a
load-transientꢀevent,ꢀtheꢀESRꢀisꢀlimitedꢀbyꢀtheꢀfollowingꢀ
equation (ignoring the sag due to finite capacitance):
equation given by C
ꢀ(µF)ꢀ=ꢀ900/V
.
OUTMIN
OUT
Output Ripple Voltage
Withꢀpolymerꢀcapacitors,ꢀtheꢀESRꢀdominatesꢀandꢀdeter-
mines the output ripple voltage. The step-down regulator’s
output ripple voltage (V
) equals the total inductor
RIPPLE
rippleꢀ currentꢀ (ΔI ) multiplied by the output capacitor’s
L
ESR.ꢀTherefore,ꢀ theꢀ maximumꢀ ESRꢀ toꢀ meetꢀ theꢀ outputꢀ
ripple-voltage requirement is:
V
RIPPLESTEP
R
≤
ESR
∆I
OUTSTEP
V
RIPPLE
R
≤
where V
load current transient, and I
load current step.
is the allowed voltage drop during
ESR
RIPPLESTEP
∆I
L
is the maximum
OUTSTEP
where:
V
− V
L
V
1
IN
OUT
OUT
The capacitance value dominates the mid-frequency
output impedance and continues to dominate the load-
transient response as long as the load transient’s slew
rate is fewer than two switching cycles. Under these
∆I
=
×
×
L
V
f
IN SW
where f ꢀisꢀtheꢀswitchingꢀfrequencyꢀandꢀLꢀisꢀtheꢀinduc-
torꢀ(1µH).ꢀ
SW
Table 1. Output Capacitor Selection vs. ESR
LOW-ESR TYPE WITH CERAMIC-TYPE
LOW-ESR TYPE WITHOUT CERAMIC-TYPE
ESR (mΩ)
TOTAL C
(µF)
OUT
ESR (mΩ)
250
16–20
13–17
11–14
10–12
9–11
8–10
7–9
8–10
7–9
6, 7
5, 6
4–6
4, 5
4, 5
3, 4
300
350
400
450
500
550
600
7, 8
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
conditions, the sag and soar voltages depend on the
output capacitance, inductance value, and delays in the
transientꢀresponse.ꢀLowꢀinductorꢀvaluesꢀallowꢀtheꢀinductorꢀ
current to slew faster, replenishing charge removed from
or added to the output filter capacitors by a sudden load
step, especially with low differential voltages across the
inductor. The minimum capacitance needed to handle the
voltage soft-start reduces the inrush current by gradually
ramping up the internal reference voltage.
Fixed-Frequency Current-Mode Controller
The heart of the current-mode PWM controller is a
multistage, open-loop comparator that compares the
output voltage-error signal with respect to the reference
voltage, the current-sense signal, and the slope-compen-
sation ramp (see the Functional Diagram). The device
uses a direct summing configuration, approaching ideal
cycle-to-cycle control over the output voltage without a
traditional error amplifier and the phase shift associated
with it.
sag voltage (V
) that occurs after applying the load
SAG
current can be estimated by the following equation:
1
C
=
×
OUT_SAG
V
SAG
2
L × ∆IOUT
1
STEP
+ ∆IOUT
(
×(t
− ∆T)
sw
)
STEP
2
VIN×D
− VOUT
(
)
MAX
Light-Load Operation
The device features an inherent automatic switchover
to pulse skipping (PFM operation) at light loads. This
switchover is affected by a comparator that truncates
the low-side switch on-time at the inductor current’s
zero crossing. The zero-crossing comparator senses the
inductor current during the off-time. Once the current
through the low-side MOSFET drops below the zero-
crossing trip level, it turns off the low-side MOSFET. This
prevents the inductor from discharging the output capaci-
tors and forces the switching regulator to skip pulses
under light-load conditions to avoid overcharging the
output. Therefore, the controller regulates the valley of the
output ripple under light-load conditions. The switching
waveforms can appear noisy and asynchronous at light-
load pulse-skipping operation, but this is a normal operat-
ing condition that results in high light-load efficiency.
where:
ꢀ
D
MAX
ꢀisꢀtheꢀmaximumꢀdutyꢀfactorꢀ(87.5%),ꢀ
t
is the switching period (1/f ),
SW
SW
ꢀ
ΔTꢀ equalsꢀ V
/V x t
when in PWM mode, or
OUT IN
SW
LꢀxꢀI
/(V - V
) when in Idle Mode (1.5A).
IDLE IN
OUT
The minimum capacitance needed to handle the over-
shoot voltage (V ) that occurs after load removal
(due to stored inductor energy) can be calculated as:
SOAR
2
∆IOUT
L
(
≈
)
STEP
V
C
OUT
2V
OUT SOAR
When the device is operating under low duty cycle,
the output capacitor size is usually determined by the
Idle Mode™ Current-Sense Threshold
C
.
OUT_SOAR
In Idle Mode, the on-time of the step-down controller ter-
minates when both the output voltage exceeds the feed-
back threshold, and the internal current-sense voltage
Detailed Description
The MAX17515 is a complete step-down switch-mode
power-supply solution that can deliver up to 5A output
current and up to 3.6V output voltage from a 2.4V to 5.5V
input voltage range. The device includes switch-mode
power-supply controller, dual n-channel MOSFET power
switches, and an inductor. The device uses a fixed-fre-
quency current-mode control scheme.
falls below the Idle Mode current-sense threshold (I
=
IDLE
1.5A). Another on-time cannot be initiated until the output
voltage drops below the feedback threshold. In this mode,
the behavior appears like PWM operation with occasional
pulse skipping, where inductor current does not need to
reach the light-load level.
Power-On Reset (POR) and UVLO
The device provides peak current-limit protection, output
undervoltage protection, output overvoltage protection,
and thermal protection. The device operates in skip
mode at light loads to improve the light-load efficiency.
Independent enable and an open-drain power-good out-
put allow flexible system power sequencing. The fixed
Power-onꢀ resetꢀ (POR)ꢀ occursꢀ whenꢀ V
rises above
CC
approximately 2.1V, resetting the undervoltage, over-
voltage, and thermal-shutdown fault latches. The V
inputꢀundervoltage-lockoutꢀ(UVLO)ꢀcircuitryꢀpreventsꢀtheꢀ
CC
switching regulators from operating if the 5V bias supply
(V )ꢀisꢀbelowꢀitsꢀ4VꢀUVLOꢀthreshold.
CC
Idle Mode is a trademark of Maxim Integrated Products, Inc
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
below 1V or toggle the enable input to clear the fault latch
and restart the regulator.
Soft-Start
The internal step-down controller starts switching and
the output voltage ramps up using soft-start. If the V
CC
Output Undervoltage Protection (UVP)
biasꢀsupplyꢀvoltageꢀdropsꢀbelowꢀtheꢀUVLOꢀthreshold,ꢀtheꢀ
controllerꢀ stopsꢀ switchingꢀ andꢀ disablesꢀ theꢀ driversꢀ (LXꢀ
becomes high impedance) until the bias supply voltage
recovers.
The device includes an output undervoltage-protection
(UVP) circuit that begins to monitor the output once the
startup blanking period has ended. If the output voltage
dropsꢀbelowꢀ88%ꢀ(typ)ꢀofꢀitsꢀnominalꢀregulationꢀvoltage,ꢀ
theꢀ regulatorꢀ pullsꢀ theꢀ POKꢀ outputꢀ lowꢀ andꢀ beginsꢀ theꢀ
UVP fault timer. Once the timer expires after 1.6ms, the
regulator shuts down, forcing the high-side MOSFET
off and disabling the low-side MOSFET once the zero-
Once the 5V V
bias supply and V rise above their
IN
CC
respectiveꢀinputꢀUVLOꢀthresholds,ꢀandꢀENꢀisꢀpulledꢀhigh,ꢀ
the internal step-down controller becomes enabled and
begins switching. The internal voltage soft-starts gradu-
ally increment the feedback voltage by approximately
25mV every 61 switching cycles, making the output volt-
ageꢀreachꢀitsꢀnominalꢀregulationꢀvoltageꢀ1.79msꢀafterꢀtheꢀ
regulator is enabled (see the Soft-Start Waveforms in the
Typical Operating Characteristics section).
crossing threshold has been reached. Cycle V
1V, or toggle the enable input to clear the fault latch and
restart the regulator.
below
CC
Thermal-Fault Protection
The device features a thermal-fault protection circuit.
Whenꢀtheꢀjunctionꢀtemperatureꢀrisesꢀaboveꢀ+160°Cꢀ(typ),ꢀ
a thermal sensor activates the fault latch, pulls down the
POKꢀoutput,ꢀandꢀshutsꢀdownꢀtheꢀregulator.ꢀToggleꢀENꢀtoꢀ
clear the fault latch, and restart the controllers after the
junctionꢀtemperatureꢀcoolsꢀbyꢀ15°Cꢀ(typ).
Power-Good Output (POK)
POKꢀisꢀtheꢀopen-drainꢀoutputꢀofꢀtheꢀwindowꢀcomparatorꢀ
that continuously monitors the output for undervoltage
andꢀ overvoltageꢀ conditions.ꢀ POKꢀ isꢀ activelyꢀ heldꢀ lowꢀ inꢀ
shutdownꢀ (ENꢀ =ꢀ GND).ꢀ POKꢀ becomesꢀ highꢀ impedanceꢀ
after the device is enabled and the output remains within
±10%ꢀofꢀtheꢀnominalꢀregulationꢀvoltageꢀsetꢀbyꢀFB.ꢀPOKꢀ
goesꢀlowꢀonceꢀtheꢀoutputꢀdropsꢀ12%ꢀ(typ)ꢀbelowꢀorꢀrisesꢀ
12%ꢀ(typ)ꢀaboveꢀitsꢀnominalꢀregulationꢀpoint,ꢀorꢀtheꢀoutputꢀ
shutsꢀ down.ꢀ Forꢀ aꢀ logic-levelꢀ POKꢀ outputꢀ voltage,ꢀ con-
Power Dissipation
The device output current needs to be derated if the out-
put voltage is above 2.5V or if the device needs to oper-
ate in high ambient temperature. The amount of current
derating depends upon the input voltage, output voltage,
and ambient temperature. The derating curves given in
the Typical Operating Characteristics section can be used
as a guide.
nectꢀanꢀexternalꢀpullupꢀresistorꢀbetweenꢀPOKꢀandꢀV . A
10kΩꢀpullupꢀresistorꢀworksꢀwellꢀinꢀmostꢀapplications.
CC
Output Overvoltage Protection (OVP)
Ifꢀ theꢀ outputꢀ voltageꢀ risesꢀ toꢀ 112%ꢀ (typ)ꢀ ofꢀ itsꢀ nominalꢀ
regulation voltage, the controller sets the fault latch, pulls
POKꢀ low,ꢀ shutsꢀ downꢀ theꢀ regulator,ꢀ andꢀ immediatelyꢀ
pulls the output to ground through its low-side MOSFET.
Turningꢀonꢀtheꢀlow-sideꢀMOSFETꢀwithꢀ100%ꢀdutyꢀcycleꢀ
rapidly discharges the output capacitors and clamps the
output to ground. However, this commonly undamped
response causes negative output voltages due to the
energyꢀstoredꢀinꢀtheꢀoutputꢀLCꢀatꢀtheꢀinstantꢀofꢀ0Vꢀfault.ꢀIfꢀ
the load cannot tolerate a negative voltage, place a power
Schottky diode across the output to act as a reverse-
polarity clamp. If the condition that caused the overvolt-
age persists (such as a shorted high-side MOSFET),
The maximum allowable power losses can be calculated
using the following equation:
T
− T
A
JMAX
PD
=
MAX
q
JA
where:
PD
ꢀ
is the maximum allowed power losses with
MAX
maximumꢀallowedꢀjunctionꢀtemperature,
T
T
q
ꢀisꢀtheꢀmaximumꢀallowedꢀjunctionꢀtemperature,
JMAX
is operating ambient temperature,
A
ꢀisꢀtheꢀjunction-to-ambientꢀthermalꢀresistance.
JA
the input source also fails (short-circuit fault). Cycle V
CC
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MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
PCB Layout Guidelines
PGND
V
OUT
CarefulꢀPCBꢀlayoutꢀisꢀcriticalꢀtoꢀachievingꢀlowꢀswitchingꢀ
losses and clean, stable operation. Use the following
guidelinesꢀforꢀgoodꢀPCBꢀlayout:
23
19
28 27 26 25 24
22 21 20
EP 1
EP 2
EP 3
●ꢀ Keepꢀtheꢀinputꢀcapacitorsꢀasꢀcloseꢀasꢀpossibleꢀtoꢀtheꢀ
INꢀandꢀPGNDꢀpins.ꢀ
18
1
2
3
4
17
V
IN
16
15
●ꢀ Keepꢀtheꢀoutputꢀcapacitorsꢀasꢀcloseꢀasꢀpossibleꢀtoꢀtheꢀ
OUTꢀandꢀPGNDꢀpins.ꢀ
●ꢀ ConnectꢀallꢀtheꢀPGNDꢀconnectionsꢀtoꢀasꢀlargeꢀaꢀcop-
10
13
5
6
7
8
9
11 12
14
per plane area as possible on the top layer.
GND
●ꢀ ConnectꢀEP1ꢀtoꢀtheꢀPGNDꢀandꢀGNDꢀplanesꢀonꢀtheꢀtopꢀ
layer.
●ꢀ UseꢀmultipleꢀviasꢀtoꢀconnectꢀinternalꢀPGNDꢀplanesꢀtoꢀ
theꢀtop-layerꢀPGNDꢀplane.
PGND
V
OUT
●ꢀ DoꢀnotꢀkeepꢀanyꢀsolderꢀmaskꢀonꢀEP1–EP3ꢀonꢀbottomꢀ
layer.ꢀKeepingꢀsolderꢀmaskꢀonꢀexposedꢀpadsꢀdecreas-
es the heat-dissipating capability.
●ꢀ Keepꢀ theꢀ powerꢀ tracesꢀ andꢀ loadꢀ connectionsꢀ short.ꢀ
This practice is essential for high efficiency. Using
thickꢀcopperꢀPCBsꢀ(2ozꢀvs.ꢀ1oz)ꢀcanꢀenhanceꢀfull-loadꢀ
efficiency.ꢀ Correctlyꢀ routingꢀ PCBꢀ tracesꢀ isꢀ aꢀ difficultꢀ
task that must be approached in terms of fractions of
centimeters, where a single milliohm of excess trace
resistance causes a measurable efficiency penalty.
Figure 2. Layout Recommendation
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages.ꢀNoteꢀ
thatꢀaꢀ“+”,ꢀ“#”,ꢀorꢀ“-”ꢀinꢀtheꢀpackageꢀcodeꢀindicatesꢀRoHSꢀstatusꢀ
only. Package drawings may show a different suffix character, but
theꢀdrawingꢀpertainsꢀtoꢀtheꢀpackageꢀregardlessꢀofꢀRoHSꢀstatus.
PART
TEMP RANGE
PIN-PACKAGE
MAX17515ELI+
-40°C to +85°C
28 SIP
+Denotes a lead(Pb)-free/RoHS-compliant package.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
Chip Information
PROCESS:ꢀBiCMOS
28 SIP
L286510+1
21-0701
90-0445
Maxim Integrated
│ 14
www.maximintegrated.com
MAX17515
5A, 2.4V to 5.5V Input,
High-Efficiency Power Module
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
6/13
Initial release
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2013 Maxim Integrated Products, Inc.
│ 15
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