MCP6409T-H/SLVAO [MICROCHIP]
Operational Amplifier, 4 Func, 4500uV Offset-Max, CMOS, PDSO14;
| 型号： | MCP6409T-H/SLVAO |
| 厂家： | 
MICROCHIP |
| 描述： | Operational Amplifier, 4 Func, 4500uV Offset-Max, CMOS, PDSO14 光电二极管 |
| 文件： | 总44页 (文件大小：2055K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6401/1R/1U/2/4/6/7/9
1 MHz, 45 µA Op Amps
Description
Features
• Low Quiescent Current: 45 µA (typical)
• Gain Bandwidth Product: 1 MHz (typical)
• Rail-to-Rail Input and Output
• Supply Voltage Range: 1.8V to 6.0V
• Unity Gain Stable
The
Microchip
Technology
Inc.
MCP6401/1R/1U/2/4/6/7/9 family of operational
amplifiers (op amps) has low quiescent current
(45 µA, typical) and rail-to-rail input and output
operation. This family is unity gain stable and has a
gain bandwidth product of 1 MHz (typical). These
devices operate with a power supply voltage of 1.8V to
6.0V. These features make the family of op amps well
suited for single-supply, battery-powered applications.
• Extended Temperature Ranges:
- -40°C to +125°C (E temp)
- -40°C to +150°C (H temp)
• No Phase Reversal
The MCP6401/1R/1U/2/4/6/7/9 family is designed with
Microchip’s advanced CMOS process and offered in
single, dual and quad packages. The devices are
available in two extended temperature ranges (E temp
and H temp) with different package types, which
makes them well-suited for automotive and industrial
applications.
Applications
• Portable Equipment
• Battery Powered System
• Medical Instrumentation
• Automotive Electronics
• Data Acquisition Equipment
• Sensor Conditioning
• Analog Active Filters
Design Aids
• SPICE Macro Models
• FilterLab® Software
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Typical Application
R2
D2
VIN
R1
VOUT
MCP6401
D1
Precision Half-Wave Rectifier
© 2009-2011 Microchip Technology Inc.
DS22229D-page 1
MCP6401/1R/1U/2/4/6/7/9
E Temp Package Types
H Temp Package Types
MCP6402
MCP6401
MCP6401R
MCP6401
SC70-5, SOT-23-5
SOT-23-5
SOT-23-5
SOIC
V
1
2
3
5
4
V
V
OUT
V
1
2
3
5
4
1
2
3
5
4
V
V
V
V
V
OUT
DD
8 V
DD
OUT
1
2
3
4
DD
SS
OUTA
V
V
V
SS
DD
SS
V
–
+
7
6
V
V
INA
OUTB
V
+
V
–
IN
V
+
–
IN
V
+
–
V
IN
IN
IN
IN
–
INA
INB
V
5 V
+
SS
INB
MCP6402
MCP6401U
MCP6404
MCP6406
SOIC
SOT-23-5
SOIC
SOT-23-5
V
8 V
1
2
3
4
OUTA
DD
V
+
1
2
3
5
4
V
IN
DD
V
1
2
3
5 V
DD
V
V
V
V
V
14
13
12
11
OUT
1
2
3
4
OUTA
OUTD
V
–
+
7
6
V
V
INA
V
SS
OUTB
V
SS
V
–
–
INA
IND
V
–
V
OUT
V
–
INA
INB
IN
4
V –
IN
V
+
V
+
+
IN
INA
IND
V
5 V
+
SS
INB
V
DD
SS
V
V
+
V
V
V
+
10
9
5
6
7
INB
INC
MCP6402
MCP6404
–
–
INB
INC
SOIC, TSSOP
2x3 TDFN
VOUTB
8
OUTC
V
V
14
1
2
3
4
OUTA
OUTD
V
1
8 V
DD
OUTA
V
–
+
V
V
V
–
+
13
12
11
INA
IND
IND
SS
V
V
–
2
7
OUTB
EP
9
INA
MCP6409
MCP6407
V
INA
V
+
V
–
3
4
6
5
INA
INB
SOIC
SOIC
V
DD
V
V
+
SS
INB
V
V
V
V
V
14
13
12
11
1
2
3
4
OUTA
OUTD
V
8 V
1
OUTA
DD
V
V
+
V
V
V
+
–
10
9
5
6
7
INB
INC
V
–
–
INA
IND
V
–
+
2
3
4
7
6
V
V
INA
OUTB
–
INB
INC
V
+
+
INA
IND
V
–
INA
INB
VOUTB
8
OUTC
V
DD
SS
V
5 V
+
SS
INB
V
V
+
V
V
V
+
10
9
5
6
7
INB
INC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
E temp: -40°C to +125°C
–
–
INB
INC
VOUTB
8
OUTC
H temp: -40°C to +150°C
DS22229D-page 2
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum rat-
ing conditions for extended periods may affect device
reliability.
1.0
1.1
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
V
– V ........................................................................7.0V
SS
DD
Current at Input Pins.....................................................±2 mA
Analog Inputs (V +, V -)†† .......... V – 1.0V to V + 1.0V
IN
IN
SS
DD
†† See Section 4.1.2 “Input Voltage Limits”.
All Other Inputs and Outputs ......... V – 0.3V to V + 0.3V
SS
DD
Difference Input Voltage ...................................... |V – V
|
SS
DD
Output Short-Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature (T )..........................+155°C
J
ESD Protection on All Pins (HBM; MM; CDM)....≥ 4 kV; 300V,
1500V
1.2
MCP6401/1R/1U/2/4 Electrical Specifications
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8v to +6.0v, VSS = GND,
VCM = VDD/2, VOUT ≈ VDD/2, VL = VDDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
Parts
(Note 1)
Parameters
Sym
Min
Typ
Max
Units Temp
Conditions
Input Offset
Input Offset Voltage
VOS
-4.5
—
±0.8
±1.0
±1.5
±2.0
+4.5
—
mV
E, H
E
VCM = VSS
mV +125°C
mV +150°C
—
—
H
Input Offset Drift with ΔVOS/ΔTA
—
—
µV/°C -40°C
E
VCM = VSS
Temperature
to
+125°C
—
±2.5
—
µV/°C -40°C
to
H
+150°C
Power Supply
Rejection Ratio
PSRR
63
—
—
78
75
73
—
—
—
dB
E, H
E
VCM = VSS
dB +125°C
dB +150°C
H
Input Bias Current and Impedance
Input Bias Current
IB
—
—
—
—
—
—
—
—
1
30
800
7
100
—
—
—
—
—
—
—
pA
E, H
E, H
E
pA
+85°C
pA +125°C
nA +150°C
pA
H
Input Offset Current
IOS
1
E, H
E, H
E
5
pA
+85°C
20
45
pA +125°C
pA +150°C
H
Note 1: E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands
for the one whose operating temperature range is from -40°C to +150°C.
2: Figure 2-14 shows how VCMR changes across temperature.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 3
MCP6401/1R/1U/2/4/6/7/9
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8v to +6.0v, VSS = GND,
VCM = VDD/2, VOUT ≈ VDD/2, VL = VDDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
Parts
(Note 1)
Parameters
Sym
Min
Typ
Max
Units Temp
Conditions
Common Mode Input
Impedance
ZCM
—
1013||6
—
Ω||pF
E, H
Differential Input
Impedance
ZDIFF
—
1013||6
—
Ω||pF
E, H
Common Mode
Common Mode Input
Voltage Range
(Note 2)
VCMR
VSS-0.20
—
—
—
—
—
—
71
VDD+0.20
VDD+0.05
VDD
V
E, H
E
VDD = 1.8V
VSS-0.05
V
V
+125°C
+150°C
VSS
H
VSS-0.30
SS-0.15
VDD+0.30
VDD+0.15
VDD+0.10
—
V
E, H
E
VDD = 6.0V
V
V
+125°C
+150°C
VSS-0.10
56
V
H
Common Mode
Rejection Ratio
CMRR
dB
E, H
VCM = -0.2V to 2.0V,
VDD = 1.8V
—
—
63
—
—
68
65
78
76
75
—
—
—
—
—
dB +125°C
dB +150°C
dB
E
H
VCM = -0.05V to 1.85V,
VDD = 1.8V
VCM = 0V to 1.8V,
VDD = 1.8V
E, H
E
VCM = -0.3V to 6.3V,
VDD = 6.0V
dB +125°C
dB +150°C
VCM = -0.15V to 6.15V,
VDD = 6.0V
H
VCM = -0.1V to 6.1V,
VDD = 6.0V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
90
—
—
110
105
100
—
—
—
dB
E, H
E
VOUT = 0.3V to VDD
0.3V,
VCM = VSS
-
dB +125°C
dB +150°C
H
Output
High-Level Output
Voltage
VOH
1.790
—
1.792
1.788
1.785
5.985
5.980
5.975
0.008
0.012
0.015
0.015
0.020
0.025
—
—
V
E, H
E
VDD = 1.8V
RL = 10 kΩ
0.5V input overdrive
V
V
V
V
V
V
V
V
V
V
V
+125°C
+150°C
—
—
H
5.980
—
—
E, H
E
VDD = 6.0V
RL = 10 kΩ
0.5V input overdrive
—
+125°C
+150°C
—
—
H
Low-Level Output
Voltage
VOL
—
0.010
—
E, H
E
VDD = 1.8V
RL = 10 kΩ
0.5V input overdrive
—
+125°C
+150°C
—
—
H
—
0.020
—
E, H
E
VDD = 6.0V
RL = 10 kΩ
0.5V input overdrive
—
+125°C
+150°C
—
—
H
Note 1: E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands
for the one whose operating temperature range is from -40°C to +150°C.
2: Figure 2-14 shows how VCMR changes across temperature.
DS22229D-page 4
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8v to +6.0v, VSS = GND,
CM = VDD/2, VOUT ≈ VDD/2, VL = VDDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
V
Parts
(Note 1)
Parameters
Sym
Min
Typ
Max
Units Temp
Conditions
Output Short-Circuit
Current
ISC
—
—
±5
—
—
mA
mA
E, H
E, H
VDD = 1.8V
±15
VDD = 6.0V
Power Supply
Supply Voltage
VDD
IQ
1.8
20
—
—
45
55
60
6.0
70
—
V
E, H
E, H
E
Quiescent Current
per Amplifier
µA
IO = 0, VDD = 5.0V
VCM = 0.2VDD
µA +125°C
µA +150°C
—
—
H
Note 1: E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands
for the one whose operating temperature range is from -40°C to +150°C.
2: Figure 2-14 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF (Refer to Figure 1-1).
Parameters
AC Response
Sym
Min
Typ
Max
Units
Parts
Conditions
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
1
—
—
—
MHz
°
E, H
E, H
E, H
65
0.5
G = +1 V/V
Slew Rate
SR
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
3.6
28
—
—
—
µVp-p
nV/√Hz
fA/√Hz
E, H
E, H
E, H
f = 0.1 Hz to 10 Hz
f = 1 kHz
0.6
f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Operating Temperature Range
TA
TA
TA
-40
-40
-65
—
—
—
+125
+150
+155
°C
°C
°C
E temp parts (Note 1)
H temp parts (Note 1)
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SC70
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-2x3 TDFN
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
331
220.7
149.5
52.5
95.3
100
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155°C.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 5
MCP6401/1R/1U/2/4/6/7/9
1.3
MCP6406/7/9 Electrical Specifications
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND,
VCM = VDD/2, VOUT » VDD/2, VL = VDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
Parts
(Note 1)
Parameters
Sym
Min
Typ
Max
Units Temp
Conditions
Input Offset
Input Offset Voltage
VOS
-4.5
-5.0
-5.5
—
—
+4.5
+5.0
+5.5
—
mV
E, H
E
VCM = VSS
±1.0
±1.5
±2.0
mV +125°C
mV +150°C
H
Input Offset Drift
with Temperature
ΔVOS/DTA
µV/°C -40°C
E
VCM = VSS
to
+125°C
—
±2.5
—
µV/°C -40°C
H
to
+150°C
Power Supply
Rejection Ratio
PSRR
63
60
58
78
75
73
—
—
—
dB
E, H
E
V
CM = VSS
dB
dB
+125°C
+150°C
H
Input Bias Current and Impedance
Input Bias Current
IB
—
—
—
—
—
—
—
—
—
±1
30
100
—
pA
pA
E, H
E, H
E
+85°C
+125°C
+150°C
800
7
2000
12
pA
nA
H
Input Offset Current
IOS
1
—
pA
E, H
E, H
E
5
—
pA
+85°C
+125°C
+150°C
20
—
pA
45
1013||6
—
pA
H
Common Mode
Input Impedance
ZCM
—
Ω||pF
E, H
Differential Input
Impedance
ZDIFF
—
1013||6
—
Ω||pF
E, H
Common Mode
Common Mode
Input Voltage Range
(Note 2)
VCMR
VSS-0.20
VSS-0.05
VSS
—
—
—
—
—
—
VDD+0.20
VDD+0.05
VDD
V
V
V
V
V
V
E, H
E
VDD = 1.8V
VDD = 6.0V
+125°C
+150°C
H
VSS-0.30
VSS-0.15
VDD+0.30
VDD+0.15
VDD+0.10
E, H
E
+125°C
+150°C
VSS-0.10
H
Note 1: E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands
for the one whose operating temperature range is from -40°C to +150°C.
2: Figure 2-14 shows how VCMR changes across temperature.
DS22229D-page 6
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND,
CM = VDD/2, VOUT » VDD/2, VL = VDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
V
Parts
(Note 1)
Parameters
Sym
Min
Typ
Max
Units Temp
Conditions
Common Mode
Rejection Ratio
CMRR
56
71
—
dB
E, H
VCM = -0.2V to 2.0V,
VDD = 1.8V
53
50
63
61
60
68
65
78
76
75
—
—
—
—
—
dB
dB
dB
dB
dB
+125°C
+150°C
E
VCM = -0.05V to 1.85V,
VDD = 1.8V
H
VCM = 0V to 1.8V,
VDD = 1.8V
E, H
E
V
V
CM = -0.3V to 6.3V,
DD = 6.0V
+125°C
+150°C
VCM = -0.15V to 6.15V,
VDD = 6.0V
H
VCM = -0.1V to 6.1V,
VDD = 6.0V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
90
88
85
110
105
100
—
—
—
dB
dB
dB
E, H
E
VOUT = 0.3V to
VDD-0.3V, VCM = VSS
+125°C
+150°C
H
Output
High-Level Output
Voltage
VOH
1.790
1.785
1.782
5.980
5.970
5.965
—
1.792
1.788
1.785
5.985
5.980
5.975
0.008
0.012
0.015
0.015
0.020
0.025
±5
—
—
V
V
E, H
E
VDD = 1.8V
RL = 10 kΩ
0.5V input overdrive
+125°C
+150°C
—
V
H
—
V
E, H
E
VDD = 6.0V
RL = 10 kΩ
0.5V input overdrive
—
V
+125°C
+150°C
—
V
H
Low-Level Output
Voltage
VOL
0.010
0.015
0.018
0.020
0.030
0.035
—
V
E, H
E
VDD = 1.8V
RL = 10 kΩ
0.5V input overdrive
—
V
+125°C
+150°C
—
V
H
—
V
E, H
E
VDD = 6.0V
RL = 10 kΩ
0.5V input overdrive
—
V
+125°C
+150°C
—
V
H
Output Short-Circuit
Current
ISC
—
mA
mA
E, H
E, H
VDD = 1.8V
—
±15
—
VDD = 6.0V
Power Supply
Supply Voltage
VDD
IQ
1.8
20
30
35
—
45
55
60
6.0
70
80
90
V
E, H
E, H
E
Quiescent Current
per Amplifier
µA
µA
µA
IO = 0, VDD = 5.0V
CM = 0.2VDD
V
+125°C
+150°C
H
Note 1: E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands
for the one whose operating temperature range is from -40°C to +150°C.
2: Figure 2-14 shows how VCMR changes across temperature.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 7
MCP6401/1R/1U/2/4/6/7/9
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF (Refer to Figure 1-1).
Parameters
AC Response
Sym
Min
Typ
Max
Units
Part
Conditions
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
1
—
—
—
MHz
°
E, H
E, H
E, H
65
0.5
G = +1 V/V
Slew Rate
SR
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
3.6
28
—
—
—
µVp-p
nV/√Hz
fA/√Hz
E, H
E, H
E, H
f = 0.1 Hz to 10 Hz
f = 1 kHz
0.6
f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Operating Temperature Range
TA
TA
TA
-40
-40
-65
—
—
—
+125
+150
+155
°C
°C
°C
E temp parts (Note 1)
H temp parts (Note 1)
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-SOIC
Thermal Resistance, 14L-SOIC
θJA
θJA
θJA
—
—
—
220.7
149.5
95.3
—
—
—
°C/W
°C/W
°C/W
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155°C.
1.4
Test Circuits
CF
6.8 pF
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s Common Mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
RG
100 kΩ
RF
100 kΩ
VDD/2
VP
error, VOST) of temperature, CMRR, PSRR and AOL
.
VDD
VIN+
EQUATION 1-1:
CB1
100 nF
CB2
1 µF
MCP640x
GDM = RF ⁄ RG
VCM = (VP + VDD ⁄ 2) ⁄ 2
VOST = VIN– – VIN+
VIN–
VOUT = (VDD ⁄ 2) + (VP – VM) + VOST(1 + GDM
)
VOUT
VM
RL
CL
RG
100 kΩ
RF
100 kΩ
Where:
100 kΩ 60 pF
GDM = Differential Mode Gain
(V/V)
(V)
CF
6.8 pF
VCM = Op Amp’s Common Mode
VL
Input Voltage
VOST = Op Amp’s Total Input Offset
(mV)
FIGURE 1-1:
Most Specifications.
AC and DC Test Circuit for
Voltage
DS22229D-page 8
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
45%
40%
35%
30%
25%
20%
15%
10%
5%
24%
21%
18%
15%
12%
9%
1760 Samples
VCM = VSS
TA = -40°C to +125°C
1760 Samples
VCM = VSS
6%
3%
0%
0%
-10 -8 -6 -4 -2
0
2
4
6
8
10
-5 -4 -3 -2 -1
0
1
2
3
4
5
Input Offset Voltage Drift (μV/°C)
Input Offset Voltage (mV)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage Drift.
50%
45%
24%
21%
1200 Samples
1200 Samples
VCM = VSS
40%
35%
30%
25%
20%
15%
10%
5%
VCM = VSS
18%
15%
12%
9%
TA = -40°C to +150°C
TA = +125ºC
6%
3%
0%
0%
-5 -4 -3 -2 -1
0
1
2
3
4
5
-10 -8 -6 -4 -2
0
2
4
6
8
10
Input Offset Voltage (mV)
Input Offset Voltage Drift (μV/°C)
FIGURE 2-5:
Input Offset Voltage Drift.
FIGURE 2-2:
Input Offset Voltage.
1000
800
600
400
200
0
-200
-400
-600
-800
-1000
24%
VDD = 6.0V
Representative
Part
TA = +25°C
21%
18%
15%
12%
9%
1200 Samples
TA = -40°C
VCM = VSS
TA = +150ºC
TA = +150°C
TA = +125°C
TA = +85°C
6%
3%
0%
-5 -4 -3 -2 -1
0
1
2
3
4
5
Common Mode Input Voltage (V)
Input Offset Voltage (mV)
FIGURE 2-6:
Common Mode Input Voltage with VDD = 6.0V.
Input Offset Voltage vs.
FIGURE 2-3:
Input Offset Voltage.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 9
MCP6401/1R/1U/2/4/6/7/9
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
1400
1200
1000
800
600
400
200
0
-200
-400
-600
-800
1,000
100
10
VDD = 1.8V
Representative
Part
TA = +150°C
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.1
1
10
100
1k
10k
100k
Common Mode Input Voltage (V)
Frequency (Hz)
FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
Input Noise Voltage Density
Common Mode Input Voltage with VDD = 1.8V.
vs. Frequency.
1000
750
40
35
30
25
20
15
10
500
250
VDD = 6.0V
0
VDD = 1.8V
-250
-500
f = 1 kHz
VDD = 6.0 V
Representative Part
5
0
-750
-1000
Common Mode Input Voltage (V)
Output Voltage (V)
FIGURE 2-8:
Input Offset Voltage vs.
FIGURE 2-11:
Input Noise Voltage Density
Output Voltage.
vs. Common Mode Input Voltage.
200
100
0
100
Representative Part
PSRR+
TA = +150°C
TA = +125°C
90
80
70
60
50
40
30
20
Representative Part
CMRR
PSRR-
-100
-200
-300
-400
-500
TA = +85°C
TA = +25°C
TA = -40°C
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
Power Supply Voltage (V)
10
100
1k
10k
100k
1M
Frequency (Hz)
FIGURE 2-9:
Input Offset Voltage vs.
FIGURE 2-12:
CMRR, PSRR vs.
Power Supply Voltage.
Frequency.
DS22229D-page 10
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
90
85
80
75
70
65
60
55
50
10000
1000
100
10
PSRR (VDD = 1.8V to 6.0V)
TA = +150°C
TA = +125°C
CMRR (VDD = 6.0V)
CMRR (VDD = 1.8V)
TA = +85°C
VDD = 6.0V
1
-50 -25
0
25
50
75 100 125 150
Ambient Temperature (°C)
Common Mode Input Voltage (V)
FIGURE 2-13:
CMRR, PSRR vs. Ambient
FIGURE 2-16:
Input Bias Current vs.
Temperature.
Common Mode Input Voltage.
65
0.4
0.3
60
VDD = 6.0V
VDD = 5.0V
VDD = 1.8V
55
50
45
40
35
30
25
0.2
VCMR_H - VOH @ VDD = 6.0V
@ VDD = 1.8V
0.1
0.0
-0.1
-0.2
-0.3
VCMR_L - VSS @ VDD = 1.8V
VOL - VSS @ VDD = 6.0V
VCM = 0.2VDD
-0.4
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-14:
Common Mode Input
FIGURE 2-17:
Quiescent Current vs.
Voltage Range Limits vs. Ambient Temperature.
Ambient Temperature.
80
10000
VCM = 0.2VDD
TA = +150°C
70
VDD = 6.0V
1000
60
50
40
30
20
10
0
Input Bias Current
100
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
10
Input Offset Current
1
25
50
75
100
125
150
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-15:
Input Bias, Offset Current
FIGURE 2-18:
Quiescent Current vs.
vs. Ambient Temperature.
Power Supply Voltage.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 11
MCP6401/1R/1U/2/4/6/7/9
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
120
100
80
60
40
20
0
0
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
90
85
80
75
70
65
60
55
50
45
Open-Loop Gain
-30
Phase Margin
-60
Open-Loop Phase
-90
-120
-150
-180
-210
Gain Bandwidth Product
VDD = 6.0V
VDD = 6.0V
-20
0.1110100 1k 10k 100k 1M10M
-50 -25
0
25 50 75 100 125 150
Temperature (°C)
Frequency (Hz)
FIGURE 2-19:
Open-Loop Gain, Phase vs.
FIGURE 2-22:
Gain Bandwidth Product,
Frequency.
Phase Margin vs. Ambient Temperature.
1.6
1.5
90
85
80
75
70
65
60
55
50
45
150
145
140
135
130
125
120
115
1.4
Phase Margin
1.3
1.2
1.1
1.0
0.9
RL = 10 kΩ
VSS + 0.3V < VOUT < VDD - 0.3V
Gain Bandwidth Product
110
105
100
0.8
0.7
VDD = 1.8V
-50 -25
0
25 50 75 100 125 150
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Power Supply Voltage (V)
Temperature (°C)
FIGURE 2-20:
DC Open-Loop Gain vs.
FIGURE 2-23:
Gain Bandwidth Product,
Power Supply Voltage.
Phase Margin vs. Ambient Temperature.
25
150
145
VDD = 6.0V
140
20
15
10
5
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
TA = +150°C
135
130
125
120
VDD = 1.8V
115
110
105
100
Large Signal AOL
0
0.00
0.05
0.10
0.15
0.20
0.25
Output Voltage Headroom
VDD - VOH or VOL-VSS (V)
Power Supply Voltage (°V)
FIGURE 2-21:
DC Open-Loop Gain vs.
FIGURE 2-24:
Output Short Circuit Current
Output Voltage Headroom.
vs. Power Supply Voltage.
DS22229D-page 12
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
10
VDD = 6.0V
Falling Edge, VDD = 6.0V
Rising Edge, VDD = 6.0V
VDD = 1.8V
1
Falling Edge, VDD = 1.8V
Rising Edge, VDD = 1.8V
0.1
100
1k
10k
100k
1M
-50 -25
0
25
50
75
100 125 150
Temperature (°C)
Frequency (Hz)
FIGURE 2-25:
Output Voltage Swing vs.
FIGURE 2-28:
Slew Rate vs. Ambient
Frequency.
Temperature.
1000
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
100
10
1
VDD = 6.0V
G = +1 V/V
VDD - VOH @ VDD = 6.0V
OL - VSS @ VDD = 6.0V
V
RL = 10 kΩ
0.1
0.01
0.1
1
10
Output Current (mA)
Time (2 µs/div)
FIGURE 2-26:
Output Voltage Headroom
FIGURE 2-29:
Small Signal Non-Inverting
vs. Output Current.
Pulse Response.
24
VDD - VOH @ VDD = 6.0V
VOL - VSS@ VDD = 6.0V
21
18
15
12
9
VDD = 6.0V
G = -1 V/V
6
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
3
0
-50 -25
0
25
50
75 100 125 150
Ambient Temperature (°C)
Time (2 µs/div)
FIGURE 2-27:
Output Voltage Headroom
FIGURE 2-30:
Small Signal Inverting Pulse
vs. Ambient Temperature.
Response.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 13
MCP6401/1R/1U/2/4/6/7/9
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
10000
1000
100
10
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
GN:
VDD = 6.0V
G = +1 V/V
101 V/V
11 V/V
1 V/V
1
10E1
1.E0
.E+4
10E5
1.E0
10
100
1.Ek+3
10k
100k
1M
Frequency (Hz)
Time (20 µs/div)
FIGURE 2-31:
Large Signal Non-Inverting
FIGURE 2-34:
Closed Loop Output
Pulse Response.
Impedance vs. Frequency.
1
1m
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100μ
10μ
VDD = 6.0V
G = -1 V/V
1μ
TA = -40°C
100n
TA = +25°C
TA = +85°C
TA = +125°C
TA = +150°C
10n
1
1n
100p
10p
1
1p
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
VIN (V)
Time (20 µs/div)
FIGURE 2-32:
Large Signal Inverting Pulse
FIGURE 2-35:
Measured Input Current vs.
Response.
Input Voltage (below VSS).
150
140
130
120
110
100
90
7.0
6.0
VOUT
5.0
VIN
4.0
3.0
2.0
1.0
VDD = 6.0V
Input Referred
G = +2 V/V
0.0
80
-1.0
100k
1100
1k
10k
Time (0.1 ms/div)
Frequency (Hz)
FIGURE 2-33:
The
FIGURE 2-36:
Channel-to-Channel
MCP6401/1R/1U/2/4/6/7/9 Shows No Phase
Reversal.
Separation vs. Frequency (MCP6402/4/7/9 only).
DS22229D-page 14
© 2009-2011 Microchip Technology Inc.
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE 1
MCP6401 MCP6401R MCP6401U
MCP6402
MCP6404 MCP6406 MCP6407 MCP6409
Symbol
Description
SC70-5,
SOT-23-5
2x3
TDFN
SOIC,
TSSOP
SOT-23-5
SOT-23-5
SOIC
SOT-23-5
SOIC
SOIC
1
4
1
4
4
3
1
2
3
8
5
6
1
2
3
8
5
6
1
2
3
4
5
6
1
4
1
2
3
8
5
6
1
2
3
4
5
6
VOUT, VOUTA Analog Output (op amp A)
VIN–, VINA
–
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
3
3
1
3
VIN+, VINA
VDD
+
5
2
5
5
—
—
—
—
—
—
—
—
VINB
+
–
Non-inverting Input (op amp B)
Inverting Input (op amp B)
VINB
—
—
—
—
2
—
—
—
—
5
—
—
—
—
2
7
7
7
—
—
—
—
2
7
7
VOUTB
VOUTC
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
—
—
—
4
—
—
—
4
8
—
—
—
4
8
9
9
VINC
–
+
10
11
12
13
14
—
10
11
12
13
14
—
VINC
VSS
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
9
—
—
—
—
—
—
—
—
VIND+
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
Exposed Thermal Pad (EP); must be
VIND–
VOUTD
EP
connected to VSS
.
MCP6401/1R/1U/2/4/6/7/9
3.1
Analog Output (V
)
OUT
The output pin is low-impedance voltage source.
3.2
Analog Inputs (V +, V -)
IN IN
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
3.3
Power Supply Pin (V , V
)
SS
DD
The positive power supply (VDD) is 1.8V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD
.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
DS22229D-page 16
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
4.0
APPLICATION INFORMATION
VDD
The MCP6401/1R/1U/2/4/6/7/9 family of op amps is
manufactured using Microchip’s state-of-the-art CMOS
process and is specifically designed for low-power,
high-precision applications.
D1 D2
U1
V1
V2
VOUT
4.1
Rail-to-Rail Input
MCP640x
4.1.1
PHASE REVERSAL
The MCP6401/1R/1U/2/4/6/7/9 op amps are designed
to prevent phase reversal when the input pins exceed
the supply voltages. Figure 2-33 shows the input
voltage exceeding the supply voltage with no phase
reversal.
FIGURE 4-2:
Inputs.
Protecting the Analog
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS); See Figure 2-35.
4.1.2
INPUT VOLTAGE LIMITS
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see Section 1.1 “Absolute
Maximum Ratings †”).
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (IB).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS
.
VDD
Bond
VDD
Pad
D1 D2
R1
U1
V1
V2
Bond
Pad
Bond
Pad
Input
Stage
VOUT
VIN+
VIN–
MCP640x
R2
Bond
Pad
VSS
VSS – min(V1, V2)
2 mA
min(R1,R2) >
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
FIGURE 4-3:
Inputs.
Protecting the Analog
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events (that meet the spec) are limited so that damage
does not occur.
4.1.4
NORMAL OPERATION
The input stage of the MCP6401/1R/1U/2/4/6/7/9 op
amps use two differential input stages in parallel. One
operates at a low Common Mode input voltage (VCM),
while the other operates at a high VCM. With this
topology, the device operates with a VCM up to 300 mV
above VDD and 300 mV below VSS (see Figure 2-14).
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
The input offset voltage is measured at VCM = VSS
0.3V and VDD + 0.3V to ensure proper operation.
–
The transition between the input stages occurs when
VCM is near VDD – 1.1V (see Figures 2-6 and 2-7). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 17
MCP6401/1R/1U/2/4/6/7/9
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6401/1R/1U/2/4/6/7/9 SPICE
macro model are very helpful.
4.2
Rail-to-Rail Output
The
output
voltage
range
of
the
MCP6401/1R/1U/2/4/6/7/9 op amps is VSS + 20 mV
(minimum) and VDD – 20 mV (maximum) when
RL = 10 kΩ is connected to VDD/2 and VDD = 6.0V.
Refer to Figures 2-26 and 2-27 for more information.
4.4
Supply Bypass
4.3
Capacitive Loads
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
4.5
Unused Op Amps
An unused op amp in quad packages (MCP6404 or
MCP6409) should be configured as shown in Figure 4-
6. These circuits prevent the output from toggling and
causing crosstalk. Circuit A sets the op amp at its
minimum noise gain. The resistor divider produces any
desired reference voltage within the output voltage
range of the op amp, which buffers that reference
voltage. Circuit B uses the minimum number of
components and operates as a comparator, but it may
draw more current.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
RISO
VOUT
MCP640x
+
¼ MCP6404 (A)
VDD
¼ MCP6404 (B)
VIN
CL
VDD
VDD
R1
R2
FIGURE 4-4:
Stabilizes Large Capacitive Loads.
Output Resistor, RISO
VREF
Figure 4-5 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
R2
VREF = VDD × ------------------
R1 + R2
FIGURE 4-6:
Unused Op Amps.
10000
VDD = 6.0 V
RL = 10 kΩ
1000
100
10
GN:
1 V/V
2 V/V
≥ 5 V/V
1
10p
100p
1n
10n
0.1µ
1µ
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
DS22229D-page 18
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
4.6
PCB Surface Leakage
4.7
Application Circuits
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6401/1R/1U/2/4/6/7/9 family’s bias current at
+25°C (±1.0 pA, typical).
4.7.1
PRECISION HALF-WAVE
RECTIFIER
The precision half-wave rectifier, which is also known
as a super diode, is a configuration obtained with an
operational amplifier in order to have a circuit behave
like an ideal diode and rectifier. It effectively cancels the
forward voltage drop of the diode so that very low level
signals can still be rectified with minimal error. This can
be useful for high-precision signal processing. The
MCP6401/1R/1U/2/4/6/7/9 op amps have high input
impedance, low input bias current and rail-to-rail
input/output, which makes this device suitable for
precision rectifier applications.
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
Figure 4-8 shows a precision half-wave rectifier and its
transfer characteristic. The rectifier’s input impedance
is determined by the input resistor R1. To avoid loading
effect, it must be driven from a low-impedance source.
Guard Ring
VIN– VIN+
VSS
When VIN is greater than zero, D1 is OFF, D2 is ON, and
VOUT is zero. When VIN is less than zero, D1 is ON, D2
is OFF, and VOUT is the VIN with an amplification of
-R2/R1.
The rectifier circuit shown in Figure 4-8 has the benefit
that the op amp never goes in saturation, so the only
thing affecting its frequency response is the
amplification and the gain bandwidth product.
.
FIGURE 4-7:
for Inverting Gain.
Example Guard Ring Layout
1. Non-inverting Gain and Unity-Gain Buffer:
R2
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
D2
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common Mode input voltage.
VIN
R1
VOUT
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
MCP6401
D1
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
Precision Half-Wave Rectifier
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
VOUT
-R2/R1
VIN
Transfer Characteristic
FIGURE 4-8:
Precision Half-Wave
Rectifier.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 19
MCP6401/1R/1U/2/4/6/7/9
4.7.2
BATTERY CURRENT SENSING
4.7.3
INSTRUMENTATION AMPLIFIER
The MCP6401/1R/1U/2/4/6/7/9 op amps’ Common
Mode Input Range, which goes 0.3V beyond both
supply rails, supports their use in high-side and low-
side battery current sensing applications. The low
quiescent current (45 µA, typical) helps prolong battery
life, and the rail-to-rail output supports detection of low
currents.
The MCP6401/1R/1U/2/4/6/7/9 op amps are well
suited for conditioning sensor signals in battery-
powered applications. Figure 4-10 shows a two op amp
instrumentation amplifier, using the MCP6402, that
works well for applications requiring rejection of
Common Mode noise at higher gains. The reference
voltage (VREF) is supplied by a low impedance source.
In single supply applications, VREF is typically VDD/2.
Figure 4-9 shows a high-side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
Mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, which is within its Maximum Output
Voltage Swing specification.
RG
R1
R2
R2
R1
VREF
VOUT
V2
V1
½ MCP6402
½ MCP6402
IDD
To load
1.8V
to
6.0V
VDD
MCP6401
1 MΩ
10Ω
R1 2R1
⎛
⎞
VOUT = (V1 – V2) 1 + ----- + --------- + VREF
VOUT
⎝
⎠
R2 RG
100 kΩ
FIGURE 4-10:
Instrumentation Amplifier.
Two Op Amp
VDD – VOUT
IDD = -----------------------------------------
(10 V/V) ⋅ (10Ω)
FIGURE 4-9:
Supply Current Sensing.
DS22229D-page 20
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
5.4
Analog Demonstration and
Evaluation Boards
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6401/1R/1U/2/4/6/7/9 family of op amps.
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
5.1
SPICE Macro Model
a
complete listing of these boards and their
The latest SPICE macro model for the
MCP6401/1R/1U/2/4/6/7/9 op amp is available on the
Microchip web site at www.microchip.com. The model
was written and tested in official Orcad (Cadence)
owned PSPICE. For other simulators, translation may
be required.
corresponding user’s guides and technical information,
visit www.microchip.com/analogtools, the Microchip
web site.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot be guaranteed to match the actual
op amp performance.
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.5
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes and are
recommended as supplemental reference resources.
®
5.2
FilterLab Software
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
5.3
Microchip Advanced Part Selector
(MAPS)
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
• AN1297: “Microchip’s Op Amp SPICE Macro
Models”, DS01297
from
the
Microchip
website
at
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”, DS01332
www.microchip.com/maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, you can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for Datasheets, Purchase, and Sampling of
Microchip parts.
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
© 2009-2011 Microchip Technology Inc.
DS22229D-page 21
MCP6401/1R/1U/2/4/6/7/9
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC70 (MCP6401 only)
Example:
BL25
5-Lead SOT-23
(MCP6401/1R/1U, MCP6406)
Part Number
Code
Example:
MCP6401T-E/OT
MCP6401T-H/OT
MCP6401RT-E/OT
MCP6401RT-H/OT
MCP6401UT-E/OT
MCP6401UT-H/OT
MCP6406T-E/OT
MCP6406T-H/OT
NLNN
U8NN
NMNN
U9NN
NPNN
V8NN
ZXNN
ZYNN
NL25
Example:
8-Lead TDFN (2 x 3)(MCP6402 only)
AAW
129
25
Part Number
Code
MCP6402T-E/MNY
AAW
8-Lead SOIC (150 mil)(MCP6401, MCP6402, MCP6407)
Example:
MCP6402E
e
3
SN ^^1129
256
NNN
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS22229D-page 22
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6404, MCP6409)
Example:
MCP6404
e
3
H/SL
1129256
Example:
14-Lead TSSOP (MCP6404 only)
XXXXXXXX
YYWW
6404E/ST
1129
256
NNN
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 23
MCP6401/1R/1U/2/4/6/7/9
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DS22229D-page 24
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
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© 2009-2011 Microchip Technology Inc.
DS22229D-page 25
MCP6401/1R/1U/2/4/6/7/9
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DS22229D-page 26
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 27
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229D-page 28
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 29
MCP6401/1R/1U/2/4/6/7/9
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DS22229D-page 30
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 31
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229D-page 32
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
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© 2009-2011 Microchip Technology Inc.
DS22229D-page 33
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229D-page 34
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 35
MCP6401/1R/1U/2/4/6/7/9
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DS22229D-page 36
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 37
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229D-page 38
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2009-2011 Microchip Technology Inc.
DS22229D-page 39
MCP6401/1R/1U/2/4/6/7/9
Revision B (June 2010)
APPENDIX A: REVISION HISTORY
The following is the list of modifications:
Revision D (September 2011)
1. Added the MCP6402 and MCP6404 package
information.
The following is the list of modifications:
2. Updated the ESD protection value on all pins in
1. Section 1.0 “Electrical Characteristics”:
Updated minor typographical corrections in
both “DC Electrical Specifications” tables to
show the correct unit for RL (kΩ instead of kW).
Section 1.1 “Absolute Maximum Ratings †”.
3. Added Figure 2-36.
4. Updated Table 3-1.
5. Updated Section 4.1.2 “Input Voltage Limits”.
6. Added Section 4.1.3 “Input Current Limits”.
7. Added Section 4.5 “Unused Op Amps”.
Revision C (August 2011)
The following is the list of modifications:
8. Updated Section 5.4 “Analog Demonstration
and Evaluation Boards”.
1. Added new MCP6406, MCP6407 and
MCP6409 devices and the related information
throughout the document.
9. Updated the package markings information and
drawings.
2. Created two package type drawings based on
the temperature characterization (see E Temp
Package Types and H Temp Package Types).
10. Updated the Product Identification System
page.
3. Added MCP6406/7/9 specification tables in
Section 1.3 “MCP6406/7/9 Electrical Specifi-
cations”.
Revision A (December 2009)
Original data sheet for the MCP6401/1R/1U/2/4/6/7/9
family of devices.
4. Updated
characterization
graphics
in
Section 2.0 “Typical Performance Curves”.
5. Updated Table 3-1 in Section 3.0 “Pin
Descriptions” to show all the devices.
6. Updated markings examples in Section 6.1
“Package Marking Information”.
7. Updated the package markings information to
show all drawings available for each type of
package.
8. Updated the Product Identification System
page with the new devices and temperature
specifications.
DS22229D-page 40
© 2009-2011 Microchip Technology Inc.
MCP6401/1R/1U/2/4/6/7/9
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
-X
/XX
a)
MCP6401T-E/LT:
Tape and Reel,
Extended Temperature,
5LD SC70 pkg
Temperature
Range
Package
b)
MCP6401T-E/OT:
Tape and Reel,
Extended Temperature,
5LD SOT-23 pkg
Tape and Reel,
5LD SOT-23 pkg
Tape and Reel,
Device:
MCP6401T:
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
c)
d)
MCP6401RT-E/OT:
MCP6401UT-E/OT:
MCP6401RT: Single Op Amp (Tape and Reel)
(SOT-23)
MCP6401UT: Single Op Amp (Tape and Reel)
(SOT-23)
MCP6402:
MCP6402T:
Extended Temperature,
5LD SOT-23 pkg
Dual Op Amp
e)
f)
MCP6402-E/SN:
MCP6402T-E/SN:
Extended Temperature,
8LD SOIC pkg
Tape and Reel,
Dual Op Amp (Tape and Reel)
(SOIC, 2x3 TDFN)
Quad Op Amp
MCP6404:
MCP6404T:
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
Extended Temperature,
8LD SOIC pkg
MCP6406T:
Single Op Amp (Tape and Reel)
(SOT-23)
Dual Op Amp
Dual Op Amp (Tape and Reel)
(SOIC)
Quad Op Amp
g)
MCP6402T-E/MNY:
Tape and Reel,
Extended Temperature,
8LD 2x3 TDFN pkg
MCP6407:
MCP6407T:
h)
i)
MCP6404-E/SL:
MCP6404T-E/SL:
Extended Temperature,
14LD SOIC pkg
Tape and Reel,
Extended Temperature,
14LD SOIC pkg
MCP6409:
MCP6409T:
Quad Op Amp (Tape and Reel)
(SOIC)
j)
MCP6404-E/ST:
MCP6404T-E/ST:
Extended Temperature,
14LD TSSOP pkg
Tape and Reel,
Temperature Range:
Package:
E
H
= -40°C to +125°C (Extended Temperature)
= -40°C to +150°C (High Temperature)
k)
Extended Temperature,
14LD TSSOP pkg.
LT
= Plastic Package (SC70), 5-lead
OT = Plastic Small Outline Transistor (SOT-23), 5-lead
SN = Plastic SOIC, (3.90 mm body), 8-lead
MNY* = Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead
a)
MCP6401T-H/OT:
Tape and Reel,
High Temperature,
5LD SOT-23 pkg
SL
ST
= Plastic SOIC (3.90 mm body), 14-lead
= Plastic TSSOP (4.4mm body), 14-lead
b)
c)
MCP6402-H/SN:
MCP6402T-H/SN:
High Temperature,
8LD SOIC pkg
Tape and Reel,
High Temperature,
8LD SOIC pkg
* Y
= Nickel palladium gold manufacturing designator.
Only available on the TDFN package.
d)
e)
MCP6404-H/SL:
MCP6404T-H/SL:
High Temperature,
14LD SOIC pkg
Tape and Reel,
High Temperature,
14LD SOIC pkg
f)
MCP6406T-H/OT:
Tape and Reel,
High Temperature,
5LD SOT-23 pkg
g)
h)
MCP6407-H/SN:
MCP6407T-H/SN:
High Temperature,
8LD SOIC pkg
Tape and Reel,
High Temperature,
8LD SOIC pkg
i)
j)
MCP6409-H/SL:
MCP6409T-H/SL:
High Temperature,
14LD SOIC pkg
Tape and Reel,
High Temperature,
14LD SOIC pkg
© 2009-2011 Microchip Technology Inc.
DS22229D-page 41
MCP6401/1R/1U/2/4/6/7/9
NOTES:
DS22229D-page 42
© 2009-2011 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009-2011, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-61341-616-7
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 43
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
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Tel: 852-2401-1200
Fax: 852-2401-3431
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Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
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Web Address:
www.microchip.com
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-330-9305
Los Angeles
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Toronto
Mississauga, Ontario,
Canada
China - Xiamen
Tel: 905-673-0699
Fax: 905-673-6509
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
08/02/11
DS22229D-page 44
© 2009-2011 Microchip Technology Inc.
相关型号：
MCP6422
The Microchip’s MCP6421/2/4 operational amplifiers (op amps) has low input bias current (1 pA, typ
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