USB2641 [MICROCHIP]
Ultra Fast USB 2.0 Multi-Format Flash Media Controller/USB Hub Combo;
| 型号： | USB2641 |
| 厂家： | 
MICROCHIP |
| 描述： | Ultra Fast USB 2.0 Multi-Format Flash Media Controller/USB Hub Combo |
| 文件： | 总60页 (文件大小：691K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
USB2640/USB2641
Ultra Fast USB 2.0 Multi-Format Flash Media Controller/USB
Hub Combo
General Description
Features
The Microchip USB2640/USB2641 is a USB 2.0 com-
pliant, Hi-Speed hub for USB port expansion with an
attached mass storage class peripheral controller. The
controller allows read/write capability to popular flash
media from the following families:
• Secure DigitalTM (SD)
• MultiMediaCardTM (MMC)
• xD-Picture CardTM (xD)1
• Memory Stick(MS)
• Compliant with the following flash media card
specifications: SD 2.0 / MMC 4.2 / MS 1.43 / MS-
Pro 1.02 / MS-PRO-HG 1.01 / MS-Duo 1.10 / xD
1.2
• Supports a single external 3.3 V supply source;
internal regulators provide 1.8 V internal core volt-
age for additional bill of materials and power sav-
ings
• The transaction translator (TT) in the hub sup-
ports operation of Full-Speed and Low-Speed
peripherals
The USB2640/USB2641 is a fully integrated, single
chip solution providing USB expansion and integrated
flash card media reader/writer capability of ultra high
performance operation. Average sustained transfer
rates exceeding 35 MB/s are possible2.
• 9 K RAM | 64 K on-chip ROM
• Enhanced EMI rejection and ESD protection per-
formance
• On board 24 MHz crystal driver circuit
• Optional external 24 MHz clock input
• 8051 8-bit microprocessor
Highlights
• Hub controller with internally connected ultra fast
flash media reader/writer and 2 exposed down-
stream ports for external peripheral expansion
• Hub and flash media reader/writer configuration
from a single source: External I2C ROM or exter-
nal SPI ROM
• Flash media reader/writer employs multiplexed
card interfaces which are optimized for use with
single card insertion combo sockets
- Configures internal code using an external
I2C EEPROM
- Supports external code using a SPI Flash
EEPROM
• Hardware-controlled data flow architecture for all
self-mapped media
- Customizable vendor ID, product ID, lan-
guage ID
• Optional support for external firmware access via
SPI interface
• EEPROM update via USB
• PortMap
• 48-pin QFN RoHS compliant package (7 x 7 mm)
- Flexible port mapping and port disable
sequencing supports multiple platform
designs
Applications
• PortSwap
• Desktop and mobile PCs
• Personal mobile devices
• Printers
- Programmable USB differential-pair pin loca-
tions eases PCB design by aligning USB sig-
nal traces directly to connectors
• GPS navigation systems
• Media Players/Viewers
• Consumer A/V
• PHYBoost
- Programmable USB transceiver drive
strength recovers signal integrity
• Set-top boxes
1. Support and capabilities for xD-Picture Card are
not applicable for the USB2641. Please obtain a
user license from the xD-Picture Card License Of-
fice to support this flash media format.
2. Host and media dependent.
2015-2021 Microchip Technology Inc.
DS00001947C-page 1
USB2640/USB2641
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DS00001947C-page 2
2015-2021 Microchip Technology Inc.
USB2640/USB2641
Table of Contents
1.0 Overview ......................................................................................................................................................................................... 4
2.0 Acronyms ........................................................................................................................................................................................ 6
3.0 Block Diagrams ............................................................................................................................................................................... 7
4.0 Pin Configurations ........................................................................................................................................................................... 9
5.0 Pin Tables ..................................................................................................................................................................................... 11
6.0 Pin Descriptions ............................................................................................................................................................................ 13
7.0 Configuration Options ................................................................................................................................................................... 23
8.0 Pin Reset States ........................................................................................................................................................................... 43
9.0 DC Parameters ............................................................................................................................................................................. 47
10.0 AC Specifications ........................................................................................................................................................................ 51
11.0 Package Outline .......................................................................................................................................................................... 53
The Microchip Web Site ...................................................................................................................................................................... 57
Customer Change Notification Service ............................................................................................................................................... 57
Customer Support ............................................................................................................................................................................... 57
Product Identification System ............................................................................................................................................................. 58
2015-2021 Microchip Technology Inc.
DS00001947C-page 3
USB2640/USB2641
1.0
OVERVIEW
The Microchip USB2640/USB2641 is an integrated USB 2.0 compliant, Hi-Speed hub for USB port expansion with an
attached bulk only mass storage class peripheral controller. This multi-format flash media controller and USB Hub
Combo features three downstream ports: one port is dedicated to an internally connected ultra fast flash media
reader/writer and two exposed downstream ports are available for external peripheral expansion.
The Microchip USB2640/USB2641 is an ultra fast, OEM-configurable, hub controller IC with three downstream ports for
embedded USB solutions. The USB2640/USB2641 will attach to an upstream port as a Full-Speed Hub or as a Full-/Hi-
Speed Hub. The hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a Hi-Speed Hub) downstream
devices on all of the enabled downstream ports.
All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+
and D– pins and all required pull-down and pull-up resistors on D+ and D– pins. The over-current sense inputs for the
downstream facing ports have internal pull-up resistors.
The USB2640/USB2641 includes programmable features such as:
PortMap which provides flexible port mapping and disable sequences. The downstream ports of a USB2640/USB2641
hub can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any
port that is disabled, the USB2640/USB2641 automatically reorders the remaining ports to match the USB host control-
ler’s port numbering scheme.
PortSwap which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment
of USB signals (D+/D-) to connectors avoiding uneven trace length or crossing of the USB differential signals on the
PCB.
PHYBoost which enables four programmable levels of USB signal drive strength in downstream port transceivers.
PHYBoost attempts to restore USB signal integrity that has been compromised by system level variables such as poor
PCB layout, long cables, etc.
1.1
Device Features
Hardware Features
1.1.1
• Single chip flash media controller
• Transaction translator (TT) in the hub supports operation of FS and LS peripherals
• Full power management with individual or ganged power control of each downstream port
• Optional support for external firmware access via SPI interface
- 30 MHz or 60 MHz operation support
- Single bit or dual bit mode support
- Mode 0 or mode 3 SPI support
Compliant with the following flash media card specifications:
• Secure Digital 2.0 / MultiMediaCard 4.2
- SD 2.0, HS-SD, HC-SD
- TransFlash™ and reduced form factor media
- 1/4/8 bit MMC 4.2
• MMC streaming mode support
• Memory Stick 1.43
• Memory Stick Pro Format 1.02
• Memory Stick Pro-HG Duo Format 1.01
- Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro
• Memory Stick Duo 1.10
• xD-Picture Card 1.2 (USB2640 only)
• On board 24 MHz crystal driver circuit
• Optional external 24 MHz clock input
- Must be used with an external resistor divider to provide a 1.8 V signal
DS00001947C-page 4
2015-2021 Microchip Technology Inc.
USB2640/USB2641
• 8051 8-bit microprocessor
- 60 MHz - single cycle execution
- 64 KB ROM; 9 KB RAM
• Internal regulator for 1.8 V core operation
• Optimized pinout improves signal flow, easing implementation and allowing for improved signal integrity treatment
1.1.2 Software Features
• Optimized for low latency interrupt handling
• Hub and flash media reader/writer configuration from a single source: External I2C ROM or external SPI ROM
• EEPROM update via USB
• Please see the USB2640/USB2641 Software Release Notes for additional software features
1.2
OEM Selectable Features
Hub
1.2.1
A default configuration is available in USB2640/USB2641 following a reset. The USB2640/USB2641 may also be con-
figured by an external I2C EEPROM or via external SPI ROM flash.
The USB2640/USB2641 supports several OEM selectable features:
• Compound Device support (port is permanently hardwired to a downstream USB peripheral device), on a port-by-
port basis.
• Select over-current sensing and port power control on an individual (port-by-port) or ganged (all ports together)
basis to match the OEM’s choice of circuit board component selection.
• Port power control and over-current detection/delay features
• Configure the delay time for filtering the over-current sense inputs.
• Configure the delay time for turning on downstream port power.
• Bus- or self-powered selection
• Hub port disable or non-removable configurations
• Flexible port mapping and disable sequence. Ports can be disabled/reordered in any sequence to support multiple
platforms with a single design. The hub will automatically reorder the remaining ports to match the host controller's
numbering scheme.
• Programmable USB differential-pair pin location.
- Eases PCB layout by aligning USB signal lines directly to connectors
• Programmable USB signal drive strength. Recover USB signal integrity due to compromised system environ-
ments using 4 levels of signal drive strength.
• Indicate the maximum current that the 2-port hub consumes from the USB upstream port.
• Indicate the maximum current required for the hub controller.
1.2.2
FLASH MEDIA CONTROLLER
• Customize vendor ID, product ID, and device ID.
• 12-hex digit (max) serial number string
• Customizable vendor specific data by optional use of external serial EEPROM
• 28-character manufacturer ID and product string for flash media reader/writer
• LED blink interval or duration
2015-2021 Microchip Technology Inc.
DS00001947C-page 5
USB2640/USB2641
2.0
ACRONYMS
FM:
Flash Media
FMC:
FS:
Flash Media Controller
Full-speed Device
LS:
Low-speed Device
HS:
Hi-speed Device
I2C:
Inter-Integrated Circuit
MultiMediaCard
MMC:
MS:
Memory Stick
MSC:
OCS:
RXD:
SD:
Memory Stick Controller
Over-current Sense
Received eXchange Data
Secure Digital
SDC:
TXD:
UART:
UCHAR:
UINT:
xD:
Secure Digital Controller
Transmit eXchange Data
Universal Asynchronous Receiver-Transmitter
Unsigned Character
Unsigned Integer
xD-Picture Card
DS00001947C-page 6
2015-2021 Microchip Technology Inc.
USB2640/USB2641
3.0
BLOCK DIAGRAMS
FIGURE 3-1:
USB2640 BLOCK DIAGRAM
2015-2021 Microchip Technology Inc.
DS00001947C-page 7
USB2640/USB2641
FIGURE 3-2:
USB2641 BLOCK DIAGRAM
DS00001947C-page 8
2015-2021 Microchip Technology Inc.
USB2640/USB2641
4.0
PIN CONFIGURATIONS
FIGURE 4-1:
USB2640 48-PIN QFN
LED
nRESET
VBUS_DET
TEST
xD_CLE / SD_CMD / MS_D0
xD_ALE / SD_D5 / MS_D1
xD_nWE
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
xD_nWP / SD_CLK / MS_BS
xD_D0 / SD_D6 / MS_D7
xD_D1 / SD_D7 / MS_D6
xD_D2 / SD_D0 / MS_D4
xD_D3 / SD_D1 / MS_D5
VDD33
VDD33
USB+
USB2640
(Top View QFN-48)
USB-
XTAL2
XTAL1 (CLKIN)
PLLFILT
RBIAS
CRFILT
Ground Pad
(must be connected to VSS)
SD_nCD
VDD33
xD_D4 / SD_WP / MS_SCLK
Indicates pins on the bottom of the device.
2015-2021 Microchip Technology Inc.
DS00001947C-page 9
USB2640/USB2641
FIGURE 4-2:
USB2641 48-PIN QFN
LED
nRESET
VBUS_DET
TEST
SD_CMD / MS_D0
SD_D5 / MS_D1
NC
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
SD_CLK / MS_BS
SD_D6 / MS_D7
SD_D7 / MS_D6
SD_D0 / MS_D4
SD_D1 / MS_D5
VDD33
VDD33
USB+
USB2641
(Top View QFN-48)
USB-
XTAL2
XTAL1 (CLKIN)
PLLFILT
RBIAS
CRFILT
Ground Pad
(must be connected to VSS)
SD_nCD
VDD33
SD_WP / MS_SCLK
Indicates pins on the bottom of the device.
DS00001947C-page 10
2015-2021 Microchip Technology Inc.
USB2640/USB2641
5.0
5.1
PIN TABLES
48-Pin Tables
TABLE 5-1:
USB2640 48-PIN TABLE
xD (Only in USB2640) / SECURE DIGITAL / MEMORY STICK INTERFACE (18 PINS)
xD_D3 /
SD_D1 /
MS_D5
xD_D2 /
SD_D0 /
MS_D4
xD_D1 /
SD_D7 /
MS_D6
xD_D0 /
SD_D6 /
MS_D7
xD_nWP /
SD_CLK /
MS_BS
xD_ALE /
SD_D5 /
MS_D1
xD_CLE /
SD_CMD /
MS_D0
xD_D7 /
SD_D4 /
MS_D2
xD_D6 /
SD_D3 /
MS_D3
xD_D5 /
SD_D2
xD_nRE
xD_nCE
xD_nWE
MS_INS
xD_D4 /
SD_WP /
MS_SCLK
xD_nB/R
SD_nCD
xD_nCD
USB INTERFACE (5 PINS)
USB+
USB-
XTAL1 (CLKIN)
XTAL2
RBIAS
2-PORT USB INTERFACE (7 PINS)
USBDN_DP2
USBDN_DP3
USBDN_DM2
USBDN_DM3
PRTCTL2
PRTCTL3
VBUS_DET
SPI INTERFACE (4 PINS)
SPI_DO /
SDA /
SPI_SPD_SEL
SPI_CLK /
SCL
SPI_CE_n
SPI_DI
NC
MISC (4 PINS)
LED /
TXD
nRESET
TEST
CRD_PWR
POWER AND GROUND (10 PINS)
CRFILT PLLFILT
(7) VDD33
TOTAL 48
2015-2021 Microchip Technology Inc.
DS00001947C-page 11
USB2640/USB2641
TABLE 5-2:
USB2641 48-PIN TABLE
SECURE DIGITAL / MEMORY STICK INTERFACE (13 PINS)
SD_D1 /
MS_D5
SD_D0 /
MS_D4
SD_D7 /
MS_D6
SD_D6 /
MS_D7
SD_CLK /
MS_BS
SD_D5 /
MS_D1
SD_CMD /
MS_D0
SD_D4 /
MS_D2
SD_D3 /
MS_D3
SD_D2
MS_INS
NC
SD_WP /
MS_SCLK
SD_nCD
USB INTERFACE (4 PINS)
USB+
USB-
XTAL1 (CLKIN)
XTAL2
RBIAS
2-PORT USB INTERFACE (7 PINS)
USBDN_DP2
USBDN_DP3
USBDN_DM2
USBDN_DM3
PRTCTL2
PRTCTL3
VBUS_DET
SPI INTERFACE (4 PINS)
SPI_DO /
SDA /
SPI_SPD_SEL
SPI_CLK /
SCL
SPI_CE_n
SPI_DI
NC
MISC (5 PINS)
LED /
TXD
nRESET
TEST
(CRD_PWR)
POWER AND GROUND (15 PINS)
CRFILT PLLFILT
(7) VDD33
(6) NC
PLLFILT
TOTAL 48
DS00001947C-page 12
2015-2021 Microchip Technology Inc.
USB2640/USB2641
6.0
PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface. The pin descriptions below are applied when using the internal default firmware and can be
referenced in Section 7.0, "Configuration Options," on page 23. Please reference Section 2.0, "Acronyms" for a list of
the acronyms used.
The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. When “n” is not present in the signal name, the signal is asserted at a high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inac-
tive.
6.1
USB2640/USB2641 Pin Descriptions
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS
48-Pin Buffer Type
Description
QFN
(Table 6-2)
xD-PICTURE CARD INTERFACE (APPLIES ONLY TO USB2640)
xD_D[7:0]
30
32
33
13
17
18
19
20
I/O12PU
xD-Picture Card Data 7-0
These pins are the bi-directional data signal xD_D7 - xD_D0 and have
weak internal pull-up resistors.
xD_ALE
xD_nB/R
23
O12PD
IPU
xD-Picture Card Address Strobe
This pin is an active high Address Latch Enable signal for the xD-
Picture Card device. This pin has a weak pull-down resistor that is
permanently enabled.
28
xD Busy or Data Ready
This pin is connected to the BSY/RDY pin of the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nCE
26
O12PU
xD Chip Enable
This pin is an active low chip enable signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_CLE
xD_nCD
24
29
O12PD
I/O12
xD-Picture Card Command Strobe
This pin is an active high Command Latch Enable signal for the xD-
Picture Card device. This pin has a weak pull-down resistor that is
permanently enabled.
xD Card Detection
Designates as the xD-Picture Card detection pin.
2015-2021 Microchip Technology Inc.
DS00001947C-page 13
USB2640/USB2641
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
48-Pin Buffer Type
Description
QFN
(Table 6-2)
xD_nRE
27
O12PU
xD Read Enable
This pin is an active low read strobe signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nWE
22
O12PU
xD Write Enable
This pin is an active low write strobe signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nWP
21
21
O12PD
O12
xD-Picture Card Write Protect
This pin is an active low write protect signal for the xD-Picture Card
device. This pin has a weak pull-down resistor that is permanently
enabled.
MEMORY STICK INTERFACE
MS_BS
MS_INS
Memory Stick Bus State
This pin is connected to the bus state pin of the MS device. It is used
to control the Bus States 0, 1, 2, and 3 (BS0, BS1, and BS3) of the MS
device.
31
13
I/O12
IPU
Memory Stick Card Insertion
Designates as the Memory Stick card detection pin and has an internal
weak pull-up resistor.
MS_SCLK
MS_D[7:0]
O12
Memory Stick System Clock
This pin is an output clock signal to the MS device.
Memory Stick System Data In/Out
20
19
17
18
32
30
23
24
I/O12PD
These pins are the bi-directional data signals for the MS device. In
serial mode, the most significant bit (MSB) of each byte is transmitted
first by either MSC or MS device on MS_D0.
MS_D0, MS_D2, and MS_D3 have weak pull-down resistors. MS_D1
has a pull down resistor if in parallel mode, otherwise it is disabled. In
4- or 8-bit parallel modes, all MS_D7 - MS_D0 signals have weak pull-
down resistors.
SECURE DIGITAL / MULTIMEDIACARD INTERFACE
SD_D[7:0]
19
20
23
30
32
33
17
18
I/O12PU
Secure Digital Data 7-0
These are the bi-directional data signals SD_D0-SD_D7 and have
weak pull-up resistors.
DS00001947C-page 14
2015-2021 Microchip Technology Inc.
USB2640/USB2641
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
48-Pin Buffer Type
Description
QFN
(Table 6-2)
SD_CLK
21
O12
Secure Digital Clock
This is an output clock signal to the SD/MMC device.
Secure Digital Command
SD_CMD
SD_WP
SD_nCD
24
13
14
I/O12PU
I/O12
This is a bi-directional signal that connects to the CMD signal of the
SD/MMC device and has an internal weak pull-up resistor.
Secure Digital Write Protected
Designates as the Secure Digital card mechanical write protect detect
pin.
I/O12
Secure Digital Card Detect
Designates as the Secure Digital card detection pin.
USB INTERFACE
USB-
43
42
I/O-U
I/O-U
USB Bus Data
USB+
These pins connect to the upstream USB bus data signals. USB+ and
USB- can be swapped using the PortSwap feature (See Section
7.3.5.20, "F1h: Port Swap," on page 38).
USBDN_DM
[3:2]
USBDN_DP
[3:2]
3
1
4
2
USB Bus Data
These pins connect to the downstream USB bus data signals and can
be swapped using the PortSwap feature (See Section 7.3.5.20, "F1h:
Port Swap," on page 38).
PRTCTL[3:2]
7
6
I/OD12PU USB Power Enable
As an output, these pins enable power to downstream USB peripheral
devices and have weak internal pull-up resistors. See Section 6.3,
"Port Power Control" for diagram and usage instructions.
As an input, when the power is enabled, these pins monitor the over-
current condition. When an over-current condition is detected, the pins
turn the power off.
VBUS_DET
39
I
Detect Upstream VBUS Power
Detects the state of upstream VBUS power. The Hub monitors
VBUS_DET to determine when to assert the internal D+ pull-up resistor
(signaling a connect event).
When designing a detachable hub, connect this pin to the VBUS power
pin of the USB port that is upstream of the Hub.
For self-powered applications with a permanently attached host, this
pin should be pulled up, typically to VDD33.
VBUS is a 3.3 volt input. A resistor divider must be used if connecting
to 5 volts of USB power.
RBIAS
47
45
I-R
USB Transceiver Bias
A 12.0 k 1.0% resistor is attached from VSS to this pin in order to
set the transceiver's internal bias currents.
XTAL1 (CLKIN)
ICLKx
24 MHz Crystal Input or External clock Input
This pin can be connected to one terminal of the crystal or it can be
connected to an external 24 MHz 1.8 V clock when a crystal is not
used.
2015-2021 Microchip Technology Inc.
DS00001947C-page 15
USB2640/USB2641
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
48-Pin Buffer Type
Description
QFN
(Table 6-2)
XTAL2
44
OCLKx
24 MHz Crystal Output
This is the other terminal of the crystal, or it is left open when an
external clock source is used to drive XTAL1(CLKIN).
SPI INTERFACE
SPI_CE_n
SPI_CLK /
8
9
O12
SPI Chip Enable
This is the active low chip enable output.
When the SPI interface is enabled, drive this pin high in power down
states.
I/O12
SPI Clock
This is the SPI clock out to the serial ROM. See Section 6.4, "ROM
BOOT Sequence" for diagram and usage instructions. During reset,
drive this pin low.
When configured, this is the I2C EEPROM clock pin.
SCL
SPI_DO /
10
I/O12
SPI Data Out
This is the data out for the SPI port. See Section 6.4, "ROM BOOT
Sequence" for diagram and usage instructions.
SDA /
This pin is the data pin when the device is connected to the optional
I2C EEPROM.
SPI_SPD_SEL
This pin is used to select the speed of the SPI interface. During
nRESET assertion, this pin will be tri-stated with the weak pull-down
resistor enabled. When nRESET is negated, the value on the pin will
be internally latched, and the pin will revert to SPI_DO functionality, the
internal pull-down will be disabled.
‘0’ = 30 MHz (No external resistor should be applied)
‘1’ = 60 MHz (A 10 K external pull-up resistor must be applied)
If the latched value is '1', then the pin is tri-stated when the chip is in
the suspend state.
If the latched value is '0', then the pin is driven low during a suspend
state.
SPI_DI
LED
11
37
I/O12PD
SPI Data In
This is the data in to the controller from the ROM. This pin has a weak
internal pull-down applied at all times to prevent floating.
MISC
I/O12
It can be used as media activities LED output.
NC
36
35
CRD_PWR
I/O200
Card power drive: 3.3 V (100 mA or 200 mA)
This pin powers the multiplexed flash media interface (slot) for xD, MS,
and SD/MMC. If card power is not being used to power the multiplexed
flash media interface, this pin may be used as a GPIO.
It is a requirement for this to be the only FET used to power xD-Picture
Card devices. Failure to do this will violate xD voltage specification on
xD-Picture Card device pins.
Bits 0, 1, 2, and 3 control FET 2 of Register A5h. Please reference
Section 7.3.4.5, "A8h: LED Blink Interval (1 byte)," on page 30.
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2015-2021 Microchip Technology Inc.
USB2640/USB2641
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
48-Pin Buffer Type
Description
QFN
(Table 6-2)
nRESET
38
IS
RESET Input
The system uses this active low signal to reset the chip. The active low
pulse should be at least 1 s wide.
TEST
NC
40
I
TEST Input
Tie this pin to ground for normal operation.
No Connects
22
26
27
28
No connect pins only apply to the USB2641. No trace or signal should
be routed or attached to these pins.
DIGITAL / POWER / GROUND
CRFILT
VDD33
15
VDD Core Regulator Filter Capacitor
This pin must have a 1.0 F (or greater) 20% (ESR <0.1 ) capacitor
to VSS.
5
3.3 V Power and Voltage Regulator Inputs
12
16
25
34
41
48
Please refer to Section 9.0, "DC Parameters," on page 47 for more
information.
Pins 16 and 48 each require an external bypass capacitor of 4.7 F
minimum.
PLLFILT
VSS
46
PLL Regulator Filter Capacitor
This pin must have a 1.0 F (or greater) 20% (ESR <0.1 ) capacitor
to VSS.
ePad
The ground pad / ePad is the only VSS for the device and must be tied
to ground with multiple vias.
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DS00001947C-page 17
USB2640/USB2641
6.2
Buffer Type Descriptions
TABLE 6-2:
Buffer
USB2640/USB2641 BUFFER TYPE DESCRIPTIONS
Description
I
Input.
IPU
IS
Input, weak internal pull-up.
Input with Schmitt trigger.
I/O12
I/O200
Input/output buffer with 12 mA sink and 12 mA source.
Input/output buffer 12 mA with FET disabled, 100/200 mA source only when the FET is
enabled.
I/O12PD
Input/output buffer with 12 mA sink and 12 mA source, with an internal weak pull-down
resistor.
I/O12PU
I/OD12PU
O12
Open drain, 12 mA sink with pull-up. Input with Schmitt trigger.
Input/open drain output buffer with a 12 mA sink.
Output buffer with a 12 mA sink and a 12 mA source.
Output buffer with 12 mA sink and 12 mA source, with a pull-down resistor.
Output buffer with 12 mA sink and 12 mA source, with a pull-up resistor.
XTAL clock input.
O12PD
O12PU
ICLKx
OCLKx
I/O-U
XTAL clock output.
Analog input/output as defined in the USB 2.0 Specification.
RBIAS.
I-R
6.3
Port Power Control
6.3.1
PORT POWER CONTROL USING USB POWER SWITCH
The USB2640/USB2641 has a single port power control and over-current sense signal for each downstream port. When
disabling port power, the driver will actively drive a '0'. To avoid unnecessary power dissipation, the internal pull-up resis-
tor will be disabled at that time. When port power is enabled, the output driver is disabled, and the pull-up resistor is
enabled creating an open drain output. If there is an over-current situation, the USB Power Switch will assert the open
drain OCS signal. The Schmitt trigger input will detect this event as a low. The open drain output does not interfere. The
internal over-current sense filter handles the transient conditions, such as low voltage, while the device is powering up.
DS00001947C-page 18
2015-2021 Microchip Technology Inc.
USB2640/USB2641
FIGURE 6-1:
PORT POWER CONTROL WITH USB POWER SWITCH
5V
PRTCTL3
OCS
USB Power
Switch
EN
USB2640/
USB2641
USB
Device
5V
PRTCTL2
OCS
USB Power
Switch
EN
USB
Device
6.3.2
PORT POWER CONTROL USING A POLY FUSE
When using the USB2640/USB2641 with a poly fuse, an external diode must be used (See Figure 6-2). When disabling
port power, the USB2640/USB2641 will drive a '0'. This procedure will have no effect since the external diode will isolate
the pin from the load. When port power is enabled, the USB2640/USB2641 output driver is disabled, and the pull-up
resistor is enabled which creates an open drain output. The open drain output condition means that the pull-up resistor
is providing 3.3 volts to the anode of the diode. If there is an over-current situation, the poly fuse will open causing the
cathode of the diode to go to 0 volts. The anode of the diode will be at 0.7 volt, and the Schmitt trigger input will register
this as a low resulting in an over-current detection. The open drain output does not interfere.
2015-2021 Microchip Technology Inc.
DS00001947C-page 19
USB2640/USB2641
FIGURE 6-2:
PORT POWER CONTROL WITH SINGLE POLY FUSE AND MULTIPLE LOADS
5V
PRTCTL3
USB
Device
USB2640/
USB2641
5V
PRTCTL2
USB
Device
When using a single poly fuse to power all devices, note that for the ganged situation, all power control pins must be
tied together.
FIGURE 6-3:
PORT POWER WITH GANGED CONTROL WITH POLY FUSE
5V
PRTCTL3
Poly Fuse
USB2640/
USB2641
PRTCTL2
USB
Device
USB
Device
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2015-2021 Microchip Technology Inc.
USB2640/USB2641
6.4
ROM BOOT Sequence
After power-on reset, the internal firmware checks for an external SPI flash device that contains a valid signature of
"2DFU" (device firmware upgrade) beginning at address 0xFFFA. If a valid signature is found, then the external ROM
is enabled and code execution begins at address 0x0000 in the external SPI device. Otherwise, code execution contin-
ues from the internal ROM.
If there is no SPI ROM detected, the internal firmware then checks for the presence of an I2C ROM. The firmware looks
for the signature ‘ATA2’ at the offset of 0xFC-0xFF in the I2C ROM. The firmware reads in the I2C ROM to configure the
hardware and software internally. Please refer to section Section 7.3.2, "EEPROM Data Descriptor," on page 24 for the
details of the configuration options.
The SPI ROM required for the USB2640/USB2641 must be 1 Mbit and support either 30 MHz or 60 MHz. The frequency
used is set using the SPI_SPD_SEL. For 30 MHz operation, this pin must be pulled to ground through a 100 k resistor.
For 60 MHz operation, this pin must pulled up through a 100 k resistor. SPI_SPD_SEL: This pin is used to choose the
speed of the SPI interface. During nRESET assertion, this pin will be tri-stated with the weak pull-down resistor enabled.
When nRESET is negated, the value on the pin will be internally latched, and the pin will revert to SPI_DO functionality,
the internal pull-down will be disabled.
The firmware can determine the speed of operation on the SPI port by checking the SPI_SPEED in the SPI_CTL register
(0x2400 - RESET = 0x02). Both 1- and 2-bit SPI operation is supported. For optimum throughput, a 2-bit SPI ROM is
recommended. Both mode 0 and mode 3 SPI ROMS are also supported.
FIGURE 6-4:
USB2640/USB2641 SPI ROM CONNECTION
SPI_CE_N
CE#
CLK
SPI_CLK / SCL
USB2640/
USB2641
SPI ROM
SPI_DO / SDA / SPI_SPD_SEL
SI
SPI_DI
SO
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DS00001947C-page 21
USB2640/USB2641
2
FIGURE 6-5:
USB2640/USB2641 I C CONNECTION
3.3V
10K
SCL
3.3V
USB2640/
USB2641
I2C ROM
10K
SDA
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USB2640/USB2641
7.0
7.1
CONFIGURATION OPTIONS
Hub
Microchip’s USB 2.0 hub is fully compliant to the Universal Serial Bus Specification available from the USB Imple-
menter’s Forum found at http://www.usb.org (Revision 2.0 April 27, 2000 and the 12/7/2000 and 5/28/2002 Errata).
Please reference Chapter 11 (Hub Specification) for general details regarding hub operation and functionality.
The hub provides 1 transaction translator (TT) that is shared by both downstream ports (defined as a single-TT config-
uration). The TT contains 4 non-periodic buffers.
7.1.1
HUB CONFIGURATION OPTIONS
The Microchip hub supports a large number of features (some are mutually exclusive), and must be configured in order
to correctly function when attached to a USB host controller. There are two principal ways to configure the hub:
• via the internal default settings or
• by settings stored in an external EEPROM or SPI Flash device.
7.1.1.1
Power Switching Polarity
The hub only supports active high port power controllers.
7.1.2
VBUS DETECT
According to Section 7.2.1 of the USB 2.0 Specification, a downstream port cannot provide power to its D+ or D- pull-
up resistors unless the upstream port’s VBUS is in the asserted (powered) state. The VBUS_DET pin on the hub mon-
itors the state of the upstream VBUS signal and will not pull-up the D+ resistor if VBUS is not active. If VBUS goes from
an active to an inactive state (not powered), the hub will remove power from the D+ pull-up resistor within 10 seconds.
7.2
Card Reader
The Microchip USB2640/USB2641 is fully compliant with the following flash media card reader specifications:
• Secure Digital 2.0 / MultiMediaCard 4.2
- SD 2.0, HS-SD, HC-SD
- TransFlash™ and reduced form factor media
- 1/4/8 bit MMC 4.2
• Memory Stick 1.43
• Memory Stick Pro Format 1.02
• Memory Stick Pro-HG Duo Format 1.01
- Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro
• Memory Stick Duo 1.10
• xD-Picture Card 1.2 compliant
7.3
System Configurations
7.3.1
EEPROM/SPI INTERFACE
The USB2640/USB2641 can be configured via a 2-wire (I2C) EEPROM (256x8 or a recommended 512x8 for internal
ROM support) or an external SPI ROM flash device containing the firmware for the USB2640/USB2641. If an external
configuration device does not exist, the internal default values will be used. If one of the external devices is used for
configuration, the OEM can update the values through the USB interface. The hub will then “attach” to the upstream
USB host.
When using an external SPI Flash, the register addresses in the following three tables (Table 7-1, Table 7-2, Table 7-3)
refer to offsets from the starting location ‘FE80h’.
The USBDM tool set is available in the USB264x Hub Card reader combo software release package. To download the
software package from Microchip’s website, please visit:
http://www.microchip.com/SWLibraryWeb/producttc.aspx?product=USBDM%20Tool
2015-2021 Microchip Technology Inc.
DS00001947C-page 23
USB2640/USB2641
to go to the OBJ Hub Card Reader Software Download Agreement. Review the license, and if you agree, check the “I
agree” box and then select “Confirm”. You will then be able to download the USB264x Hub Card reader combo release
package zip file containing the USBDM tool set.
Please note that the following applies to the system values and descriptions when used:
• N/A = Not applicable to this part
• Reserved = For internal use
7.3.2
EEPROM DATA DESCRIPTOR
INTERNAL FLASH MEDIA CONTROLLER CONFIGURATIONS
TABLE 7-1:
Address
00h
Register Name
Description
Default Value
USB_SER_LEN
USB Serial String
Descriptor Length
1Ah
01h
USB_SER_TYP
USB Serial String
Descriptor Type
03h
02h-19h
1Ah-1Bh
1Ch-1Dh
1Eh
USB_SER_NUM
USB_VID
USB Serial Number
USB Vendor Identifier
USB Product Identifier
"000000264001" (See Note 7-1)
0424
4050
04h
USB_PID
USB_LANG_LEN
USB Language String
Descriptor Length
1Fh
20h
21h
22h
23h
USB_LANG_TYP
USB_LANG_ID_LSB
USB_LANG_ID_MSB
USB Language String
Descriptor Type
03h
USB Language Identifier
Least Significant Byte
09h
(See Note 7-3)
USB Language Identifier
Most Significant Byte
04h
(See Note 7-3)
USB_MFR_STR_LEN USB Manufacturer String Descriptor
Length
10h
03h
USB_MFR_STR_TYP USB Manufacturer String Descriptor
Type
24h-31h
32h-5Dh
5Eh
USB_MFR_STR
Reserved
USB Manufacturer String
-
“Generic” (See Note 7-1)
00h
30h
USB_PRD_STR_LEN
USB Product String
Descriptor Length
5Fh
USB_PRD_STR_TYP
USB_PRD_STR
USB Product String
Descriptor Type
03h
60h-99h
USB Product String
"Ultra Fast Media Reader"
(See Note 7-1)
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
USB_BM_ATT
USB_MAX_PWR
ATT_LB
USB BmAttribute
USB Max Power
Attribute Lo byte
Attribute Hi Lo byte
Attribute Lo Hi byte
Attribute Hi byte
80h
30h (96 mA)
40h (Reverse SD_WP only)
ATT_HLB
00h
00h
00h
08h
ATT_LHB
ATT_HB
MS_PWR_LB
Memory Stick Device
Power Lo byte
A1h
MS_PWR_HB
Memory Stick Device
Power Hi byte
00h
A2h
A3h
A4h
Not Applicable
Not Applicable
SM_PWR_LB
-
-
80h
00h
Smart Media Device
Power Lo byte
00h
(See Note 7-2)
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USB2640/USB2641
TABLE 7-1:
Address
A5h
INTERNAL FLASH MEDIA CONTROLLER CONFIGURATIONS (CONTINUED)
Register Name
Description
Default Value
SM_PWR_HB
Smart Media Device
Power Hi byte
08h
(See Note 7-2)
A6h
A7h
SD_PWR_LB
SD_PWR_HB
Secure Digital Device
Power Lo byte
00h
Secure Digital Device
Power Hi byte
80h
A8h
LED_BLK_INT
LED_BLK_DUR
DEV0_ID_STR
DEV1_ID_STR
DEV2_ID_STR
DEV3_ID_STR
INQ_VEN_STR
INQ_PRD_STR
DYN_NUM_LUN
LUN_DEV_MAP
Reserved
LED Blink Interval
LED Blink After Access
Device 0 Identifier String
Device 1 Identifier String
Device 2 Identifier String
Device 3 Identifier String
Inquiry Vendor String
Inquiry Product String
Dynamic Number of LUNs
Device to LUN Mapping
-
02h
28h
A9h
AAh - B0h
B1h - B7h
B8h - BEh
BFh - C5h
C6h - CDh
CEh - D2h
D3h
“COMBO”
N/A
N/A
N/A
“Generic”
2640
FFh
D4h - D7h
D8h - DAh
DBh - DDh
FFh, FFh, FFh, FFh
00h, 04h, 09h
5Ch, 59h, 9Ah
Reserved
-
TABLE 7-2:
Address
HUB CONTROLLER CONFIGURATIONS
Register Name
Description
Default Value
DEh
DFh
E0h
E1h
E2h
E3h
E4h
E5h
E6h
E7h
E8h
E9h
EAh
EBh
ECh
EDh
EEh
EFh
F0h
F1h
F2h
F3h
VID_LSB
VID_MSB
Vendor ID Least Significant Byte
Vendor ID Most Significant Byte
Product ID Least Significant Byte
Product ID Most Significant Byte
Device ID Least Significant Byte
Device ID Most Significant Byte
Configuration Data Byte 1
Configuration Data Byte 2
Configuration Data Byte 3
Non-Removable Devices
Port Disable (Self)
24h
04h
40h
26h
00h
00h
8Bh
28h
00h
02h
00h
00h
01h
32h
01h
32h
32h
00h
00h
00h
00h
00h
PID_LSB
PID_MSB
DID_LSB
DID_MSB
CFG_DAT_BYT1
CFG_DAT_BYT2
CFG_DAT_BYT3
NR_DEVICE
PORT_DIS_SP
PORT_DIS_BP
MAX_PWR_SP
MAX_PWR_BP
HC_MAX_C_SP
HC_MAX_C_BP
PWR_ON_TIME
BOOST_UP
BOOST_3:0
PRT_SWP
Port Disable (Bus)
Max Power (Self)
Max Power (Bus)
Hub Controller Max Current (Self)
Hub Controller Max Current (Bus)
Power-on Time
Boost_Up
Boost_3:0
Port Swap
PRTM12
Port Map 12
PRTM3
Port Map 3
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DS00001947C-page 25
USB2640/USB2641
TABLE 7-3:
Address
OTHER INTERNAL CONFIGURATIONS
Register Name
Description
Default Value
F4h
F5h
Reserved
Reserved
-
-
-
00h
66h
F6-FBh
FCh-FFh
Reserved
00h
NVSTORE_SIG
Non-volatile storage signature
(“ATA2”)
“ATA2”
Note 7-1
This value is a UNICODE UTF-16LE encoded string value that meets the USB 2.0 Specification
(Revision 2.0, 2000). Values in double quotations without this note are ASCII values.
Note 7-2
Note 7-3
A value of “SM” will be overridden with “xD” once an xD-Picture Card has been identified.
For a list of the most current 16-bit language ID’s defined by the USB-IF, please visit
http://www.unicode.org or consult The Unicode Standard, Worldwide Character Encoding, (Version
4.0), The Unicode Consortium, Addison-Wesley Publishing Company, Reading, Massachusetts.
7.3.3
EEPROM DATA DESCRIPTOR REGISTER DESCRIPTIONS
00h: USB Serial String Descriptor Length
7.3.3.1
Byte
Name
Description
0
USB_SER_LEN
USB serial string descriptor length as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bLength” which
describes the size of the string descriptor (in bytes).
7.3.3.2
01h: USB Serial String Descriptor Type
Byte
Name
Description
1
USB_SER_TYP
USB serial string descriptor type as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bDescriptorType”
which is a constant value associated with a string descriptor type.
7.3.3.3
02h-19h: USB Serial Number Option
Byte
25:2
Name
Description
Maximum string length is 12 hex digits. Must be unique to each device.
USB_SER_NUM
7.3.3.4
1Ah-1Bh: USB Vendor Identifier Option
Byte
Name
Description
1:0
USB_VID
This ID is unique for every vendor. The vendor ID is assigned by the USB
Implementer’s Forum.
7.3.3.5
1Ch-1Dh: USB Product Identifier Option
Byte
Name
Description
1:0
USB_PID
This ID is unique for every product. The product ID is assigned by the vendor.
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USB2640/USB2641
7.3.3.6
Byte
1Eh: USB Language String Descriptor Length
Name
Description
0
USB_LANG_LEN
USB serial string descriptor length as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bLength” which
describes the size of the string descriptor (in bytes).
7.3.3.7
1Fh: USB Language String Descriptor Type
Byte
Name
Description
1
USB_LANG_TYP
USB serial string descriptor type as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bDescriptorType”
which is a constant value associated with a string descriptor type.
7.3.3.8
20h: USB Language Identifier Least Significant Byte
Byte
Name
Description
2
USB_LANG_ID
_LSB
English Language Code = ‘0409’. See Note 7-3 to reference additional
language ID’s defined by the USB-IF.
7.3.3.9
21h: USB Language Identifier Most Significant Byte
Byte
Name
Description
3
USB_LANG_ID
_MSB
English Language Code = ‘0409’. See Note 7-3 to reference additional
language ID’s defined by the USB-IF.
7.3.3.10
22h: USB Manufacturer String Descriptor Length
Byte
Name
Description
0
USB_MFR_STR
_LEN
USB serial string descriptor length as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bLength” which
describes the size of the string descriptor (in bytes).
7.3.3.11
23h: USB Manufacturer String Descriptor Type
Byte
Name
Description
1
USB_MFR_STR
_TYP
USB serial string descriptor type as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bDescriptorType”
which is a constant value associated with a string descriptor type.
7.3.3.12
24h-31h: USB Manufacturer String
Byte
Name
Description
15:2
USB_MFR_STR
Maximum string length is 28 characters. (See Note 7-4)
7.3.3.13
32h-5Dh: Reserved
Byte
Name
Description
59:16
Reserved
Reserved.
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DS00001947C-page 27
USB2640/USB2641
7.3.3.14
5Eh: USB Product String Descriptor Length
Byte
Name
Description
0
USB_PRD_STR
USB serial string descriptor length as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bLength” which
describes the size of the string descriptor (in bytes).
7.3.3.15
5Fh: USB Product String Descriptor Type
Byte
Name
Description
1
USB_PRD_STR
USB serial string descriptor type as defined by Section 9.6.7 “String” of the
USB 2.0 Specification (Revision 2.0, 2000). This field is the “bDescriptorType”
which is a constant value associated with a string descriptor type.
7.3.3.16
60h-99h: USB Product String
Byte
Name
Description
59:2
USB_PRD_STR
This string will be used during the USB enumeration process in the Windows
operating system. Maximum string length is 28 characters. (See Note 7-4)
Note 7-4
While the full strings are reported during USB enumeration, Windows XP/Vista reads concatenated
version of the strings from the standard SCSI inquiry response when storing the values for display in
the Windows registry and device manager.
7.3.3.17
9Ah: USB BmAttribute (1 byte)
Byte
Name
Description
7:0
USB_BM_ATT
Self- or Bus-Power: Selects between self- and bus-powered operation.
The hub is either self-powered (draws less than 2 mA of upstream bus power)
or bus-powered (limited to a 100 mA maximum of upstream power prior to
being configured by the host controller).
When configured as a bus-powered device, the Microchip hub consumes less
than 100 mA of current prior to being configured. After configuration, the bus-
powered Microchip hub (along with all associated hub circuitry, any embedded
devices if part of a Compound Device, and 100 mA per externally available
downstream port) must consume no more than 500 mA of upstream VBUS
current. The current consumption is system dependent, and the OEM must
ensure that the USB 2.0 Specification is not violated.
When configured as a self-powered device, <1 mA of upstream VBUS current
is consumed and all ports are available, with each port being capable of
sourcing 500 mA of current.
80 = Bus-powered operation (default)
C0 = Self-powered operation
A0 = Bus-powered operation with remote wake-up
E0 = Self-powered operation with remote wake-up
7.3.3.18
9Bh: USB MaxPower (1 byte)
Byte
Name
Description
7:0
USB_MAX_PWR
USB Max Power per the USB 2.0 Specification. Do NOT set this value greater
than 100 mA.
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USB2640/USB2641
7.3.3.19
9Ch-9Fh: Attribute Byte Descriptions
Byte
Byte Name
Bit
Description
0
ATT_LB
3:0
4
Always reads ‘0’.
Inquire Manufacturer and Product ID Strings
‘1’ - Use the Inquiry Manufacturer and Product ID Strings.
‘0’ (default) - Use the USB Descriptor Manufacturer and Product ID Strings.
Always reads ‘0’.
5
6
Reverse SD Card Write Protect Sense
‘1’ (default) - SD cards will be write protected when SW_nWP is high, and
writable when SW_nWP is low.
‘0’ - SD cards will be write protected when SW_nWP is low, and writable
when SW_nWP is high.
7
3:0
4
Reserved
1
ATT_HLB
Always reads ‘0’.
Activity LED True polarity
‘1’ - Activity LED to Low True.
‘0’ (default) - Activity LED polarity to High True.
Common Media Insert / Media Activity LED
5
‘1’ - The activity LED will function as a common media inserted/media access
LED.
‘0’ (default) - The activity LED will remain in its idle state until media is
accessed.
7:6
0
Always reads ‘0’.
2
ATT_LHB
Attach on Card Insert / Detach on Card Removal
‘1’ - Attach on Insert is enabled.
‘0’ (default) - Attach on Insert is disabled.
Always reads ‘0’.
1
2
Enable Device Power Configuration
‘1’ - Custom Device Power Configuration stored in the NVSTORE is used.
‘0’ (default) - Default Device Power Configuration is used.
7:3
6:0
7
Always reads ‘0’.
Always reads ‘0’.
xD Player Mode
3
ATT_HB
7.3.4
A0H-A7H: DEVICE POWER CONFIGURATION
The USB4640/USB4640i has one internal FET which can be utilized for card power. This section describes the internal
default configuration. The settings are stored in NVSTORE and provide the following features:
1. A card can be powered by an external FET or by an internal FET.
2. The power limit can be set to 100 mA or 200 mA (Default) for the internal FET.
Each media uses two bytes to store its device power configuration. Bit 3 selects between internal or external card power
FET options. For internal FET card power control, bits 0 through 2 are used to set the power limit. The “Device Power
Configuration” bits are ignored unless the “Enable Device Power Configuration” bit is set. See Section 7.3.3.19, "9Ch-
9Fh: Attribute Byte Descriptions," on page 29.
2015-2021 Microchip Technology Inc.
DS00001947C-page 29
USB2640/USB2641
7.3.4.1
A0h-A1h: Memory Stick Device Power
FET
Type
Bits
Bit Type
Description
0
1
FET Lo Byte
MS_PWR_LB
3:0
7:4
Low Nibble
High Nibble
0000b Disabled
0000b Disabled
2
FET Hi Byte
MS_PWR_HB
3:0
Low Nibble
0001b External FET enabled
1000b Internal FET with 100 mA power limit
1010b Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
7.3.4.2
A2h-A3h: Not Applicable
Byte
1:0
Name
Description
Not Applicable
Not applicable to USB2640/USB2641.
7.3.4.3
A4h-A5h: Smart Media Device Power
FET
Type
Bits
Bit Type
Description
0
1
2
FET Lo Byte
SM_PWR_LB
3:0
7:4
3:0
Low Nibble
High Nibble
Low Nibble
0000b Disabled
0000b Disabled
FET Hi Byte
SM_PWR_HB
0001b External FET enabled
1000b Internal FET with 100 mA power limit
1010b Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
7.3.4.4
A6h-A7h: Secure Digital/MultiMediaCard Device Power
FET
Type
Bits
Bit Type
Description
0
1
2
FET Lo Byte
SD_PWR_LB
3:0
7:4
3:0
Low Nibble
High Nibble
Low Nibble
0000b Disabled
0000b Disabled
FET Hi Byte
SD_PWR_HB
0001b External FET enabled
1000b Internal FET with 100 mA power limit
1010b Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
7.3.4.5
A8h: LED Blink Interval (1 byte)
Byte
Name
Description
0
LED_BLK_INT
The blink rate is programmable in 50 ms intervals. Bit 7 indicates an idle state:
‘0’ - Off
’1’ - On
Bits 0-6 are used to determine the blink interval up to a max of 128 x 50 ms.
DS00001947C-page 30
2015-2021 Microchip Technology Inc.
USB2640/USB2641
7.3.4.6
Byte
A9h: LED Blink Duration (1 byte)
Name
Description
1
LED_BLK_DUR
LED blink After Access. This byte is used to designate the number of seconds
that the LED will continue to blink after a drive access. Setting this byte to "05"
will cause the LED to blink for 5 seconds after a drive access.
7.3.4.7
AAh-B0h: Device 0 Identifier String
Byte
6:0
Name
String
Description
DEV0_ID_STR
“COMBO”
MS, SM, and SD/MMC are mapped to device 0
identifier string because USB2640/USB2641 only
supports one LUN. When applicable, the "SM" value
will be overridden with xD once an xD-Picture Card
has been identified.
7.3.4.8
B1h-C5h: Not Applicable
Byte
Name
Description
20:0
Not Applicable
Not applicable to USB2640/USB2641.
7.3.4.9
C6h-CDh: Inquiry Vendor String
Byte
Name
String
“Generic”
Description
7:0
INQ_VEN_STR
If bit 4 of the 1st attribute byte is set, the device will
use these strings in response to a USB inquiry
command, instead of the USB Descriptor
Manufacturer and Product ID Strings.
7.3.4.10
CEh-D2h: Inquiry Product String
Byte
Name
Unit
2640
Description
4:0
INQ_PRD_STR
If bit 4 of the 1st attribute byte is set, the device will
use these strings in response to a USB inquiry
command, instead of the USB Descriptor Manufacturer
and Product ID Strings.
2015-2021 Microchip Technology Inc.
DS00001947C-page 31
USB2640/USB2641
7.3.4.11
D3h: Dynamic Number of LUNs
Bit
Byte Name
UCHAR
FFh
Description
7:0
DYN_NUM_LUN
These bytes are used to specify the number of LUNs
the device exposes to the host. These bytes are also
used for icon sharing by assigning more than one LUN
to a single icon. This is used in applications where the
device utilizes a combo socket and the OEM wishes
to have only a single icon displayed for one or more
interfaces.
USB2640/USB2641 supports one LUN. MS, SM, and
SD/MMC are mapped to that LUN.
If this field is set to "FF", the program assumes that
you are using the default value of "04" and will display
icons for xD, MS, and SD/MMC. If this field is any
other value besides "FF", you must specify the LUN#
assignments in the boxes starting with LUN 00 and
going to (# of Icons to Display -1).
These bytes are reserved for internal use only.
7.3.4.12
D4h-D7h: Device to LUN Mapping
Byte
Name
UCHARS
Description
3:0
DEV_LUN_MAP
FFh, FFh, FFh, FFh These bytes are used to specify the number of LUNs
the device exposes to the host. These bytes are also
used for icon sharing by assigning more than one
LUN to a single icon. This is used in applications
where the device utilizes a combo socket and the
OEM wishes to have only a single icon displayed for
one or more interfaces.
USB2640/USB2641 supports one LUN. MS, SM, and
SD/MMC are mapped to that LUN.
If this field is set to "FF", the program assumes that
you are using the default value of "04" and will display
icons for xD, MS, and SD/MMC. If this field is any
other value besides "FF", you must specify the LUN#
assignments in the boxes starting with LUN 00 and
going to (# of Icons to Display -1).
These bytes are reserved for internal use only.
7.3.4.13
D8h-DDh: Reserved
Bit
Byte Name
Description
5:0
Reserved
For internal use only.
7.3.5
HUB CONTROLLER CONFIGURATIONS
DEh: Vendor ID (LSB)
7.3.5.1
Bit
Byte Name
Description
7:0
VID_LSB
Least Significant Byte of the Vendor ID. This is a 16-bit value that uniquely
identifies the Vendor of the user device (assigned by USB Implementer’s
Forum).
DS00001947C-page 32
2015-2021 Microchip Technology Inc.
USB2640/USB2641
7.3.5.2
DFh: Vendor ID (MSB)
Bit
Byte Name
Description
7:0
VID_MSB
Most Significant Byte of the Vendor ID. This is a 16-bit value that uniquely
identifies the Vendor of the user device (assigned by USB Implementer’s
Forum).
7.3.5.3
E0h: Product ID (LSB)
Bit
Name
Description
7:0
PID_LSB
Least Significant Byte of the Product ID. This is a 16-bit value that the vendor
can assign that uniquely identifies this particular product.
7.3.5.4
E1h: Product ID (MSB)
Bit
Name
Description
7:0
PID_MSB
Most Significant Byte of the Product ID. This is a 16-bit value that the vendor
can assign that uniquely identifies this particular product.
7.3.5.5
E2h: Device ID (LSB)
Bit
Name
Description
7:0
DID_LSB
Least Significant Byte of the Device ID. This is a 16-bit device release number
in BCD (binary coded decimal) format.
7.3.5.6
E3h: Device ID (MSB)
Bit
Name
Description
7:0
DID_MSB
Most Significant Byte of the Device ID. This is a 16-bit device release number
in binary coded decimal (BCD) format.
7.3.5.7
E4h: Configuration Data Byte 1 (CFG_DAT_BYT1)
Bit
Name
Description
7
SELF_BUS_PWR
Self- or Bus-Power: Selects between self- and bus-powered operation.
The hub is either self-powered (draws less than 2 mA of upstream bus power)
or bus-powered (limited to a 100 mA maximum of upstream power prior to
being configured by the host controller).
When configured as a bus-powered device, the Microchip hub consumes less
than 100 mA of current prior to being configured. After configuration, the bus-
powered Microchip hub (along with all associated hub circuitry, any embedded
devices if part of a Compound Device, and 100 mA per externally available
downstream port) must consume no more than 500 mA of upstream VBUS
current. The current consumption is system dependent, and the OEM must
ensure that the USB 2.0 Specification is not violated.
When configured as a self-powered device, <1 mA of upstream VBUS current
is consumed and all ports are available, with each port being capable of
sourcing 500 mA of current.
‘0’ = Bus-powered operation
‘1’ = Self-powered operation
6
Reserved
Always reads ‘0’.
2015-2021 Microchip Technology Inc.
DS00001947C-page 33
USB2640/USB2641
Bit
Name
Description
5
HS_DISABLE
Hi-Speed Disable: Disables the capability to attach as either a Hi-/Full-Speed
device, and forces attachment as Full-Speed only (i.e. no Hi-Speed support).
‘0’ = Hi-/Full-Speed
‘1’ = Full-Speed-Only (Hi-Speed disabled!)
4
3
Reserved
Always reads ‘0’.
EOP_DISABLE
EOP Disable: Disables EOP generation of EOF1 when in Full-Speed mode.
During FS operation only, this permits the hub to send EOP if no downstream
traffic is detected at EOF1. See Section 11.3.1 of the USB 2.0 Specification
for additional details. Note: generation of an EOP at the EOF1 point may
prevent a Host Controller (operating in FS mode) from placing the USB bus
in suspend.
‘0’ = An EOP is generated at the EOF1 point if no traffic is detected.
‘1’ = EOP generation at EOF1 is disabled (Note: This is normal USB
operation).
Note:
This is a rarely used feature in the PC environment, existing drivers
may not have been thoroughly debugged with this feature enabled.
It is included because it is a permitted feature in Chapter 11 of the
USB 2.0 Specification.
2:1
CURRENT_SNS
Over-Current Sense: Selects current sensing on a port-by-port basis, all ports
ganged, or none (only for bus-powered hubs). The ability to support current
sensing on a port or ganged basis is dependent upon the hardware
implementation.
‘00’ = Ganged sensing (all ports together)
‘01’ = Individual port-by-port
‘1x’ = Over-current sensing not supported (must only be used with bus-
powered configurations!)
0
PORT_PWR
Port Power Switching: Enables power switching on all ports simultaneously
(ganged), or port power is individually switched on and off on a port- by-port
basis (individual). The ability to support power enabling on a port or ganged
basis is dependent upon the hardware implementation.
‘0’ = Ganged switching (all ports together)
‘1’ = Individual port-by-port switching
7.3.5.8
E5h: Configuration Data Byte 2 (CFG_DAT_BYT2)
Bit
Name
Description
7:6
5:4
Reserved
Always reads ‘0’.
OC_TIMER
OverCurrent Timer: Over-current Timer delay.
00 = 50 ns
01 = 100 ns
10 = 200 ns
11 = 400 ns
3
COMPOUND
Compound Device: Allows OEM to indicate that the hub is part of a compound
(see the USB 2.0 Specification for definition) device. The applicable port(s)
must also be defined as having a "non-removable device".
When configured via strapping options, declaring a port as non-removable
automatically causes the hub controller to report that it is part of a Compound
Device.
‘0’ = No
‘1’ = Yes, the hub is part of a Compound Device
2:0
Always reads ‘0’.
Always reads ‘0’.
DS00001947C-page 34
2015-2021 Microchip Technology Inc.
USB2640/USB2641
7.3.5.9
Bit
E6h: Configuration Data Byte 3 (CFG_DAT_BYT3)
Name
Description
7:4
3
Reserved
Always reads ‘0’.
PRTMAP_EN
Port mapping enable: Selects the method used by the hub to assign port
numbers and disable ports.
‘0’ = Standard Mode. Strap options or the following registers are used to define
which ports are enabled, and the ports are mapped as Port ‘n’ on the hub is
reported as Port ‘n’ to the host, unless one of the ports is disabled, then the
higher numbered ports are remapped in order to report contiguous port
numbers to the host.
Register 300Ah: Port Disable For Self-Powered Operation (Reset = 0x00).
Register 300Bh: Port Disable For Bus-Powered Operation (Reset = 0x00).
‘1’ = Port map mode. The mode enables remapping via the registers defined
below.
Register 30FBh: Port Map 12 (Reset = 0x00)
Register 30FCh: Port Map 3 (Reset = 0x00)
2:0
Reserved
Always reads ‘0’.
7.3.5.10
E7h: Non-Removable Device
Bit
Byte Name
Description
7:0
NR_DEVICE
Indicates which port(s) include non-removable devices.
‘0’ = Port is removable
‘1’ = Port is non-removable
Informs the host if one of the active ports has a permanent device that is
undetachable from the hub. (Note: The device must provide its own descriptor
data.)
When using the internal default option, the NON_REM[1:0] pins will designate
the appropriate ports as being non-removable.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Controls physical port 3
Bit 2= Controls physical port 2
Bit 1= Controls physical port 1
Bit 0= Reserved, always = ‘0’
Note:
Bit 1 must be set to a ‘1’ by the firmware for proper identification of
the card reader as a non-removable device.
2015-2021 Microchip Technology Inc.
DS00001947C-page 35
USB2640/USB2641
7.3.5.11
E8h: Port Disable For Self-Powered Operation
Bit
Byte Name
Description
7:0
PORT_DIS_SP
Disables 1 or more ports.
‘0’ = Port is available
‘1’ = Port is disabled
During self-powered operation this register selects the ports which will be
permanently disabled. The ports are unavailable to be enabled or enumerated
by a Host Controller. The ports can be disabled in any order since the internal
logic will automatically report the correct number of enabled ports to the USB
host and will reorder the active ports in order to ensure proper function.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Controls physical port 3
Bit 2= Controls physical port 2
Bit 1= Controls physical port 1
Bit 0= Reserved, always = ‘0’
7.3.5.12
E9h: Port Disable For Bus-Powered Operation
Bit
Byte Name
Description
7:0
PORT_DIS_BP
Disables 1 or more ports.
‘0’ = Port is available
‘1’ = Port is disabled
During self-powered operation, this register selects the ports which will be
permanently disabled. The ports are unavailable to be enabled or enumerated
by a Host Controller. The ports can be disabled in any order, the internal logic
will automatically report the correct number of enabled ports to the USB host
and will reorder the active ports in order to ensure proper function.
When using the internal default option, the PRT_DIS[1:0] pins will disable the
appropriate ports.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Controls physical port 3
Bit 2= Controls physical port 2
Bit 1= Controls physical port 1
Bit 0 is Reserved, always = ‘0’
7.3.5.13
EAh: Max Power For Self-Powered Operation
Bit
Byte Name
Description
7:0
MAX_PWR_SP
Max Power Self_Powered: Value in 2 mA increments that the hub consumes
from an upstream port (VBUS) when operating as a self-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a Compound Device, and the embedded peripheral reports 0
mA in its descriptors.
Note:
The USB 2.0 Specification does not permit this value to exceed 100
mA.
DS00001947C-page 36
2015-2021 Microchip Technology Inc.
USB2640/USB2641
7.3.5.14
EBh: Max Power For Bus-Powered Operation
Bit
Byte Name
Description
7:0
MAX_PWR_BP
Max Power Bus_Powered: Value in 2 mA increments that the hub consumes
from an upstream port (VBUS) when operating as a bus-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a Compound Device, and the embedded peripheral reports 0
mA in its descriptors.
7.3.5.15
ECh: Hub Controller Max Current For Self-Powered Operation
Bit
Byte Name
Description
7:0
HC_MAX_C_SP
Hub Controller Max Current Self-Powered: Value in 2 mA increments that the
hub consumes from an upstream port (VBUS) when operating as a self-
powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value does NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a Compound Device.
Note:
The USB 2.0 Specification does not permit this value to exceed 100
mA.
A value of 50 (decimal) indicates 100 mA, which is the default value.
EDh: Hub Controller Max Current For Bus-Powered Operation
7.3.5.16
Bit
Byte Name
Description
7:0
HC_MAX_C_BP
Hub Controller Max Current Bus-Powered: Value in 2 mA increments that the
hub consumes from an upstream port (VBUS) when operating as a bus-
powered hub. This value will include the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value will NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a Compound Device.
A value of 50 (decimal) would indicate 100 mA, which is the default value.
7.3.5.17
EEh: Power-On Time
Bit
Byte Name
Description
7:0
PWR_ON_TIME
Power-On Time: The length of time that it takes (in 2 ms intervals) from the
time the host initiated power-on sequence begins on a port until power is
adequate on that port. System software uses this value to determine how long
to wait before accessing a powered-on port.
2015-2021 Microchip Technology Inc.
DS00001947C-page 37
USB2640/USB2641
7.3.5.18
EFh: Boost_Up
Bit
Name
Description
7:2
1:0
Reserved
Reserved
BOOST_IOUT
USB electrical signaling drive strength Boost Bit for the Upstream Port ‘A’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note:
“Boost” could result in non-USB Compliant parameters. OEM should
use a ‘00’ value unless specific implementation issues require
additional signal boosting to correct for degraded USB signalling
levels.
7.3.5.19
F0h: Boost_3:0
Bit
Name
Description
7:6
5:4
Reserved
Always reads ‘0’.
BOOST_IOUT_3
Upstream USB electrical signaling drive strength Boost Bit for Downstream
Port ‘3’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
3:2
BOOST_IOUT_2
Upstream USB electrical signaling drive strength Boost Bit for Downstream
Port ‘2’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note:
“Boost” could result in non-USB Compliant parameters. OEM should
use a ‘00’ value unless specific implementation issues require
additional signal boosting to correct for degraded USB signalling
levels.
1:0
Reserved
Always reads ‘0’.
7.3.5.20
F1h: Port Swap
Bit
Byte Name
Description
7:0
PRT_SWP
Port Swap: Swaps the Upstream and Downstream USB DP and DM Pins for
ease of board routing to devices and connectors.
‘0’ = USB D+ functionality is associated with the DP pin and D- functionality
is associated with the DM pin.
‘1’ = USB D+ functionality is associated with the DM pin and D- functionality
is associated with the DP pin.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Controls physical port 3
Bit 2= Controls physical port 2
Bit 1= Reserved
Bit 0= Controls physical port 0
DS00001947C-page 38
2015-2021 Microchip Technology Inc.
USB2640/USB2641
7.3.5.21
F2h: Port Map 12
Bit
Byte Name
Description
7:0
PRTM12
Port map register for ports 1 & 2.
When a hub is enumerated by a USB Host Controller, the hub is only
permitted to report how many ports it has; the hub is not permitted to select
a numerical range or assignment. The Host Controller will number the
downstream ports of the hub starting with the number '1', up to the number of
ports that the hub reported having.
The host's port number is referred to as "logical port number" and the physical
port on the hub is the “physical port number". When remapping mode is
enabled (see PRTMAP_EN in Register 08h: Configuration Data Byte 3) the
hub's downstream port numbers can be remapped to different logical port
numbers (assigned by the host).
Note:
OEM must ensure that contiguous logical port numbers are used,
starting from number ‘1’ up to the maximum number of enabled
ports; this ensures that the hub's ports are numbered in accordance
with the way a host will communicate with the ports.
TABLE 7-4:
PORT MAP REGISTER FOR PORTS 1 & 2
Bit [7:4]
‘0000’
‘0001’
‘0010’
‘0011’
Physical Port 2 is Disabled
Physical Port 2 is mapped to Logical Port 1
Physical Port 2 is mapped to Logical Port 2
Physical Port 2 is mapped to Logical Port 3
Illegal; Do Not Use
‘0100’
to
‘1111’
Bit [3:0]
‘0000’
‘0001’
‘0010’
‘0011’
Physical Port 1 is Disabled
Physical Port 1 is mapped to Logical Port 1
Physical Port 1 is mapped to Logical Port 2
Physical Port 1 is mapped to Logical Port 3
Illegal; Do Not Use
‘0100’
to
‘1111’
2015-2021 Microchip Technology Inc.
DS00001947C-page 39
USB2640/USB2641
7.3.5.22
F3h: Port Map 3
Bit
Byte Name
Description
7:0
PRTM3
Port map register for port 3.
When a hub is enumerated by a USB Host Controller, the hub is only
permitted to report how many ports it has; the hub is not permitted to select
a numerical range or assignment. The Host Controller will number the
downstream ports of the hub starting with the number '1', up to the number of
ports that the hub reported having.
The host's port number is referred to as "logical port number" and the physical
port on the hub is the “physical port number". When remapping mode is
enabled (see PRTMAP_EN in Register 08h: Configuration Data Byte 3) the
hub's downstream port numbers can be remapped to different logical port
numbers (assigned by the host).
Note:
OEM must ensure that contiguous logical port numbers are used,
starting from number ‘1’ up to the maximum number of enabled
ports; this ensures that the hub's ports are numbered in accordance
with the way a host will communicate with the ports.
TABLE 7-5:
PORT MAP REGISTER FOR PORT 3
Bit [7:4]
‘0000’
‘0001’
‘0010’
‘0011’
Reserved
Reserved
Reserved
Reserved
‘0100’
to
Illegal; Do Not Use
‘1111’
Bit [3:0]
‘0000’
‘0001’
‘0010’
‘0011’
Physical Port 3 is Disabled
Physical Port 3 is mapped to Logical Port 1
Physical Port 3 is mapped to Logical Port 2
Physical Port 3 is mapped to Logical Port 3
Illegal; Do Not Use
‘0100’
to
‘1111’
7.3.5.23
F4h-FBh: Reserved
Byte
Byte Name
Description
7:0
Reserved
Reserved.
7.3.5.24
FCh-FFh: Non-volatile Storage Signature
Byte
Byte Name
String
Description
3:0
NVSTORE_SIG
“ATA2”
This signature is used to verify the validity of the data
in the configuration area. The signature must be set to
‘ATA2’ for USB2640/USB2641.
DS00001947C-page 40
2015-2021 Microchip Technology Inc.
USB2640/USB2641
2
7.3.6
I C EEPROM
The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the Philips Semicon-
ductor Standard I2C-Bus Specification for details on I2C bus protocols). The device’s I2C EEPROM interface is designed
to attach to a single “dedicated” I2C EEPROM, and it conforms to the Standard-mode I2C Specification (100 kbps trans-
fer rate and 7-bit addressing) for protocol and electrical compatibility.
Note:
Extensions to the I2C Specification are not supported.
The device acts as the master and generates the serial clock SCL, controls the bus access (determines which device
acts as the transmitter and which device acts as the receiver), and generates the START and STOP conditions.
7.3.6.1
Implementation Characteristics
The device will only access an EEPROM using the sequential read protocol.
7.3.6.2
Pull-Up Resistor
The circuit board designer is required to place external pull-up resistors (10 k recommended) on the SDA/SMBDATA
& SCL/SMBCLK/CFG_SEL0 lines (per SMBus 1.0 Specification, and EEPROM manufacturer guidelines) to VDD33 in
order to assure proper operation.
7.3.7
IN-CIRCUIT EEPROM PROGRAMMING
The EEPROM can be programmed via automatic testing test equipment (ATE) by pulling nRESET low which tri-states
the device’s EEPROM interface and allows an external source to program the EEPROM.
7.4
Default Configuration Option:
The Microchip device can be configured via its internal default configuration. Please see Section 7.3.2, "EEPROM Data
Descriptor" for specific details on how to enable default configuration. Please refer to Table 7-1 for the internal default
values that are loaded when this option is selected.
7.5
Reset
There are two different resets that the device experiences. One is a hardware reset (either from the internal POR reset
circuit or via the nRESET pin) and the second is a USB Bus Reset.
7.5.1
INTERNAL POR HARDWARE RESET
All reset timing parameters are ensured by design.
7.5.2
EXTERNAL HARDWARE NRESET
A valid hardware reset is defined as assertion of nRESET for a minimum of 1 s after all power supplies are within oper-
ating range. While reset is asserted, the device (and its associated external circuitry) consumes less than 500 A of
current from the upstream USB power source.
Assertion of nRESET (external pin) causes the following:
1. All downstream ports are disabled, and PRTCTL power to downstream devices is removed.
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediately terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00h).
5. The external crystal oscillator is halted.
6. The PLL is halted.
2015-2021 Microchip Technology Inc.
DS00001947C-page 41
USB2640/USB2641
7.5.2.1
nRESET for EEPROM Configuration
FIGURE 7-1:
NRESET TIMING FOR EEPROM MODE
Start
completion
request
Hardware
reset
asserted
Device
Recovery/
Stabilization
8051 Sets
Configuration
Registers
Attach
USB
Upstream
USB Reset
recovery
Idle
response
t4
t6
t7
t1
t5
t2
t3
nRESET
VSS
TABLE 7-6:
Name
NRESET TIMING FOR EEPROM MODE
Description
MIN
TYP
MAX
Units
t1
t2
t3
t4
t5
t6
t7
nRESET asserted.
1
sec
sec
msec
msec
msec
msec
msec
Device recovery/stabilization.
8051 programs device configuration
USB attach (See Note).
500
50
20
100
Host acknowledges attach and signals USB reset.
USB idle.
100
Undefined
Completion time for requests (with or without data
stage).
5
Note:
All power supplies must have reached the operating levels mandated in Section 9.0, "DC Parameters," on
page 47, prior to (or coincident with) the assertion of nRESET.
7.5.3
USB BUS RESET
In response to the upstream port signaling a reset to the device, the device does the following:
Note: The device does not propagate the upstream USB reset to downstream devices.
1. Sets default address to ‘0’.
2. Sets configuration to: Unconfigured.
3. Negates PRTCTL[3:2] to all downstream ports.
4. Clears all TT buffers.
5. Moves device from suspended to active (if suspended).
6. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset sequence.
The host then configures the device and the device’s downstream port devices in accordance with the USB 2.0 Speci-
fication.
DS00001947C-page 42
2015-2021 Microchip Technology Inc.
USB2640/USB2641
8.0
PIN RESET STATES
FIGURE 8-1:
PIN RESET STATES
Hardware
Firmware
Initialization
Operational
Voltage
Signal (v)
RESET
RESET
VDD33
Time
(t)
VSS
TABLE 8-1:
Symbol
LEGEND FOR PIN RESET STATES TABLE
Description
Y
Hardware enables function
Output low
0
1
Output high
--
Hardware disables function
Hardware disables output driver (high impedance)
Hardware enables pull-up
Hardware enables pull-down
Z
PU
PD
HW
(FW)
VDD
Hardware controls function, but state is protocol dependent
Firmware controls function through registers
Hardware supplies power through pin, applicable only to
CARD_PWR pin
none
Hardware disables pad
8.1
Pin Reset States
TABLE 8-2:
USB2640 PIN RESET STATES
Reset State
Pin
Pin Name
Function
Output
PU/PD
Input
1
2
3
4
6
USBDN_DM2
USBDN_DP2
USBDN_DM2
0
PD
--
--
--
--
--
USBDN_DP2
USBDN_DM3
USBDN_DP3
PRTCTL
0
0
0
0
PD
PD
PD
--
USBDN_DM3
USBDN_DP3
PRTCTL2
2015-2021 Microchip Technology Inc.
DS00001947C-page 43
USB2640/USB2641
TABLE 8-2:
USB2640 PIN RESET STATES (CONTINUED)
Reset State
Pin
Pin Name
Function
PRTCTL
Output
PU/PD
--
Input
7
PRTCTL3
0
--
--
--
Y
Y
--
Y
--
--
--
--
--
--
--
--
--
--
--
Y
--
Y
--
--
--
--
Y
Y
Y
8
SPI_CE_n
SPI_CE_n
none
1
0
Z
Z
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
0
Z
Z
Z
--
9
SPI_CLK / SCL
--
10
11
13
14
17
18
19
20
21
22
23
24
26
27
28
29
30
31
32
33
35
37
38
39
40
SPI_DO / SDA / SPI_SPD_SEL
SPI_DI
none
PD
PD
--
SPI_DI
none
xD_D4 / SD_WP / MS_SCLK
SD_nCD
none
PU
--
xD_D3 / SD_D1 / MS_D5
xD_D2 / SD_D0 / MS_D4
xD_D1 / SD_D7 / MS_D6
xD_D0 / SD_D6 / MS_D7
xD_nWP / SD_CLK / MS_BS
xD_nWE
none
none
--
none
--
none
--
none
--
none
--
xD_ALE / SD_D5 / MS_D1
xD_CLE / SD_CMD / MS_D0
xD_nCE
none
--
none
--
none
--
xD_nRE
none
--
xD_nB/R
none
--
xD_nCD
none
PU
--
xD_D7 / SD_D4 / MS_D2
MS_INS
none
none
PU
--
xD_D6 / SD_D3 / MS_D3
xD_D5 / SD_D2
CARD_PWR
none
none
--
none
--
LED / TXD
none
--
nRESET
nRESET
VBUS_DET
TEST
--
VBUS_DET
--
TEST
--
DS00001947C-page 44
2015-2021 Microchip Technology Inc.
USB2640/USB2641
TABLE 8-2:
Pin
USB2640 PIN RESET STATES (CONTINUED)
Reset State
Pin Name
Function
Output
PU/PD
--
Input
42
43
44
45
47
USB+
USB+
USB-
Z
Z
--
--
USB-
--
XTAL2
XTAL1 (CLKIN)
RBIAS
TABLE 8-3:
USB2641 PIN RESET STATES
Reset State
Pin
Pin Name
Function
Output
PU/PD
Input
1
USBDN_DM2
USBDN_DP2
USBDN_DM2
USBDN_DP2
USBDN_DM3
USBDN_DP3
PRTCTL
PRTCTL
SPI_CE_n
none
0
PD
PD
PD
PD
--
--
--
--
--
--
--
--
--
Y
Y
--
Y
--
--
--
--
--
--
--
--
2
0
0
0
0
0
1
0
Z
Z
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
3
USBDN_DM3
4
USBDN_DP3
6
PRTCTL2
7
PRTCTL3
--
8
SPI_CE_n
--
9
SPI_CLK / SCL
SPI_DO / SDA / SPI_SPD_SEL
SPI_DI
--
10
11
13
14
17
18
19
20
21
23
24
30
none
PD
PD
--
SPI_DI
none
SD_WP / MS_SCLK
SD_nCD
none
PU
--
SD_D1 / MS_D5
SD_D0 / MS_D4
SD_D7 / MS_D6
SD_D6 / MS_D7
SD_CLK / MS_BS
SD_D5 / MS_D1
SD_CMD / MS_D0
SD_D4 / MS_D2
none
none
--
none
--
none
--
none
--
none
--
none
--
none
--
2015-2021 Microchip Technology Inc.
DS00001947C-page 45
USB2640/USB2641
TABLE 8-3:
USB2641 PIN RESET STATES (CONTINUED)
Reset State
Pin
Pin Name
Function
Output
PU/PD
Input
31
32
33
35
36
37
38
39
40
42
43
44
45
47
MS_INS
none
none
none
none
none
none
Z
PU
Y
--
--
--
--
--
Y
Y
Y
--
--
SD_D3 / MS_D3
SD_D2
Z
Z
Z
0
0
Z
Z
Z
Z
Z
--
--
--
--
--
--
--
--
--
--
CARD_PWR
RXD
LED / TXD
nRESET
VBUS_DET
TEST
nRESET
VBUS_DET
TEST
USB+
USB+
USB-
USB-
XTAL2
XTAL1 (CLKIN)
RBIAS
DS00001947C-page 46
2015-2021 Microchip Technology Inc.
USB2640/USB2641
9.0
9.1
DC PARAMETERS
Maximum Ratings
Parameter
Symbol
TSTOR
MIN
MAX
Units
°C
Comments
Storage
Temperature
-55
150
325
4.0
Lead
Temperature
°C
V
Soldering < 10 seconds
3.3 V supply
voltage
VDD33
-0.5
-0.5
Voltage on
USB+ and
USB- pins
(3.3 V supply voltage + 2) 6
V
Voltage on
CRD_PWR
-0.5
VDD33 + 0.3
V
When internal power FET
operation of these pins are
enabled, these pins may be
simultaneously shorted to
ground or any voltage up to
3.63 V indefinitely, without
damage to the device as
long as VDD33 is less than
3.63 V and TA is less than
70oC.
Voltage on any
signal pin
-0.5
-0.5
-0.5
VDD33 + 0.3
V
Voltage on
XTAL1
3.6
2.0
5
V
Voltage on
XTAL2
V
HBM ESD
Performance
kV
Note 9-1
Stresses above the specified parameters may cause permanent damage to the device. This is a
stress rating only. Functional operation of the device at any condition above those indicated in the
operation sections of this specification is not implied.
Note 9-2
When powering this device from laboratory or system power supplies the Absolute Maximum Ratings
must not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on
their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power
line may appear on the DC output. When this possibility exists, a clamp circuit should be used.
FIGURE 9-1:
SUPPLY RISE TIME MODELS
Voltage
tRT
VDD33
3.3 V
100%
90%
10%
VSS
t90%
Time
t10%
2015-2021 Microchip Technology Inc.
DS00001947C-page 47
USB2640/USB2641
9.2
Operating Conditions
Parameter
Symbol
MIN
MAX
Units
°C
Comments
Operating Temperature TA
0
70
Ambient temperature in still air.
3.3 V supply voltage
VDD33
3.0
3.6
V
A 3.3 V regulator with an output
tolerance of 1% must be used if
the output of the internal power
FETs must support a 5% tolerance.
3.3 V supply rise time tRT
0
400
5.5
s
(Figure 9-1)
Voltage on
USB+ and USB- pins
-0.3
V
If any 3.3 V supply voltage drops
below 3.0 V, then the MAX
becomes:
(3.3 V supply voltage) + 0.5 5.5
Voltage on any signal
pin
-0.3
VDD33
V
Voltage on XTAL1
Voltage on XTAL2
-0.3
-0.3
2.0
2.0
V
V
9.3
DC Electrical Characteristics
Parameter
Symbol
MIN
TYP
MAX
Units
Comments
I, IPU, IPD Type Input Buffer
Low Input Level
VILI
VIHI
PD
PU
0.8
V
V
TTL Levels
High Input Level
2.0
Pull Down
72
58
A
A
Pull Up
IS Type Input Buffer
Low Input Level
High Input Level
VILI
VIHI
0.8
V
V
TTL Levels
2.0
Hysteresis
VHYSI
420
mV
ICLK Input Buffer
Low Input Level
High Input Level
Input Leakage
VILCK
VIHCK
IIL
0.5
V
V
1.4
-10
+10
A
VIN = 0 to VDD33
Input Leakage
(All I and IS buffers)
Low Input Leakage
High Input Leakage
IIL
-10
-10
+10
+10
A
A
VIN = 0
IIH
VIN = VDD33
DS00001947C-page 48
2015-2021 Microchip Technology Inc.
USB2640/USB2641
Parameter
O12 Type Buffer
Symbol
MIN
TYP
MAX
Units
Comments
Low Output Level
High Output Level
Output Leakage
VOL
0.4
V
IOL = 12 mA @
VDD33= 3.3 V
VOH
VDD33
- 0.4
V
IOH = -12 mA @
VDD33= 3.3 V
IOL
-10
+10
0.4
A
VIN = 0 to VDD33
(Note 9-3)
I/O12, I/O12PU & I/O12PD Type
Buffer
Low Output Level
High Output Level
Output Leakage
VOL
VOH
IOL
V
V
IOL = 12 mA @
VDD33= 3.3 V
VDD33
- 0.4
IOH = -12 mA @
VDD33= 3.3 V
-10
+10
µA
VIN = 0 to VDD33
(Note 9-3)
Pull Down
Pull Up
PD
PU
72
58
A
A
IO-U
I-R
(Note 9-4)
(Note 9-5)
Integrated Power FET Set to
100 mA
Output Current (Note 9-6)
Short Circuit Current Limit
On Resistance (Note 9-6)
Output Voltage Rise Time
IOUT
ISC
RDSON
tDSON
100
mA
mA
VdropFET = 0.22 V
VoutFET = 0 V
IFET = 70 mA
140
2.1
800
s
CLOAD = 10 F
Integrated Power FET Set to
200 mA
Output Current (Note 9-6)
Short Circuit Current Limit
On Resistance (Note 9-6)
Output Voltage Rise Time
IOUT
ISC
RDSON
tDSON
200
mA
mA
VdropFET = 0.46 V
VoutFET = 0 V
IFET = 70 mA
181
2.1
800
s
CLOAD = 10 F
2015-2021 Microchip Technology Inc.
DS00001947C-page 49
USB2640/USB2641
Parameter
Symbol
MIN
TYP
MAX
Units
Comments
Supply Current Unconfigured
Hi-Speed Host
Full Speed Host
ICCINTHS
ICCINITFS
65
60
70
65
mA
mA
Supply Current Active
Supply Current Suspend
Supply Current Reset
ICC
ICSBY
IRST
280
420
205
300
550
325
mA
µA
µA
Note 9-3
Note 9-4
Note 9-5
Note 9-6
Output leakage is measured with the current pins in high impedance.
See the USB 2.0 Specification, Chapter 7, for USB DC electrical characteristics
RBIAS is a 3.3 V tolerant analog pin.
Output current range is controlled by program software. The software disables the FET during short
circuit condition.
9.4
Capacitance TA = 25°C; fc = 1 MHz; VDD33 = 3.3 V
TABLE 9-1: PIN CAPACITANCE
Parameter
Limits
TYP
Symbol
Unit
Test Condition
MIN
MAX
Clock Input Capacitance
CXTAL
2
pF
All pins (except USB pins and
pins under test) are tied to AC
ground.
Input Capacitance
Output Capacitance
CIN
10
20
pF
pF
COUT
9.5
Package Thermal Specifications
TABLE 9-2:
48-QFN PACKAGE THERMAL SPECIFICATIONS
Symbol
°C/W
Velocity (Meters/s)
28
24
0
1
JA
22
2.5
-
JB
JC
JT
15
2.2
0.2
-
0
DS00001947C-page 50
2015-2021 Microchip Technology Inc.
USB2640/USB2641
10.0 AC SPECIFICATIONS
10.1 Oscillator/Crystal
Parallel Resonant, Fundamental Mode, 24 MHz 350 ppm.
FIGURE 10-1:
TYPICAL CRYSTAL CIRCUIT
TABLE 10-1: CRYSTAL CIRCUIT LEGEND
Symbol
C0
Description
In Accordance With
Crystal shunt capacitance
Crystal load capacitance
Total board or trace capacitance
Stray capacitance
Crystal manufacturer’s specification (See Note 10-1)
CL
CB
OEM board design
CS
Microchip IC and OEM board design
Microchip IC
CXTAL
C1
XTAL pin input capacitance
Load capacitors installed on OEM
board
Calculated values based on Figure 10-2, "Capacitance
Formulas" (See Note 10-2)
C2
FIGURE 10-2:
CAPACITANCE FORMULAS
C1 = 2 x (CL – C0) – CS1
C2 = 2 x (CL – C0) – CS2
Note 10-1
Note 10-2
C0 is usually included (subtracted by the crystal manufacturer) in the specification for CL and should
be set to ‘0’ for use in the calculation of the capacitance formulas in Figure 10-2, "Capacitance
Formulas". However, the OEM PCB itself may present a parasitic capacitance between XTAL1 and
XTAL2. For an accurate calculation of C1 and C2, take the parasitic capacitance between traces
XTAL1 and XTAL2 into account.
Each of these capacitance values is typically approximately 18 pF.
2015-2021 Microchip Technology Inc.
DS00001947C-page 51
USB2640/USB2641
10.2 Ceramic Resonator
24 MHz 350 ppm
FIGURE 10-3:
CERAMIC RESONATOR USAGE WITH MICROCHIP IC
10.3 External Clock
50% Duty cycle 10%, 24 MHz 350 ppm, Jitter < 100 ps rms.
The external clock is recommended to conform to the signaling level designated in the JESD76-2 specification on 1.8
V CMOS Logic. XTAL2 should be treated as a no connect.
2
10.3.1
I C EEPROM
Frequency is fixed at 58.6 kHz 20%
10.3.2 USB 2.0
The Microchip device conforms to all voltage, power, and timing characteristics and specifications as set forth in the
USB 2.0 Specification. Please refer to the USB 2.0 Specification for more information.
DS00001947C-page 52
2015-2021 Microchip Technology Inc.
USB2640/USB2641
11.0 PACKAGE OUTLINE
FIGURE 11-1:
USB2640/USB2641 48-PIN QFN, 7 X 7 MM BODY, 0.5 MM PITCH
48-Lead Plastic Quad Flat, No Lead Package (RS) - 7x7 mm Body [VQFN]
With Exposed Pad; Punch Singulated (AIS Package HZH)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
4X
N
0.10 C
NOTE 1
1
2
E1
(DATUM B)
(DATUM A)
2X
0.10 C
2X
0.10 C
D1
TOP VIEW
A
A2
Ĭ
0.10 C
C
SEATING
PLANE
(A3)
A1
0.08 C
SIDE VIEW
4X P
0.10
C A B
D2
0.10
C A B
4X P
E2
NX K
2
1
N
NX L
e
48X b
0.10
0.05
C A B
C
e/2
BOTTOM VIEW
Microchip Technology Drawing C04-223C Sheet 1 of 2
2015-2021 Microchip Technology Inc.
DS00001947C-page 53
USB2640/USB2641
FIGURE 11-1:
USB2640/USB2641 48-PIN QFN, 7 X 7 MM BODY, 0.5 MM PITCH (CONTINUED)
48-Lead Plastic Quad Flat, No Lead Package (RS) - 7x7 mm Body [VQFN]
With Exposed Pad; Punch Singulated (AIS Package HZH)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
Overall Height
N
48
0.50 BSC
0.85
0.01
0.65
0.20 REF
7.00 BSC
6.75 BSC
e
A
A1
A2
0.80
0.00
0.60
0.90
0.05
0.70
Standoff
Mold Cap Height
Terminal Thickness
Overall Width
(A3)
E
E1
E2
D
D1
D2
P
b
L
K
θ
Molded Top Width
Exposed Pad Width
Overall Length
Molded Top Length
Exposed Pad Length
Corner Chamfer
Terminal Width
Terminal Length
Exposed Pad Variations
D2
(See Exposed Pad Variations)
7.00 BSC
6.75 BSC
(See Exposed Pad Variations)
Symbol
E2
Variant MIN NOM MAX MIN NOM MAX
C
G
H
K
4.00 4.10 4.20 4.00 4.10 4.20
5.00 5.10 5.20 5.00 5.10 5.20
5.20 5.30 5.40 5.20 5.30 5.40
5.40 5.50 5.60 5.40 5.50 5.60
0.24
0.18
0.30
0.20
0°
0.42
0.23
0.40
-
0.60
0.30
0.50
-
Terminal-to-Exposed-Pad
Mold Draft Angle
-
12°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is punch singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-223C Sheet 2 of 2
DS00001947C-page 54
2015-2021 Microchip Technology Inc.
USB2640/USB2641
FIGURE 11-1:
USB2640/USB2641 48-PIN QFN, 7 X 7 MM BODY, 0.5 MM PITCH (CONTINUED)
48-Lead Plastic Quad Flat, No Lead Package (RS) - 7x7 mm Body [VQFN]
With Exposed Pad; Punch Singulated (AIS Package HZH)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
C1
X2
EV
48
1
2
ØV
C2 Y2 EV
G1
Y1
X1
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units MILLIMETERS
Dimension Limits MIN NOM MAX
0.50 BSC
See Center
Y2 Pad Variations
Contact Pitch
E
X2
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
Center Pad Variations
X2
Variant MIN NOM MAX MIN NOM MAX
C1
C2
X1
Y1
6.90
6.90
Symbol
Y2
Contact Pad Spacing
Contact Pad Width (X48)
Contact Pad Length (X48)
0.30
0.85
C
G
H
K
4.20
5.20
5.40
5.60
4.20
5.20
5.40
5.60
Contact Pad to Center Pad (X48) G1 0.20
Thermal Via Diameter
Thermal Via Pitch
V
EV
0.33
1.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-2223B
Note:
This product is a variant ‘C’.
2015-2021 Microchip Technology Inc.
DS00001947C-page 55
USB2640/USB2641
APPENDIX A: DATA SHEET REVISION HISTORY
TABLE A-1:
REVISION HISTORY
Revision
Section/Figure/Entry
Correction
DS00001947C (05-07-21)
DS00001947B (06-08-18)
DS00001947A (06-08-15)
Section 9.5, "Package Ther-
mal Specifications"
Section added.
Section 9.1, "Maximum Rat-
ings"
Row added for HBM ESD Performance
Replaces previous SMSC version Rev. 2.1 (06-29-09)
DS00001947C-page 56
2015-2021 Microchip Technology Inc.
USB2640/USB2641
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site con-
tains the following information:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
groups, Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of semi-
nars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or
development tool of interest.
To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notifi-
cation” and follow the registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu-
ment.
Technical support is available through the web site at: http://www.microchip.com/support
2015-2021 Microchip Technology Inc.
DS00001947C-page 57
USB2640/USB2641
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
[X]
XXX
[X]
-
-
USB2640-HZH-02
48-pin QFN RoHS Compliant package,
Commercial Temp, Tray
Temperature
Range
Package
Internal Microchip
Code
USB2641-HZH-02
48-pin QFN RoHS Compliant package,
Commercial Temp, Tray
Device:
USB2640, USB2641
Temperature
Range:
Blank
HZH
= 0C to +85C (Extended Commercial)
Package:
= 48-pin QFN
DS00001947C-page 58
2015-2021 Microchip Technology Inc.
USB2640/USB2641
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications
contained in Microchip's Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished
without violating Microchip's intellectual property rights.
•
•
Microchip is willing to work with any customer who is concerned about the integrity of its code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is "unbreakable." Code protection is constantly evolving. We at Microchip are
committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection
feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or
other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Information
regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsi-
bility to ensure that your application meets with your specifications.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF
ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMA-
TION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FIT-
NESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL LOSS,
DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER
CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFOR-
MATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR
THE INFORMATION. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer
agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use.
No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch,
MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo,
PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other
countries.
AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion,
SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, WinPath, and ZL are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom,
CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip
Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK,
NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker,
RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II,
Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and
ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in
other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other
countries.
All other trademarks mentioned herein are property of their respective companies.
© 2015-2021, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 9781522482116
For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.
2015-2021 Microchip Technology Inc.
DS00001947C-page 59
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2015-2021 Microchip Technology Inc.
DS00001947C-page 60
02/28/20
相关型号：
USB2641I-HZH-02-CAG
Industrial Temperature USB 2.0 Flash Media Controller and USB Hub Combo
MICROCHIP
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