APTLGF140U120T [MICROSEMI]
Insulated Gate Bipolar Transistor;型号: | APTLGF140U120T |
厂家: | Microsemi |
描述: | Insulated Gate Bipolar Transistor 栅 驱动 接口集成电路 |
文件: | 总8页 (文件大小:679K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
APTLGF140U120T
Zero Voltage switching
Single switch
VCES = 1200V
IC = 140A @ Tc = 80°C
Application
ISOLATED
AUXILIARY
+12V
GND
•
•
•
•
•
Wide output range converters
Induction heating
X-Ray power supplies
ZVS-PWM Uninterruptible Power Supplies
High frequency, high density, high efficiency
power supplies
POWER
SUPPLY
UNDERVOLTAGE
LOCKOUT
C1
_
Q
SIGNAL
PROCESSING
CIRCUIT
HIGH
FREQUENCY
DRIVER
TRANSFORMER
INH
E1
•
Welder
HIGH
FORCED
START UP
CIRCUIT
E0
S0
FREQUENCY
TRANSFORMER
NTC1
Features
•
•
•
Integrated power and driver circuits
Integrated DC/DC converter
80kHz switching frequency without high
switching losses using ZVS technique
low EMI and RFI
isolated input signals
Very low stray inductance
Internal thermistor for temperature monitoring
High level of integration
NTC2
•
•
•
•
•
C1
S1
Benefits
•
Outstanding performance at high frequency
operation
•
•
•
Direct mounting to heatsink (isolated package)
Low junction to case thermal resistance
Solderable terminals for signal and M5 for power
for easy PCB mounting
J10
Absolute maximum ratings
Symbol
Parameter
Max ratings
1200
200
Unit
V
VCE
Collector - Emitter Breakdown Voltage
Continuous Collector Current
Pulsed Collector Current
TC = 25°C
TC = 80°C
IC
140
400
960
520
A
ICM
PD
IGBT Total Power Dissipation
Diode Total Power Dissipation
TC = 25°C
TC = 25°C
W
FS(Max) Maximum Operating Frequency
80
kHz
VAUX Isolated Auxiliary Power Supply Voltage
13
V
Input Signal Voltage
Q, Q
13.6
These Devices are sensitive to Electrostatic Discharge. Proper Handing Procedures Should Be Followed.
1 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
Static Electrical Characteristics
Symbol
Characteristic
Test Conditions
Min Typ Max Unit
BVCES
Collector Emitter Breakdown Voltage Ic=1mA
1200
V
Tj = 25°C
Tj = 125°C
VCC = 800V, VGE = 0V
2.7
3.3
3.2
3.9
1500 µA
Q or Q High
IC = 200A
VCE(on)
ICES
Collector Emitter on Voltage
V
Zero Gate Voltage Collector Current
Dynamic Electrical Characteristics
Symbol Characteristic
Test Conditions
Min Typ Max Unit
Coes
Output Capacitance
1840
Q or Q = 0V
VCE = 25V, f = 1MHz
pF
Cres
Reverse Transfer Capacitance
Forced Startup Voltage Level
880
See figures 8, 9 & 11
See figures 8 & 9
See figures 4 & 10
E0-S0
10
1
-0.6
12
4
1
V
µs
V
PW(E0-S0) Forced Startup Pulse Width
INH
Inhibit Voltage Level (Active Level)
VCC = 600V
IC = 200A
Tj = 25°C
15.5
17
7.75
8.5
Tj = 125°C
Tj = 25°C
Tj = 125°C
Eoff
Turn-off Switching Energy
mJ
VCC = 600V
IC = 100A
Freewheeling Diode Characteristics
Symbol Characteristic
Test Conditions
Min Typ Max Unit
VRRM Max. Peak Repetitive Reverse Voltage
1200
IF = 200A
IF = 400A
IF = 200A
Duty cycle=50%
2.5
V
VF
Diode Forward Voltage
2.7
2.0
Tj = 150°C
TC = 60°C
IF(av)
trr
Maximum Average Forward Current
Reverse Recovery Time
200
70
A
IF = 200A
Tj = 25°C
Tj = 100°C
Tj = 25°C
Tj = 100°C
ns
VR = 650V
di/dt=800A/µs
IF = 200A
VR = 650V
di/dt=800A/µs
130
2.5
7.3
µC
Qrr
Reverse recovery Charge
Driver Characteristics
Symbol Characteristic
Test Conditions
Min Typ Max Unit
VAUX Isolated Auxiliary Power SupplyVoltage
11
12
13
V
IAUX
Isolated Auxiliary Power Supply Current
1.5
A
Low level
High level
-0.6
10
1
13.6
5
Blocking Signal Input Voltage
V
Q, Q
mA
ns
Blocking Signal Input Current
IQ, IQ
Td(on) Turn-on Delay Time
Td(off) Turn-off Delay Time
See figure 5
See figure 4
500
500
ns
2 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
Thermal and package characteristics
Symbol Characteristic
Min Typ Max Unit
IGBT
Diode
0.13
0.24
RthJC
Junction to Case
°C/W
RMS Isolation Voltage, any terminal to case
t =1 min, I isol<1mA, 50/60Hz
VISOL
2500
V
TJ
TSTG
TC
Operating junction temperature range
Storage Temperature Range
Operating Case Temperature
-40
-40
-40
2
150
125
100
3.5
3.5
470
°C
To heatsink
For terminals
M5
M5
Torque Mounting torque
Wt Package Weight
N.m
g
2
Temperature sensor NTC
Symbol Characteristic
Min Typ Max Unit
R25
Resistance @ 25°C
68
4080
kΩ
K
B 25/85 T25 = 298.16 K
R25
RT
=
T: Thermistor temperature
RT: Thermistor value at T
»
ÿ
Ÿ
⁄
≈
’
1
1
∆
÷
÷
exp B
−
…
25/ 85
∆
T25
T
«
◊
Package outline
3 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
NTC Characteristics
R@25°C = 68k ±5%
Ω
Temperature R(T)/R@25°C Tolerance
21
17
13
9
(°C)
-30
-25
-20
-15
-10
-5
(%)
10,9
9,1
7,5
6,1
4,9
3,8
2,9
2,1
1,4
0,9
0,4
0
19,33
14,12
10,41
7,758
5,834
4,426
5
0
3,387
5
2,614
1
-30
-25
-20
-15
-10
Temperature (°C)
Figure 1, Normalized NTC Characteristics -30°C to 25°C
-5
0
5
10
15
20
25
10
2,033
15
1,593
20
1,258
25
1
1
0,8
0,6
0,4
0,2
0
30
0,8004
0,6448
0,5228
0,4264
0,3497
0,2885
0,2392
0,1994
0,1671
0,1406
0,1189
0,101
0,4
0,8
1,3
1,8
2,3
2,9
3,5
4,1
4,8
5,5
6,2
6,9
7,6
8,3
9,1
9,8
10,6
11,3
12,1
12,9
35
40
45
50
55
60
65
70
25
35
45
55
65
Temperature (°C)
Figure 2, Normalized NTC Characteristics 25°C to 125°C
75
85
95
105
115
125
75
80
85
90
0,08617
0,07381
0,06347
0,0548
0,04748
0,04129
0,03603
0,03155
14
12
10
8
95
100
105
110
115
120
125
6
4
2
Table 1, NTC Characteristics
0
-30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120
Temperature (°C)
Figure 3, NTC Tolerance vs Temperature
4 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
.
Figure 4
.
Turn-Off Delay Time
.
Figure 5
.
Turn-On Delay Time
18
16
14
12
10
8
100
80
60
40
20
0
VBUS
C = 22nF
TJ=125°C
without C
C1
C
MODULE 1
E1
OUT
C1
E1
C
MODULE 2
TJ=25°C
without C
Without C
VBUS
0/VBUS
C1
C
MODULE 1
E1
TJ=125°C
6
with C=22nF
OUT
C1
C
4
TJ=25°C with
C=22nF
MODULE 2
E1
2
0/VBUS
0
0
50
100
150
200
0
20 40 60 80 100 120 140 160 180
IC, Collector Current (A)
ICE, Collector to Emitter Current (A)
Figure 6: Turn-Off Energy losses vs Collector Current
Figure 7: Operating Frequency vs Collector Current
5 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
APTLGF140U120T
.
Figure 8
.
Full Voltage Startup Circuit
•
After power is applied and/or after an inhibit (INH) signal (active low) has been applied and removed, the
APTLGF140U120T module requires a forced startup signal between E0-S0, forcing startup under full voltage
conditions. The forced startup signal must be a single pulse and cannot be repeated with a frequency greater than 1 kHz.
The duration of this pulse must be between 1 & 4µsec and must be synchronized with input signal Q being high. The
startup timing diagram is shown in figure 9.
•
The circuit, shown in figure 8 is proposed as an example for generating the startup pulse for inputs E0 and S0. The
signal is initiated by the falling edge of a voltage applied to the forced startup signal input. The circuit will synchronize
the forced startup signal with Q and forcing the upper switch to turn ON.
•
The startup signal, between E0-S0, may also be implemented by a negative pulse synchronized with input signal Q
being low and forcing the lower switch to turn ON. Examples of both startup sequences being used in the startup of a
full – bridge configuration is shown in figure 11.
.
Figure 9
.
Startup Pulse
Timing Diagram
6 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
APTLGF140U120T
Figure 10: Inhibit Circuit for APTLGF140U120T
•
•
The APTLGF140U120T modules can be protected against over currents by the inhibit circuit shown above.
This circuit can be implemented by one of several functions:
-
-
-
-
-
Output current measurement with Hall sensor.
Rectification of the measured value without offset.
Comparison of this value to a reference value (inhibit level fixed by potentiometer).
Memorization of the inhibit order.
Inhibit signal adaption.
•
When the inhibit order is given, the default is latched and the output of the circuit connected to the INH (pin5) input
of the APTLGF140U120T module switches to a low level (the active level for INH). Then the LED (D9) illuminates.
•
Pushbutton switch (S1) provides a source for the re-initialization of the Inhibit circuit.
For more information see APT9904 and APT9601 application notes.
7 - 8
APT website – http://www.advancedpower.com
APTLGF140U120T
Q1
Q2
INH1/2
E0-S0 1/2
Q3
Q4
INH3/4
E0-S0 3/4
Figure 11: example of input signal for 4 x APTLGF140U120T modules connected in a Full Bridge configuration
APT reserves the right to change, without notice, the specifications and information contained herein
APT's products are covered by one or more of U.S patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522
5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. U.S and Foreign patents pending. All Rights Reserved.
8 - 8
APT website – http://www.advancedpower.com
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