MC14554BCPD [MOTOROLA]
Multiplier, 4000/14000/40000 Series, 2-Bit, CMOS, PDIP16, 648-08;
| 型号： | MC14554BCPD |
| 厂家： | 
MOTOROLA |
| 描述： | Multiplier, 4000/14000/40000 Series, 2-Bit, CMOS, PDIP16, 648-08 |
| 文件： | 总6页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14554B 2 x 2–bit parallel binary multiplier is constructed with
complementary MOS (CMOS) enhancement mode devices. The multiplier
can perform the multiplication of two binary numbers and simultaneously add
two other binary numbers to the product. The MC14554B has two
multiplicand inputs (X0 and X1), two multiplier inputs (Y0 and Y1), five
cascading or adding inputs (K0, K1, M0, M1, and M2), and five sum and
carry outputs (S0, S1, S2, C1 [S3], and C0). The basic multiplier can be
expanded into a straightforward m–bit by n–bit parallel multiplier without
additional logic elements.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
Application areas include arithmetic processing (multiplying/adding,
obtaining square roots, polynomial evaluation, obtaining reciprocals, and
dividing), Fast Fourier Transform processing, digital filtering, communica-
tions (convolution and correlation), and process and machine controls.
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
•
•
•
•
•
•
•
•
Diode Protection on All Inputs
All Outputs Buffered
Straight–forward m–Bit By n–Bit Expansion
No Additional Logic Elements Needed for Expansion
Multiplies and Adds Simultaneously
T
A
= – 55° to 125°C for all packages.
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
Positive Logic Design
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
operation, V and V
should be constrained
in out
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
to the range V
(V or V
SS in out
)
V
DD
.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V
V
– 0.5 to + 18.0
DD
V , V
SS
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
or V ). Unused outputs must be left open.
DD
in out
I , I
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
P
D
Power Dissipation, per Package†
Storage Temperature
500
– 65 to + 150
260
mW
C
EQUATIONS
S = (X x Y) + K + M
T
stg
Where:
T
L
Lead Temperature (8–Second Soldering)
C
x Means Arithmetic Times.
+ Means Arithmetic Plus.
S = S3 S2 S1 S0, X = X1X0, Y = Y1Y0,
K = K1 K0, M = M1 M0 (Binary Numbers).
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
Example:
Given: X = 2(1), Y = 3(11)
K = 1(01), M = 2(10)
PIN ASSIGNMENT
Then: S = (2 x 3) + 1 + 2 = 9
S = (10 x 11) + 01 + 10 = 1001
Y1
M0
1
2
16
15
V
DD
Y0
X0
X1
K0
S0
K1
S1
NOTE: C0 connected to M2 for this size
multiplier. See general expansion
diagram for other size multipliers.
M1
3
4
5
6
7
8
14
13
12
11
10
9
C0
M2
C1 (S3)
S2
V
SS
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
O
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (1.0 µA/kHz) f + I
= (2.0 µA/kHz) f + I
= (3.0 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
– V ) in volts, f in kHz is input frequency, and k = 0.0035.
SS
T
L
DD
MC14554B
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
Characteristic
Symbol
V
DD
Min
Typ #
Max
Unit
Output Rise and Fall Time
t
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
= (0.75 ns/pF) C + 12.5 ns
= (0.55 ns/pF) C + 9.5 ns
5.0
10
15
100
50
40
200
100
80
TLH THL
L
L
L
THL
, t
—
—
TLH THL
, t
TLH THL
Propagation Delay Time
K0 to C0
t
t
,
ns
PLH
PHL
t
t
t
, t
= (1.7 ns/pF) C + 185 ns
= (0.66 ns/pF) C + 82 ns
= (0.5 ns/pF) C + 60 ns
L
5.0
10
15
—
—
—
270
115
85
675
290
215
PLH PHL
L
L
, t
PLH PHL
, t
PLH PHL
M0 to S2
t
t
t
, t
= (1.7 ns/pF) C + 595 ns
5.0
10
15
—
—
—
680
280
210
1700
750
570
PLH PHL
L
, t
= (0.66 ns/pF) C + 247 ns
L
PLH PHL
, t
PLH PHL
= (0.5 ns/pF) C + 185 ns
L
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns
20 ns
V
V
V
V
DD
SS
OH
OL
90%
10%
50%
INPUT
K0 OR M0
20 ns
20 ns
t
t
PHL
PLH
90%
V
V
50%
DD
10%
90%
50%
10%
OUTPUT
C0 OR S2
ALL INPUTS
SS
t
t
THL
(50% DUTY CYCLE)
TLH
1
2f
For K0 to C0:
Inputs X0, X1, Y0, Y1, K1, and M2 low, and inputs
M0 and M1 high.
V
V
OH
ANY OUTPUT
OL
For M0 to S2:
(50% DUTY CYCLE)
All outputs connected to respective
loads. f = system clock frequency
Inputs X1, Y1, and K0 low, and inputs X0, Y0,
K1, M1, and M2 high.
C
L
Figure 1. Dynamic Power Dissipation
Waveforms
Figure 2. Dynamic Signal Waveforms
LOGIC DIAGRAM
M1
M
Y1
M0
Y0
15
3
1
2
Y
M
Y
14
12
X0
K0
X
X
K
MULTIPLIER
CELL
MULTIPLIER
CELL
4
5
MULTIPLIER CELL
C
C
C0
M2
K
S
S
S
C
M
Y
X
K
L
M
Y
M
Y
13
10
X1
K1
X
K
X
K
MULTIPLIER
CELL
MULTIPLIER
CELL
C
C
S
S
6
7
9
11
C1(S3)
S2
S1
S0
MOTOROLA CMOS LOGIC DATA
MC14554B
3
EXPANSION DIAGRAM
m–Bit by n–Bit Parallel Binary Multiplier (Top View)
Y AND M
Y(n–1)
M(n–2)
M(n–1)
Y3
M2
M3
Y1
M0
M1
Y1
V
DD
Y0
M0
Y(n–2)
X0
Y2
X0
X1
Y0
X0
X1
K0
M1
C0
X0
X1
K0
S0
K1
X1
M2
C1
S2
K1
V
S1
SS
Y(n–1)
Y3
Y1
X AND K
Y(n–2)
X2
Y2
X2
X3
Y0
X2
X3
K2
X3
K3
Y(n–1)
Y1
Y3
Y(n–2)
X(m–2)
X(m–1)
Y2
Y0
X(m–2)
X(m–1)
X(m–2)
X(m–1)
K(m–2)
K(m–1)
S(m + n–1) S(m + n–2)
S(m + n–3)
S(m+2)
S(m+1)
S(m)
S(m–1)
S3
S(m–2) S2
S1
S0
S = (X x Y) + K + M Where: x means Arithmetic Times.
S = (X x Y) + K + M Where: + means Arithmetic Plus.
S = S(m + n–1) S(m + n–2) … S2 S1 S0
X = X(m–1) X (m–2) … X2 X1 X0, Y = Y(n–1) Y(n–2) … Y2 Y1 Y0
K = K(m–1) K(m–2) … K2 K1 K0 and M = M(n–1) M(n–2) … M2 M1 M0
(Binary Numbers).
Number of output binary digits = m + n
Number of packages = mxn/4 (For m or n of both odd select next highest even number.)
MC14554B
4
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J
16 PL
0.25 (0.010)
G
0.300 BSC
7.62 BSC
M
S
T
B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MOTOROLA CMOS LOGIC DATA
MC14554B
5
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
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are registered
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MC14554B/D
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