MC74HCXXXADT [MOTOROLA]

Quad 3-State Noninverting Buffers; 四路三态同相缓冲器
MC74HCXXXADT
型号: MC74HCXXXADT
厂家: MOTOROLA    MOTOROLA
描述:

Quad 3-State Noninverting Buffers
四路三态同相缓冲器

文件: 总6页 (文件大小:148K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC74HC125A and MC74HC126A are identical in pinout to the LS125  
and LS126. The device inputs are compatible with standard CMOS outputs;  
with pullup resistors, they are compatible with LSTTL outputs.  
The HC125A and HC126A noninverting buffers are designed to be used  
with 3–state memory address drivers, clock drivers, and other bus–oriented  
systems. The devices have four separate output enables that are active–low  
(HC125A) or active–high (HC126A).  
N SUFFIX  
14–LEAD PLASTIC DIP PACKAGE  
CASE 646–06  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1.0 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
D SUFFIX  
14–LEAD PLASTIC SOIC PACKAGE  
CASE 751A–03  
Chip Complexity: 72 FETs or 18 Equivalent Gates  
LOGIC DIAGRAM  
DT SUFFIX  
14–LEAD PLASTIC TSSOP PACKAGE  
CASE 948G–01  
HC125A  
Active–Low Output Enables  
HC126A  
Active–High Output Enables  
2
1
5
4
3
2
1
5
4
3
ORDERING INFORMATION  
A1  
A1  
Y1  
Y1  
MC74HCXXXAN  
MC74HCXXXAD  
Plastic  
SOIC  
OE1  
OE1  
MC74HCXXXADT TSSOP  
6
6
Y2  
Y3  
A2  
Y2  
Y3  
A2  
PIN ASSIGNMENT  
OE2  
OE2  
OE1  
A1  
1
2
14  
13  
V
CC  
9
10  
12  
13  
8
9
10  
12  
13  
8
OE4  
A3  
A3  
Y1  
3
4
12  
11  
A4  
Y4  
OE3  
OE3  
OE2  
A2  
Y2  
5
6
10  
9
OE3  
A3  
11  
11  
Y4  
A4  
Y4  
A4  
GND  
7
8
Y3  
OE4  
OE4  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
HC125A  
HC126A  
Inputs Output  
Inputs Output  
A
OE  
Y
A
OE  
Y
H
L
X
L
L
H
H
L
Z
H
L
X
H
H
L
H
L
Z
4/97  
Motorola, Inc. 1997  
REV 8  
MC74HC125A MC74HC126A  
MAXIMUM RATINGS*  
Symbol  
Parameter  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
Value  
Unit  
V
This device contains protection  
circuitry to guard against damage  
due to high static voltages or electric  
fields. However, precautions must  
be taken to avoid applications of any  
voltage higher than maximum rated  
voltages to this high–impedance cir-  
V
V
– 0.5 to + 7.0  
CC  
V
– 0.5 to V  
+ 0.5  
V
in  
out  
CC  
– 0.5 to V  
+ 0.5  
V
CC  
I
in  
± 20  
mA  
mA  
mA  
mW  
I
DC Output Current, per Pin  
± 35  
± 75  
out  
cuit. For proper operation, V and  
in  
V
should be constrained to the  
out  
I
DC Supply Current, V  
and GND Pins  
CC  
CC  
range GND (V or V  
)
V
.
in out  
CC  
P
D
Power Dissipation in Still Air  
Plastic DIP†  
SOIC Package†  
TSSOP Package†  
750  
500  
450  
Unused inputs must always be  
tied to an appropriate logic voltage  
level (e.g., either GND or V ).  
CC  
Unused outputs must be left open.  
T
stg  
Storage Temperature  
– 65 to + 150  
C
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP, SOIC or TSSOP Package)  
260  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C  
SOIC Package: – 7 mW/ C from 65 to 125 C  
TSSOP Package: – 6.1 mW/ C from 65 to 125 C  
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
Unit  
V
V
DC Supply Voltage (Referenced to GND)  
6.0  
CC  
V , V  
DC Input Voltage, Output Voltage  
(Referenced to GND)  
V
CC  
V
in out  
T
A
Operating Temperature, All Package Types  
– 55 + 125  
C
t , t  
r f  
Input Rise and Fall Time  
(Figure 1)  
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
0
0
0
1000  
500  
400  
ns  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Test Conditions  
= V – 0.1 V  
85 C  
125 C  
Unit  
V
IH  
Minimum High–Level Input  
Voltage  
V
2.0  
3.0  
4.5  
6.0  
1.5  
2.1  
3.15  
4.2  
1.5  
2.1  
3.15  
4.2  
1.5  
2.1  
3.15  
4.2  
V
out  
CC  
20 µA  
|I  
|
out  
V
Maximum Low–Level Input  
Voltage  
V
= 0.1 V  
2.0  
3.0  
4.5  
6.0  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
V
V
IL  
out  
|I  
|
20 µA  
out  
V
OH  
Minimum High–Level Output  
Voltage  
V
= V  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
in  
IH  
20 µA  
|I  
|
out  
V
in  
= V  
|I  
out  
|I  
out  
|I  
out  
|
|
|
3.6 mA  
6.0 mA  
7.8 mA  
3.0  
4.5  
6.0  
2.48  
3.98  
5.48  
2.34  
3.84  
5.34  
2.2  
3.7  
5.2  
IH  
V
OL  
Maximum Low–Level Output  
Voltage  
V
= V  
|
2.0  
4.5  
6.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
in  
IL  
20 µA  
|I  
out  
V
in  
= V  
|I  
out  
|I  
out  
|I  
out  
|
|
|
3.6 mA  
6.0 mA  
7.8 mA  
3.0  
4.5  
6.0  
0.26  
0.26  
0.26  
0.33  
0.33  
0.33  
0.4  
0.4  
0.4  
IL  
MOTOROLA  
2
MC74HC125A MC74HC126A  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
± 0.1  
± 0.5  
Symbol  
Parameter  
Test Conditions  
= V or GND  
CC  
85 C  
125 C  
± 1.0  
Unit  
µA  
I
in  
Maximum Input Leakage Current  
V
6.0  
6.0  
± 1.0  
in  
Output in High–Impedance State  
= V or V  
I
Maximum Three–State Leakage  
Current  
± 5.0  
± 10  
µA  
OZ  
V
V
in  
IL  
= V  
IH  
or GND  
out  
CC  
or GND  
I
Maximum Quiescent Supply  
Current (per Package)  
V
= V  
6.0  
4.0  
40  
160  
µA  
CC  
in  
CC  
= 0 µA  
I
out  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)  
L
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
t
,
Maximum Propagation Delay, Input A to Output Y  
(Figures 1 and 3)  
2.0  
3.0  
4.5  
6.0  
90  
36  
18  
15  
115  
45  
23  
135  
60  
27  
ns  
PLH  
PHL  
20  
23  
t
t
,
Maximum Propagation Delay, Output Enable to Y  
(Figures 2 and 4)  
2.0  
3.0  
4.5  
6.0  
120  
45  
24  
150  
60  
30  
180  
80  
36  
ns  
ns  
ns  
PLZ  
PHZ  
20  
26  
31  
t
t
,
Maximum Propagation Delay, Output Enable to Y  
(Figures 2 and 4)  
2.0  
3.0  
4.5  
6.0  
90  
36  
18  
15  
115  
45  
23  
135  
60  
27  
PZL  
PZH  
20  
23  
t
t
,
Maximum Output Transition Time, Any Output  
(Figures 1 and 3)  
2.0  
3.0  
4.5  
6.0  
60  
22  
12  
10  
75  
28  
15  
13  
90  
34  
18  
15  
TLH  
THL  
C
Maximum Input Capacitance  
10  
15  
10  
15  
10  
15  
pF  
pF  
in  
C
Maximum Three–State Output Capacitance  
(Output in High–Impedance State)  
out  
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–  
Speed CMOS Data Book (DL129/D).  
Typical @ 25°C, V  
= 5.0 V  
CC  
C
Power Dissipation Capacitance (Per Buffer)*  
pF  
30  
PD  
2
* Used to determine the no–load dynamic power consumption: P = C  
D
Motorola High–Speed CMOS Data Book (DL129/D).  
V
f + I  
V
. For load considerations, see Chapter 2 of the  
PD CC  
CC CC  
3
MOTOROLA  
MC74HC125A MC74HC126A  
SWITCHING WAVEFORMS  
V
CC  
OE (HC125A)  
50%  
50%  
t
t
f
r
GND  
V
CC  
90%  
V
CC  
INPUT A  
50%  
OE (HC126A)  
10%  
GND  
GND  
t
PHL  
t
PLH  
t
t
PZL PLZ  
90%  
OUTPUT Y  
HIGH  
50%  
10%  
IMPEDANCE  
50%  
OUTPUT Y  
OUTPUT Y  
10%  
90%  
V
OL  
t
t
THL  
TLH  
t
t
PZH PHZ  
V
OH  
50%  
HIGH  
IMPEDANCE  
Figure 1.  
Figure 2.  
TEST POINT  
1 k  
TEST POINT  
CONNECT TO V  
WHEN  
CC  
AND t  
TESTING t  
OUTPUT  
OUTPUT  
PLZ  
CONNECT TO GND WHEN  
TESTING t and t  
PZL.  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
PHZ  
PZH.  
C
*
L
C *  
L
* Includes all probe and jig capacitance  
* Includes all probe and jig capacitance  
Figure 3. Test Circuit  
Figure 4. Test Circuit  
V
CC  
OE  
A
Y
HC125A  
(1/4 OF THE DEVICE)  
V
CC  
OE  
A
Y
HC126A  
(1/4 OF THE DEVICE)  
MOTOROLA  
4
MC74HC125A MC74HC126A  
OUTLINE DIMENSIONS  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751A–03  
NOTES:  
ISSUE F  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
–A–  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
14  
1
8
7
P 7 PL  
–B–  
M
M
0.25 (0.010)  
B
MILLIMETERS  
INCHES  
G
F
R X 45°  
DIM  
A
B
C
D
F
G
J
MIN  
8.55  
3.80  
1.35  
0.35  
0.40  
MAX  
8.75  
4.00  
1.75  
0.49  
1.25  
MIN  
MAX  
0.344  
0.157  
0.068  
0.019  
0.049  
C
0.337  
0.150  
0.054  
0.014  
0.016  
J
M
SEATING  
PLANE  
K
D 14 PL  
1.27 BSC  
0.050 BSC  
0.19  
0.10  
0.25  
0.25  
0.008  
0.004  
0.009  
0.009  
M
S
S
0.25 (0.010)  
T
B
A
K
M
P
R
0
5.80  
0.25  
°
7
6.20  
0.50  
°
0
°
7°  
0.244  
0.019  
0.228  
0.010  
N SUFFIX  
PLASTIC DIP PACKAGE  
CASE 646–06  
NOTES:  
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE  
POSITION AT SEATING PLANE AT MAXIMUM  
MATERIAL CONDITION.  
ISSUE L  
14  
1
8
7
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
3. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
4. ROUNDED CORNERS OPTIONAL.  
B
INCHES  
MILLIMETERS  
A
F
DIM  
A
B
C
D
F
G
H
J
K
L
M
N
MIN  
MAX  
0.770  
0.260  
0.185  
0.021  
0.070  
MIN  
18.16  
6.10  
3.69  
0.38  
1.02  
MAX  
19.56  
6.60  
4.69  
0.53  
1.78  
0.715  
0.240  
0.145  
0.015  
0.040  
L
C
0.100 BSC  
2.54 BSC  
0.052  
0.008  
0.115  
0.095  
0.015  
0.135  
1.32  
0.20  
2.92  
2.41  
0.38  
3.43  
J
N
0.300 BSC  
7.62 BSC  
SEATING  
PLANE  
K
0
10  
0
10  
0.015  
0.039  
0.39  
1.01  
H
G
D
M
5
MOTOROLA  
MC74HC125A MC74HC126A  
OUTLINE DIMENSIONS  
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 948G–01  
ISSUE O  
NOTES:  
14X K REF  
0.10 (0.004)  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
M
S
S
T
U
V
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH  
OR GATE BURRS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED  
0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
S
0.15 (0.006) T  
U
N
0.25 (0.010)  
14  
8
7
2X L/2  
M
B
L
N
–U–  
PIN 1  
IDENT.  
F
1
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
DETAIL E  
7. DIMENSION A AND B ARE TO BE DETERMINED  
AT DATUM PLANE –W–.  
S
K
0.15 (0.006) T  
U
A
MILLIMETERS  
INCHES  
K1  
DIM  
A
B
C
D
F
G
H
J
J1  
K
MIN  
4.90  
4.30  
–––  
0.05  
0.50  
MAX  
5.10  
4.50  
1.20  
0.15  
0.75  
MIN  
MAX  
0.200  
0.177  
0.047  
0.006  
0.030  
–V–  
0.193  
0.169  
–––  
0.002  
0.020  
J J1  
SECTION N–N  
0.65 BSC  
0.026 BSC  
0.50  
0.09  
0.09  
0.19  
0.19  
0.60  
0.20  
0.16  
0.30  
0.25  
0.020  
0.004  
0.004  
0.007  
0.007  
0.024  
0.008  
0.006  
0.012  
0.010  
–W–  
C
K1  
L
6.40 BSC  
0.252 BSC  
0.10 (0.004)  
M
0
8
0
8
SEATING  
PLANE  
–T–  
H
G
DETAIL E  
D
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
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Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
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MC74HC125A/D  

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