MRFIC1806 [MOTOROLA]
1.8 GHz DRIVER AMPLIFIER AND RAMP CIRCUIT GaAs MONOLITHIC INTEGRATED CIRCUIT; 1.8 GHz的驱动器放大器和斜坡电路砷化镓单片集成电路
| 型号： | MRFIC1806 |
| 厂家： | 
MOTOROLA |
| 描述： | 1.8 GHz DRIVER AMPLIFIER AND RAMP CIRCUIT GaAs MONOLITHIC INTEGRATED CIRCUIT |
| 文件： | 总12页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document
by MRFIC1806/D
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
Designed primarily for use in DECT, Japan Personal Handy System (PHS),
and other wireless Personal Communication Systems (PCS) applications. The
MRFIC1806 includes a two stage driver amplifier and transmit waveform
shaping circuitry in a low–cost SOIC–16 package. The amplifier portion
employs depletion mode power GaAs MESFETs to produce +21 dBm output
with 0 dBm input. The ramping circuit controls the burst–mode transmit rise and
fall time and is adjustable through external components. This circuitry also
places the amplifier in standby during TDMA receive mode. The MRFIC1806 is
sized to drive the MRFIC1807 PA/Switch.
1.8 GHz DRIVER AMPLIFIER
AND RAMP CIRCUIT
GaAs MONOLITHIC
INTEGRATED CIRCUIT
Together with the rest of the MRFIC1800 GaAs ICs, this family offers the
complete transmit and receive functions, less LO and filters, needed for a
typical 1.8 GHz cordless telephone.
•
•
•
•
•
•
•
Usable 1500–2500 MHz
23 dB Typical Gain
+21 dBm Typical 1.0 dB Compression
Simple Off–Chip Matching for Maximum Flexibility
3.0 to 5.0 Volt Supply
Low Cost Surface Mount Plastic Package
CASE 751B–05
(SO–16)
Order MRFIC1806R2 for Tape and Reel.
R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel.
•
Device Marking = M1806
C1/VRAMP
TX RAMP
1
2
3
4
5
6
7
8
16 VDR
15 GND
14 VD1
13 GND
12 GND
20K
RAMP
LOGIC
XLATOR
REG V
DD
V
V
DD
SS
GND
GND
RF IN
11 RF OUT
10 GND
V
DD
GATE
BIAS
PCNTRL
9
V
SS
Figure 1. Pin Connections and Functional Block Diagram
REV 2
Motorola, Inc. 1997
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Rating
Symbol
Limit
6.0
Unit
Vdc
Vdc
Vdc
Vdc
dBm
Vdc
°C
Supply Voltage
Supply Voltage
Supply Voltage
Bias Control Voltage
RF Input Power
V
DD
V
SS
–4.0
REG V
DD
PCNTRL
4.5
3.0
P
10
IN
Ramp Circuit Input Voltage (High)
Storage Temperature Range
TX RAMP
6.0
T
stg
–65 to +150
–10 to +70
100
Ambient Operating Temperature
Thermal Resistance, Junction to Case
T
A
°C
θ
°C/W
JC
RECOMMENDED OPERATING RANGES
Parameter
Symbol
Value
1.5–2.5
Unit
GHz
Vdc
Vdc
Vdc
Vdc
dBm
Vdc
Vdc
RF Input Frequency
f
RF
Supply Voltage
V
DD
3.0 to 5.0
Supply Voltage
V
SS
–2.75 to –2.25
2.9 to 3.1
Supply Voltage
REG V
DD
PCNTRL
Bias Control Voltage
0.5 to 1.5
RF Input Power
P
IN
–20 to +5
2.8 to 3.5
Transmit Burst Enable Voltage (High)
Transmit Burst Enable Voltage (Low)
TX RAMP
TX RAMP
–0.2 to +0.2
MOTOROLA
MRFIC1806
2
ELECTRICAL CHARACTERISTICS
DECT Application with Internal Logic Translator (See Figure 2. V
= 3.5 V, REG V
= 3.0 V, T = 25°C, V
= –2.5 V,
SS
DD
DD
A
TX RAMP = 3.0 V, PCNTRL set for Quiescent I
= 120 mA, P = –3.0 dBm @ 1.9 GHz unless otherwise stated.)
DD
IN
Characteristic
Min
21
—
—
18
—
—
—
—
—
40
Typ
23
Max
Unit
dB
Small Signal Gain (P = –7.0 dBm)
IN
—
—
Input Return Loss
Reverse Isolation
Output Power
12
dB
36
—
dB
19.5
–36
33
—
dBm
dBc
dBm
mA
mA
mA
dB
Harmonic Output
—
Output Third Order Intercept
—
Supply Current, I
Supply Current, I
(Pin 9)
(Pin 7)
0.35
115
0.6
44
0.6
135
0.9
—
SS
DD
Supply Current, REG I
(Pin 3)
DD
Ramp Circuit Dynamic Range
STANDBY MODE (TX RAMP = 0 V)
Characteristic
Min
—
Typ
–25
0.4
Max
—
Unit
dBm
mA
Output Power
Supply Current, I
(Pin 9)
—
0.6
0.4
SS
Supply Current, REG I
(Pin 3)
—
0.25
mA
DD
C1
330 pF
C2
330 pF
R1
22K
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
20K
3 V (ON)
TX RAMP
0 V (OFF)
R2
2.2
RAMP
LOGIC
XLATOR
C3
330 pF
REG V
3.0 V
DD
C4
22 pF
V
V
DD
SS
T1 (FR4)
Z
= 100
L = 20 mm
o
T2 (FR4)
Z
= 100
o
L = 8.5 mm
RF IN
50 OHM
RF OUT
50 OHM
C6
1.5 pF
C9
1.5 pF
V
3.5 V
C5
22 pF
DD
C7
4700 pF
GATE
BIAS
V
SS
–2.5 V
PCNTRL
1.4 V TYP
Figure 2. Applications Circuit Details for DECT using Internal Logic Translator
MOTOROLA
MRFIC1806
3
ELECTRICAL CHARACTERISTICS
General Application without Internal Logic Translator (See Figure 3. V
= 3.5 V, REG V
(Pin 2) open, V
= –2.5 V,
SS
A
DD
DD
TX RAMP (Pin 2) grounded, V
stated.)
= 3.0 V, PCNTRL set for Quiescent I
= 120 mA, P = 0 dBm @ 1.9 GHz, T = 25°C unless otherwise
RAMP
DD
IN
Characteristic
Min
21
20
—
Typ
23
Max
—
Unit
dB
Small Signal Gain (P = –7.0 dBm)
IN
Output Power (P = 0 dBm)
IN
Output Power (P = +4.0 dBm)
22
—
dBm
dBm
mA
23
—
IN
Supply Current, I
(Pin 9)
(Pin 7)
—
0.3
130
0.5
145
SS
DD
Supply Current, I
—
mA
STANDBY MODE (V
= –2.4 V)
RAMP
Characteristic
Min
—
Typ
–25
0.4
Max
—
Unit
dBm
mA
Output Power
Supply Current, I
(Pin 9)
—
0.6
SS
R1
1K
V RAMP
1
16
15
14
13
12
11
10
9
20K
DD
R2
2.2
2
3
4
5
6
7
8
RAMP
LOGIC
XLATOR
C3
330 pF
N/C
C4
V
V
SS
22 pF
T1 (FR4)
Z
= 100
o
L = 20 mm
T2 (FR4)
= 100
Z
o
L = 8.5 mm
RF IN
50 OHM
RF OUT
50 OHM
C6
1.5 pF
C9
1.5 pF
C5
22 pF
V
DD
C7
4700 pF
GATE
BIAS
V
SS
–2.5 V
PCNTRL
1.4 V TYP
Figure 3. 1.9 GHz General Application Circuit Details (Internal Translator Disabled)
Table 1. Small Signal S–Parameters
(V
DD
= 3.5 V, I
= 120 mA, T = 25°C, no matching circuit, reference plane at pins 6 and 11.)
DQ A
S
11
S
21
S
12
S
22
Freq (GHz)
1.5
Mag
Angle
–76.8
–82.4
–72.6
–79.8
–80.6
–79.4
–79.4
–78.9
–79.1
–79.8
–80.1
Mag
13.11
13.01
11.17
12.25
10.77
10.88
9.64
Angle
–87.9
–109.4
–117.4
–137.0
–151.3
–165.1
–174.9
174.1
Mag
Angle
–176
178
152
170
169
163
163
158
157
153
154
Mag
Angle
0.734
0.654
0.620
0.636
0.607
0.592
0.581
0.571
0.560
0.541
0.521
0.009
0.012
0.011
0.014
0.017
0.019
0.024
0.026
0.029
0.033
0.042
0.278
0.326
0.344
0.423
0.421
0.427
0.432
0.429
0.432
0.442
0.445
–98.9
–116.4
–109.8
–134.1
–147.7
–161.8
–172.3
178.8
1.6
1.7
1.8
1.9
2.0
2.1
2.2
9.30
2.3
7.95
166.9
171.1
2.4
7.80
155.7
164.6
2.5
6.90
147.2
161.7
MOTOROLA
MRFIC1806
4
DESIGN AND APPLICATIONS INFORMATION
DESIGN PHILOSOPHY
The MRFIC1806 is designed to drive the MRFIC1807
Power Amplifier and Transmit/Receive Switch IC in Personal
Communications System (PCS) applications such as
Europe’s DECT and Japan’s Personal Handy System (PHS).
The design incorporates not only a two–stage GaAs MESFET
driver/exciter amplifier, but also externally controllable bias
and ramping circuitry. The IC is designed to drive the
MRFIC1807 with about +19 dBm which will, in turn, produce
+26 dBm output, suitable for DECT. To reduce chip size (and
cost) and to allow for flexibility of application, the amplifier
has limited on–chip matching. The ramp circuitry is used to
shape the drain voltage to the FETs for Time Domain Multiple
Access (TDMA) applications and is comprised of a depletion
mode pass device driven by a logic translator. Attack and
release times are controllable through the use of external
components. The IC is configured such that all, part or none
of the ramping circuitry can be used, depending on the
application.
As with all RF circuits, board layout and grounding are
important. All RF signal paths must be controlled impedance
structures. RF chip components must be high quality.
Bypassing capacitors must be close to the IC and to ground
vias. Pins which are designated as ground connections must
be as close as possible to ground vias.
RAMPING CIRCUIT OPTIONS
The on–chip ramp circuit can be used to control the
amplifier attack and release time for DECT applications
through the use of a few external components as shown in
Figure 2. This ramping is required to control the burst signal
rise and fall time to avoid adjacent channel interference. At
the same time, system specifications require the transmitter
to reach full power in a minimum time. For DECT, it has been
shown that a rise time of not greater than 2 microseconds will
produce acceptable adjacent channel performance. The
system requires full power in not greater than 10 microseconds.
A good compromise, and the timing implemented in Figure 2,
is 7 microseconds.
AMPLIFIER CIRCUIT APPLICATION
As can be seen in Figures 2 and 3, the off–chip matching is
straight forward. At frequencies near 1.9 GHz, the input
requires 4.7 nH in series and 1.5 pF in shunt. The 4.7 nH
series inductance may be implemented with a high–
impedance transmission line as shown. The output, being
close to 25 Ω, requires only a shunt 1.5 pF capacitor. Drain
voltage for stage 1 is supplied through pin 14 and for stage 2
through pin 11, the RF output. Pin 8, PCNTRL is used to set
The on–chip logic translator can be bypassed as shown in
Figure 3 by applying a ramp voltage to Pin 1 through a 1.0 kΩ
resistor. This configuration allows flexibility in ramping the
amplifier. The regulated V
voltage is not required so
DD
current consumption can be reduced. –2.3 V at Pin 1 turns
the pass transistor, and the amplifier, off while a positive
voltage will turn the pass transistor on. For full on state it is
recommendedthatV
be used to on–off key the amplifier for simple telemetry
applications or as transmit/receive control.
beclosetoV .V canalso
RAMP
DD RAMP
the quiescent bias point for both stages. While nominal I
DDQ
is 120 mA, it can be set as high as 180 mA for better linearity
or lower for better efficiency. 120 mA is a good compromise
for DECT and PHS. DECT, which employs GMSK constant
envelope modulation can use RF amplifiers close to or in
saturation without experiencing spectral regrowth of the
signal. PHS, on the other hand, employs π/4 DQPSK
modulation which has some residual AM associated with the
encoding. With AM present, RF amplifiers must be backed
off from saturation so as not to regrow the filtered sidebands.
The MRFIC1806 has plenty of backoff capability for PHS
where the MRFIC1807 PA/switch must only produce about
+21 dBm. With the 8.0 dB gain of the MRFIC1807, the
MRFIC1806 need only produce +13 dBm output so the bias
point can be reduced below the 120 mA suggested for DECT.
For more complex modulation schemes such as π/4
DQPSK used in PHS, burst ramping can be implemented
with the burst mode logic. Referring to Figure 3, the V
RAMP
voltage should be set to V
DD
to leave the pass transistor on.
The on–chip pass transistor can also be bypassed and V
applied to Pins 11 and 14.
DD
EVALUATION BOARDS
Evaluation boards are available for RF Monolithic
Integrated Circuits by adding a “TF” suffix to the device
type. For a complete list of currently available boards and
ones in development for newly introduced product, please
contact your local Motorola Distributor or Sales Office.
MOTOROLA
MRFIC1806
5
22
21
20
21
20
19
18
17
16
15
14
–10°C
25°C
–10
°C
25°C
19
18
17
T
= 70°C
A
T
= 70
2.1
°
C
A
Pin = 0 dBm
Pin = –3 dBm
V
= 3.5 V
= 120 mA
DD
V
= 3.5 V
= 120 mA
DD
I
DDQ
I
DDQ
1.5
1.7
1.9
2.1
2.3
2.5
2.5
5
1.5
1.7
1.9
2.3
2.5
2.5
2
FREQUENCY (GHZ)
FREQUENCY (GHz)
Figure 4. Output Power versus Frequency
With Internal Logic Translator
Figure 5. Output Power versus Frequency
Without Internal Logic Translator
20
23
22
5.0 V
5 V
Pin = 0 dBm
= 25
PCNTRL = 1.5 V
3.5 V
19
18
17
T
°C
A
3.5 V
21
20
V
= 3.0 V
DD
V
= 3 V
DD
16
15
14
Pin = –3 dBm
= 25
T
°C
19
18
A
PCNTRL = 1.5 V
1.5
1.7
1.9
2.1
2.3
1.5
1.7
1.9
2.1
2.3
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 6. Output Power versus Frequency
With Internal Logic Translator
Figure 7. Output Power versus Frequency
Without Internal Translator
25
22
18
2.0 V
1.0 V
1.5 V
20
15
10
14
10
6
1.0 V
PCNTRL = 0.5 V
V
= 3.5 V
DD
f = 1.9 GHz
= 25
V
= 3.5 V
DD
f = 1.9 GHz
= 25
5
0
2
PCNTRL = 0.5 V
T
°C
A
T
°C
A
12
–10
–2
INPUT POWER (dBm)
0
–8
–6
–4
–10
–5
0
INPUT POWER (dBm)
Figure 8. Output Power versus Input Power
With Internal Logic Translator
Figure 9. Output Power versus Input Power
Without Internal Logic Translator
MOTOROLA
MRFIC1806
6
24
22
22
20
–10°C
–10°C
20
18
70°C
18
16
14
12
70°C
16
T
= 25°C
f = 1.9 GHz
A
f = 1.9 GHz
T
= 25°C
V
I
= 3.5 V
= 120 mA
V
I
= 3.5 V
A
DD
DD
14
12
= 120 mA
DDQ
DDQ
–10
–5
0
5
–10
–8
–6
–4
–2
0
2
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 10. Output Power versus Input Power
With Internal Logic Translator
Figure 11. Output Power versus Input Power
Without Internal Logic Translator
22
20
18
16
26
24
5.0 V
5.0 V
3 V
V
= 3.0 V
DD
22
20
18
16
3.5 V
V
= 3.5 V
DD
f = 1.9 GHz
= 25
PCNTRL = 1.5
f = 1.9 GHz
= 25
T
°C
A
14
12
T
°C
14
12
A
PCNTRL = 1.5 V
–10
–8
–6
–4
–2
0
2
–10
–5
0
5
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 12. Output Power versus Input Power
With Internal Logic Translator
Figure 13. Output Power versus Input Power
Without Internal Logic Translator
150
140
130
120
110
100
90
200
180
160
V
= 3.5 V
V
= 3.5 V
= 120 mA
DD
Pin = –3 dBm
= 120 mA
DD
I
DDQ
I
Pin = 0 dBm
DDQ
70°C
70
°C
25°C
25°C
–10°C
140
120
100
–10°C
T
= 10°C
A
70°C
1.5
1.7
1.9
2.1
2.3
2.5
1.5
1.7
1.9
2.1
2.3
2.5
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 14. Supply Current versus Frequency
With Internal Logic Translator
Figure 15. Supply Current versus Frequency
Without Internal Logic Translator
MOTOROLA
MRFIC1806
7
150
140
130
120
210
190
170
Pin = 0 dBm
= 25
PCNTRL = 1.5 V
Pin = –3 dBm
= 25
PCNTRL = 1.5 V
T
°C
A
T
°C
A
5 V
3.5 V
3.5 V
150
130
110
90
5.0 V
110
100
90
V
= 3.0 V
DD
V
= 3.0 V
2.1
DD
1.5
1.7
1.9
2.1
2.3
2.5
1.5
1.7
1.9
2.3
2.5
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 16. Supply Current versus Frequency
With Internal Logic Translator
Figure 17. Supply Current versus Frequency
Without Internal Logic Translator
126
150
140
130
120
f = 1.9 GHz
25°C
124
122
120
118
116
114
112
110
108
f = 1.9 GHz
V
I
= 3.5 V
DD
V
= 3.5 V
= 120 mA
DD
= 120 mA
70
°C
DDQ
T
= 25°C
A
I
DDQ
70°C
T
= 10
°C
A
–10°C
110
100
70°C
–10
–8
–6
–4
–2
0
2
4
–10
–8
–6
–4
–2
0
2
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 18. Supply Current versus Input Power
With Internal Translator
Figure 19. Supply Current versus Input Power
Without Internal Translator
130
125
170
160
150
f = 1.9 GHz
PCNTRL = 1.5 V
f = 1.9 GHz
T
= 25°C
A
T
= 25°C
A
5 V
PCNTRL = 1.5 V
120
115
110
140
130
120
5.0 V
3.5 V
3.5 V
= 3 V
V
DD
105
110
100
V
= 3.0 V
DD
–4
INPUT POWER (dBm)
100
–10
–8
–6
–2
0
2
–10
–8
–6
–4
–2
0
2
4
INPUT POWER (dBm)
Figure 20. Supply Current versus Input Power
With Internal Translator
Figure 21. Supply Current versus Input Power
Without Internal Logic Translator
MOTOROLA
MRFIC1806
8
23
225
200
175
150
125
f = 1.9 GHz
Pin = 0 dBm
21
19
17
T
= 25°C
A
70°C
25°C
15
13
100
75
–10°C
70°C
f = 1.9 GHz
Pin = 0 dBm
10°C
11
9
50
25
0.5
0.75
1
1.25
1.5
1.75
2
0.5
0.75
1
1.25
PCNTRL (Volts)
1.5
1.75
2
PCNTRL (Volts)
Figure 22. Supply Current versus PCNTRL
Without Internal Logic Translator
Figure 23. P
versus PCNTRL Without
out
Internal Logic Translator
25
25
24
24
23
22
21
20
–10°C
–10°C
23
22
T
= 70°C
25°C
A
21
20
19
25°C
T
= 70°C
A
Pin = 7 dBm
Pin = 7 dBm
19
18
V
I
= 3.5 V
DD
V
= 3.5 V
DD
= 120 mA
DDQ
18
17
I
= 120 mA
DDQ
17
1.5
1.7
1.9
2.1
2.3
2.5
1.5
1.7
1.9
2.1
2.3
2.5
f, FREQUENCY (GHz)
f, FREQUENCY (GHz)
Figure 24. Small Signal Gain versus
Frequency With Internal Logic Translator
Figure 25. Small signal Gain versus
Frequency Without Internal Logic Translator
300
250
200
55
50
f = 1.9 GHz
P
V
= –3 dBm
in
V
= 3.5 V
–10°C
DD
= 3.5 V
DD
I
= 120 mA
DDQ
T
= 25°C
A
45
40
35
150
100
50
70
°C
70°
C
T
= 25°C & –10°C
A
0
1.5
1.7
1.9
2.1
2.3
2.5
0.5
0.75
1
1.25
1.5
1.75
2
f, FREQUENCY (GHz)
PCNTRL (Volts)
Figure 26. Dynamic Range versus Frequency
With Internal Logic Translator
Figure 27. Quiescent Supply Current versus
PCNTRL With Internal Logic Translator
MOTOROLA
MRFIC1806
9
22
20
24
–45
f = 1.9 GHz
CW
V
= 3.5 V
= 120 mA
= 25°C
DD
21
18
–50
–55
P
out
I
T
DDQ
A
Burst
Mod = 384 kb/s π/4 DQPSK
18
16
15
12
9
–60
–65
–70
V
= 3.5 V
DD
Freq = 1.9 GHz
600 kHz ACPR
I
= 120 mA
14
12
DDQ
900 kHz ACPR
6
–75
–10
–8
–6
–4
–2
0
–10
–8
–6
–4
–2
0
2
4
P
, INPUT POWER (DBM)
P
, INPUT POWER (DBM)
IN
IN
Figure 28. Output Power and Adjacent
Channel Power Ratio versus Input Power
Without Internal Logic Translator
Figure 29. Continuous and Burst Mode Output
Power versus Input Power With Internal
Logic Translator
MOTOROLA
MRFIC1806
10
PACKAGE DIMENSIONS
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
CASE 751B–05
ISSUE J
MOTOROLA
MRFIC1806
11
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Mfax is a trademark of Motorola, Inc.
How to reach us:
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MRFIC1806/D
◊
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