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74AVC4T774BQ-Q100 [NEXPERIA]

4-bit dual supply translating transceiver; 3-stateProduction;
74AVC4T774BQ-Q100
型号： 74AVC4T774BQ-Q100
厂家： Nexperia    Nexperia
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4-bit dual supply translating transceiver; 3-stateProduction
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74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Rev. 2 — 2 January 2023  
Product data sheet  
1. General description  
The 74AVC4T774-Q100 is a 4-bit, dual supply transceiver that enables bidirectional level  
translation. It features eight 1-bit input-output ports (An and Bn), four direction control inputs (DIR1,  
DIR2, DIR3 and DIR4), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)).  
Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device  
suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V  
and 3.3 V). Pins An, OE and DIRn are referenced to VCC(A) and pins Bn are referenced to VCC(B)  
.
A HIGH on DIRn allows transmission from An to Bn and a LOW on DIRn allows transmission  
from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are  
effectively isolated.  
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing any damaging backflow current through the device when it is  
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn  
are in the high-impedance OFF-state.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range:  
•
•
•
•
•
VCC(A): 0.8 V to 3.6 V  
VCC(B): 0.8 V to 3.6 V  
Complies with JEDEC standards:  
•
•
•
•
•
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
•
•
ESD protection:  
•
•
HBM: ANSI/ESDA/Jedec JS-001 Class 3B exceeds 8000 V  
CDM: ANSI/ESDA/Jedec JS-002 Class C3 exceeds 1500 V  
Maximum data rates:  
•
•
•
•
•
•
380 Mbit/s (≥ 1.8 V to 3.3 V translation)  
200 Mbit/s (≥ 1.1 V to 3.3 V translation)  
200 Mbit/s (≥ 1.1 V to 2.5 V translation)  
200 Mbit/s (≥ 1.1 V to 1.8 V translation)  
150 Mbit/s (≥ 1.1 V to 1.5 V translation)  
100 Mbit/s (≥ 1.1 V to 1.2 V translation)  
•
•
•
•
Suspend mode  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
IOFF circuitry provides partial Power-down mode operation  
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AVC4T774BQ-Q100 -40 °C to +125 °C  
74AVC4T774GU-Q100 -40 °C to +125 °C  
DHVQFN16 plastic dual in-line compatible thermal  
enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 × 3.5 × 0.85 mm  
SOT763-1  
XQFN16  
plastic, extremely thin quad flat  
package; no leads; 16 terminals;  
body 1.80 × 2.60 × 0.50 mm  
SOT1161-1  
4. Marking  
Table 2. Marking codes  
Type number  
Marking code  
C4T774  
74AVC4T774BQ-Q100  
74AVC4T774GU-Q100  
B77  
5. Functional diagram  
B1  
B2  
B3  
B4  
V
CC(B)  
V
CC(A)  
A1 DIR1  
A2 DIR2  
A3 DIR3  
A4 DIR4  
OE  
001aao069  
Fig. 1. Logic symbol  
OE  
An  
DIRn  
Bn  
V
V
CC(B)  
CC(A)  
to next transceiver  
001aao070  
Fig. 2. Logic diagram (one 1-bit transceiver)  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
2 / 23  
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
6. Pinning information  
6.1. Pinning  
GU package  
SOT1161-1 (XQFN16)  
BQ package  
SOT763-1 (DHVQFN16)  
terminal 1  
index area  
terminal 1  
index area  
A1  
1
2
3
4
12 B1  
11 B2  
10 B3  
2
3
4
5
6
7
15  
14  
13  
12  
11  
10  
DIR2  
A1  
V
CC(B)  
A2  
A3  
A4  
B1  
A2  
B2  
A3  
B3  
9
B4  
A4  
B4  
(1)  
GND  
DIR3  
GND  
aaa-035584  
aaa-035583  
Transparent top view  
Transparent top view  
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder  
the pad. In case soldered, the solder land should remain floating or connected to GND.  
6.2. Pin description  
Table 3. Pin description  
Symbol  
Pin  
Description  
SOT763-1  
16  
SOT1161-1  
VCC(A)  
14  
supply voltage A (An, OE and DIRn inputs are  
referenced to VCC(A)  
)
DIR1, DIR2, DIR3, DIR4 1, 2, 7, 8  
15, 16, 5, 6  
direction control input  
A1, A2, A3, A4  
GND  
3, 4, 5, 6  
1, 2, 3, 4  
data input or output  
10  
8
ground (0 V)  
B1, B2, B3, B4  
OE  
14, 13, 12, 11  
12, 11, 10, 9  
data input or output  
9
7
output enable input (active LOW)  
supply voltage B (Bn pins are referenced to VCC(B)  
VCC(B)  
15  
13  
)
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
3 / 23  
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
7. Functional description  
Table 4. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
The An, DIRn and OE input circuit is referenced to VCC(A); The Bn input circuit is referenced to VCC(B)  
.
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
GND [1]  
Input  
Input/output  
An  
OE  
L
DIR1  
L
DIR2  
X
DIR3  
X
DIR4  
X
Bn  
A1 = B1  
input A1  
A2 = B2  
input A2  
A3 = B3  
input A3  
A4 = B4  
input A4  
Z
input B1  
B1 = A1  
input B2  
B2 = A2  
input B3  
B3 = A3  
input B4  
B4 = A4  
Z
L
H
X
X
X
L
X
L
X
X
L
X
H
X
X
L
X
X
L
X
L
X
X
H
X
L
X
X
X
L
L
X
X
X
H
H
X
X
X
X
X
X
X
X
X
Z
Z
[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-0.5  
-50  
-0.5  
-50  
-0.5  
-0.5  
-
Max  
Unit  
V
VCC(A) supply voltage A  
VCC(B) supply voltage B  
+4.6  
+4.6  
V
IIK  
input clamping current  
VI < 0 V  
-
+4.6  
-
mA  
V
VI  
input voltage  
[1]  
IOK  
VO  
output clamping current  
output voltage  
VO < 0 V  
mA  
V
Active mode  
[1][2][3]  
[1]  
VCCO + 0.5  
+4.6  
±50  
Suspend or 3-state mode  
VO = 0 V to VCCO  
ICC(A) or ICC(B)  
V
IO  
output current  
[2]  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
100  
ground current  
-100  
-65  
-
storage temperature  
total power dissipation  
+150  
Tamb = -40 °C to +125 °C  
SOT763-1 (DHVQFN16)  
SOT1161-1 (XQFN16)  
[4]  
-
-
500  
250  
mW  
mW  
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] VCCO is the supply voltage associated with the output port.  
[3] VCCO + 0.5 V should not exceed 4.6 V.  
[4] For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
4 / 23  
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
9. Recommended operating conditions  
Table 6. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
0.8  
0.8  
0
Max  
3.6  
Unit  
V
VCC(A) supply voltage A  
VCC(B) supply voltage B  
3.6  
V
VI  
input voltage  
3.6  
V
VO  
output voltage  
Active mode  
[1]  
[2]  
0
VCCO  
3.6  
V
Suspend or 3-state mode  
0
V
Tamb  
ambient temperature  
-40  
-
+125  
10  
°C  
ns/V  
Δt/ΔV  
input transition rise and fall rate  
VCCI = 0.8 V to 3.6 V  
[1] VCCO is the supply voltage associated with the output port.  
[2] VCCI is the supply voltage associated with the input port.  
10. Static characteristics  
Table 7. Typical static characteristics at Tamb = 25 °C  
VCCI is the supply voltage associated with the data input port.  
VCCO is the supply voltage associated with the output port.  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Typ  
0.69  
0.07  
Max Unit  
VOH  
HIGH-level  
VI = VIH or VIL  
output voltage  
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V  
VI = VIH or VIL  
-
-
-
V
V
VOL  
LOW-level  
output voltage  
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V  
-
-
II  
input leakage DIRn, OE input; VI = 0 V or 3.6 V;  
±0.025 ±0.25 μA  
current  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
IOZ  
OFF-state  
output current  
A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V  
[1]  
[1]  
-
-
±0.5  
±0.5  
±2.5 μA  
±2.5 μA  
suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V;  
VCC(B) = 0 V  
suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V;  
VCC(B) = 3.6 V  
[1]  
-
-
-
-
-
±0.5  
±0.1  
±0.1  
2.0  
±2.5 μA  
IOFF  
power-off  
leakage  
current  
A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;  
VCC(B) = 0.8 V to 3.6 V  
±1  
±1  
-
μA  
μA  
pF  
pF  
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;  
VCC(A) = 0.8 V to 3.6 V  
CI  
input  
DIRn, OE input; VI = 0 V or 3.3 V; VCC(A) = VCC(B) = 3.3 V  
capacitance  
CI/O  
input/output  
capacitance  
A and B port; VO = 3.3 V or 0 V; VCC(A) = VCC(B) = 3.3 V  
4.0  
-
[1] For I/O ports, the parameter IOZ includes the input leakage current.  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
5 / 23  
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Table 8. Static characteristics  
VCCI is the supply voltage associated with the data input port.  
VCCO is the supply voltage associated with the output port.  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
VIH  
HIGH-level  
data input  
input voltage  
VCCI = 0.8 V  
0.70VCCI  
0.65VCCI  
1.6  
-
-
-
-
0.70VCCI  
0.65VCCI  
1.6  
-
-
-
-
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
DIRn, OE input  
V
V
V
2
2
VCC(A) = 0.8 V  
0.70VCC(A)  
-
-
-
-
0.70VCC(A)  
-
-
-
-
V
V
V
V
VCC(A) = 1.1 V to 1.95 V  
VCC(A) = 2.3 V to 2.7 V  
VCC(A) = 3.0 V to 3.6 V  
data input  
0.65VCC(A)  
0.65VCC(A)  
1.6  
2
1.6  
2
VIL  
LOW-level  
input voltage  
VCCI = 0.8 V  
-
-
-
-
0.30VCCI  
0.35VCCI  
0.7  
-
-
-
-
0.30VCCI  
0.35VCCI  
0.7  
V
V
V
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
DIRn, OE input  
0.8  
0.8  
VCC(A) = 0.8 V  
-
-
-
-
0.30VCC(A)  
0.35VCC(A)  
0.7  
-
-
-
-
0.30VCC(A)  
0.35VCC(A)  
0.7  
V
V
V
V
VCC(A) = 1.1 V to 1.95 V  
VCC(A) = 2.3 V to 2.7 V  
VCC(A) = 3.0 V to 3.6 V  
VI = VIH or VIL  
0.8  
0.8  
VOH  
HIGH-level  
output voltage  
IO = -100 μA;  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
VCCO - 0.1  
0.85  
-
-
-
-
-
-
VCCO - 0.1  
0.85  
-
-
-
-
-
-
V
V
V
V
V
V
IO = -3 mA;  
VCC(A) = VCC(B) = 1.1 V  
IO = -6 mA;  
VCC(A) = VCC(B) = 1.4 V  
1.05  
1.05  
IO = -8 mA;  
VCC(A) = VCC(B) = 1.65 V  
1.2  
1.2  
IO = -9 mA;  
VCC(A) = VCC(B) = 2.3 V  
1.75  
1.75  
IO = -12 mA;  
2.3  
2.3  
VCC(A) = VCC(B) = 3.0 V  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
6 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
VOL  
LOW-level  
VI = VIH or VIL  
output voltage  
IO = 100 μA;  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
-
-
-
-
-
-
-
-
-
0.1  
0.25  
0.35  
0.45  
0.55  
0.7  
-
-
-
-
-
-
-
-
-
0.1  
0.25  
0.35  
0.45  
0.55  
0.7  
V
IO = 3 mA;  
VCC(A) = VCC(B) = 1.1 V  
V
IO = 6 mA;  
VCC(A) = VCC(B) = 1.4 V  
V
IO = 8 mA;  
VCC(A) = VCC(B) = 1.65 V  
V
IO = 9 mA;  
VCC(A) = VCC(B) = 2.3 V  
V
IO = 12 mA;  
VCC(A) = VCC(B) = 3.0 V  
V
II  
input leakage DIRn, OE input; VI = 0 V or 3.6 V;  
current  
±1  
±5  
μA  
μA  
μA  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
IOZ  
OFF-state  
output current VCC(A) = VCC(B) = 3.6 V  
A or B port; VO = 0 V or VCCO  
;
[1]  
[1]  
±5  
±30  
±30  
suspend mode A port;  
±5  
VO = 0 V or VCCO; VCC(A) = 3.6 V;  
VCC(B) = 0 V  
suspend mode B port;  
VO = 0 V or VCCO; VCC(A) = 0 V;  
VCC(B) = 3.6 V  
[1]  
-
±5  
-
±30  
μA  
IOFF  
power-off  
leakage  
current  
A port; VI or VO = 0 V to 3.6 V;  
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V  
-
-
±5  
±5  
-
-
±30  
±30  
μA  
μA  
B port; VI or VO = 0 V to 3.6 V;  
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
7 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
ICC  
supply current A port; VI = 0 V or VCCI; IO = 0 A  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
-
-
10  
8
-
-
55  
50  
μA  
μA  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 3.6 V  
B port; VI = 0 V or VCCI; IO = 0 A  
-
8
-
-
50  
-
μA  
μA  
-2  
-12  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
-
-
10  
8
-
-
55  
50  
μA  
μA  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 3.6 V  
A plus B port (ICC(A) + ICC(B));  
-2  
-
-
-12  
-
μA  
μA  
μA  
8
-
-
50  
70  
-
20  
IO = 0 A; VI = 0 V or VCCI  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
;
A plus B port (ICC(A) + ICC(B));  
-
-
16  
-
-
65  
μA  
μA  
IO = 0 A; VI = 0 V or VCCI  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
;
ΔICC  
additional  
VI = 3.0 V; VCC(A) = VCC(B) = 3.6 V  
500  
650  
supply current  
[1] For I/O ports, the parameter IOZ includes the input leakage current.  
Table 9. Typical total supply current (ICC(A) + ICC(B)  
)
VCC(A)  
VCC(B)  
0 V  
0
Unit  
0.8 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.3  
1.6  
1.2 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.8  
1.5 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.4  
1.8 V  
2.5 V  
3.3 V  
0.1  
1.6  
0.8  
0.4  
0.2  
0.1  
0.1  
0 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.2  
0.1  
0.3  
0.1  
0.1  
0.1  
0.1  
0.1  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
0.8 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
8 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
11. Dynamic characteristics  
Table 10. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V). [1] [2]  
Symbol Parameter  
Conditions  
VCC(A) = VCC(B)  
Unit  
0.8 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
CPD  
power dissipation  
capacitance  
A port: (direction An to Bn);  
output enabled  
0.2  
0.2  
0.2  
0.2  
0.3  
0.4  
pF  
pF  
A port: (direction An to Bn);  
output disabled  
0.2  
9.5  
0.6  
9.5  
0.6  
0.2  
0.2  
0.2  
9.7  
0.6  
9.7  
0.6  
0.2  
0.2  
0.2  
9.8  
0.6  
9.8  
0.6  
0.2  
0.2  
0.2  
9.9  
0.6  
9.9  
0.6  
0.2  
0.2  
0.3  
10.7  
0.7  
0.4  
A port: (direction Bn to An);  
output enabled  
11.9 pF  
0.7 pF  
11.9 pF  
A port: (direction Bn to An);  
output disabled  
B port: (direction An to Bn);  
output enabled  
10.7  
0.7  
B port: (direction An to Bn);  
output disabled  
0.7  
0.4  
0.4  
pF  
pF  
pF  
B port: (direction Bn to An);  
output enabled  
0.3  
B port: (direction Bn to An);  
output disabled  
0.3  
[1] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC 2 × fo) = sum of the outputs.  
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
9 / 23  
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Table 11. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for waveforms see Fig. 3 and Fig. 4. [1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
0.8 V  
14.5  
14.5  
14.3  
17.0  
18.2  
19.2  
1.2 V  
7.3  
1.5 V  
1.8 V  
6.2  
2.5 V  
5.9  
3.3 V  
6.0  
tpd  
tdis  
ten  
propagation delay An to Bn  
6.5  
12.4  
14.3  
9.0  
ns  
ns  
ns  
ns  
ns  
ns  
Bn to An  
OE to An  
OE to Bn  
OE to An  
OE to Bn  
12.7  
14.3  
9.9  
12.3  
14.3  
9.4  
12.1  
14.3  
9.0  
12.0  
14.3  
9.7  
disable time  
enable time  
18.2  
10.7  
18.2  
9.8  
18.2  
9.6  
18.2  
9.7  
18.2  
10.2  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 12. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for waveforms see Fig. 3 and Fig. 4. [1]  
Symbol Parameter  
Conditions  
VCC(A)  
1.5 V  
Unit  
0.8 V  
14.5  
14.5  
14.3  
17.0  
18.2  
19.2  
1.2 V  
12.7  
7.3  
1.8 V  
12.3  
6.2  
2.5 V  
12.1  
5.9  
3.3 V  
12.0  
6.0  
tpd  
tdis  
ten  
propagation delay An to Bn  
12.4  
6.5  
ns  
ns  
ns  
ns  
ns  
ns  
Bn to An  
OE to An  
OE to Bn  
OE to An  
OE to Bn  
disable time  
enable time  
5.5  
4.1  
4.0  
3.0  
3.5  
13.8  
5.6  
13.4  
4.0  
13.1  
3.2  
12.9  
2.4  
12.7  
2.2  
14.6  
14.1  
13.9  
13.7  
13.6  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
10 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for waveforms see Fig. 3 and Fig. 4. [1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.1 V to 1.3 V  
tpd  
tdis  
ten  
propagation An to Bn  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
10.5  
10.5  
10.0  
11.1  
13.5  
15.0  
1.3  
1.5  
2.0  
2.0  
2.0  
2.0  
7.8  
9.9  
1.2  
1.5  
2.0  
1.0  
2.0  
2.0  
6.9  
9.7  
1.0  
1.4  
2.0  
0.7  
2.0  
1.0  
5.9  
9.4  
0.8  
1.4  
2.0  
1.0  
2.0  
1.0  
5.7 ns  
9.3 ns  
10.0 ns  
8.0 ns  
13.5 ns  
7.4 ns  
delay  
Bn to An  
disable time OE to An  
OE to Bn  
10.0  
8.6  
10.0  
8.0  
10.0  
7.0  
enable time OE to An  
OE to Bn  
13.5  
11.0  
13.5  
9.4  
13.5  
7.8  
VCC(A) = 1.4 V to 1.6 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.5  
1.3  
1.0  
2.0  
1.0  
2.0  
9.9  
7.8  
1.0  
1.0  
1.0  
1.5  
1.0  
1.4  
7.1  
7.1  
6.0  
7.5  
7.5  
7.9  
1.0  
0.9  
1.0  
0.9  
1.0  
1.3  
6.0  
6.9  
6.0  
7.2  
7.5  
7.7  
0.5  
0.8  
1.0  
0.4  
1.0  
1.1  
4.8  
6.6  
6.0  
6.2  
7.5  
6.4  
0.5  
0.6  
1.0  
0.4  
1.0  
1.1  
4.3 ns  
6.5 ns  
6.0 ns  
6.1 ns  
7.5 ns  
5.6 ns  
Bn to An  
disable time OE to An  
OE to Bn  
6.0  
10.2  
7.5  
enable time OE to An  
OE to Bn  
14.4  
VCC(A) = 1.65 V to 1.95 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.5  
1.2  
0.5  
2.0  
1.0  
1.5  
9.7  
6.9  
0.9  
1.0  
0.5  
1.5  
1.0  
1.2  
6.9  
6.0  
5.7  
7.0  
6.7  
7.2  
0.8  
0.8  
0.5  
0.8  
1.0  
1.2  
5.7  
5.7  
5.7  
6.9  
6.7  
6.9  
0.5  
0.5  
0.5  
0.2  
1.0  
0.8  
4.5  
5.5  
5.7  
5.8  
6.7  
5.4  
0.3  
0.5  
0.5  
0.2  
1.0  
0.6  
4.0 ns  
5.3 ns  
5.7 ns  
5.9 ns  
6.7 ns  
5.0 ns  
Bn to An  
disable time OE to An  
OE to Bn  
5.7  
9.9  
enable time OE to An  
OE to Bn  
6.7  
13.9  
VCC(A) = 2.3 V to 2.7 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.4  
1.0  
0.2  
2.0  
0.6  
1.5  
9.4  
5.9  
0.8  
0.5  
0.2  
1.5  
0.6  
1.0  
6.6  
4.8  
4.0  
6.7  
4.5  
6.8  
0.5  
0.5  
0.2  
0.7  
0.6  
1.0  
5.5  
4.5  
4.0  
6.3  
4.5  
6.0  
0.4  
0.4  
0.2  
0.2  
0.6  
0.8  
4.2  
4.2  
4.0  
5.0  
4.5  
4.6  
0.2  
0.3  
0.2  
0.2  
0.6  
0.6  
3.7 ns  
3.9 ns  
4.0 ns  
5.7 ns  
4.5 ns  
4.2 ns  
Bn to An  
disable time OE to An  
OE to Bn  
4.0  
9.3  
enable time OE to An  
OE to Bn  
4.5  
13.6  
VCC(A) = 3.0 V to 3.6 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.4  
0.8  
0.2  
2.0  
0.5  
1.5  
9.3  
5.7  
0.6  
0.5  
0.2  
1.5  
0.5  
1.0  
6.5  
4.3  
4.5  
6.4  
4.0  
6.7  
0.5  
0.3  
0.2  
0.7  
0.5  
1.0  
5.3  
4.0  
4.5  
6.1  
4.0  
5.9  
0.3  
0.2  
0.2  
0.2  
0.5  
0.7  
3.9  
3.7  
4.5  
4.8  
4.0  
4.4  
0.2  
0.2  
0.2  
0.2  
0.5  
0.5  
3.5 ns  
3.5 ns  
4.5 ns  
5.6 ns  
4.0 ns  
4.0 ns  
Bn to An  
disable time OE to An  
OE to Bn  
4.5  
9.0  
enable time OE to An  
OE to Bn  
4.0  
13.4  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
11 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for waveforms see Fig. 3 and Fig. 4. [1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.1 V to 1.3 V  
tpd  
tdis  
ten  
propagation An to Bn  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
12.1  
12.1  
11.5  
12.8  
15.6  
17.3  
1.3  
1.5  
2.0  
2.0  
2.0  
2.0  
9.0  
11.4  
11.5  
9.9  
1.2  
1.5  
2.0  
1.0  
2.0  
2.0  
8.0  
11.2  
11.5  
9.2  
1.0  
1.4  
2.0  
0.7  
2.0  
1.0  
6.8  
10.9  
11.5  
8.1  
0.8  
1.4  
2.0  
1.0  
2.0  
1.0  
6.6 ns  
10.7 ns  
11.5 ns  
9.2 ns  
15.6 ns  
8.6 ns  
delay  
Bn to An  
disable time OE to An  
OE to Bn  
enable time OE to An  
OE to Bn  
15.6  
12.7  
15.6  
10.9  
15.6  
9.0  
VCC(A) = 1.4 V to 1.6 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.5  
1.3  
1.0  
2.0  
1.0  
2.0  
11.4  
9.0  
1.0  
1.0  
1.0  
1.5  
1.0  
1.4  
8.2  
8.2  
6.9  
8.7  
8.7  
9.1  
1.0  
0.9  
1.0  
0.9  
1.0  
1.3  
6.9  
8.0  
6.9  
8.3  
8.7  
8.9  
0.5  
0.8  
1.0  
0.4  
1.0  
1.1  
5.6  
7.6  
6.9  
7.2  
8.7  
7.4  
0.5  
0.6  
1.0  
0.4  
1.0  
1.1  
5.0 ns  
7.5 ns  
6.9 ns  
7.1 ns  
8.7 ns  
6.5 ns  
Bn to An  
disable time OE to An  
OE to Bn  
6.9  
11.8  
8.7  
enable time OE to An  
OE to Bn  
16.6  
VCC(A) = 1.65 V to 1.95 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.5  
1.2  
0.5  
2.0  
1.0  
1.5  
11.2  
8.0  
0.9  
1.0  
0.5  
1.5  
1.0  
1.2  
8.0  
6.9  
6.6  
8.1  
7.8  
8.3  
0.8  
0.8  
0.5  
0.8  
1.0  
1.2  
6.6  
6.6  
6.6  
8.0  
7.8  
8.0  
0.5  
0.5  
0.5  
0.2  
1.0  
0.8  
5.2  
6.4  
6.6  
6.7  
7.8  
6.3  
0.3  
0.5  
0.5  
0.2  
1.0  
0.6  
4.6 ns  
6.1 ns  
6.6 ns  
6.8 ns  
7.8 ns  
5.8 ns  
Bn to An  
disable time OE to An  
OE to Bn  
6.6  
11.4  
7.8  
enable time OE to An  
OE to Bn  
16.0  
VCC(A) = 2.3 V to 2.7 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.4  
1.0  
0.2  
2.0  
0.6  
1.5  
10.9  
6.8  
0.8  
0.5  
0.2  
1.5  
0.6  
1.0  
7.6  
5.6  
4.6  
7.8  
5.2  
7.9  
0.5  
0.5  
0.2  
0.7  
0.6  
1.0  
6.4  
5.2  
4.6  
7.3  
5.2  
6.9  
0.4  
0.4  
0.2  
0.2  
0.6  
0.8  
4.9  
4.9  
4.6  
5.8  
5.2  
5.3  
0.2  
0.3  
0.2  
0.2  
0.6  
0.6  
4.3 ns  
4.5 ns  
4.6 ns  
6.6 ns  
5.2 ns  
4.9 ns  
Bn to An  
disable time OE to An  
OE to Bn  
4.6  
10.7  
5.2  
enable time OE to An  
OE to Bn  
15.7  
VCC(A) = 3.0 V to 3.6 V  
tpd  
tdis  
ten  
propagation An to Bn  
delay  
1.4  
0.8  
0.2  
2.0  
0.5  
1.5  
10.7  
6.6  
0.6  
0.5  
0.2  
1.5  
0.5  
1.0  
7.5  
5.0  
5.2  
7.4  
4.6  
7.8  
0.5  
0.3  
0.2  
0.7  
0.5  
1.0  
6.1  
4.6  
5.2  
7.1  
4.6  
6.8  
0.3  
0.2  
0.2  
0.2  
0.5  
0.7  
4.5  
4.3  
5.2  
5.6  
4.6  
5.1  
0.2  
0.2  
0.2  
0.2  
0.5  
0.5  
4.1 ns  
4.1 ns  
5.2 ns  
6.5 ns  
4.6 ns  
4.6 ns  
Bn to An  
disable time OE to An  
OE to Bn  
5.2  
10.4  
4.6  
enable time OE to An  
OE to Bn  
15.5  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
12 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
11.1. Waveforms and test circuit  
V
I
V
An, Bn input  
GND  
M
t
t
PLH  
PHL  
V
OH  
V
Bn, An output  
M
V
OL  
001aao074  
Measurement points are given in Table 15.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 3. The data input (An, Bn) to output (Bn, An) propagation delay times  
V
I
V
OE input  
M
GND  
t
t
PZL  
PLZ  
V
CCO  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
V
HIGH-to-OFF  
OFF-to-HIGH  
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aao075  
Measurement points are given in Table 15.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 4. Enable and disable times  
Table 15. Measurement points  
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 1.6 V  
1.65 V to 2.7 V  
3.0 V to 3.6 V  
Input [1]  
Output [2]  
VM  
VM  
VX  
VY  
0.5 × VCCI  
0.5 × VCCI  
0.5 × VCCI  
0.5 × VCCO  
0.5 × VCCO  
0.5 × VCCO  
VOL + 0.1 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOH - 0.1 V  
VOH - 0.15 V  
VOH - 0.3 V  
[1] VCCI is the supply voltage associated with the data input port.  
[2] VCCO is the supply voltage associated with the output port.  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
13 / 23  
 
 
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 16.  
RL = Load resistance;  
CL = Load capacitance including jig and probe capacitance;  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator;  
VEXT = External voltage for measuring switching times.  
Fig. 5. Test circuit for measuring switching times  
Table 16. Test data  
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 1.6 V  
1.65 V to 2.7 V  
3.0 V to 3.6 V  
Input  
VI [1]  
VCCI  
VCCI  
VCCI  
Load  
CL  
VEXT  
Δt/ΔV [2]  
≤ 1.0 ns/V  
≤ 1.0 ns/V  
≤ 1.0 ns/V  
RL  
tPLH, tPHL  
open  
tPZH, tPHZ  
GND  
tPZL, tPLZ [3]  
2 × VCCO  
2 × VCCO  
2 × VCCO  
15 pF  
15 pF  
15 pF  
2 kΩ  
2 kΩ  
2 kΩ  
open  
GND  
open  
GND  
[1] VCCI is the supply voltage associated with the data input port.  
[2] dV/dt ≥ 1.0 V/ns.  
[3] VCCO is the supply voltage associated with the output port.  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
14 / 23  
 
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
11.2. Typical propagation delay characteristics  
001aai476  
001aai477  
24  
21  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
t
pd  
(ns)  
t
pd  
(ns)  
(1)  
20  
17  
16  
12  
8
13  
(2)  
(3)  
(4)  
(5)  
(6)  
4
9
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C (pF)  
L
a. Propagation delay (A to B); VCC(A) = 0.8 V  
(1) VCC(B) = 0.8 V  
b. Propagation delay (A to B); VCC(B) = 0.8 V  
(1) VCC(A) = 0.8 V  
(2) VCC(B) = 1.2 V  
(3) VCC(B) = 1.5 V  
(4) VCC(B) = 1.8 V  
(5) VCC(B) = 2.5 V  
(6) VCC(B) = 3.3 V  
(2) VCC(A) = 1.2 V  
(3) VCC(A) = 1.5 V  
(4) VCC(A) = 1.8 V  
(5) VCC(A) = 2.5 V  
(6) VCC(A) = 3.3 V  
Fig. 6. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
15 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
001aai478  
001aai491  
7
7
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
5
3
1
5
3
1
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.2 V  
b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.2 V  
001aai479  
001aai480  
7
7
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
c. LOW to HIGH propagation delay (A to B); VCC(A) = 1.5 V  
d. HIGH to LOW propagation delay (A to B); VCC(A) = 1.5 V  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
Fig. 7. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
16 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
001aai481  
001aai482  
7
7
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.8 V  
b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.8 V  
001aai483  
001aai486  
7
7
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
c. LOW to HIGH propagation delay (A to B); VCC(A) = 2.5 V  
d. HIGH to LOW propagation delay (A to B); VCC(A) = 2.5 V  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
Fig. 8. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
17 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
001aai485  
001aai484  
7
7
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
a. LOW to HIGH propagation delay (A to B); VCC(A) = 3.3 V  
b. HIGH to LOW propagation delay (A to B); VCC(A) = 3.3 V  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
18 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
12. Package outline  
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 x 3.5 x 0.85 mm  
SOT763-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16  
15  
10  
D
h
X
0
2.5  
scale  
5 mm  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.  
0.05 0.30  
0.00 0.18  
3.6  
3.4  
2.15  
1.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT763-1  
- - -  
MO-241  
- - -  
Fig. 10. Package outline SOT763-1 (DHVQFN16)  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
19 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
XQFN16: plastic, extremely thin quad flat package; no leads;  
16 terminals; body 1.80 x 2.60 x 0.50 mm  
SOT1161-1  
X
B
A
E
D
terminal 1  
index area  
A
A
1
A
3
detail X  
e
1
C
v
C
C
A B  
e
b
y
1
y
w
C
5
8
L
4
1
9
e
e
2
12  
terminal 1  
index area  
16  
13  
L
1
0
1
2 mm  
scale  
Dimensions  
(1)  
Unit  
A
A
A
b
D
E
e
e
1
e
2
L
L
1
v
w
y
y
1
1
3
max 0.5 0.05  
mm nom  
min  
0.25 1.9 2.7  
0.127 0.20 1.8 2.6  
0.15 1.7 2.5  
0.45 0.55  
1.2 0.40 0.50 0.1 0.05 0.05 0.05  
0.35 0.45  
0.4  
1.2  
0.00  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot1161-1_po  
Issue date  
References  
Outline  
version  
European  
projection  
IEC  
- - -  
JEDEC  
- - -  
JEITA  
- - -  
09-12-28  
09-12-29  
SOT1161-1  
Fig. 11. Package outline SOT1161-1 (XQFN16)  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
20 / 23  
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
13. Abbreviations  
Table 17. Abbreviations  
Acronym  
Description  
CDM  
DUT  
ESD  
HBM  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
14. Revision history  
Table 18. Revision history  
Document ID  
Release date Data sheet status  
20230102 Product data sheet  
Section 2 updated.  
Change notice Supersedes  
74AVC4T774_Q100 v.2  
Modifications:  
-
74AVC4T774_Q100 v.1  
•
74AVC4T774_Q100 v.1  
20220511  
Product data sheet  
-
-
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
21 / 23  
 
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
equipment, nor in applications where failure or malfunction of an Nexperia  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. Nexperia and its suppliers accept  
no liability for inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
15. Legal information  
Data sheet status  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
[1][2]  
status [3]  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
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terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Disclaimers  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Suitability for use in automotive applications — This Nexperia product  
has been qualified for use in automotive applications. Unless otherwise  
agreed in writing, the product is not designed, authorized or warranted to  
be suitable for use in life support, life-critical or safety-critical systems or  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
22 / 23  
 
Nexperia  
74AVC4T774-Q100  
4-bit dual supply translating transceiver; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Marking..........................................................................2  
5. Functional diagram.......................................................2  
6. Pinning information......................................................3  
6.1. Pinning.........................................................................3  
6.2. Pin description.............................................................3  
7. Functional description................................................. 4  
8. Limiting values............................................................. 4  
9. Recommended operating conditions..........................5  
10. Static characteristics..................................................5  
11. Dynamic characteristics.............................................9  
11.1. Waveforms and test circuit.......................................13  
11.2. Typical propagation delay characteristics.................15  
12. Package outline........................................................ 19  
13. Abbreviations............................................................21  
14. Revision history........................................................21  
15. Legal information......................................................22  
© Nexperia B.V. 2023. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 2 January 2023  
©
74AVC4T774_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 2 — 2 January 2023  
23 / 23  

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