74HCT594D [NEXPERIA]
8-bit shift register with output registerProduction;
| 型号： | 74HCT594D |
| 厂家： | 
Nexperia |
| 描述： | 8-bit shift register with output registerProduction 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总23页 (文件大小：342K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC594; 74HCT594
8-bit shift register with output register
Rev. 7 — 20 October 2022
Product data sheet
1. General description
The 74HC594; 74HCT594 is an 8-bit serial-in/serial or parallel-out shift register with a storage
register. Separate clock and reset inputs are provided on both shift and storage registers. The
device features a serial input (DS) and a serial output (Q7S) to enable cascading. Data is shifted
on the LOW-to-HIGH transitions of the SHCP input, and the data in the shift register is transferred
to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are
connected together, the shift register will always be one clock pulse ahead of the storage register.
A LOW level on one of the two register reset pins (SHR and STR) will clear the corresponding
register. Inputs include clamp diodes. This enables the use of current limiting resistors to interface
inputs to voltages in excess of VCC
.
2. Features and benefits
•
Synchronous serial input and output
8-bit parallel output
Shift and storage registers have independent direct clear and clocks
Independent clocks for shift and storage registers
100 MHz (typical)
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
•
•
•
•
•
•
•
•
•
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Input levels:
•
•
For 74HC594: CMOS level
For 74HCT594: TTL level
•
•
Complies with JEDEC standards
•
•
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
•
•
HBM JESD22-A114F exceeds 2 kV
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
•
•
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
•
•
Serial-to parallel data conversion
Remote control holding register
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC594D
74HCT594D
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
SOT338-1
SOT403-1
SOT763-1
74HC594DB
74HCT594DB
SSOP16
TSSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74HC594PW
74HCT594PW
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HC594BQ
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
5. Functional diagram
14
DS
11
SHCP
SHR
8-STAGE SHIFT REGISTER
10
9
Q7S
12
STCP
STR
8-BIT STORAGE REGISTER
13
15
1
2
3
4
5
6
7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
mbc320
Fig. 1. Functional diagram
SHCP STCP
13
12
10
11
STR
R2
C2
11 12
STCP
SHR
Q7S
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
9
15
1
R1 SRG8
C1/
SHCP
14
15
1
DS
Q0
1D
2D
2
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q7S
DS
14
3
2
3
4
4
5
5
6
6
7
7
10
13
9
SHR STR
mbc319
mbc322
Fig. 2. Logic symbol
Fig. 3. IEC logic symbol
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
2 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
STAGE 0
STAGES 1 TO 6
STAGE 7
DS
Q7S
D
Q
FFSH0
CP
D
Q
D
Q
FFSH7
CP
R
R
SHCP
SHR
D
FFST0
CP
D
FFST7
CP
Q
Q
R
R
STCP
STR
mbc321
Q0
Q1 Q2 Q3 Q4 Q5 Q6
Q7
Fig. 4. Logic diagram
SHCP
DS
STCP
SHR
STR
Q0
Q1
Q6
Q7
Q7S
mbc323
Fig. 5. Timing diagram
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
3 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
6. Pinning information
6.1. Pinning
D package
SOT109-1 (SO16)
1
2
3
4
5
6
7
8
16
V
Q1
Q2
DB package
SOT338-1 (SSOP16)
CC
15
14
13
12
11
10
9
Q0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q1
Q2
V
CC
Q3
DS
Q0
Q4
STR
STCP
SHCP
SHR
Q7S
Q3
DS
Q5
Q4
STR
STCP
SHCP
SHR
Q7S
Q5
Q6
Q6
Q7
Q7
GND
GND
aaa-035345
aaa-035346
BQ package
SOT763-1 (DHVQFN16)
terminal 1
index area
PW package
SOT403-1 (TSSOP16)
2
3
4
5
6
7
15
14
13
12
11
10
Q2
Q0
Q3
Q4
Q5
Q6
Q7
DS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q1
Q2
Q3
Q4
Q5
Q6
Q7
V
CC
STR
STCP
SHCP
SHR
Q0
DS
STR
STCP
SHCP
SHR
Q7S
(1)
CC
V
aaa-034033
GND
Transparent top view
aaa-035347
(1) This is not a supply pin. There is no electrical or mechanical requirement to solder
the pad. In case soldered, the solder land should remain floating or connected to VCC
.
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
4 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
6.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
15, 1, 2, 3, 4, 5, 6, 7
parallel data output
ground (0 V)
GND
Q7S
SHR
SHCP
STCP
STR
DS
8
9
serial data output
10
11
12
13
14
16
shift register reset (active LOW)
shift register clock input
storage register clock input
storage register reset (active LOW)
serial data input
VCC
supply voltage
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH transition; X = don’t care.
Function
Input
SHR STR SHCP STCP DS
Clear shift register
L
X
L
X
X
↑
X
X
X
↑
X
Clear storage register
X
H
X
H
X
Load DS into shift register stage 0, advance previous stage data to the next stage
Transfer shift register data to storage register and outputs Qn
Shift register one count pulse ahead of storage register
X
H
H
H or L
X
↑
X
X
↑
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
5 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
+7.0
±20
±20
Unit
V
VCC
IIK
supply voltage
-0.5
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to VCC + 0.5 V
Serial data output Q7S
[1]
[1]
-
-
mA
mA
IOK
IO
-
±25
±35
50
mA
mA
mA
mA
mA
mA
°C
Parallel data output Qn
Serial data output Q7S
-
ICC
supply current
ground current
-
Parallel data output Qn
Serial data output Q7S
-
70
IGND
-
-
-50
-70
+150
500
Parallel data output Qn
Tstg
Ptot
storage temperature
total power dissipation
-65
-
Tamb = -40 °C to +125 °C
[2]
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74HC594
74HCT594
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
2.0
5.0
4.5
5.0
V
V
V
input voltage
0
0
-
VCC
VCC
+125
625
139
83
0
0
-
VCC
VCC
VO
output voltage
-
-
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
-
-
-40
-
-
+125 °C
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
1.67
-
-
1.67
-
-
ns/V
-
-
139 ns/V
-
-
-
ns/V
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
6 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
10. Static characteristics
Table 6. Static characteristics type 74HC594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 °C
Conditions
Min
Typ
Max
Unit
VIH
HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VI = VIH or VIL
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
-
V
V
V
V
V
V
3.15
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
-
-
-
0.5
1.35
1.8
VOH
Q7S; IO = -4.0 mA; VCC = 4.5 V
3.98
5.48
3.98
5.48
4.32
5.81
4.32
5.81
-
-
-
-
V
V
V
V
Q7S; IO = -5.2 mA; VCC = 6.0 V
Qn; IO = -6.0 mA; VCC = 4.5 V
Qn; IO = -7.8 mA; VCC = 6.0 V
VOL
LOW-level output voltage
VI = VIH or VIL
Q7S; IO = 4.0 mA; VCC = 4.5 V
Q7S; IO = 5.2 mA; VCC = 6.0 V
Qn; IO = 6.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0.15
0.16
0.15
0.16
-
0.26
0.26
0.26
0.26
±0.1
8.0
V
V
V
Qn; IO = 7.8 mA; VCC = 6.0 V
V
II
input leakage current
supply current
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
μA
μA
pF
ICC
Ci
-
input capacitance
3.5
-
Tamb = -40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
Q7S; IO = -4.0 mA; VCC = 4.5 V
Q7S; IO = -5.2 mA; VCC = 6.0 V
Qn; IO = -6.0 mA; VCC = 4.5 V
Qn; IO = -7.8 mA; VCC = 6.0 V
VI = VIH or VIL
3.84
5.34
3.84
5.34
-
-
-
-
-
-
-
-
V
V
V
V
VOL
LOW-level output voltage
Q7S; IO = 4.0 mA; VCC = 4.5 V
Q7S; IO = 5.2 mA; VCC = 6.0 V
Qn; IO = 6.0 mA; VCC = 4.5 V
Qn; IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
-
-
-
0.33
0.33
0.33
0.33
±1.0
80
V
V
V
V
II
input leakage current
supply current
μA
μA
ICC
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
7 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = -40 °C to +125 °C
VIH
HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VI = VIH or VIL
1.5
-
-
-
-
-
-
-
-
V
V
V
V
V
V
3.15
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
-
-
-
0.5
1.35
1.8
VOH
Q7S; IO = -4.0 mA; VCC = 4.5 V
3.7
5.2
3.7
5.2
-
-
-
-
-
-
-
-
V
V
V
V
Q7S; IO = -5.2 mA; VCC = 6.0 V
Qn; IO = -6.0 mA; VCC = 4.5 V
Qn; IO = -7.8 mA; VCC = 6.0 V
VOL
LOW-level output voltage
VI = VIH or VIL
Q7S; IO = 4.0 mA; VCC = 4.5 V
Q7S; IO = 5.2 mA; VCC = 6.0 V
Qn; IO = 6.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
-
-
-
-
-
0.4
0.4
V
V
0.4
V
Qn; IO = 7.8 mA; VCC = 6.0 V
0.4
V
II
input leakage current
supply current
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
±1.0
160
μA
μA
ICC
Table 7. Static characteristics type 74HCT594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 °C
Conditions
Min
Typ
Max
Unit
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
V
V
LOW-level input voltage
HIGH-level output voltage
VCC = 4.5 V to 5.5 V
0.8
VOH
VI = VIH or VIL
Q7S; IO = -4.0 mA; VCC = 4.5 V
Qn; IO = -6.0 mA; VCC = 4.5 V
VI = VIH or VIL
3.98
3.98
4.32
4.32
-
-
V
V
VOL
LOW-level output voltage
Q7S; IO = 4.0 mA; VCC = 4.5 V
Qn; IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
-
-
0.15
0.26
0.26
±0.1
8.0
V
0.16
V
II
input leakage current
supply current
-
-
μA
μA
ICC
ΔICC
additional supply current
per input pin; VI = VCC - 2.1 V and
other inputs at VCC or GND; IO = 0 A;
VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
150
25
540
90
-
μA
μA
pF
Ci
input capacitance
3.5
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
8 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = -40 °C to +85 °C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
LOW-level input voltage
HIGH-level output voltage
VCC = 4.5 V to 5.5 V
0.8
VOH
VI = VIH or VIL
Q7S; IO = -4.0 mA; VCC = 4.5 V
Qn; IO = -6.0 mA; VCC = 4.5 V
VI = VIH or VIL
3.84
3.84
-
-
-
-
V
V
VOL
LOW-level output voltage
Q7S; IO = 4.0 mA; VCC = 4.5 V
Qn; IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
-
-
-
-
-
-
0.33
0.33
±1.0
80
V
V
II
input leakage current
supply current
μA
μA
ICC
ΔICC
additional supply current
per input pin; VI = VCC - 2.1 V and
other inputs at VCC or GND; IO = 0 A;
VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
-
675
μA
112.5 μA
Tamb = -40 °C to +125 °C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
LOW-level input voltage
HIGH-level output voltage
VCC = 4.5 V to 5.5 V
0.8
VOH
VI = VIH or VIL
Q7S; IO = -4.0 mA; VCC = 4.5 V
Qn; IO = -6.0 mA; VCC = 4.5 V
VI = VIH or VIL
3.7
3.7
-
-
-
-
V
V
VOL
LOW-level output voltage
Q7S; IO = 4.0 mA; VCC = 4.5 V
Qn; IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
-
-
-
-
-
-
0.4
0.4
V
V
II
input leakage current
supply current
±1.0
160
μA
μA
ICC
ΔICC
additional supply current
per input pin; VI = VCC - 2.1 V and
other inputs at VCC or GND; IO = 0 A;
VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
-
735
μA
122.5 μA
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
9 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
11. Dynamic characteristics
Table 8. Dynamic characteristics type 74HC594
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; For test circuit see Fig. 12.
Symbol Parameter Conditions
25 °C
Min Typ Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
tpd
propagation SHCP to Q7S; see Fig. 6
[1]
delay
VCC = 2.0 V
-
-
-
-
44
16
13
14
150
30
-
-
-
-
-
185
37
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
31
38
STCP to Qn; see Fig. 7
VCC = 2.0 V
-
-
-
-
44
16
13
14
150
30
-
-
-
-
-
185
37
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
31
38
tPHL
HIGH
SHR to Q7S; see Fig. 10
VCC = 2.0 V
to LOW
propagation
delay
-
-
-
-
39
14
11
12
150
30
-
-
-
-
-
185
37
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
31
38
STR to Qn; see Fig. 11
VCC = 2.0 V
-
-
-
-
39
14
11
12
125
25
-
-
-
-
-
155
31
-
-
-
-
-
185
37
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
21
26
31
tTHL
HIGH to
LOW output
transition
time
Q7S; see Fig. 6
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
Qn
VCC = 2.0 V
-
-
-
14
5
60
12
10
-
-
-
75
15
13
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
tTLH
LOW to
HIGH output
transition
time
Q7S; see Fig. 6
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
Qn
VCC = 2.0 V
-
-
-
14
5
60
12
10
-
-
-
75
15
13
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
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74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
10 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tW
pulse width SHCP (HIGH or LOW);
see Fig. 6
VCC = 2.0 V
80
16
14
10
4
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
3
17
20
STCP (HIGH or LOW);
see Fig. 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
80
16
14
10
4
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
3
17
20
SHR and STR
(HIGH or LOW); see Fig. 10
and Fig. 11
VCC = 2.0 V
VCC = 4.5 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 6.0 V
4
17
20
tsu
set-up time DS to SHCP; see Fig. 8
VCC = 2.0 V
100
20
10
4
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
3
21
26
SHR to STCP; see Fig. 9
VCC = 2.0 V
100
20
14
5
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
4
21
26
SHCP to STCP; see Fig. 7
VCC = 2.0 V
100
20
17
6
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
5
21
26
th
hold time
DS to SHCP; see Fig. 8
VCC = 2.0 V
25
5
-8
-3
-2
-
-
-
30
6
-
-
-
35
7
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
5
6
trec
recovery
time
SHR to SHCP and
STR to STCP; see Fig. 10
and Fig. 11
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
50
10
9
-14
-5
-
-
-
65
13
11
-
-
-
75
15
13
-
-
-
ns
ns
ns
-4
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74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
11 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
fmax
maximum
frequency
SHCP or STCP;
see Fig. 6 and Fig. 7
VCC = 2.0 V
6.0
30
-
30
92
-
-
-
-
-
4.8
24
-
-
-
-
-
-
4.0
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
100
109
84
35
-
28
-
24
-
CPD
power
VI = GND to VCC; VCC = 5 V; [2]
fi = 1 MHz
dissipation
capacitance
[1] tpd is the same as tPHL and tPLH
.
[2] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC 2 × fi × N + ∑(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC 2 × fo) = sum of outputs.
Table 9. Dynamic characteristics type 74HCT594
GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; For test circuit see Fig. 12.
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
40
-
Min
Max
48
-
tpd
propagation SHCP to Q7S; see Fig. 6
[1]
-
-
-
-
-
-
-
-
18
15
18
15
17
14
17
14
32
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
delay
VCC = 5.0 V; CL = 15 pF
STCP to Qn; see Fig. 7
VCC = 5.0 V; CL = 15 pF
SHR to Q7S; see Fig. 10
VCC = 5.0 V; CL = 15 pF
STR to Qn; see Fig. 11
VCC = 5.0 V; CL = 15 pF
Q7S; see Fig. 6
VCC = 4.5 V
32
-
40
-
48
-
tPHL
tTHL
tTLH
tW
HIGH
30
-
38
-
45
-
to LOW
propagation
delay
30
-
38
-
45
-
HIGH to
LOW output
transition
time
-
-
-
7
5
7
15
12
15
-
-
-
19
15
19
-
-
-
22
18
22
ns
ns
ns
Qn
VCC = 4.5 V
LOW to
HIGH output
transition
time
Q7S; see Fig. 6
VCC = 4.5 V
Qn
VCC = 4.5 V
-
5
4
12
-
-
15
-
-
18
-
ns
ns
pulse width SHCP (HIGH or LOW);
see Fig. 6
16
20
24
STCP (HIGH or LOW);
see Fig. 7
16
16
4
6
-
-
20
20
-
-
24
24
-
-
ns
ns
SHR and STR
(HIGH or LOW);
see Fig. 10 and Fig. 11
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74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
12 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
25
25
25
6
Max
Min
30
30
30
7
Max
tsu
set-up time DS to SHCP; see Fig. 8
20
20
20
5
4
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
SHR to STCP; see Fig. 9
SHCP to STCP; see Fig. 7
DS to SHCP; see Fig. 8
7
th
hold time
-3
-5
trec
recovery
time
SHR to SHCP and
STR to STCP;
10
13
15
see Fig. 10 and Fig. 11
fmax
maximum
frequency
SHCP or STCP;
see Fig. 6 and Fig. 7
30
92
-
24
-
20
-
MHz
VCC = 5.0 V; CL = 15 pF
-
-
100
89
-
-
-
-
-
-
-
-
-
-
MHz
pF
CPD
power
VI = GND to VCC - 1.5 V;
VCC = 5 V; fi = 1 MHz
[2]
dissipation
capacitance
[1] tpd is the same as tPHL and tPLH
.
[2] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC 2 × fi × N + ∑(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC 2 × fo) = sum of outputs.
11.1. Waveforms and test circuit
1/f
max
SHCP input
V
M
t
W
t
t
PHL
PLH
Q7S output
V
M
t
t
TLH
THL
001aae341
Measurement points are given in Table 10.
Fig. 6. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse width, the maximum shift
clock frequency, and output transition times
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74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
13 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
V
SHCP input
M
t
su
1/f
max
V
t
M
STCP input
Qn outputs
t
W
t
PHL
PLH
V
M
mla512
Measurement points are given in Table 10.
Fig. 7. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the maximum
storage clock pulse frequency and the shift clock to storage clock set-up time
V
SHCP input
M
t
t
su
su
t
t
h
h
V
DS input
M
V
Q7 output
M
001aae342
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 8. The data set-up time and hold times for DS input to SHCP
V
M
SHR input
t
su
V
M
STCP input
V
M
Qn outputs
mbc326
Measurement points are given in Table 10.
Fig. 9. The set-up time shift reset (SHR) to storage clock (STCP)
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74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
14 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
V
M
SHR input
SHCP input
Q7S output
t
W
t
rec
V
M
t
PHL
V
M
mbc324
Measurement points are given in Table 10.
Fig. 10. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to
shift clock (SHCP) recovery time
V
M
STR input
t
W
t
rec
V
M
STCP input
t
PHL
V
M
Qn outputs
mbc325
Measurement points are given in Table 10.
Fig. 11. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation delay and the storage
reset to storage clock (STCP) recovery time
Table 10. Measurement points
Type
Input
VM
Output
VM
74HC594
0.5 × VCC
1.3 V
0.5 × VCC
1.3 V
74HCT594
©
74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
15 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
I
V
O
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
CL = Load capacitance including jig and probe capacitance;
RL = Load resistance;
S1 = Test selection switch.
Fig. 12. Test circuit for measuring switching times
Table 11. Test data
Type
Input
VI
Load
CL
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC594
VCC
3 V
15 pF, 50 pF 1 kΩ
15 pF, 50 pF 1 kΩ
74HCT594
open
GND
VCC
©
74HC_HCT594
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
16 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 13. Package outline SOT109-1 (SO16)
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
17 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
E
v
M
A
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.2
0.13
0.1
0.25
0.65
1.25
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig. 14. Package outline SOT338-1 (SSOP16)
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
18 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 15. Package outline SOT403-1 (TSSOP16)
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
19 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig. 16. Package outline SOT763-1 (DHVQFN16)
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
20 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
13. Abbreviations
Table 12. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MM
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 13. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
74HC_HCT594 v.7
Modifications:
20221020
Type number 74HC594BQ (SOT763-1/DHVQFN16) added.
20211022 Product data sheet 74HC_HCT594 v.5
Type number 74HCT594PW (SOT403-1/TSSOP16) added.
20210812 Product data sheet 74HC_HCT594 v.4
Product data sheet
-
74HC_HCT594 v.6
•
74HC_HCT594 v.6
Modifications:
-
•
74HC_HCT594 v.5
Modifications:
-
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Type numbers 74HC594PW (SOT403-1/TSSOP16) added.
Section 8: Derating values for Ptot total power dissipation updated.
74HC_HCT594 v.4
Modifications:
20160225
Type numbers 74HC594N and 74HCT594N (SOT38-4) removed.
20061220 Product data sheet 74HC_HCT594_CNV v.2
Product data sheet
-
74HC_HCT594 v.3
•
74HC_HCT594 v.3
Modifications:
-
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 1: Ordering information updated.
74HC_HCT594_CNV v.2
19970908
Product specification
-
74HC_HCT594_CNV v.1
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
21 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
22 / 23
Nexperia
74HC594; 74HCT594
8-bit shift register with output register
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................4
6.1. Pinning.........................................................................4
6.2. Pin description.............................................................5
7. Functional description................................................. 5
8. Limiting values............................................................. 6
9. Recommended operating conditions..........................6
10. Static characteristics..................................................7
11. Dynamic characteristics...........................................10
11.1. Waveforms and test circuit.......................................13
12. Package outline........................................................ 17
13. Abbreviations............................................................21
14. Revision history........................................................21
15. Legal information......................................................22
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 20 October 2022
©
74HC_HCT594
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 20 October 2022
23 / 23
相关型号：
74HCT594D-T
IC HCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16, Shift Register
NXP
74HCT594DB-T
IC HCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-6, Shift Register
NXP
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