NXT4556UP [NEXPERIA]
SIM card interface level translatorProduction;型号: | NXT4556UP |
厂家: | Nexperia |
描述: | SIM card interface level translatorProduction |
文件: | 总19页 (文件大小:263K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NXT4556
SIM card interface level translator
Rev. 2 — 15 June 2022
Product data sheet
1. General description
The NXT4556 device is built for interfacing a SIM card with a single low-voltage host side interface.
The NXT4556 has three level translators to convert the data, RST and CLK signals between a
SIM card and a host microcontroller. A high speed level translation capable of supporting class-B,
class-C SIM cards. VCC_SIM power-down initiates a shutdown sequence on SIM card pins in
accordance with ISO-7816-3.
The NXT4556 is compliant with all ETSI, IMT-2000 and ISO-7816 SIM/Smart card interface
requirements.
2. Features and benefits
•
Support SIM cards and eSIM with supply voltages 1.62 V to 3.3 V
•
•
Host micro-controller operating voltage range: 1.08 V to 1.98 V
Automatic level translation of I/O, RST and CLK between SIM card and host side interface with
capacitance isolation
•
•
•
•
•
•
•
Incorporates shutdown feature for the SIM card signals according to ISO-7816-3
High Vdis(UVLO_AC) switching level, arranging quick shut down when VCC_SIM powers down
Integrated pull-up resistors; no external resistor required
Integrated EMI Filters suppresses higher harmonics of digital I/O's
Low current shutdown mode < 1 μA
Supports clock speed beyond 5 MHz clock
Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen and
antimony (Dark Green compliant)
•
ESD protection:
•
•
•
HBM ANSI/ESDA/JEDEC JS-001 exceeds 2 kV
CDM ANSI/ESDA/JEDEC JS-002 exceeds 1 kV
IEC61000-4-2 level 4, contact and air discharge on all SIM card-side pins exceeds 8 kV and
15 kV
•
Available in 9-pin wafer level chip-scale package (WLCSP); 9 bumps;
1.06 mm x 1.06 mm x 0.43 mm body; 0.35 mm pitch
3. Applications
•
NXT4556 can be used with a range of SIM card attached devices including:
•
•
•
Mobile and personal phones
Wireless modems
SIM card terminals
Nexperia
NXT4556
SIM card interface level translator
4. Ordering information
Table 1. Ordering information
Type
Package
number
Temperature range Name
Description
Version
NXT4556UP -40 °C to +85 °C
WLCSP9 wafer level chip-scale package; 9 bumps;
1.06 × 1.06 × 0.43 mm body
SOT8027-1
5. Marking
Table 2. Marking
Type number
Marking code[1]
NXT4556UP
z6
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
2 / 19
Nexperia
NXT4556
SIM card interface level translator
6. Functional diagram
V
V
CC_SIM
CC_HOST
V
V
CC_SIM
CC_HOST
R
S
RST_HOST
RST_SIM
R
pd
Shut down
V
V
CC_SIM
CC_HOST
R
S
CLK_HOST
CLK_SIM
R
pd
Shut down
V
V
CC_SIM
CC_HOST
R
pu
R
pu
ONE
ONE
SHOT
SHOT
R
R
S
S
IO_HOST
IO_SIM
Control
Logic
R
pd
Shut down
NXT4556
aaa-034876
Fig. 1. Functional diagram
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
3 / 19
Nexperia
NXT4556
SIM card interface level translator
7. Pinning information
7.1. Pinning
NXT4556
1
2
3
RST_HOST
RST_SIM
A
B
C
V
CC_HOST
NXT4556
ball A1
index area
1
2
3
A
B
C
CLK_HOST
IO_HOST
CLK_SIM
IO_SIM
GND
V
CC_SIM
aaa-034877
aaa-034878
Transparent top view
Transparent top view
Fig. 2. Bump configuration for SOT8027-1 (WLCSP9)
Fig. 3. Bump mapping for SOT8027-1 (WLCSP9)
7.2. Pin description
Table 3. Pin description
Symbol
Bump Type
Description
RST_HOST A1
I
Reset input from host controller.
VCC_HOST
RST_SIM
A2
A3
power
Supply voltage for the host controller side input/output pins (CLK_HOST, RST_HOST,
IO_HOST). This pin should be bypassed with a 0.1 µF ceramic capacitor close to the pin.
O
I
Reset output pin for the SIM card.
Clock input from host controller.
CLK_HOST B1
GND
B2
ground Ground for the SIM card and host controller. Proper grounding and bypassing are required
to meet ESD specifications.
CLK_SIM
IO_HOST
B3
C1
O
Clock output pin for the SIM card.
I/O
Host controller bidirectional data input/output. This pin can be driven from push-pull as well
as open-drain drivers.
VCC_SIM
IO_SIM
C2
C3
power
I/O
Supply voltage for the SIM CARD side input/output pins. This input voltage ranges from
1.62 V to 3.3 V. This pin should be bypassed with a 0.1 μF ceramic capacitor close to the
pin.
SIM card bidirectional data input/output. The SIM card output must be on an open-drain
driver.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
4 / 19
Nexperia
NXT4556
SIM card interface level translator
8. Functional description
8.1. Functional behavior
The functional diagram of the NTX4556 is shown in Fig. 1.
The upper part of Fig. 1 shows the RST and CLK channels which are uni-directional level shifters
from the host to the SIM card side.
The bottom part shows the architecture of the bidirectional I/O channel. Both on IO_HOST and
IO_SIM a resistor Rpu pulls up the I/O node. On both sides an output stage is present that consists
of a PMOST and an NMOST device. Each output stage drives the output through a series resistor
RS. Input stages sense the I/O nodes and pass LOW/HIGH information to the control logic that
controls the translator outputs and several pull-up and pull-down resistors.
The NXT4556 I/O channel does not require a dedicated input signal to control the direction of data
flow from IO_HOST to IO_SIM or from IO_SIM to IO_HOST. Change in driving direction is possible
when both sides are at HIGH state. The control logic recognizes the I/O node with the first falling
edge and grants control over the opposite I/O node. When for example the IO_HOST is turned
LOW, the control circuit will turn on the NMOST on the IO_SIM side, pulling LOW IO_SIM. The
IO_SIM pin is then an output only, until IO_HOST is turned HIGH and the translator has turned
IO_SIM HIGH again.
The PMOST devices are used to actively turn high the outputs. Each PMOST is driven by a one-
shot circuit that generates a pulse. For example: Assuming HOST to SIM communication, when
the IO_HOST is turned HIGH, it will activate the one shot circuit on the IO_SIM side. A pulse starts,
arranging a fast LOW to HIGH transition on IO_SIM. When the pulse has finished, the PMOST
is released. At that stage, the system returns to a standard open drain state whereby the pull
resistors keep the I/O nodes HIGH.
At the same time, at a LOW to HIGH transition, the one shot on the input side is activated as well.
In an open drain application, this creates a typical input LOW to HIGH waveform. Fig. 4 shows an
example of a LOW to HIGH transition in an open drain application.
aaa-034373
3.5
3.5
V
IO_SIM
V
_
V
_
(V)
IO HOST
(V)
IO SIM
2.5
1.5
2.5
1.5
0.5
-0.5
V
IO_HOST
0.5
-0.5
-200
-100
0
100
200
t (ns)
Fig. 4. LOW to HIGH transition for IO_HOST to IO_SIM communication
Looking at the input signal, the first part of the LOW to HIGH transition is an exponential curve
caused by the I/O node capacitance being charged via the pull-up resistor. The second part starts
when the input signal crosses the input switching level. The rising edge is accelerated dramatically
by the PMOST that is turned on by the one shot on the input side.
In case of a communication error or some other unforeseen incident that may drive both connected
sides of the drivers at the same time, the internal logic automatically prevents stuck-at situation.
This ensures that both I/Os will return to HIGH level once released from being driven LOW.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
5 / 19
Nexperia
NXT4556
SIM card interface level translator
In shut down mode, the control circuit disables all output stages. Additionally, in shut down mode,
the pull-up resistor on IO_SIM side is disabled, and all pull-down resistors Rpd on SIM side are
enabled, pulling LOW the pins on the SIM side. The shut down sequence is explained in more
detail in Section 8.3.
8.2. Window of I/O communication
When the translator is in operating mode, I/O communication can take place through the I/O
channel. Communication can take place in both directions IO_HOST ↔ IO_SIM. Additionally,
during operating mode, the RST_HOST and CLK_HOST signals are passed to RST_SIM and
CLK_SIM respectively.
The translator is active when VCC_HOST and VCC_SIM are at a proper level. Fig. 5 shows how
VCC_SIM controls the translator mode. VCC_HOST is assumed to be default present and is not shown
in the waveform.
When VCC_SIM has turned HIGH, I/O communication can commence after a certain amount of time:
Δt > 300 ns.
It is assumed that during the power up sequence, the nodes of IO_HOST and and IO_SIM are not
pulled down by the host controller and the SIM card. The translator has integrated pull-up resistors
and will turn HIGH both IO_HOST and IO_SIM. The pull-up resistors Rpu are pointed out in Fig. 1.
V
dis(UVLO_AC)
V
V
CC_SIM
en(UVLO)
t
IO_HOST/IO_SIM
IO communication
aaa-034880
Δt > 300 ns
Fig. 5. Timing window for I/O communication
When VCC_SIM drops below Vdis(UVLO), the translator turns to shutdown mode. Section 8.3 illustrates
the shutdown sequence in more detail.
8.3. Shutdown sequence
The ISO 7816-3 specification specifies the shutdown sequence for the SIM card signals to ensure
that the card is properly disabled for power savings. Also, during hot swap, the orderly shutdown of
these signals helps to avoid any improper write and corruption of data.
When VCC_SIM drops below Vdis(UVLO_AC), the shutdown sequence is initiated. Fig. 6 illustrates the
shutdown sequence initiated by VCC_SIM being powered down.
The shut down sequence starts by pulling down the RST_SIM output. Once RST_SIM is turned
LOW, CLK_SIM and IO_SIM are pulled LOW sequentially, one-by-one. Internal pull-down resistors
on the SIM pins are used to pull the SIM channels LOW. The internal pull-down resistors, Rpd, that
pull down the three pins on the SIM side are shown in Fig. 1. The shutdown sequence is completed
in a few microseconds. The interval time (Δt), is typically 4 μs.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
6 / 19
Nexperia
NXT4556
SIM card interface level translator
V
dis(UVLO_AC)
V
CC_SIM
RST_SIM
CLK_SIM
IO_SIM
t
t
aaa-034881
Δt = 4 µs (typical)
The shaded areas indicate that the signals are HIGH or LOW.
Fig. 6. Shutdown sequence for RST_SIM, CLK_SIM and IO_SIM of NXT4556 SIM card
translator
8.4. UVLO
When VCC_SIM drops below Vdis(UVLO_AC), the translator goes to shut down mode. This is illustrated
in Fig. 5. The switching level Vdis(UVLO_AC) has a high value of approximately 86 %xVCC_SIM
.
The circuitry uses an AC detection mechanism that operates accurately with a falling slope that
is typical in the SIM card application. Next to this AC detection, a standard UVLO detection is
in place that has no condition with respect to the slope of the rising or falling VCC_SIM. For the
standard UVLO, the parameters Ven(UVLO) and Vdis(UVLO) are involved which have lower values
than Vdis(UVLO_AC). When VCC_SIM is powered up, the translator is enabled when VCC_SIM crosses
Ven(UVLO). This is illustrated in Fig. 5.
8.5. EMI filter
All output driver stages of I/O, RST and CLK channels are equipped with EMI filters to reduce
interference towards sensitive mobile communication.
8.6. ESD protection
The device has robust ESD protections on all SIM card pins. The architecture prevents any stress
for the host: the voltage translator discharges any stress to supply ground.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
7 / 19
Nexperia
NXT4556
SIM card interface level translator
9. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VESD electrostatic discharge SIM card side; IEC 61000-4-2; level 4; contact
-
±8
kV
voltage
discharge
SIM card side; IEC 61000-4-2; level 4; air
discharge
-
±15
kV
all other pins; IEC 61000-4-2; level 4
all other pins; HBM
-
±2
±2
kV
kV
kV
V
[1]
[2]
-
all other pins; CDM
-
±1
VCC_HOST supply voltage
GND - 0.5
GND - 0.5
4.6
4.6
VCC_SIM
SIM card supply
voltage
V
VI
input voltage
CLK_HOST; input signal voltage, HOST side
RST_HOST; input signal voltage, HOST side
IO_HOST; input signal voltage, HOST side
CLK_SIM; input signal voltage, SIM side
RST_SIM; input signal voltage, SIM side
IO_SIM; input signal voltage, SIM side
GND - 0.5
GND - 0.5
GND - 0.5
GND - 0.5
GND - 0.5
GND - 0.5
-55
4.6
4.6
V
V
V
V
V
V
°C
4.6
4.6
4.6
4.6
Tstg
storage temperature
+125
[1] Human Body Model (HBM) according to JESD22-A-A114.
[2] Charged-Device Model (CDM) according to JESD22-C101.
10. Recommended operating conditions
Table 5. Operating conditions
Symbol Parameter
Conditions
Min
1.08
1.62
-0.3
-0.3
-40
Typ
Max
1.98 V
3.3
Unit
V
VCC_HOST supply voltage
[1]
[1]
-
VCC_SIM
VI
card side supply voltage
-
V
input voltage
HOST side
SIM side
-
-
VCC_HOST + 0.3 V
VCC_SIM + 0.3
+85
V
Tamb
ambient temperature
+25
°C
[1] VCC_SIM ≥ VCC_HOST
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
8 / 19
Nexperia
NXT4556
SIM card interface level translator
11. Electrical characteristics
Table 6. Electrical characteristics
1.08 V ≤ VCC_HOST ≤ 1.98 V; 1.62 V ≤ VCC_SIM ≤ 3.3 V; GND = 0 V; unless otherwise specified.
Symbol
Parameter
Conditions
Tamb = -40 °C to +85 °C
Unit
Min
Typ[1]
Max
ICC_HOST
supply current
operating mode; fclk = 1 MHz;
IO_HOST = IO_SIM = HIGH
[2]
-
5
10
μA
shutdown mode; IO_HOST = HIGH
[3]
[2]
-
-
-
1
8
μA
μA
ICC_SIM
card side supply
current
operating mode;
2
IO_HOST = IO_SIM = HIGH;
CLK_HOST = RST_HOST = LOW
Ven(UVLO)
undervoltage
lockout enable
voltage
VCC_SIM rising; VCC_HOST = 1.8 V
VCC_SIM falling; VCC_HOST = 1.8 V
VCC_SIM falling;
0.85
0.65
1.2
1.0
1.6
1.3
V
V
Vdis(UVLO)
undervoltage
lockout disable
voltage
Vdis(UVLO_AC) undervoltage
lockout disable
voltage
-dV/dt = 0.9 V/ms to 9 V/ms;
VCC_SIM = 1.8 V
-
-
-
-
1.55
-
-
-
-
V
V
V
V
-dV/dt = 1.5 V/ms to 15 V/ms;
VCC_SIM = 3.0 V
2.58
-dV/dt = 0.9 V/ms to 9 V/ms;
VCC_SIM = 1.71 V to 1.89 V
0.86VCC_SIM
0.86VCC_SIM
-dV/dt = 1.5 V/ms to 15 V/ms;
VCC_SIM = 2.85 V to 3.15 V
[1] Typical values measured at 25 °C.
[2] Internal pull-up resistance active on IO_HOST and IO_SIM
[3] Internal pull-up resistance active on IO_HOST
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
9 / 19
Nexperia
NXT4556
SIM card interface level translator
Table 7. Static characteristics
1.08 V ≤ VCC_HOST ≤ 1.98 V; 1.62 V ≤ VCC_SIM ≤ 3.3 V; GND = 0 V; unless otherwise specified.
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
Typ[1]
Unit
Min
Max
Level shifter
VIH
HIGH-level
input voltage
RST_HOST, CLK_HOST
IO_HOST
[2] 0.65VCC_HOST
0.5VCC_HOST
-
-
VCC_HOST + 0.3 V
VCC_HOST + 0.3 V
IO_SIM
[2] 0.5VCC_SIM
-
VCC_SIM + 0.3
0.35VCC_HOST
0.3VCC_HOST
0.25VCC_SIM
7.3
V
VIL
LOW-level
RST_HOST, CLK_HOST
IO_HOST
[2]
[2]
[2]
-0.3
-
V
input voltage
-0.3
-
V
IO_SIM
-0.3
-
V
Rpu
pull-up
IO_SIM connected to VCC_SIM
IO_HOST connected to VCC_HOST
RST_SIM, CLK_SIM; IOH = -1 mA
IO_SIM; IOH = -10 μA
IO_HOST; IOH = -10 μA
RST_SIM, CLK_SIM; IOL = 1 mA
IO_SIM; IOL = 1 mA
3.3
5.3
4.3
-
kΩ
kΩ
V
resistance
2.8
6
VOH
HIGH-level
0.85VCC_SIM
VCC_SIM+0.3
VCC_SIM+0.3
VCC_HOST+0.3
200
output voltage
0.85VCC_SIM
-
V
0.85VCC_HOST
-
V
VOL
LOW-level
-
-
-
-
50
50
50
400
mV
mV
mV
Ω
output voltage
300
IO_HOST; IOL = 1 mA
CLK_SIM, RST_SIM, IO_SIM
300
Rpd
pull-down
resistance
-
EMI filter
RS
series
resistance
IO_SIM
-
-
-
-
-
-
44
44
44
10
10
10
-
-
-
-
-
-
Ω
RST_SIM
CLK_SIM
IO_SIM
Ω
Ω
Cio
input/output
capacitance
pF
pF
pF
RST_SIM
CLK_SIM
[1] Typical values measured at 25 °C.
[2] VIL, VIH depend on the individual supply voltage per interface.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
10 / 19
Nexperia
NXT4556
SIM card interface level translator
Table 8. Dynamic characteristics
Push-pull: test circuit see Fig. 8; CL = 50 pF.
Open-drain: test circuit see Fig. 9; CIO_HOST = 10 pF; CIO_SIM = 30 pF.
For waveform see Fig. 7.
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C;
VCC_SIM = 1.8 V ± 0.18 V VCC_SIM = 3.0 V ± 0.3 V
Unit
Min
Typ[1]
Max
Min
Typ[1]
Max
VCC_HOST = 1.2 V ± 0.12 V
tpd
propagation
delay
I/O channel; push-pull
I/O channel; open-drain
[2]
[3]
-
-
-
12
15
12
20
25
20
-
-
-
12
15
12
20
25
20
ns
ns
ns
CLK and RST channels;
push-pull
tt
transition time IO_HOST; push-pull
-
-
-
-
10
10
-
-
-
-
10
10
ns
ns
IO_SIM; RST_SIM; CLK_SIM;
push-pull
tsk
skew time
between channels IO_SIM and
CLK_SIM; push-pull
-
-
2
-
-
-
-
2
-
-
ns
fclock
fdata
clock
frequency
CLK channel; push-pull
[4]
25
25
MHz
data rate
I/O channel; push-pull
[4]
[4]
-
-
-
-
5
-
-
-
-
5
Mbps
I/O channel; open-drain;
see Fig. 9
800
800 kbps
VCC_HOST = 1.8 V ± 0.18 V
tpd
propagation
delay
I/O channel; push-pull
I/O channel; open-drain
[2]
[3]
-
-
-
7
8
7
12
15
12
-
-
-
7
8
7
12
15
12
ns
ns
ns
CLK and RST channels;
push-pull
tt
transition time IO_HOST; push-pull
-
-
-
-
10
10
-
-
-
-
10
10
ns
ns
IO_SIM; RST_SIM; CLK_SIM;
push-pull
tsk
skew time
between channels IO_SIM and
CLK_SIM; push-pull
-
-
2
-
-
-
-
2
-
-
ns
fclock
fdata
clock
frequency
CLK channel; push-pull
[4]
25
25
MHz
data rate
I/O channel; push-pull
[4]
[4]
-
-
-
-
5
-
-
-
-
5
Mbps
I/O channel; open-drain;
see Fig. 9
800
800 kbps
[1] Typical values measured at 25 °C.
[2] tpd is the same as tPHL and tPLH
[3] tt is the same as tTHL and tTLH
[4] Criteria: duty cycle between 40% and 60%; Voltage swing between 10% VCCI and 90% VCCI
.
.
.
©
NXT4556
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
11 / 19
Nexperia
NXT4556
SIM card interface level translator
11.1. Waveforms and test circuits
V
I
input
V
M
GND
t
t
PHL
PLH
V
OH
90 %
output
V
M
10 %
V
OL
t
t
THL
TLH
002aag078
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. Data input to data output propagation delay times
t
r
t
f
V
I
90 %
90 %
positive
pulse
10 %
10 %
0 V
V
V
CCO
CCI
V
V
O
I
G
DUT
C
L
aaa-034882
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz; ZO = 50 Ω; tr, tf ≤ 2.5 ns.
CL = Load capacitance including jig and probe capacitance.
VCCI is the supply voltage associated with the input.
VCCO is the supply voltage associated with the output.
Fig. 8. Test circuit for measuring switching times for push-pull drive
Table 9. Test data for push-pull drive
Supply voltage
VCC_HOST
Direction
Input
VI
Output
VM
Load
CL
VCC_SIM
VM
1.08 V to 1.98 V 1.62 V to 3.3 V host side to SIM card side
1.08 V to 1.98 V 1.62 V to 3.3 V SIM card side to host side
VCC_HOST 0.5VCC_HOST 0.5VCC_SIM
50 pF
VCC_SIM
0.5VCC_SIM
0.5VCC_HOST 50 pF
©
NXT4556
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
12 / 19
Nexperia
NXT4556
SIM card interface level translator
t
t
f
r
V
I
90 %
positive
pulse
10 %
0 V
V
V
CCO
CCI
V
V
O
I
50 Ω
DUT
C
in
C
L
G
aaa-034883
Test data is given in Table 10.
Pulse generator (G) has the following characteristics: PRR ≤ 10 MHz; ZO = 50 Ω; tr, tf ≤ 2.5 ns.
CL = Load capacitance including jig and probe capacitance.
VCCI is the supply voltage associated with the input.
VCCO is the supply voltage associated with the output.
Rise time on input pin strongly depends on source impedance, internal pull-up resistor and load capacitance (Cin).
Fig. 9. Test circuit for measuring switching times for open drain drive
Table 10. Test data for open drain drive
Supply voltage
VCC_HOST
Direction
Input
VI
Output
VM
Load
Cin
VCC_SIM
VM
CL
1.08 V to 1.98 V 1.62 V to 3.3 V host side to
SIM card side
VCC_HOST
0.6VCC_HOST 0.6VCC_SIM
10 pF
30 pF
1.08 V to 1.98 V 1.62 V to 3.3 V SIM card side VCC_SIM
to host side
0.5VCC_SIM
0.5VCC_HOST 30 pF
10 pF
12. Application information
The application circuit for the NXT4556, which shows the typical interface with a SIM card, is
shown in Fig. 10. Supply decoupling capacitors (100 nF) are recommended and should be placed
close to the translator product.
V
(1.08 V to 1.98 V)
V
(1.62 V to 3.3 V)
CC_HOST
CC_SIM
100 nF
100 nF
HOST
PROCESSOR
NXT4556
SIM CARD
RST_HOST
RST_SIM
CLK_SIM
IO_SIM
CLK_HOST
IO_HOST
LEVEL
TRANSLATOR
aaa-034884
Fig. 10. NXT4556 application circuit interfacing with typical SIM card
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NXT4556
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 15 June 2022
13 / 19
Nexperia
NXT4556
SIM card interface level translator
13. Design and assembly recommendations
13.1. PCB design guidelines
For optimum performance, use a Non-Solder Mask PCB Design (NSMD), also known as a
copper-definied design, incorporating laser-drilled micro-vias connecting the ground pads to a
buried ground-plane layer. This results in the lowest possible ground inductance and provides the
best high frequency and ESD performance. For this case, refer to Table 11 for the recommended
PCB design parameters.
Table 11. Recommended PCB design parameters
Parameter
Value or specification
circular
PCB Cu pad shape
PCB Cu pad diameter
PCB solder resist diameter
WLCSP pad diameter (UBM)
200 µm
270 µm
200 µm
13.2. PCB assembly guidelines for Pb-free soldering
Table 12. Assembly recommendations
Parameter
Value or specification
circular
PCB stencil shape
PCB stencil aperture diameter
PCB stencil thickness
Solder paste material
Solder reflow profile
200 µm
80 µm
SnAg4Cu (Cu 0.5%) (SAC405)
see Fig. 11
T
(°C)
T
reflow(peak)
250
230
217
cooling rate
preheat
t (s)
t
t
2
1
t
t
3
4
t
5
001aai943
The device can withstand at least three reflows with this profile.
Fig. 11. Pb-free solder reflow profile
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Product data sheet
Rev. 2 — 15 June 2022
14 / 19
Nexperia
NXT4556
SIM card interface level translator
Table 13. Reflow soldering process characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
230
Typ Max Unit
treflow(peak) peak reflow temperature
-
-
-
-
-
-
-
-
260 °C
t1
time 1
time 2
time 3
time 4
time 5
soak time
60
-
180
30
s
s
s
s
s
t2
time during T ≥ 250 °C
time during T ≥ 230 °C
time during T ≥ 217 °C
t3
10
30
-
50
t4
150
540
t5
dT/dt
rate of change of
temperature
cooling rate
preheat
-
-6 °C/s
4.0 °C/s
2.5
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NXT4556
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Nexperia B.V. 2022. All rights reserved
Product data sheet
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15 / 19
Nexperia
NXT4556
SIM card interface level translator
14. Package outline
WLCSP9: wafer level chip-scale package; 9 bumps; 1.06 mm x 1.06 mm x 0.43 mm body
SOT8027-1
s
C
2x
this surface is
fully covered by
B
E
A
`'Backside Coating''
bump A1
index area
A
2
D
A
A
1
detail X
s
C
2x
C
e
e
y
1
y
C
C
9x
C
B
A
e
e
bump A1
index area
1
2
3
M
M
v
w
C A B
C
b
(9x)
X
0
1 mm
scale
v
Dimensions (mm are the original dimensions)
Unit
max 0.468 0.183 0.285 0.245
A
A
A
b
D
E
e
s
w
y
y
1
1
2
nom
min
mm
0.430 0.163 0.267 0.225 1.06 1.06 0.35 0.025 0.015 0.05 0.05 0.06
0.392 0.143 0.249 0.205
Note
1. Dimension A includes backside coating thickness.
sot8027-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
21-06-11
21-06-16
SOT8027-1
Fig. 12. Package outline SOT8027-1 (WLCSP16)
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Nexperia
NXT4556
SIM card interface level translator
15. Abbreviations
Table 14. Abbreviations
Acronym
Description
CDM
ESD
HBM
MSL
PCB
SIM
Charged-Device Model
ElectroStatic Discharge
Human Body Model
Moisture Sensitivity Level
Printed-Circuit Board
Subscriber Identification Module
16. Revision history
Table 15. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
NXT4556 v.2
Modifications:
20220615
Product data sheet
-
NXT4556 v.1
•
•
•
Table 3 corrected (errata).
Fig. 4 corrected (errata).
Fig. 10 corrected (errata).
NXT4556 v.1
20220502
Product data sheet
-
-
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Nexperia
NXT4556
SIM card interface level translator
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
17. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
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liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
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with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
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sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
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or replacement of any products or rework charges) whether or not such
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In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
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and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
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Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
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Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
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Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
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Nexperia
NXT4556
SIM card interface level translator
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................2
5. Marking..........................................................................2
6. Functional diagram.......................................................3
7. Pinning information......................................................4
7.1. Pinning.........................................................................4
7.2. Pin description.............................................................4
8. Functional description................................................. 5
8.1. Functional behavior..................................................... 5
8.2. Window of I/O communication.....................................6
8.3. Shutdown sequence.................................................... 6
8.4. UVLO...........................................................................7
8.5. EMI filter....................................................................7
8.6. ESD protection............................................................ 7
9. Limiting values............................................................. 8
10. Recommended operating conditions........................8
11. Electrical characteristics............................................9
11.1. Waveforms and test circuits.....................................12
12. Application information........................................... 13
13. Design and assembly recommendations............... 14
13.1. PCB design guidelines............................................ 14
13.2. PCB assembly guidelines for Pb-free soldering.......14
14. Package outline........................................................ 16
15. Abbreviations............................................................17
16. Revision history........................................................17
17. Legal information......................................................18
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 June 2022
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Nexperia B.V. 2022. All rights reserved
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Rev. 2 — 15 June 2022
19 / 19
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