DP7125 [NIDEC]
32-Tap Digital Potentiometers;
| 型号： | DP7125 |
| 厂家： | 
NIDEC COMPONENTS |
| 描述： | 32-Tap Digital Potentiometers |
| 文件： | 总12页 (文件大小：146K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DP7110, DP7118,
DP7119, DP7123,
DP7124, DP7125
32-Tap Digital Potentiometers
with 2-Wire Interface
Description
DP7110/18/19/23/24/25 lineaUïtaper digital potentiometers
perform the same function as a mechanical potentiometer
or
a variable resistor. These devices consist of a fixed
resistor and a wiper contact with 32ïtap points that are digitally
controlled through a 2ïwire up/down serial interface.
The DP7110 and DP7125 are configured as potentiometers. The
DP7118/19/23/24 are configured as variable resistors.
Three resistance values are available: 10 k , 50 k and 100 k . All
devices are available in spaceïsaving 5ïpin and 6ïpin SOTï23
packages. The DP7110/18/19 are also available in the SCï70
package.
SCï70
SOTï23
SCï70
PIN CONNECTIONS
SOTï23
Features
H
1
2
6
5
6
5
H
1
2
3
V
V
DD
DD
v 0.3 A Ultraïlow Standby Current
W
W
GND
U/D
GND
v Singleïsupply Operation: 2.7 V to 5.5 V
v Glitchless Switching between Resistor Taps
v Powerïon Reset to Midscale
DP7110
DP7125
DP7110
4 CS U/D 3
4 CS
v 2ïwire Up/Down Serial Interface
SOTï23
SCï70
v Resistance Values: 10 k , 50 k and 100 k
v Low Wiper Resistance: 80 for DP7123, DP7124, DP7125
v DP7110, DP7118, DP7119 Available in S&ï70
v These Devices are PbïFree, Halogen Free/BFR Free and are RoHS
Compliant
1
5 H
V
1
2
3
5
V
H
DD
DD
GND 2
U/D 3
GND
U/D
DP7118
DP7123
DP7118
4
CS
4
CS
Applications
SOTï23
v LCD Screen Adjustment
v Volume Control
SCï70
V
V
H
1
2
3
6 H
5 L
4
1
2
3
6
5
4
DD
DD
v Mechanical Potentiometer Replacement
v Gain Adjustment
L
GND
U/D
GND
v Line Impedance Matching
DP7119
DP7124
DP7119
CS
CS U/D
(Top Views)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
¢ NIDEC COPAL ELECTRONICS CORP.
February, 2011 ï Rev. 11
1
Publication Order Number:
DP7110/D
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
H
V
DD
GND
CS
W
U/D
L
Figure 1. Functional Diagram
Table 1. PIN DESCRIPTIONS
Pin Number
DP7110/
DP7125
DP7118/
DP7123
DP7119/
DP7124
Pin
Name
Description
1
2
3
1
2
3
1
2
3
V
Power Supply
Ground
DD
GND
U/D
Up/Down Control Input. With CS low, a lowïtoïhigh transition increments
or decrements the wiper position.
4
4
4
CS
Chip Select Input. A highïtoïlow CS transition determines the mode:
increment if U/D is high, or decrement if U/D is low.
ï
5
6
ï
ï
6
5
ï
6
L
W
H
Low Terminal of Resistor
Wiper Terminal of Resistor
High Terminal of Resistor
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
V
V
to GND
ï0.3 to +6
DD
All Other Pins to GND
ï0.3 to (V + 0.3)
V
DD
Input and Output LatchïUp Immunity
(200
mA
mA
Maximum Continuous Current into H, L and W
100 k
50 k
10 k
(0.6
(1.3
(1.3
Continuous Power Dissipation (T = +70$C)
mW
A
5ïpin SCï70 (Note 1)
6ïpin SCï70 (Note 1)
247
245
Operating Temperature Range
Junction Temperature
ï40 to +85
+150
$C
$C
$C
$C
Storage Temperature Range
Soldering Temperature (soldering, 10 sec)
ï65 to +150
+300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Derate 3.1 mW/$C above T = +70$C
A
2
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Table 3. ELECTRICAL CHARACTERISTICS
(V = 2.7 V to 5.5 V, V = V , V = 0, T = ï40$C to +85$C. Typical values are at V = 2.7 V, T = 25$C, unless otherwise noted.)
DD
H
DD
L
A
DD
A
Parameter
Symbol
Conditions
Min
Typ
Max
Units
DC PERFORMANCE
Resolution
32
80
40
8
Taps
k
EndïtoïEnd Resistance (ï00)
EndïtoïEnd Resistance (ï50)
EndïtoïEnd Resistance (ï10)
EndïtoïEnd Resistance Tempco
100
50
120
60
10
12
TC
DP7110/18/19
DP7123/24/25
200
30
ppm/$C
R
300
Ratiometric Resistance Tempco
Integral Nonlinearity
Differential Nonlinearity
FullïScale Error
5
ppm/$C
LSB
INL
(0.5
(1
(1
DNL
LSB
(0.1
LSB
ZeroïScale Error
1
LSB
Wiper Resistance
R
W
DP7110/18/19
DP7123/24/25
200
80
600
200
DIGITAL INPUTS
Input High Voltage
Input Low Voltage
V
0.7 x V
V
V
IH
DD
V
0.3 x V
IL
DD
TIMING CHARACTERISTICS (Figures 7, 8)
U/D Mode to CS Setup
t
25
50
25
25
25
ns
ns
CU
CS to U/D Step Setup
t
CI
CS to U/D Step Hold
t
ns
IC
U/D Step Low Period
t
ns
IL
U/D Step High Period
t
ns
IH
Up/Down Toggle Rate (Note 2)
Output Settling Time (Note 3)
f
1
1
MHz
s
TOGGLE
t
100 k variable resistor
SETTLE
configuration, C = 10 pF
L
100 k potentiometer
0.25
configuration, C = 10 pF
L
POWER SUPPLY
Supply Voltage
V
2.7
5.5
25
1
V
A
A
DD
Active Supply Current (Note 4)
Standby Supply Current (Note 5)
I
DD
I
V
= +5 V
DD
0.3
SB
= 1 / t
SETTLE
2. Up/Down Toggle Rate: f
TOGGLE
3. Typical settling times are dependent on endïtoïend resistance.
4. Supply current measureed while changing wiper tap, f = 1 MHz.
TOGGLE
5. Supply current measureed while wiper position is fixed.
3
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
TYPICAL OPERATING CHARACTERISTICS
(T = 25oC, unless otherwise noted.)
A
160
140
120
100
80
1.5
1.0
0.5
0
DP7110/7118/7119
DP7123/7124/7125
60
ï0.5
DP7123/7124/7125
40
DP7110/7118/7119
ï1.0
ï1.5
20
0
V
= 2.7 V
15
DD
0
5
10
20
25
30
ï50
0
50
100
WIPER POSITION
TEMPERATURE (oC)
Figure 2. Wiper Resistance vs. Wiper Position
Figure 3. Change in EndïtoïEnd Resistance
vs. Temperature
120
100
80
0.45
0.40
0.35
V
V
= 5.5 V
= 2.7 V
DD
DD
100 k
0.30
0.25
0.20
0.15
0.10
60
50 k
10 k
40
20
0
0.05
0
1
3
5
7
9
11 13 15 17 19 21 23 25 27 29 31
TAP POSITION
ï50
0
50
100
150
TEMPERATURE (oC)
Figure 4. WïtoïL Resistance vs. Tap Position
Figure 5. Supply Current vs. Temperature
U/D
2 V/div
WIPER
OUTPUT
100 mV/div
200 ns/div
Figure 6. TapïtoïTap Switching Transient
4
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Functional Description
The CS and U/D inputs control the position of the wiper
along the resistor array. When CS transitions from high to
low, the part will go into increment mode if U/D input is
high, and into decrement mode when U/D input is low. Once
the mode is set, the device will remain in that mode until CS
goes high again. A lowïtoïhigh transition at the U/D pin
will increment or decrement the wiper position depending
on the current mode (Figures 7 and 8).
When the CS input transitions to high (serial interface
inactive), the value of the counter is stored and the wiper
position is maintained.
Note that when the wiper reaches the maximum (or
minimum) tap position, the wiper will not wrap around to the
minimum (or maximum) position.
The DP7110/7118/7119/7123/7124/7125 consist of a
fixed resistor and a wiper contact with 32ïtap points that are
digitally controlled through a 2ïwire up/down serial
interface. Three endïtoïend resistance values are available:
10 k , 50 k and 100 k .
The DP7110/7125 is designed to operate as
a
potentiometer. In this configuration, the low terminal of the
resistor array is connected to ground (pin 2).
The DP7118/7123 performs as a variable resistor. In this
device, the wiper terminal and high terminal of the resistor
array are connected at pin 5. The DP7119/7124 is a similar
variable resistor, except the low terminal is connected to
pin 5.
Digital Interface Operation
PowerïOn Reset
The devices have two modes of operation when the
serial interface is active: increment and decrement mode.
The serial interface is only active when CS is low.
All parts in this family feature powerïon reset (POR)
circuitry that sets the wiper position to midscale at
powerïup. By default, the chip is in the increment mode.
CS
t
t
IC
CU
t
IL
U/D
W
t
IH
t
CI
t
SETTLE
t
SETTLE
Note: “W” is not a digital signal. It represents wiper transitions.
Figure 7. Serial Interface Timing Diagram, Increment Mode
CS
U/D
W
t
IC
t
CU
t
IH
t
IL
t
CI
t
SETTLE
t
SETTLE
Note: “W” is not a digital signal. It represents wiper transitions.
Figure 8. Serial Interface Timing Diagram, Decrement Mode
5
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Applications Information
Adjustable Gain
The devices are intended for circuits requiring digitally
controlled adjustable resistance, such as LCD contrast
control, where voltage biasing adjusts the display contrast.
Figures 11 and 12 show how to use either a variable
resistor or a potentiometer to digitally adjust the gain of a
noninverting op amp configuration, by connecting the
device in series with a resistor to ground. The devices
have a low 5 ppm/oC ratiometric tempco that allows for a
very stable adjustable gain configuration over temperature.
Alternative Positive LCD Bias Control
An op amp can be used to provide buffering and gain on
the output of the DP7110/DP7125. This can be done by
connecting the wiper output to the positive input of a
noninverting op amp as shown in Figure 9. Figure 10 shows
a similar circuit for the DP7119/DP7124.
+5 V
+5 V
H
H
30 V
30 V
W
V
V
OUT
OUT
L
L
DP7119/DP7124
DP7110/DP7125
Figure 9. Positive LCD Bias Control
Figure 10. Positive LCD Bias Control
V
V
CC
CC
V
V
IN
IN
V
V
OUT
OUT
H
W
L
H
DP7110/DP7125
L
DP7118/DP7123
Figure 11. Adjustable Gain Circuit
Figure 12. Adjustable Gain Circuit
6
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SCï70, 6 Lead, 1.25x2
SYMBOL
MIN
NOM
MAX
D
0.80
A
1.10
e
e
A1
A2
0.00
0.80
0.10
1.00
b
c
0.15
0.10
1.80
1.80
1.15
0.30
0.18
2.20
2.40
1.35
D
2.00
2.10
E1
E
E
E1
e
1.25
0.65 BSC
0.36
L
0.26
0.46
L1
L2
0.42 REF
0.15 BSC
TOP VIEW
0º
4º
8º
Q
10º
Q1
1
A2
A1
A
L
L1
b
1
c
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
7
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SOTï23, 6 Lead
D
SYMBOL
MIN
NOM
MAX
1.45
0.15
1.30
0.50
0.22
e
A
A1
A2
b
0.90
0.00
0.90
0.30
0.08
1.15
c
E
E1
D
2.90 BSC
2.80 BSC
1.60 BSC
0.95 BSC
0.45
E
E1
e
L
0.30
0.60
L1
0.60 REF
PIN #1 IDENTIFICATION
L2
Q
0.25 REF
4°
TOP VIEW
0°
5°
5°
8°
15°
15°
Q1
10°
Q2
10°
e1
A2
A
Q
b
L1
L
Q2
c
A1
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC standard MO-178.
8
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SCï70, 5 Lead, 1.25x2
SYMBOL
MIN
NOM
MAX
D
0.80
A
1.10
e
e
A1
A2
0.00
0.80
0.10
1.00
b
c
0.15
0.10
1.80
1.80
1.15
0.30
0.18
2.20
2.40
1.35
D
2.00
2.10
E1
E
E
E1
e
1.25
0.65 BSC
0.36
L
0.26
0.46
L1
L2
0.42 REF
0.15 BSC
TOP VIEW
0º
4º
8º
Q
10º
Q1
1
A2
A1
A
L
L1
b
1
c
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
9
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SOTï23, 5 Lead
D
SYMBOL
MIN
NOM
MAX
1.45
0.15
1.30
0.50
0.22
A
A1
A2
b
0.90
0.00
0.90
0.30
0.08
1.15
c
E
E1
D
2.90 BSC
2.80 BSC
1.60 BSC
0.95 BSC
0.45
E
E1
e
e
L
0.30
0.60
L1
0.60 REF
PIN #1 IDENTIFICATION
L2
Q
0.25 REF
4°
0°
5°
5°
8°
15°
15°
TOP VIEW
Q1
10°
Q2
10°
Q1
A2
A
Q
b
L1
L
Q2
c
A1
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC standard MO-178.
10
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Table 4. ORDERING INFORMATION
Device
Orderable Part Number
Resistor [k ]
10
Pin Package
SC70ï6
SOT23ï6
SOT23ï6
SC70ï6
SOT23ï6
SOT23ï6
SC70ï6
SOT23ï6
SOT23ï6
SC70ï5
SOT23ï5
SOT23ï5
SC70ï5
SOT23ï5
SOT23ï5
SC70ï5
SOT23ï5
SOT23ï5
SC70ï6
SOT23ï6
SOT23ï6
SC70ï6
Parts Per Reel
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
DP7110
DP7110SDIï10-GT3
DP7110TBIï10ïT3 (Note 6)
DP7110TBIï10-GT3
DP7110SDIï50-GT3
DP7110TBIï50ïT3 (Note 6)
DP7110TBIï50-GT3
DP7110SDIï00-GT3
DP7110TBIï00ïT3 (Note 6)
DP7110TBIï00-GT3
DP7118SDIï10-GT3
DP7118TBIï10ïT3 (Note 6)
DP7118TBIï10-GT3
DP7118SDIï50-GT3
DP7118TBIï50ïT3 (Note 6)
DP7118TBIï50-GT3
DP7118SDIï00-GT3
DP7118TBIï00ïT3 (Note 6)
DP7118TBIï00-GT3
DP7119SDIï10-GT3
DP7119TBIï10ïT3 (Note 6)
DP7119TBIï10-GT3
DP7119SDIï50-GT3
DP7119TBIï50ïT3 (Note 6)
DP7119TBIï50-GT3
DP7119SDIï00-GT3
DP7119TBIï00ïT3 (Note 6)
DP7119TBIï00-GT3
DP7123TBIï10ïT3 (Note 6)
DP7123TBIï10-GT3
DP7123TBIï50ïT3 (Note 6)
DP7123TBIï50-GT3 (Note 6)
DP7123TBIï00ïT3 (Note 6)
DP7123TBIï00-GT3 (Note 6)
DP7124TBIï10ïT3 (Note 6)
DP7124TBIï10-GT3 (Note 6)
DP7124TBIï50ïT3 (Note 6)
DP7124TBIï50-GT3
DP7124TBIï00ïT3 (Note 6)
DP7124TBIï00-GT3 (Note 6)
DP7125TBIï10ïT3 (Note 6)
DP7125TBIï10-GT3
10
10
50
50
50
100
100
100
10
10
10
50
50
50
100
100
100
10
10
10
50
50
50
DP7118
DP7119
SOT23ï6
SOT23ï6
SC70ï6
100
100
100
10
10
50
SOT23ï6
SOT23ï6
SOT23ï5
SOT23ï5
SOT23ï5
SOT23ï5
SOT23ï5
SOT23ï5
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
SOT23ï6
DP7123
(Note 7)
50
100
100
10
10
50
DP7124
(Note 7)
50
100
100
10
10
50
50
100
100
DP7125
(Note 7)
DP7125TBIï50ïT3 (Note 6)
DP7125TBIï50-GT3 (Note 6)
DP7125TBIï00ïT3 (Note 6)
DP7125TBIï00-GT3 (Note 6)
6. Contact factory for availability.
7. For DP7123, DP7124, DP7125 now being developed, please contact factory.
11
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Example of Ordering Information (Note 10)
Prefix
Device #
Suffix
DP
7110
SD
I
ï10
G
T3
Company ID
(Optional)
Product Number
Package
Resistance
ï10: 10 k
Lead Finish
Blank: MatteïTin
G: NiPdAu
Tape & Reel
T: Tape & Reel
3: 3,000 / Reel
7110
7118
7119
7123
7124
7125
SD: SCï70
TB: SOTï23
ï50: 50 k
ï00: 100 k
Temperature Range
I = Industrial (ï40oC to 85oC)
8. All packages are RoHSïcompliant (Leadïfree, Halogenïfree).
9. The standard finish is NiPdAu.
10.The device used in the above example is a DP7110SDIï10-GT3 (SCï70, Industrial Temperature, 10 k , NiPdAu, Tape & Reel, 3,000/Reel).
11. For additional package and temperature options, please contact your nearest COPAL ELECTRONICS Sales office.
NIDEC COPAL reserves the right to make changes without further notice to any products herein.
NIDEC COPAL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NIDEC COPAL assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in NIDEC COPAL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
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NIDEC COPAL does not convey any license under its patent rights nor the rights of others.
NIDEC COPAL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the NIDEC COPAL product could create a situation where personal injury or death may occur.
Should Buyer purchase or use NIDEC COPAL products for any such unintended or unauthorized application, Buyer shall indemnify and hold NIDEC COPAL and its officers,
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that NIDEC COPAL was negligent regarding the design or
manufacture of the part.
DP7110/D
12
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