SM8701 [NPC]
DVD Player Clock Generator; DVD播放机时钟发生器
| 型号： | SM8701 |
| 厂家： | 
NIPPON PRECISION CIRCUITS INC |
| 描述： | DVD Player Clock Generator |
| 文件： | 总14页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM8701BM
DVD Player Clock Generator
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The SM8701BM is a 27 MHz master clock, 5-system output clock generator for DVD players. It has 2 built-in
PLLs that, with the addition of a single crystal oscillator element, can generate 256fs, 384fs and 768fs clocks
plus independent fixed-frequency 27 MHz and 33.8688 MHz output clocks. Supported sampling frequencies
(fs) include the standard 32, 44.1 or 48 kHz, or double-frequency 64, 88.2 or 96 kHz.
FEATURES
PINOUT
(Top View)
■ 27 MHz master clock (internal PLL reference
clock)
■ Generated clocks
• 27 MHz output
• 33.8688 MHz output
• 256fs output
• 384fs output
• 768fs output
■ Sampling frequency fs
• 32/64 kHz
• 44.1/88.2 kHz
• 48/96 kHz
■ Low jitter output
■ 3-wire serial or parallel control
1
20
MLEN/R2
MCK/R1
MDT/R0
RSTN
SO3
P/S
VDD
GND
XTO
VDDO
GNDO
SO2
XTI
GNDP
VDDP
VDD3
MO
SO4
SO1
10
11
MON
■ Supply voltage: V = V
= 5.0V
DD
DDP
V
= V
= 3.3V
DDO
DD3
■ 20-pin SSOP package
APPLICATIONS
PACKAGE DIMENSIONS
■ DVD players
(Unit: mm)
ORDERING INFORMATION
7.40MAX
7.20 0.05
De vice
Packag e
20-pin SSOP
SM8701BM
0 to 8
0.65
0.68 0.12
0.10
0.30 0.10
M
0.13
NIPPON PRECISION CIRCUITS—1
SM8701BM
BLOCK DIAGRAM
Phase
Comparator0
Charge
Pump0
Divider0
LPF0
VCO0
XTI
Oscillator
XTO
SO4
SO3
SO2
SO1
Divider0
P/S
Divider
MLEN/R2
External
Interface
MDT/R0
MCK/R1
Phase
Comparator1
Charge
Pump1
Divider1
LPF1
VCO1
Divider1
MO
MON
Reset
RSTN
Circuits
NIPPON PRECISION CIRCUITS—2
SM8701BM
PIN DESCRIPTION
Nu mb e r
Na me
I/O
Des cription
Control signal input.
In serial mode: latch enable signal
1
1
MLEN/R2
Ip
In parallel mode: sampling rate select signal
Mode select signal.
LOW: serial mode, HIGH: parallel mode
1
2
P/S
Ip
3
4
VDD
GND
XTO
–
–
5 V supply (Digital block)
Ground (Digital block)
5
O
I
Reference signal crystal oscillator element connection
Reference signal crystal oscillator element connection or external clock input
Ground (PLL block)
6
XTI
7
GNDP
VDDP
VDD3
MO
–
8
–
5 V supply (PLL block)
9
–
3.3 V supply (output buffer)
10
11
12
13
14
15
16
17
18
O
O
O
O
O
–
27 MHz fixed-frequency output
27 MHz fixed-frequency output (inverted)
33.8688 MHz fixed-frequency output
768fs output
MON
S O1
S O4
S O2
256fs output
GNDO
VDDO
S O3
Ground (output buffer)
–
3.3 V supply (output buffer)
O
384fs output
2
RS TN
Ip
LOW -level reset input
Control signal input.
In serial mode: control data input signal
In parallel mode: sampling frequency select signal
1
19
20
MDT/R0
MCK/R1
Ip
Control signal input.
In serial mode: clock signal
1
Ip
In parallel mode: sampling frequency select signal
1. Schmitt trigger input with pull-down resistor
2. Schmitt trigger input with pull-up resistor
NIPPON PRECISION CIRCUITS—3
SM8701BM
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Supply voltage range
Symbol
, V
Condition
Rating
Unit
V
V
,
DDP
DD
−
0.3 to 6.5
V
, V
DDO
DD3
V
– V
,
DD
DDP
V
– V
,
DDO
DD3
Supply voltage deviation
GND – GNDP,
GND – GNDO,
GNDP – GNDO
±0.1
V
Input voltage range
V
Digital inputs
Digital outputs
−
0.3 to V
+
0.3
V
V
IN
DD
Output voltage range
Power dissipation
V
−
0.3 to V
, V
+ 0.3
DD3
OUT
DDO
P
300
m W
D
Storage temperature range
T
−55 to 125
°C
stg
Recommended Operating Conditions
Parameter
Supply voltage ranges
Symbol
, V
Condition
Rating
Unit
V
V
2.7 to 3.6
4.5 to 5.5
DDO
DD3
V
, V
V
DD
DDP
opr
Operating temperature range
T
−40 to 85
°C
NIPPON PRECISION CIRCUITS—4
SM8701BM
DC Electrical Characteristics
External clock, T = −40 to 85 °C, V = V
= 4.5 to 5.5 V, V
= V = 2.7 to 3.6 V unless otherwise
DD3
a
DD
DDP
DDO
stated
Rating
Parameter
Symbol
Condition
Unit
min
typ
ma x
All supplies.
V
V
= V
= V
= 5.0V,
DD
DDO
DDP
= 3.3 V,
DD3
T
= 25 °C, fs = 48 kHz,
a
Current consumption
I
–
32
45
mA
DD
using XTI external 27 MHz
master clock, no load on
clock outputs (MO, MON,
SO1 to SO4)
P/S, MLEN/R2, MCK/R1,
MDT/R0, RSTN
HIGH-level input voltage
LOW -level input voltage
V
2.0
–
–
–
–
V
V
IH1
P/S, MLEN/R2, MCK/R1,
MDT/R0, RSTN
V
0.8
–
IL1
HIGH-level input voltage
LOW -level input voltage
V
XTI
XTI
0.7
×
–
–
–
–
–
–
–
V
–
–
–
–
–
–
–
–
–
–
V
V
IH2
DD
V
0.3 × V
DD
IL2
1
HIGH-level input current
I
V
V
V
V
= V
DD
150
µA
µA
µA
µA
µA
µA
V
IH1
IN
IN
IN
IN
1
LOW -level input current
I
= 0 V
= V
−1
IL1
2
HIGH-level input current
I
1
IH2
DD
2
LOW -level input current
HIGH-level input current
LOW -level input current
I
= 0 V
−
150
40
40
IL2
I
XTI, V = V
IN DD
IH3
I
XTI, V = 0 V
−
IL3
IN
HIGH-level output voltage
LOW -level output voltage
V
All outputs. I
=
−
2 mA
V
DDO
−
0.4
–
OH
OH
OL
V
All outputs. I = 4 mA
–
0.4
V
OL
1. P/S, MLEN/R2, MCK/R1, MDT/R0. Schmitt trigger input, internal pull-down.
2. RS TN. Schmitt trigger input, internal pull-up.
NIPPON PRECISION CIRCUITS—5
SM8701BM
PLL AC Electrical Characteristics
External clock, T = −40 to 85 °C, V = V
= 4.5 to 5.5 V, V
= V = 2.7 to 3.6 V unless otherwise
DD3
a
DD
DDP
DDO
stated
Rating
Parameter
Symbol
Condition
Unit
min
typ
ma x
XTI external input clock frequency
Output clock rise time
f
DUTY: 50 ± 5%
All outputs, 0.2 to 0.8V
–
27.0000
–
MHz
ns
M
DDO
t
–
2.5
–
R
or V
, C = 20 pF
DD3
L
All outputs, 0.8 to 0.2V
DDO
Output clock fall time
t
–
–
2.5
150
150
450
50
–
–
ns
ps
ps
ps
%
F
or V
, C = 20 pF
DD3
L
1
MO, MON output clock jitter
SO1, SO2 (Standard), SO3, SO4
Standard tolerance
Crystal oscillator element
JITTER
DUTY
–
–
1
output clock jitter
1
SO2 (Double) output clock jitter
–
–
Crystal oscillator element,
1
MO, MON output clock duty
45
55
C
C
C
= 20 pF
= 20 pF
= 20 pF
L
L
L
SO1, SO2 (Standard), SO3, SO4
40
50
60
%
1
output clock duty
1
SO2 (Double) output clock duty
23.3
33.3
43.3
40
%
Settling time
t
All outputs
All outputs
–
–
–
–
ms
ms
S
2
Power-up time
t
50
P
RS TN external reset LOW -level
pulsewidth
t
1.4 V to 1.4 V
100
–
–
ns
RS TL
1. 1.4V to 1.4V.Ta=20°C.The characteristics of output clock jitter and output clock duty depends on crystal oscillator.
NPC’s standard crystal oscillator: R = 10.5
measurement apparatus: HP4195
Ω, L = 5.38 mH, Ca = 6.74 fF, Cb = 1.85 pF
Load capacitance: C1 = 7 pF, C2 = 11 pF
Cb
L
Ca
R
2. Time from OFF condition to stable frequency output.
NIPPON PRECISION CIRCUITS—6
SM8701BM
Serial Interface AC Characteristics
External clock, T = −40 to 85 °C, V = V
= 4.5 to 5.5 V, V
= V = 2.7 to 3.6 V unless otherwise
DD3
a
DD
DDP
DDO
stated
Rating
Parameter
Symbol
Condition
Unit
min
40
typ
–
ma x
MCK HIGH-level pulsewidth
MCK LOW-level pulsewidth
MCK pulse cycle time
MDT setup time
t
–
–
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
MC WH
t
40
–
MCWL
t
100
40
–
MCY
t
–
MDS
MDT hold time
t
40
–
MDH
1
MLEN setup time
t
40
–
MLS
2
MLEN hold time
t
40
–
MLH
MLEN HIGH-level pulsewidth
MLEN LOW-level pulsewidth
t
200
–
MHH
t
16
×
t
–
MLL
MCY
1. Time from the MLEN falling edge to the next MCK rising edge. If the MCK clock stops after the LSB, the MLEN rise timing is optional.
2. Time from MCK rising edge corresponding to the LSB to the MLEN rising edge.
tMCWH
tMCWL
tMLH
tMLS
1.4V
1.4V
MCK
MDT
MLEN
t
MCY
MSB
LSB
tMLS
t
MDS
t
MLL
MDH
t
tMHH
1.4V
NIPPON PRECISION CIRCUITS—7
SM8701BM
FUNCTIONAL DESCRIPTION
27 MHz Master Clock
The 27 MHz master clock is generated either by con-
necting a crystal oscillator element between XTI (pin
6) and XTO (pin 5), as shown in figure 1, or by con-
necting an external 27 MHz clock to XTI, as shown
in figure 2. Input 27MHz master clock on XTI when
using an external clock. Crystal oscillator element
must be fundamental.
C2
XTO (Pin5)
Internal
Circuits
Oscillator
XTI (Pin6)
C1
C1, C2 = 5 to 33pF
MO (Pin10)
MON (Pin11)
SM8701BM
Figure 1. Crystal oscillator connection
XTO (Pin5)
XTI (Pin6)
Open
Internal
Circuits
Oscillator
External Clock
MO (Pin10)
MON (Pin11)
SM8701BM
Figure 2. External clock input
NIPPON PRECISION CIRCUITS—8
SM8701BM
Sampling Frequency and Output Clock Frequency
The SM8701BM generates several output clocks
from the 27 MHz master clock, with frequencies of
256fs (SO2), 384fs (SO3) and 768fs (SO4), where fs
is the sampling frequency selected by external con-
trol inputs. SO1 outputs 33.8688 MHz clock. The
supported sampling frequencies and the output clock
frequencies are shown in table 1.
Table 1. Sampling frequency and output clock frequency
Output clock frequency (MHz)
Sampling
Sampling rate
frequency fs
S O1
S O2
S O3
S O4
32 kHz
44.1 kHz
48 kHz
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
8.192
12.288
16.9344
18.432
24.576
33.8688
36.864
24.576
33.8688
36.864
24.576
33.8688
36.864
Standard
Double
11.2896
12.288
16.384
22.5792
24.576
64 kHz
88.2 kHz
96 kHz
Reset
The SM8701BM supports an external reset using
RSTN (pin 18). At reset, the mode register takes its
default value, and the output clocks have default fre-
quencies.
When RSTN goes HIGH, an internal reset continues
for a period of 1024 cycles of the 27 MHz master
clock. The timing is shown in figure 3.
RSTN
Reset
Internal Reset
1
2
3
1024
Master Clock
1024 Master Clock
Figure 3. External reset timing
NIPPON PRECISION CIRCUITS—9
SM8701BM
Operation Control
Table 2. Control functions
The SM8701BM functions are controlled by inputs
MLEN/R2 (pin 1), MDT/R0 (pin 19) and MCK/R1
(pin 20). The operating mode is selected by input P/S
(pin 2)—serial control when P/S is LOW, and paral-
lel control when P/S is HIGH. Table 2 shows the
relationship between functions and mode.
Controllable
Function
Serial
Parallel
Yes
Sampling frequency group: 48/44.1/32 kHz
Sampling rate: standard/double
Clock output: enable/disable
Yes
Yes
Yes
Yes
No
Serial control (P/S = LOW)
When P/S is LOW, the control interface is serial con-
trol mode. The serial control data is set by 16-bit
MDT data in sync with the MCK clock and the
MLEN enable signal clock at the serial control
mode. The format is shown in figure 4.
MCK
MDT D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MLEN
Figure 4. Serial control format
The 16-bit mode register (MREG) is shown in figure
5, and the name and function of each bit is described
in tables 3 to 5. In serial control mode, mode register
bits D15 to D10 must be set to 011100. D3 is fixed as
LOW.
MREG
0
1
1
1
0
0
CE6 CE5 CE4 CE3 CE2 CE1 RSV R2
R1
R0
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Note: RSV is fixed as LOW.
Figure 5. Mode register
Table 3. Mode register control bit functions
Table 4. CE6 to CE1 clock output control setting
Bit
D9
Na me
CE6
Function
MON output enable/disable
MO output enable/disable
SO4 output enable/disable
SO3 output enable/disable
SO2 output enable/disable
SO1 output enable/disable
Fixed as LOW
CE6 to CE1
LOW
Clock output
Disable (LOW-level output)
Enable (default)
D8
CE5
HIGH
D7
CE4
D6
CE3
D5
CE2
D4
CE1
D3
RS V
D2/D1/D0
R2/R1/R0
Sampling frequency select
NIPPON PRECISION CIRCUITS—10
SM8701BM
Table 5. Sampling frequency select (R2, R1, R0)
R2
R1
R0
Sampling rate
Sampling frequency group
48 kHz
Sampling frequency
48 kHz (default)
44.1 kHz
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
Standard
Standard
Standard
44.1 kHz
32 kHz
32 kHz
Prohibited (test mode)
48 kHz
Double
Double
Double
96 kHz
88.2 kHz
64 kHz
44.1 kHz
32 kHz
Prohibited (test mode)
When the sampling frequency is changed, a settling
time of 40 ms (max) is required to make the output
frequency stable. The SO2 to SO4 output response
when the frequency is changed is shown in figure 6.
SO1 fixed on 33.8688 MHz.
MLEN
SO2 to 4
SO1
t
S
Clock Transition Region
33.8688MHz
Figure 6. System clock transient timing
NIPPON PRECISION CIRCUITS—11
SM8701BM
Parallel control (P/S = HIGH)
When P/S is HIGH, the control interface is parallel
control mode. The parallel control pins R2 (pin 1),
R1 (pin 20) and R0 (pin 19) and functions are shown
in table 6.
Table 6. Sampling frequency select (R2, R1, R0)
R2
R1
R0
Sampling rate
Standard
Sampling frequency group
48 kHz
Sampling frequency
48 kHz (default)
44.1 kHz
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
Standard
44.1 kHz
Standard
32 kHz
32 kHz
Prohibited (test mode)
48 kHz
Double
Double
Double
96 kHz
88.2 kHz
64 kHz
44.1 kHz
32 kHz
Prohibited (test mode)
Note that in parallel control mode, clock output
enable/disable controls are not available. Also note
that the reset function does not affect the sampling
frequency group or sampling rate select settings (it is
determined by R2, R1, R0 condition).
NIPPON PRECISION CIRCUITS—12
SM8701BM
TYPICAL APPLICATION
CPU
+3.3V +5V
MLEN/R2
MCK/R1
P/S
MDT/R0
RSTN
SO3
VDD
GND
XTO
XTI
C3
384fs
256fs
768fs
VDDO
GNDO
SO2
C1
X'tal
C6
C2
C4
GNDP
VDDP
VDD3
MO
SO4
33.8688MHz
SO1
C5
MON
27MHz(Inverted)
27MHz
SM8701BM
■ Connect the decoupling capacitors (approximately
0.1µF and 1000pF) in parallel, as close to power
supply pins as possible.
■ Power supply and ground pins.
• VDD :5V Power supply for digital block
(CPU I/F*, XT1, XT2).
■ In order to minimize noise, it is useful to make
ground as solid pattern.
• GND
:
Ground for digital block
(CPU I/F*, XT1, XT2, output
block except SO3).
■ Master clock stability affects the other outputs sta-
bility. In the usage of crystal oscillator, load
capacitor and crystal oscillator should be placed as
close to the SM8701BM as possible, and wired
shortly. Select crystal oscillators and load capaci-
tance carefully, depending on the condition, as
those combination will have influence on the fre-
quency accuracy(C1, C2).
■ Supply pattern including decoupling capacitors
needs careful attention to make the IC’s perfor-
mance better, since the SM8701BM outputs sev-
eral high frequency clocks. Pattern capacitance
from output pins should not to be large for preven-
tion of the noise. Connecting output pins to buff-
ers is useful if it is necessary.
• VDDP :5V Power supply for PLL block.
• GNDP : Ground for PLL block.
• VDDO :3.3V Power supply for SO3.
• GNDO : Ground for SO3.
• VDD3 :3.3V Power supply for output block
(except SO3).
*: CPU I/F: MDT/R0, MCK/R1, MLEN/R2, RSTN,
P/S
NIPPON PRECISION CIRCUITS—13
SM8701BM
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NIPPON PRECISION CIRCUITS INC.
NC9822BE 2000.1
NIPPON PRECISION CIRCUITS—14
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