DS10CP152TMA [NSC]
1.5 Gbps 2X2 LVDS Crosspoint Switch; 1.5 Gbps的LVDS 2×2交叉点开关型号: | DS10CP152TMA |
厂家: | National Semiconductor |
描述: | 1.5 Gbps 2X2 LVDS Crosspoint Switch |
文件: | 总12页 (文件大小:277K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
March 13, 2008
DS10CP152
1.5 Gbps 2X2 LVDS Crosspoint Switch
General Description
Features
The DS10CP152 is a 1.5 Gbps 2x2 LVDS crosspoint switch
optimized for high-speed signal routing and switching over
lossy FR-4 printed circuit board backplanes and balanced ca-
bles. Fully differential signal paths ensure exceptional signal
integrity and noise immunity. The non-blocking architecture
allows connections of any input to any output or outputs.
DC - 1.5 Gbps low jitter, low skew, low power operation
■
■
Pin configurable, fully differential, non-blocking
architecture
Wide Input Common Mode Voltage Range allows DC-
coupled interface to LVDS, CML and LVPECL drivers
On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
■
■
Wide input common mode range allows the switch to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires a minimal
space on the board while the flow-through pinout allows easy
board layout. Each differential input and output is internally
terminated with a 100Ω resistor to lower device return losses,
reduce component count and further minimize board space.
7 kV ESD on LVDS I/O pins protects adjoining
components
Small SOIC-16 space saving package
■
■
Applications
High-speed channel select applications
■
■
■
Clock and data buffering and muxing
SD/HD SDI Routers
Typical Application
30007903
© 2008 National Semiconductor Corporation
300079
www.national.com
Ordering Code
NSID
Function
DS10CP152TMA
2x2 Crosspoint Switch
Block Diagram
30007901
Connection Diagram
DS10CP152 Pin Diagra3m0007952
Pin Descriptions
Pin Name
Pin
Number
I/O, Type
I, LVDS
Pin Description
IN0+, IN0- ,
IN1+, IN1-
3, 4,
6, 7
Inverting and non-inverting high speed LVDS input pins.
Inverting and non-inverting high speed LVDS output pins.
OUT0+, OUT0-,
OUT1+, OUT1-
14, 13,
11, 10
O, LVDS
SEL1, SEL0
EN0, EN1
NC
1, 2
16, 15
8, 9
5
I, LVCMOS
I, LVCMOS
NC
Switch configuration pins.
Output enable pins.
"NO CONNECT" pins.
Power supply pin.
Ground pin.
VDD
Power
GND
12
Power
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2
Absolute Maximum Ratings (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Package Thermal Resistance
ꢀθJA
+72.7°C/W
+41.2°C/W
ꢀθJC
ESD Susceptibility
HBM (Note 1)
Supply Voltage
LVCMOS Input Voltage
LVDS Input Voltage
LVDS Differential Input Voltage
LVDS Output Voltage
−0.3V to +4V
−0.3V to (VCC + 0.3V)
−0.3V to +4V
0V to 1V
−0.3V to (VCC + 0.3V)
0V to 1V
≥7 kV
≥250V
≥1250V
MM (Note 2)
CDM (Note 3)
Note 1: Human Body Model, applicable std. JESD22-A114C
Note 2: Machine Model, applicable std. JESD22-A115-A
LVDS Differential Output Voltage
LVDS Output Short Circuit Current
Duration
Note 3: Field Induced Charge Device Model, applicable std.
JESD22-C101-C
5 ms
Junction Temperature
Storage Temperature Range
Lead Temperature Range
Soldering (4 sec.)
Maximum Package Power Dissipation at 25°C
M16A Package
+150°C
−65°C to +150°C
Recommended Operating
Conditions
+260°C
Min
3.0
0
Typ
Max Units
Supply Voltage (VCC
)
3.3
3.6
1
V
V
1.72W
Receiver Differential Input
Voltage (VID)
Derate M16A Package
13.75 mW/°C above +25°C
Operating Free Air
Temperature (TA)
−40
+25
+85
°C
DC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 5, 6, 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS DC SPECIFICATIONS
VIH
VIL
IIH
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
2.0
GND
40
VDD
0.8
V
V
VIN = 3.6V
VCC = 3.6V
175
±1
250
μA
IIL
Low Level Input Current
VIN = GND
VCC = 3.6V
±10
μA
VCL
Input Clamp Voltage
ICL = −18 mA, VCC = 0V
−0.9
−1.5
V
LVDS INPUT DC SPECIFICATIONS
VID
Input Differential Voltage
0
1
V
mV
mV
V
VCM = +0.05V or VCC-0.05V
VID = 100 mV
VTH
VTL
Differential Input High Threshold
Differential Input Low Threshold
Common Mode Voltage Range
0
0
+100
−100
0.05
VCMR
VCC -
0.05
±10
VIN = 3.6V or 0V
VCC = 3.6V or 0V
±1
μA
IIN
Input Current
CIN
RIN
1.7
pF
Input Capacitance
Any LVDS Input Pin to GND
Between IN+ and IN-
100
Input Termination Resistor
Ω
3
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Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVDS OUTPUT DC SPECIFICATIONS
VOD
Differential Output Voltage
250
-35
350
450
35
mV
mV
V
RL = 100Ω
RL = 100Ω
Change in Magnitude of VOD for Complimentary
Output States
ΔVOD
VOS
Offset Voltage
1.05
-35
1.2
1.375
35
Change in Magnitude of VOS for Complimentary
Output States
ΔVOS
mV
IOS
Output Short Circuit Current (Note 8)
OUT to GND
-23
8
-55
55
mA
mA
pF
Ω
OUT to VCC
COUT
ROUT
Output Capacitance
Any LVDS Output Pin to GND
Between OUT+ and OUT-
1.2
100
Output Termination Resistor
SUPPLY CURRENT
ICC
Supply Current
Outputs Powered Down Supply Current
EN0 = EN1 = H
EN0 = EN1 = L
58
25
70
30
mA
mA
ICCZ
Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and
ΔVOD
.
Note 7: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
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4
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVDS OUTPUT AC SPECIFICATIONS
tPLHD
tPHLD
tSKD1
tSKD2
tSKD3
Differential Propagation Delay Low to
High (Note 11)
440
400
40
650
650
120
60
ps
ps
ps
ps
ps
RL = 100Ω
Differential Propagation Delay High to
Low (Note 11)
Pulse Skew |tPLHD − tPHLD
(Notes 11, 12)
|
Channel to Channel Skew
(Notes 11, 13)
25
Part to Part Skew
(Notes 11, 14)
45
190
tLHT
tHLT
tON
Rise Time (Note 11)
Fall Time (Note 11)
Output Enable Time
Output Disable Time
Select Time
170
170
5
350
350
20
ps
ps
RL = 100Ω
μs
ns
ns
tOFF
tSEL
3
12
3
12
JITTER PERFORMANCE (Note 11)
tRJ1
tRJ2
VID = 350 mV
VCM = 1.2V
Clock (RZ)
135 MHz
0.5
0.5
0.5
0.5
9
1.2
1.2
1.2
1.2
38
ps
ps
311 MHz
503 MHz
750 MHz
270 Mbps
622 Mbps
1.06 Gbps
1.5 Gbps
270 Mbps
622 Mbps
1.06 Gbps
1.5 Gbps
Random Jitter (RMS Value)
tRJ3
tRJ4
tDJ1
tDJ2
tDJ3
tDJ4
tTJ1
tTJ2
tTJ3
tTJ4
ps
ps
VID = 350 mV
VCM = 1.2V
Clock (RZ)
ps
7
36
ps
Deterministic Jitter
(Peak-to-Peak Value )
7
34
ps
9
35
ps
VID = 350 mV
VCM = 1.2V
UIP-P
UIP-P
UIP-P
UIP-P
0.01
0.01
0.01
0.01
0.03
0.04
0.05
0.07
Total Jitter (Peak to Peak Value)
PRBS-23 (NRZ)
Note 9: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 10: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 11: Specification is guaranteed by characterization and is not tested in production.
Note 12: tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and the negative
going edge of the same channel.
Note 13: tSKD2, Channel to Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels in Broadcast mode (any one input to
all outputs).
Note 14: tSKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This specification applies to
devices at the same VCC and within 5°C of each other within the operating temperature range.
Note 15: Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.
Note 16: Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted
algebraically.
Note 17: Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted.
5
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DC Test Circuits
30007920
FIGURE 1. Differential Driver DC Test Circuit
AC Test Circuits and Timing Diagrams
30007921
FIGURE 2. Differential Driver AC Test Circuit
30007922
FIGURE 3. Propagation Delay Timing Diagram
30007923
FIGURE 4. LVDS Output Transition Times
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6
Functional Description
The DS10CP152 is a 1.5 Gbps 2x2 LVDS digital crosspoint
switch optimized for high-speed signal routing and switching
over lossy FR-4 printed circuit board backplanes and bal-
anced cables.
TABLE 1. Switch Configuration Truth Table
SEL0 OUT1
IN0
SEL1
OUT0
IN0
0
0
1
1
0
1
0
1
IN0
IN1
IN1
IN1
IN0
IN1
TABLE 2. Output Enable Truth Table
EN1
EN0
OUT1
OUT0
0
0
1
1
0
1
0
1
Disabled
Disabled
Enabled
Enabled
Disabled
Enabled
Disabled
Enabled
7
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INPUT INTERFACING
drivers (i.e. LVPECL, LVDS, CML). The following three fig-
ures illustrate typical DC-coupled interface to common differ-
ential drivers. Note that the DS10CP152 inputs are internally
terminated with a 100Ω resistor.
The DS10CP152 accepts differential signals and allows sim-
ple AC or DC coupling. With a wide common mode range, the
DS10CP152 can be DC-coupled with all common differential
30007931
Typical LVDS Driver DC-Coupled Interface to an DS10CP152 Input
30007932
Typical CML Driver DC-Coupled Interface to an DS10CP152 Input
30007933
Typical LVPECL Driver DC-Coupled Interface to an DS10CP152 Input
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8
OUTPUT INTERFACING
assumes that the receivers have high impedance inputs.
While most differential receivers have a common mode input
range that can accomodate LVDS compliant signals, it is rec-
ommended to check respective receiver's data sheet prior to
implementing the suggested interface implementation.
The DS10CP152 outputs signals compliant to the LVDS stan-
dard. Its outputs can be DC-coupled to most common differ-
ential receivers. The following figure illustrates typical DC-
coupled interface to common differential receivers and
30007934
Typical DS10CP152 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
9
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Typical Performance Characteristics
30007960
30007961
A 270 Mbps NRZ PRBS-7 After 2"
A 622 Mbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
Differential FR-4 Stripline
V:100 mV / DIV, H:500 ps / DIV
30007963
30007962
A 1.5 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:100 ps / DIV
A 1.06 Gbps NRZ PRBS-7 After 2"
Differential FR-4 Stripline
V:100 mV / DIV, H:200 ps / DIV
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10
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number DS10CP152TMA
NS Package Number M16A
11
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Notes
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