NTE6507 [NTE]
Integrated Circuit NMOS, 8 Bit Microprocessor (MPU) w/On-Chip Clock OSC; 集成电路NMOS ， 8位微处理器（ MPU ） W /片上时钟振荡器
| 型号： | NTE6507 |
| 厂家： | 
NTE ELECTRONICS |
| 描述： | Integrated Circuit NMOS, 8 Bit Microprocessor (MPU) w/On-Chip Clock OSC |
| 文件： | 总4页 (文件大小：39K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTE6507
Integrated Circuit
NMOS, 8 Bit Microprocessor (MPU)
w/On–Chip Clock OSC
Description:
The NTE6507 integrated circuit is an 8 bit microprocessor in a 28–Lead DIP type package which pro-
vides a selection of addressable memory range, interrupt input options, and on–chip clock oscillators
and drivers. This device is bus compatible with the MC6800 product offering and is aimed at high
performance, low cost applications where single phase inputs or crystals provide the time base.
Features:
D Single 5V ±5% Power Supply
D N Channel, Silicon Gate, Depletion Load
Technology
D Bi–Directional Data Bus
D Instruction Decoding and Control
D 8k Addressable Bytes of Memory
D “Ready” Input
D 8 Bit Parallel Processing
D Decimal and Binary Arithmetic
D Thirteen Addressing Modes
D True Indexing Capability
D Programmable Stack Pointer
D Variable Length Stack
D Direct Memory Access Capability
D Bus Compatible with MC6800
D On–Board Clock
D 1MHz Operating Frequency
Absolute Maximum Ratings: (Note 1)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V
Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C
Note 1. This device contains input protection against damage due to high static voltages or electric
fields; however, precautions should be taken to avoid application of voltages higher than the
maximum rating.
DC Characteristics: (VCC = 5V ±5%, TA = 0° to +70°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Max
Unit
Input High Voltage
V
IH
Logic and
Logic
+2.0
V
V
V
o(in)
CC
V
–0.5
V
+0.25
CC
CC
Input Low Voltage
V
IL
Logic and
–0.3
+0.8
V
o(in)
Input Loading
RDY
I
IL
V = 0V, V = 5.25V
in CC
–10
–300
µA
Input Leakage Current
Logic (Excluding RDY)
I
in
V = 0 to 5.25V, V = 0
in CC
–
–
2.5
µA
µA
10.0
o(in)
Three–State (Off State) Input Current
DB0–DB7
I
V = 0.4 to 2.4V, V = 5.25V
TSI
in
CC
–
±10
µA
Output High Voltage
V
I
I
= –100µA, V = 4.75V
CC
OH
LOAD
DB0–DB7, A0–A15, R/W
2.4
–
V
Output Low Voltage
V
= 1.6mA, V = 4.75V
OL
LOAD
CC
DB0–DB7, A0–A15, R/W
–
–
0.4
V
Power Dissipation
P
V
= 5.25V
700
mW
D
in
CC
Capaticance
RES, RDY,
V = 0, T = +25°C, f = 1MHz
in A
C
–
–
–
–
10
15
12
15
pF
pF
pF
pF
DB0–DB7
A0–A15, R/W
C
out
COo(in)
o(in)
Dynamic Operating Characteristics: (VCC = 5V ±5%, TA = 0° to +70°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
1.00
480
460
10
Max
40
–
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
Cycle Time
T
CYC
Low Time
T
Note 2
Note 2
o(in)
o(in)
L
o
o
High Time
T
–
H
Neg to
Pos Delay
Neg Delay
Neg Delay
Pos Delay
T
01+
Load = 100pF
Load = 100pF
Load = 100pF
Load = 100pF
Note 3
70
65
65
75
30
o
o
o
o
α
1
2
Neg to
Pos to
Pos to
T
T
T
5
02–
01–
5
1
15
2
02+
Rise and Fall Time
Pulse Width
T , T
RO FO
0
(in)
TPWHO
TLO
TLOo–20
1(OUT)
2(OUT)
o
1
Pulse Width
and
ns
TPWHO
TLOo–40
TLOo–10
2
Delay Between
and Rise and Fall Times
T
D
5
–
ns
ns
1
2
T , T
R F
Load = 1TTL load +30pF, Note 3
–
25
1
2
Note 2. Measured at 50% points.
Note 3. Measured between 10% and 90% points.
Dynamic Operating Characteristics (Cont’d): (VCC = 5V ±5%, TA = 0 to +70°C unless otherwise
specified)
Parameter
R/W Setup Time
Symbol
Test Conditions
Min
–
Max
225
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T
RWS
RWH
R/W Hold Time
T
30
–
Address Setup Time
Address Hold Time
Read Access Time
Read Data Setup Time
Read Data Hold Time
Write Data Setup Time
Write Data Hold Time
Sync Setup Time
T
ADS
225
–
T
ADH
30
–
T
ACC
650
–
T
100
10
20
60
–
DSU
T
–
HR
T
175
150
350
–
MDS
T
HW
SYS
SYH
T
T
Sync Hold Time
30
200
RDY Setup Time
T
Note 4
–
RS
Note 4. RDY must never switch states within TRS to end of
.
2
Pin Connection Diagram
RES
Ø 2 (Out)
Ø 0 (In)
1
2
3
28
27
V
SS
RDY
26 R/W
25 DB 0
V
CC
4
5
DB 1
24
AB 0
AB 1
AB 2
6
7
23 DB 2
22 DB 3
AB 3
8
9
21 DB 4
20 DB 5
19 DB 6
AB 4
AB 5
10
AB 6 11
18 DB 7
AB 7 12
AB 8 13
AB 9 14
17 AB 12
16 AB 11
15 AB 10
14
15
1
28
1.469 (37.32)
Max
.540
(13.7)
.250
(6.35)
.100 (2.54)
1.300 (33.02)
.122
(3.1)
Min
.600
(15.24)
相关型号：
NTE68
Silicon Complementary Transistors General Purpose High Power Audio, Disk Head Positioner for Linear Applications
NTE
©2020 ICPDF网 联系我们和版权申明