74HCT4060D-Q100 [NXP]

14-stage binary ripple counter with oscillator; 与振荡器的14级二进制纹波计数器
74HCT4060D-Q100
型号: 74HCT4060D-Q100
厂家: NXP    NXP
描述:

14-stage binary ripple counter with oscillator
与振荡器的14级二进制纹波计数器

振荡器 计数器 触发器 逻辑集成电路 光电二极管
文件: 总24页 (文件大小:187K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74HC4060-Q100; 74HCT4060-Q100  
14-stage binary ripple counter with oscillator  
Rev. 1 — 2 August 2012  
Product data sheet  
1. General description  
The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that  
comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky  
TTL (LSTTL).  
The 74HC4060-Q100; 74HCT4060-Q100 are 14-stage ripple-carry counter/dividers and  
oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to  
Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator  
configuration allows design of either RC or crystal oscillator circuits. The oscillator may be  
replaced by an external clock signal at input RS. In this case keep the other oscillator pins  
(RTC and CTC) floating. The counter advances on the negative-going transition of RS. A  
HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of  
other input conditions. In the HCT version, the MR input is TTL compatible, but the RS  
input has CMOS input switching levels and can be driven by a TTL output by using a  
pull-up resistor to VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
All active components on chip  
RC or crystal oscillator configuration  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
3. Applications  
Control counters  
Timers  
Frequency dividers  
Time-delay circuits  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
4. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC4060D-Q100  
74HCT4060D-Q100  
40 C to +125 C  
SO16  
plastic small outline package; 16 leads;  
body width 3.9 mm  
SOT109-1  
74HC4060PW-Q100 40 C to +125 C  
TSSOP16  
plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  
74HC4060BQ-Q100 40 C to +125 C  
DHVQFN16 plastic dual in-line compatible thermal-enhanced  
very thin quad flat package; no leads; 16 terminals;  
body 2.5 3.5 0.85 mm  
SOT763-1  
74HCT4060BQ-Q100  
5. Functional diagram  
10  
9
RTC CTC  
RS  
Q3  
Q4  
7
11  
12  
5
MR  
Q5  
4
Q6  
6
Q7  
14  
13  
15  
1
Q8  
Q9  
Q11  
Q12  
Q13  
2
3
001aai467  
Fig 1. Logic symbol  
CTR14  
!G  
CTR14  
3
7
3
7
9
10  
11  
12  
CX  
5
5
RX  
4
4
+
AND  
RCX  
6
11  
12  
6
+
14  
13  
15  
1
14  
13  
15  
1
CT  
CT  
CT = 0  
9
CT = 0  
9
11  
11  
2
2
13  
3
13  
3
(a)  
(b)  
001aai468  
Fig 2. IEC logic symbol  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
2 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
10  
RTC  
9
CTC  
RS  
11  
CP  
MR  
14-STAGE BINARY COUNTER  
MR  
12  
Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13  
7
5
4
6
14  
13  
15  
1
2
3
001aai113  
Fig 3. Functional diagram  
CTC  
FF  
1
FF  
4
FF  
10  
FF  
12  
FF  
14  
RTC  
RS  
CP  
CP  
CP  
CP  
CP  
Q
Q
Q
Q
Q
MR  
MR  
MR  
MR  
MR  
MR  
Q3  
Q9  
Q11  
Q13  
001aai114  
Fig 4. Logic diagram  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
3 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
6. Pinning information  
6.1 Pinning  
ꢀꢁꢂꢃꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢀꢁꢂꢃꢉꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢀꢁꢂꢃꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
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ꢚꢙꢔ" ꢖꢕ#ꢛꢁ  
ꢁꢍ  
ꢁꢈ  
ꢁꢊ  
ꢁꢆ  
ꢁꢄ  
ꢁꢁ  
ꢁꢓ  
ꢀꢁꢁ  
ꢀꢁꢄ  
ꢀꢁꢆ  
ꢀꢈ  
ꢃꢃ  
 ꢖ$ꢙ%ꢛꢕꢔꢙꢕ  
ꢀꢅ  
ꢁꢈ  
ꢁꢊ  
ꢁꢆ  
ꢁꢄ  
ꢁꢁ  
ꢁꢓ  
ꢀꢁꢄ  
ꢀꢅ  
ꢀꢇ  
ꢀꢁꢆ  
ꢀꢈ  
ꢀꢊ  
ꢀꢍ  
ꢀꢆ  
ꢀꢇ  
ꢀꢉ  
ꢀꢉ  
ꢋꢌ  
ꢌꢎ  
ꢌꢏꢃ  
ꢀꢊ  
ꢋꢌ  
ꢌꢎ  
&ꢁ'  
ꢃꢃ  
ꢀꢍ  
ꢀꢆ  
ꢌꢏꢃ  
ꢃꢏꢃ  
ꢀꢀꢀꢁꢂꢂꢃꢂꢂꢅ  
ꢐꢑꢒ  
ꢏꢔꢕꢖꢗꢘꢕꢔꢙꢖꢚꢛꢚꢜꢘꢛꢝ ꢙ!  
ꢀꢀꢀꢁꢂꢂꢃꢂꢂꢄ  
(1) The die substrate is attached to this pad using  
conductive die attach material. It cannot be used as  
supply pin or input.  
Fig 5. Pin configuration SO16 and TSSOP16  
Fig 6. Pin configuration DHVQFN16  
6.2 Pin description  
Table 2.  
Symbol  
Q11 to Q13  
Q3 to Q9  
GND  
Pin description  
Pin  
Description  
counter output  
counter output  
ground (0 V)  
1, 2, 3  
7, 5, 4, 6, 14, 13, 15  
8
CTC  
9
external capacitor connection  
external resistor connection  
clock input /oscillator pin  
master reset input (active HIGH)  
supply voltage  
RTC  
10  
11  
12  
16  
RS  
MR  
VCC  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
4 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
7. Functional description  
1
2
4
8
16  
32  
64  
128  
256  
512 1024 2048 4096 8192 16384  
RS  
MR  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
Q11  
Q12  
Q13  
001aai117  
Fig 7. Timing diagram  
8. Limiting values  
Table 3.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max  
+7  
Unit  
V
supply voltage  
0.5  
[1]  
[1]  
input clamping current  
output clamping current  
output current  
VI < 0.5 V or VI > VCC + 0.5 V  
VO < 0.5 V or VO > VCC + 0.5 V  
0.5 V < VO < VCC + 0.5 V  
-
20  
20  
25  
50  
mA  
mA  
mA  
mA  
mA  
C  
IOK  
-
IO  
-
ICC  
supply current  
-
IGND  
Tstg  
ground current  
50  
65  
-
storage temperature  
+150  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
5 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 3.  
Limiting values …continued  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
Ptot  
total power dissipation  
Tamb = 40 C to +125 C  
SO16 package  
[2]  
[3]  
[4]  
-
-
-
500  
500  
500  
mW  
mW  
mW  
TSSOP16 package  
DHVQFN16 package  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] Ptot derates linearly with 8 mW/K above 70 C.  
[3] Ptot derates linearly with 5.5 mW/K above 60 C.  
[4]  
Ptot derates linearly with 4.5 mW/K above 60 C.  
9. Recommended operating conditions  
Table 4.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V)  
Symbol Parameter Conditions  
74HC4060-Q100  
74HCT4060-Q100  
Unit  
Min  
Typ  
Max  
6.0  
Min  
Typ  
Max  
VCC  
VI  
supply voltage  
2.0  
5.0  
4.5  
5.0  
5.5  
VCC  
VCC  
+125  
-
V
input voltage  
0
-
VCC  
VCC  
+125  
625  
139  
83  
0
-
V
VO  
output voltage  
0
-
0
-
V
Tamb  
t/V  
ambient temperature  
input transition rise and fall rate VCC = 2.0 V  
VCC = 4.5 V  
40  
-
40  
-
C  
-
-
-
-
-
-
-
-
ns/V  
ns/V  
ns/V  
1.67  
-
1.67  
-
139  
-
VCC = 6.0 V  
10. Static characteristics  
Table 5.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
74HC4060-Q100  
VIH  
HIGH-level  
MR input  
input voltage  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
RS input  
1.5 1.3  
3.15 2.4  
4.2 3.1  
-
-
-
1.5  
3.15  
4.2  
-
-
-
1.5  
3.15  
4.2  
-
-
-
V
V
V
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
1.7  
3.6  
4.8  
-
-
-
-
-
-
1.7  
3.6  
4.8  
-
-
-
1.7  
3.6  
4.8  
-
-
-
V
V
V
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
6 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 5.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
VIL  
LOW-level  
MR input  
input voltage  
VCC = 2.0 V  
-
-
-
0.8  
0.5  
-
-
-
0.5  
1.35  
1.8  
-
-
-
0.5  
1.35  
1.8  
V
V
V
VCC = 4.5 V  
2.1 1.35  
VCC = 6.0 V  
2.8  
1.8  
RS input  
VCC = 2.0 V  
-
-
-
-
-
-
0.3  
0.9  
1.2  
-
-
-
0.3  
0.9  
1.2  
-
-
-
0.3  
0.9  
1.2  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
VOH  
HIGH-level  
output  
voltage  
RTC output; RS = MR = GND  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 2.6 mA; VCC = 4.5 V  
IO = 3.3 mA; VCC = 6.0 V  
RTC output; RS = MR = VCC  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 0.65 mA; VCC = 4.5 V  
IO = 0.85 mA; VCC = 6.0 V  
1.9 2.0  
4.4 4.5  
5.9 6.0  
-
-
-
-
-
1.9  
4.4  
-
-
-
-
-
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
V
V
V
V
V
5.9  
3.98  
5.48  
-
-
3.84  
5.34  
1.9 2.0  
4.4 4.5  
5.9 6.0  
-
-
-
-
-
1.9  
4.4  
-
-
-
-
-
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
V
V
V
V
V
5.9  
3.98  
5.48  
-
-
3.84  
5.34  
CTC output;  
RS = VIH; MR = VIL  
IO = 3.2 mA; VCC = 4.5 V  
IO = 4.2 mA; VCC = 6.0 V  
3.98  
5.48  
-
-
-
-
3.84  
5.34  
-
-
3.7  
5.2  
-
-
V
V
VI = VIH or VIL;  
except RTC output  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
1.9 2.0  
4.4 4.5  
5.9 6.0  
-
-
-
1.9  
4.4  
5.9  
-
-
-
1.9  
4.4  
5.9  
-
-
-
V
V
V
VI = VIH or VIL;  
except RTC and CTC outputs  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
3.98  
5.48  
-
-
-
-
3.84  
5.34  
-
-
3.7  
5.2  
-
-
V
V
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
7 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 5.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
VOL  
LOW-level  
output  
RTC output; RS = VCC  
MR = GND  
;
voltage  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 2.6 mA; VCC = 4.5 V  
IO = 3.3 mA; VCC = 6.0 V  
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
0.1  
0.4  
0.4  
V
V
V
V
V
0.1  
0.1  
0.26  
0.26  
0.33  
0.33  
-
CTC output; RS = VIL;  
MR = VIH  
IO = 3.2 mA; VCC = 4.5 V  
IO = 4.2 mA; VCC = 6.0 V  
-
-
-
-
0.26  
0.26  
-
-
0.33  
0.33  
-
-
0.4  
0.4  
V
V
VI = VIH or VIL;  
except RTC output  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
-
-
-
0
0
0
0.1  
0.1  
0.1  
-
-
-
0.1  
0.1  
0.1  
-
-
-
0.1  
0.1  
0.1  
V
V
V
VI = VIH or VIL;  
except RTC and CTC outputs  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
-
-
-
-
-
-
0.26  
0.26  
0.1  
-
-
-
0.33  
0.33  
1.0  
-
-
-
0.4  
0.4  
V
V
II  
input leakage VI = VCC or GND; VCC = 6.0 V  
current  
1.0  
A  
ICC  
CI  
supply  
current  
VI = VCC or GND; IO = 0 A;  
VCC = 6.0 V  
-
-
-
8.0  
-
-
-
80  
-
-
-
160  
-
A  
input  
3.5  
pF  
capacitance  
74HCT4060-Q100  
[1]  
[1]  
VIH  
HIGH-level  
MR input;  
2.0  
-
-
-
-
2.0  
-
-
2.0  
-
-
V
V
input voltage VCC = 4.5 V to 5.5 V  
LOW-level MR input;  
input voltage VCC = 4.5 V to 5.5 V  
VIL  
0.8  
0.8  
0.8  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
8 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 5.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
VOH  
HIGH-level  
output  
voltage  
RTC output; RS = MR = VCC  
IO = 20 A; VCC = 4.5 V  
IO = 0.65 mA; VCC = 4.5 V  
RTC output; RS = MR = GND  
IO = 20 A; VCC = 4.5 V  
IO = 2.6 mA; VCC = 4.5 V  
4.4 4.5  
3.98  
-
-
4.4  
-
-
4.4  
3.7  
-
-
V
V
-
3.84  
4.4 4.5  
-
-
4.4  
-
-
4.4  
3.7  
-
-
V
V
3.98  
-
3.84  
CTC output; RS = VIH;  
MR = VIL  
IO = 3.2 mA; VCC = 4.5 V  
3.98  
-
-
-
-
3.84  
4.4  
-
-
-
3.7  
4.4  
3.7  
-
-
-
V
V
V
VI = VIH or VIL;  
except RTC output  
IO = 20 A; VCC = 4.5 V  
4.4 4.5  
VI = VIH or VIL;  
except RTC and CTC outputs  
IO = 4.0 mA; VCC = 4.5 V  
3.98  
-
3.84  
VOL  
LOW-level  
output  
RTC output; RS = VCC  
MR = GND  
;
voltage  
IO = 20 A; VCC = 4.5 V  
-
-
0
-
0.1  
-
-
0.1  
-
-
0.1  
0.4  
V
V
IO = 2.6 mA; VCC = 4.5 V  
0.26  
0.33  
CTC output; RS = VIL;  
MR = VIH  
IO = 3.2 mA; VCC = 4.5 V  
-
-
-
0.26  
0.1  
-
-
0.33  
0.1  
-
-
0.4  
0.1  
V
V
VI = VIH or VIL;  
except RTC output  
IO = 20 A; VCC = 4.5 V  
0
VI = VIH or VIL;  
except RTC and CTC outputs  
IO = 4.0 mA; VCC = 4.5 V  
-
-
-
-
0.26  
-
-
0.33  
-
-
0.4  
V
II  
input leakage VI = VCC or GND; VCC = 5.5 V  
current  
0.1  
1.0  
1.0  
A  
ICC  
ICC  
supply  
current  
VI = VCC or GND;  
VCC = 5.5 V; IO = 0 A  
-
-
-
8.0  
-
-
80  
-
-
160  
196  
A  
A  
additional  
supply  
current  
per input pin;  
VI = VCC 2.1 V; other inputs  
at VCC or GND;  
40  
144  
180  
VCC = 4.5 V to 5.5 V; IO = 0 A  
CI  
input  
-
3.5  
-
-
-
-
-
pF  
capacitance  
[1] For HCT4060-Q100, only input MR (pin 12) has TTL input switching levels.  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
9 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
11. Dynamic characteristics  
Table 6.  
Dynamic characteristics  
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
74HC4060-Q100  
[1]  
tpd  
propagation  
delay  
RS to Q3; see Figure 8  
VCC = 2.0 V  
-
-
-
-
99  
36  
31  
29  
300  
60  
-
-
-
-
-
375  
75  
-
-
-
-
-
450  
90  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
51  
64  
77  
[2]  
Qn to Qn+1; see Figure 9  
VCC = 2.0 V  
-
-
-
-
22  
8
80  
16  
-
-
-
-
-
100  
20  
-
-
-
-
-
120  
24  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
6
6
14  
17  
20  
tPHL  
HIGH to LOW MR to Qn; see Figure 10  
propagation  
delay  
VCC = 2.0 V  
-
-
-
-
55  
20  
17  
16  
175  
35  
-
-
-
-
-
220  
44  
-
-
-
-
-
265  
53  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
30  
37  
45  
[3]  
tt  
transition time Qn; see Figure 8  
VCC = 2.0 V  
-
-
-
19  
7
75  
15  
13  
-
-
-
95  
19  
16  
-
-
-
110  
22  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
6
19  
tW  
pulse width  
RS (HIGH or LOW);  
see Figure 8  
VCC = 2.0 V  
VCC = 4.5 V  
80  
16  
14  
17  
6
-
-
-
100  
20  
-
-
-
120  
24  
-
-
-
ns  
ns  
ns  
VCC = 6.0 V  
5
17  
20  
MR (HIGH); see Figure 10  
VCC = 2.0 V  
80  
16  
14  
25  
9
-
-
-
100  
20  
-
-
-
120  
24  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
7
17  
20  
trec  
recovery time MR to RS; see Figure 10  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
100  
20  
28  
10  
8
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
17  
21  
26  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
10 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 6.  
Dynamic characteristics …continued  
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
fmax  
maximum  
frequency  
RS; see Figure 8  
VCC = 2.0 V  
6
30  
-
26  
80  
87  
95  
40  
-
-
-
-
-
4.8  
24  
-
-
-
-
-
-
4
20  
-
-
-
-
-
-
MHz  
MHz  
MHz  
MHz  
pF  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
35  
-
28  
-
24  
-
[4]  
CPD  
power  
VI = GND to VCC  
;
dissipation  
capacitance  
VCC = 5 V; fi = 1 MHz  
74HCT4060-Q100  
[1]  
[2]  
tpd  
propagation  
delay  
RS to Q3; see Figure 8  
VCC = 4.5 V  
-
-
33  
31  
66  
-
-
-
83  
-
-
-
99  
-
ns  
ns  
VCC = 5.0 V; CL = 15 pF  
Qn to Qn+1; see Figure 9  
VCC = 4.5 V  
-
-
8
6
16  
-
-
-
20  
-
-
-
24  
-
ns  
ns  
VCC = 5.0 V; CL = 15 pF  
tPHL  
HIGH to LOW MR to Qn; see Figure 10  
propagation  
delay  
VCC = 4.5 V  
-
-
21  
18  
44  
-
-
-
55  
-
-
-
66  
-
ns  
ns  
VCC = 5.0 V; CL = 15 pF  
transition time Qn; see Figure 8  
VCC = 4.5 V  
[3]  
tt  
-
7
15  
-
19  
-
22  
ns  
tW  
pulse width  
RS (HIGH or LOW);  
see Figure 8  
VCC = 4.5 V  
16  
16  
26  
6
6
-
-
-
20  
20  
33  
-
-
-
24  
24  
39  
-
-
-
ns  
ns  
ns  
MR (HIGH); see Figure 10  
VCC = 4.5 V  
trec  
recovery time MR to RS; see Figure 10  
VCC = 4.5 V  
13  
fmax  
maximum  
frequency  
RS; see Figure 8  
VCC = 4.5 V  
30  
-
80  
88  
-
-
24  
-
-
-
20  
-
-
-
MHz  
MHz  
VCC = 5.0 V; CL = 15 pF  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
11 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Table 6.  
Dynamic characteristics …continued  
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
[4]  
CPD  
power  
VI = GND to VCC 1.5 V;  
-
40  
-
-
-
-
-
pF  
dissipation  
capacitance  
VCC = 5 V; fi = 1 MHz  
[1] tpd is the same as tPHL and tPLH  
.
[2] Qn+1 is the next Qn output.  
[3] tt is the same as tTHL and tTLH  
.
[4] CPD is used to determine the dynamic power dissipation (PD in W):  
PD = CPD VCC2 fi N + (CL VCC2 fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL VCC2 fo) = sum of outputs.  
12. Waveforms  
1/f  
max  
V
I
RS input  
GND  
V
M
t
t
W
t
PHL  
PLH  
V
OH  
90 %  
90 %  
V
Q3 output  
M
10 %  
10 %  
V
OL  
t
t
THL  
TLH  
001aai118  
Measurement points are given in Table 7.  
OL and VOH are typical voltage output levels that occur with the output load.  
V
Fig 8. Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output  
transition times and the maximum clock frequency  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
12 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
V
OH  
Qn output  
V
M
V
OL  
t
t
PLH  
PHL  
V
OH  
V
Qn+1 output  
M
V
OL  
001aai120  
Measurement points are given in Table 7.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 9. Waveforms showing the output Qn to output Qn+1 propagation delays  
V
I
MR input  
GND  
V
M
T
t
rec  
W
V
I
RS input  
GND  
V
M
t
PHL  
V
OH  
V
Qn output  
M
V
OL  
001aai119  
Measurement points are given in Table 7.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 10. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation  
delays and the master reset to clock (RS) recovery time  
Table 7.  
Type  
Measurement points  
Input  
VM  
Output  
VM  
74HC4060-Q100  
74HCT4060-Q100  
0.5 VCC  
1.3 V  
0.5 VCC  
1.3 V  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
13 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
GND  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
GND  
t
W
V
CC  
V
V
O
I
G
DUT  
R
T
C
L
001aah768  
Test data is given in Table 8.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
Fig 11. Test circuit for measuring switching times  
Table 8.  
Type  
Test data  
Input  
Load  
VI  
tr, tf  
6 ns  
6 ns  
CL  
74HC4060-Q100  
VCC  
15 pF, 50 pF  
15 pF, 50 pF  
74HCT4060-Q100 3 V  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
14 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
13. RC oscillator  
13.1 Timing component limitations  
The oscillator frequency is mainly determined by RtCt, provided R2 2Rt and  
R2C2 << RtCt. The function of R2 is to minimize the influence of the forward voltage  
across the input protection diodes on the frequency. The stray capacitance C2 should be  
kept as small as possible. In consideration of accuracy, Ct must be larger than the  
inherent stray capacitance. Rt must be larger than the ON resistance in series with it,  
which typically is 280 at VCC = 2.0 V, 130 at VCC = 4.5 V and 100 at VCC = 6.0 V.  
ꢀꢁꢂꢃꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢀꢁꢂꢃꢉꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢋꢌꢛ&(ꢔꢜ"ꢛ#ꢜ) *'  
ꢁꢁ ꢌꢎ  
ꢌꢏꢃ  
ꢁꢓ  
ꢃꢏꢃ  
ꢃꢄ  
ꢌꢄ  
ꢀꢀꢀꢁꢂꢂꢃꢂꢂꢆ  
1
Typical formula for oscillator frequency: fosc  
=
------------------------------  
2.5 Rt Ct  
Fig 12. Example of an RC oscillator  
The recommended values for these components to maintain agreement with the typical  
oscillation formula are:  
Ct > 50 pF, up to any practical value and 10 k< Rt < 1 M.  
In order to avoid start-up problems, Rt 1 k.  
13.2 Typical crystal oscillator circuit  
In Figure 13, R2 is the power limiting resistor. For starting and maintaining oscillation, a  
minimum transconductance is necessary, so R2 must not be too large. A practical value  
for R2 is 2.2 k.  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
15 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
Rbias  
ꢀꢁꢂꢃꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢀꢁꢂꢃꢉꢁꢄꢅꢄꢆꢇꢈꢄꢄ  
ꢋꢌꢛ&(ꢔꢜ"ꢛ#ꢜ) *'  
ꢁꢁ ꢌꢎ  
560 kΩ  
V
DD  
0.47 pF  
100 μF  
ꢌꢏꢃ  
ꢁꢓ  
V
ꢌ, ꢕꢗ  
I
input  
output  
A
I
O
(f = 1 kHz)  
i
ꢁꢓꢓꢛ- ꢛꢚꢜꢛꢁꢛꢋ  
GND  
001aai123  
ꢌꢄ  
ꢄ.ꢄꢛ-  
gfs = IO / VI at VO is constant; MR = LOW.  
ꢃꢆ  
ꢃꢄ  
ꢁꢓꢓꢛꢘ+  
See also Figure 15.  
ꢄꢄꢛꢘ+ꢛꢚꢜꢛꢆꢇꢛꢘ+  
ꢀꢀꢀꢁꢂꢂꢃꢂꢂꢇ  
Fig 13. External component connection for a crystal  
oscillator  
Fig 14. Test set-up for measuring forward  
transconductance  
001aai124  
14  
(1)  
g
fs  
(mA/V)  
(2)  
(3)  
10  
6
2
0
2
4
6
V
(V)  
CC  
Tamb = 25 C.  
(1) Maximum.  
(2) Typical.  
(3) Minimum.  
Fig 15. Typical forward transconductance as function of the supply voltage  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
16 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
001aai125  
001aai127  
5
5
4
3
2
10  
10  
f
f
osc  
(Hz)  
osc  
(Hz)  
R
t
4
3
2
10  
10  
C
t
10  
10  
10  
10  
10  
10  
10  
10  
3
4
5
6
4  
3  
2  
1  
10  
10  
10  
10  
10  
10  
R (Ω)  
t
C (μF)  
t
VCC = 2.0 V to 6.0 V; Tamb = 25 C.  
For Rt curve: Ct = 1 nF; R2 = 2 Rt.  
V
CC = 2.0 V to 6.0 V; Tamb = 25 C.  
For Ct curve: Rt = 100 k; R2 = 200 k.  
Fig 16. RC oscillator frequency as a function of Rt  
Fig 17. RC oscillator frequency as a function of Ct  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
17 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
14. Package outline  
SO16: plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
D
E
A
X
v
c
y
H
M
A
E
Z
16  
9
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
8
e
w
M
detail X  
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
10.0  
9.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.39  
0.014 0.0075 0.38  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.020  
0.028  
0.012  
inches  
0.069  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT109-1  
076E07  
MS-012  
Fig 18. Package outline SOT109-1 (SO16)  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
18 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig 19. Package outline SOT403-1 (TSSOP16)  
74HC_HCT4060_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
19 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 x 3.5 x 0.85 mm  
SOT763-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
C
1
y
e
b
v
M
C
C
A
B
w
M
2
7
L
1
8
9
E
h
e
16  
15  
10  
D
h
X
0
2.5  
scale  
5 mm  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
b
c
E
e
e
y
D
D
E
L
v
w
y
1
1
h
1
h
max.  
0.05 0.30  
0.00 0.18  
3.6  
3.4  
2.15  
1.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT763-1  
- - -  
MO-241  
- - -  
Fig 20. Package outline SOT763-1 (DHVQFN16)  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
20 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
15. Abbreviations  
Table 9.  
Acronym  
CMOS  
DUT  
Abbreviations  
Description  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
TTL  
Transistor-Transistor Logic  
Military  
MIL  
16. Revision history  
Table 10. Revision history  
Document ID  
Release date  
20120802  
Data sheet status  
Change notice Supersedes  
74HC_HCT4060_Q100 v.1  
Product data sheet  
-
-
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
21 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
17. Legal information  
17.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use in automotive applications — This NXP  
17.2 Definitions  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
17.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
22 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
17.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
18. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74HC_HCT4060_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 2 August 2012  
23 of 24  
74HC4060-Q100; 74HCT4060-Q100  
NXP Semiconductors  
14-stage binary ripple counter with oscillator  
19. Contents  
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
7
Functional description . . . . . . . . . . . . . . . . . . . 5  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Recommended operating conditions. . . . . . . . 6  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6  
Dynamic characteristics . . . . . . . . . . . . . . . . . 10  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
8
9
10  
11  
12  
13  
13.1  
13.2  
RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Timing component limitations . . . . . . . . . . . . . 15  
Typical crystal oscillator circuit . . . . . . . . . . . . 15  
14  
15  
16  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21  
17  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
17.1  
17.2  
17.3  
17.4  
18  
19  
Contact information. . . . . . . . . . . . . . . . . . . . . 23  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 2 August 2012  
Document identifier: 74HC_HCT4060_Q100  

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