935320763128 [NXP]
RF Power Field-Effect Transistor;
| 型号： | 935320763128 |
| 厂家： | 
NXP |
| 描述： | RF Power Field-Effect Transistor |
| 文件： | 总16页 (文件大小：534K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: A2T20H330W24S
Rev. 0, 5/2015
Freescale Semiconductor
Technical Data
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 58 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications requiring very wide instantaneous bandwidth
capability covering the frequency range of 1880 to 2025 MHz.
A2T20H330W24SR6
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
DQA = 700 mA, VGSB = 0.3 Vdc, Pout = 58 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
I
1880–2025 MHz, 58 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
G
Output PAR
(dB)
ACPR
(dBc)
ps
D
Frequency
1880 MHz
1960 MHz
2025 MHz
(dB)
16.5
16.9
16.3
(%)
50.9
50.5
50.1
7.9
7.8
7.8
–33.1
–36.0
–36.8
Features
Advanced High Performance In--Package Doherty
Designed for Wide Instantaneous Bandwidth Applications
Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
NI--1230S--4L2L
Able to Withstand Extremely High Output VSWR and Broadband Operating
Conditions
Designed for Digital Predistortion Error Correction Systems
(2)
6
5
VBW
A
Carrier
RF /V
1
2
RF /V
outA DSA
inA GSA
(1)
RF /V
inB GSB
RF /V
outB DSB
4
3
Peaking
(2)
VBW
B
(Top View)
Figure 1. Pin Connections
1. Pin connections 4 and 5 are DC coupled
and RF independent.
2. Device cannot operate with V current
DD
supplied through pin 3 and pin 6.
Freescale Semiconductor, Inc., 2015. All rights reserved.
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Vdc
Vdc
Vdc
C
Drain--Source Voltage
V
–0.5, +65
–6.0, +10
32, +0
DSS
Gate--Source Voltage
V
GS
DD
Operating Voltage
V
Storage Temperature Range
Case Operating Temperature Range
T
stg
–65 to +150
–40 to +125
–40 to +225
T
C
C
(1,2)
Operating Junction Temperature Range
T
J
C
CW Operation @ T = 25C
Derate above 25C
CW
268
1.2
W
W/C
C
Table 2. Thermal Characteristics
(2,3)
Characteristic
Symbol
Value
Unit
Thermal Resistance, Junction to Case
R
0.25
C/W
JC
Case Temperature 79C, 58 W W--CDMA, 28 Vdc, I
= 700 mA,
DQA
V
= 0.3 Vdc, f = 1960 MHz
GSB
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
2
B
IV
Table 4. Electrical Characteristics (T = 25C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(4)
Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
I
—
—
—
—
—
—
10
5
Adc
Adc
Adc
DSS
DSS
GSS
(V = 65 Vdc, V = 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V = 32 Vdc, V = 0 Vdc)
DS
GS
Gate--Source Leakage Current
(V = 5 Vdc, V = 0 Vdc)
I
1
GS
DS
(4)
On Characteristics -- Side A, Carrier
Gate Threshold Voltage
V
1.4
2.2
0.1
1.3
2.6
2.2
3.0
0.3
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 140 Adc)
DS
D
Gate Quiescent Voltage
(V = 28 Vdc, I = 700 mAdc, Measured in Functional Test)
V
GSA(Q)
DD
D
Drain--Source On--Voltage
(V = 10 Vdc, I = 1.4 Adc)
V
0.15
DS(on)
GS
D
(4)
On Characteristics -- Side B, Peaking
Gate Threshold Voltage
V
0.8
0.1
1.2
1.6
0.3
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 180 Adc)
DS
D
Drain--Source On--Voltage
(V = 10 Vdc, I = 1.8 Adc)
V
0.15
DS(on)
GS
D
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf/calculators.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
4. V and V must be tied together and powered by a single DC power supply.
DDA
DDB
(continued)
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
2
Table 4. Electrical Characteristics (T = 25C unless otherwise noted) (continued)
A
Characteristic
Symbol
Min
Typ
= 700 mA, V = 0.3 Vdc,
GSB
Max
Unit
(1,2,3)
Functional Tests
(In Freescale Doherty Test Fixture, 50 ohm system) V = 28 Vdc, I
DD
DQA
P
= 58 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
out
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
G
15.5
48.5
7.2
16.5
50.9
7.9
18.5
—
dB
%
ps
D
Drain Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
PAR
—
dB
dBc
ACPR
—
–33.1
–29.0
(3)
Load Mismatch (In Freescale Doherty Test Fixture, 50 ohm system) I
= 700 mA, V
= 0.3 Vdc, f = 1960 MHz
GSB
DQA
VSWR 10:1 at 32 Vdc, 354 W Pulse Output Power
(3 dB Input Overdrive from 240 W Pulse Rated Power)
No Device Degradation
(3)
Typical Performance
(In Freescale Doherty Test Fixture, 50 ohm system) V = 28 Vdc, I
= 700 mA, V = 0.3 Vdc,
GSB
DD
DQA
1880–2025 MHz Bandwidth
P
P
@ 1 dB Compression Point, CW
P1dB
P3dB
—
—
—
240
380
–19
—
—
—
W
W
out
out
(4)
@ 3 dB Compression Point
AM/PM
(Maximum value measured at the P3dB compression point across
the 1880–2025 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
VBW
—
140
0.6
—
MHz
res
Gain Flatness in 145 MHz Bandwidth @ P = 58 W Avg.
G
—
—
—
—
dB
out
F
Gain Variation over Temperature
G
0.005
dB/C
(–30C to +85C)
Output Power Variation over Temperature
(–30C to +85C)
P1dB
—
0.006
—
dB/C
(5)
Table 5. Ordering Information
Device
Tape and Reel Information
Package
A2T20H330W24SR6
R6 Suffix = 150 Units, 56 mm Tape Width, 13--Reel
NI--1230S--4L2L
1. V
and V
must be tied together and powered by a single DC power supply.
DDB
DDA
2. Part internally matched both on input and output.
3. Measurement made with device in an asymmetrical Doherty configuration.
4. P3dB = P
+ 7.0 dB where P
is the average output power measured using an unclipped W--CDMA single--carrier input signal where
avg
avg
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
5. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
3
- -
C19
V
V
DDA
GGA
R4
C13
C16
C17
C5
C1
D64762
R1
R2
C10
C9
C
P
C8
C6
C11
C3
C4
Z1
R3
C12
A2T20H330W24S
Rev. 0
C14
R5
C7
C18
C2
C15
- -
V
V
GGB
DDB
C20
Note: V
and V
must be tied together and powered by a single DC power supply.
DDB
DDA
Figure 2. A2T20H330W24SR6 Test Circuit Component Layout
Table 6. A2T20H330W24SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
ATC
C1, C2, C3, C4, C5, C6, C7 8.2 pF Chip Capacitors
ATC600F8R2BT250XT
ATC600F5R6BT250XT
ATC600F0R8BT250XT
ATC600F0R6AT250XT
C5750X7S2A106K230KB
C8
5.6 pF Chip Capacitor
0.8 pF Chip Capacitors
0.6 pF Chip Capacitors
10 F Chip Capacitors
ATC
ATC
ATC
TDK
C9, C10
C11, C12
C13, C14, C15, C16, C17,
C18
C19, C20
R1, R2
R3
220 F, 63 V Electrolytic Capacitors
2.2 , 1/4 W Chip Resistor
SK063M0220B5S-1012
CRCW12062R20JNEA
CW12010T0050GBK
CRCW12061K00FKEA
X3C19P1-05S
Yageo
Vishay
ATC
50 , 10 W Chip Resistor
R4, R5
Z1
1 K, 1/4 W Chip Resistors
Vishay
Anaren
MTL
1700–2000 MHz Band, 90, 5 dB Directional Coupler
PCB
Rogers RO4350B, 0.020, = 3.66
D64762
r
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
4
TYPICAL CHARACTERISTICS
54
53
52
51
50
17.6
17.4
17.2
17
V
V
= 28 Vdc, P = 58 W (Avg.), I
= 700 mA
DD
out
DQA
= 0.3 Vdc, Single--Carrier W--CDMA, 3.84 MHz
GSB
Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
D
16.8
16.6
16.4
16.2
16
–1.8
–1.9
–2
–32
–33
–34
G
ps
ACPR
–2.1
–2.2
–2.3
–35
–36
15.8
PARC
15.6
–37
1850 1875 1900 1925 1950 1975 2000 2025 2050
f, FREQUENCY (MHz)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 58 Watts Avg.
–20
IM3--U
–30
IM3--L
IM5--L
IM5--U
–40
–50
–60
–70
IM7--L
IM7--U
V
V
= 28 Vdc, P = 30 W (PEP), I = 700 mA
DQA
= 0.3 Vdc, Two--Tone Measurements
DD
out
GSB
(f1 + f2)/2 = Center Frequency of 1960 MHz
1
10
100
300
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
18
1
0
60
–20
V
= 28 Vdc, I
= 700 mA, V = 0.3 Vdc, f = 1960 MHz
GSB
DD
DQA
Single--Carrier W--CDMA
D
50
40
30
20
10
0
–25
–30
–35
–40
–45
–50
17.5
–1 dB = 34.7 W
–1
–2
–3
–4
–5
17
16.5
16
ACPR
–2 dB = 53.5 W
–3 dB = 73.5 W
G
ps
15.5
15
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
PARC
5
30
55
80
105
130
P
, OUTPUT POWER (WATTS)
out
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
60
50
40
30
20
10
0
20
18
16
14
12
10
8
0
V
= 28 Vdc, I
= 700 mA, V
= 0.3 Vdc
GSB
DD
DQA
Single--Carrier W--CDMA
–10
–20
–30
–40
–50
–60
1880 MHz
ACPR
G
1960 MHz
1880 MHz
ps
2025 MHz
1960 MHz
2025 MHz
D
2025 MHz
1960 MHz
1880 MHz
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
1
10
100
500
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
21
18
Gain
15
12
9
V
P
= 28 Vdc
= 0 dBm
DD
in
6
3
I
= 700 mA
= 0.3 Vdc
DQA
V
GSB
1600 1700 1800 1900 2000 2100 2200 2300 2400
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
6
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, I
= 774 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
59.4
59.6
58.7
Gain (dB)
19.2
(dBm)
52.2
(W)
167
165
(MHz)
1880
1960
2025
1.73 – j3.99
3.43 – j5.25
6.42 – j5.02
1.65 + j4.16
1.09 – j3.27
1.18 – j3.50
1.20 – j3.67
–12
–13
–13
3.31 + j5.46
6.81 + j5.80
19.3
52.2
19.5
52.1
163
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
61.1
60.6
60.2
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.73 – j3.99
1.54 + j4.30
1.07 – j3.44
1.15 – j3.65
1.22 – j3.82
17.0
53.0
199
–16
–17
–17
3.43 – j5.25
6.42 – j5.02
3.22 + j5.82
7.20 + j6.40
17.0
17.3
52.9
52.9
196
194
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 8. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, I
= 774 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
72.8
71.5
69.8
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.73 – j3.99
3.43 – j5.25
6.42 – j5.02
1.80 + j4.54
2.56 – j2.40
2.29 – j2.45
2.00 – j2.60
22.3
50.1
103
–18
–19
–18
3.81 + j5.93
8.06 + j5.78
22.2
22.2
50.2
50.4
104
110
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
74.9
73.0
72.0
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.73 – j3.99
1.73 + j4.63
2.72 – j2.37
2.29 – j2.41
2.06 – j2.48
20.4
50.6
114
–25
–26
–25
3.43 – j5.25
6.42 – j5.02
3.70 + j6.23
8.59 + j6.16
20.3
20.4
50.8
50.9
120
123
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, V
= 0.6 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
57.0
57.7
59.4
Gain (dB)
14.6
(dBm)
53.5
(W)
222
226
(MHz)
1880
1960
2025
1.21 – j4.59
1.07 + j4.59
1.71 – j3.44
1.77 – j3.38
1.67 – j3.37
–33
–33
–35
1.99 – j5.85
3.66 – j7.62
1.82 + j6.09
3.48 + j7.91
15.0
53.5
15.2
53.7
235
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
58.0
58.5
60.0
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.21 – j4.59
1.07 + j4.78
1.63 – j3.56
1.77 – j3.58
1.82 – j3.65
12.4
54.3
268
–39
–40
–42
1.99 – j5.85
3.66 – j7.62
1.92 + j6.43
3.91 + j8.48
12.8
13.0
54.3
54.4
270
276
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, V
= 0.6 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
67.3
67.7
69.5
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.21 – j4.59
0.93 + j4.56
3.89 – j2.29
3.07 – j2.05
2.72 – j1.91
15.8
51.9
156
–37
–37
–39
1.99 – j5.85
3.66 – j7.62
1.61 + j6.06
3.07 + j7.90
16.2
16.3
52.3
52.3
170
170
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
66.8
67.7
68.8
Gain (dB)
(dBm)
(W)
(MHz)
1880
1960
2025
1.21 – j4.59
0.99 + j4.78
3.44 – j3.07
3.25 – j2.35
2.92 – j2.29
13.6
53.1
204
–44
–46
–47
1.99 – j5.85
3.66 – j7.62
1.75 + j6.42
3.60 + j8.50
14.1
14.2
53.0
53.2
200
207
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
8
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 1960 MHz
–1.5
–2
–1.5
48
48.5
48.5
–2
49
49.5
E
E
–2.5
–3
–2.5
50
50.5
70
68
–3
51
52
51.5
–3.5
–3.5
P
P
66
64
–4
–4
56
62
50.5
58
60
–4.5
–4.5
1
1.5
2
3
3.5
0.5
2.5
1
1.5
2
3
3.5
0.5
2.5
REAL ()
REAL ()
Figure 8. P1dB Load Pull Output Power Contours (dBm)
Figure 9. P1dB Load Pull Efficiency Contours (%)
–1.5
–1.5
–2
–20
–22
23
–26
–24
–28
–2
–18
22.5
E
E
–2.5
–2.5
–3
22
–16
–3
21.5
–3.5
P
–3.5
P
–14
21
20.5
20
19
–4
–4
19.5
–12
–4.5
–4.5
1
1.5
2
3
3.5
1
1.5
2
3
3.5
0.5
2.5
0.5
2.5
REAL ()
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 1960 MHz
–1.5
–2
–1.5
49
49.5
49
–2
50
E
E
–2.5
–3
–2.5
50.5
72
68
–3
51.5
51
70
–3.5
–3.5
P
P
52
52.5
66
–4
–4
64
58
62
60
–4.5
–4.5
1
1.5
2
3
3.5
0.5
2.5
1
1.5
2
3
3.5
0.5
2.5
REAL ()
REAL ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
–1.5
–1.5
–28
–26
–24
–22
–20
21
–30
–2
–2.5
–2
–2.5
–3
20.5
E
E
20
–3
19.5
19
–3.5
–3.5
–18
–16
P
P
18.5
18
–4
–4
17.5
17
1.5
–14
–4.5
0.5
–4.5
1
2
3
3.5
1
1.5
2
3
3.5
2.5
0.5
2.5
REAL ()
REAL ()
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
10
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 1960 MHz
0
0
–1
–2
–3
–4
–5
50
56
50
50.5
49.5
–1
–2
–3
–4
–5
64
60
51
E
E
51.5
62
66
52
P
P
52.5
53.5
58
56
54
53
52
52
52
52.5
54
2
3
4
6
7
1
5
2
3
4
6
7
1
5
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
0
0
–46
–44
–42
–40
–38
–1
–1
–2
–3
–4
–5
–2
E
E
16
–36
–3
P
P
15.5
–34
–4
14
15
13
–32
14.5
13.5
–5
2
3
4
6
7
2
3
4
6
7
1
5
1
5
REAL ()
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 1960 MHz
0
0
–1
–2
–3
–4
–5
50.5
50.5
–1
51
51.5
–2
E
E
52
52.5
53
66
64
–3
–4
–5
P
54
62
53.5
P
60
58
54
56
52
52
53
54
2
3
4
6
7
1
5
2
3
4
6
7
1
5
REAL ()
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
Figure 21. P3dB Load Pull Efficiency Contours (%)
0
–1
–2
0
–48
–50
–52
–46
–44
–1
–2
–3
–4
–5
E
E
–42
–40
14
–3
13.5
P
P
–4
12
13
–38
11
12.5
11.5
–38
–5
2
3
4
6
7
2
3
4
6
7
1
5
1
5
REAL ()
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
Figure 23. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
12
PACKAGE DIMENSIONS
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
14
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
RF High Power Model
.s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
May 2015
Initial Release of Data Sheet
A2T20H330W24SR6
RF Device Data
Freescale Semiconductor, Inc.
15
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Document Number: A2T20H330W24S
Rev. 0, 5/2015
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