BSN20TRL13 [NXP]

100mA, 50V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET;
BSN20TRL13
型号: BSN20TRL13
厂家: NXP    NXP
描述:

100mA, 50V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET

开关 光电二极管 晶体管
文件: 总8页 (文件大小:101K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORS  
DATA SHEET  
BSN20  
N-channel enhancement mode  
vertical D-MOS transistor  
1997 Jun 18  
Product specification  
Supersedes data of April 1995  
File under Discrete Semiconductors, SC13b  
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
FEATURES  
PINNING - SOT23  
Direct interface to C-MOS, TTL, etc.  
High-speed switching  
PIN  
SYMBOL  
DESCRIPTION  
1
2
3
g
s
d
gate  
No secondary breakdown.  
source  
drain  
APPLICATIONS  
Thin and thick film circuits  
3
handbook, halfpage  
General purpose fast switching applications.  
d
s
DESCRIPTION  
g
N-channel enhancement mode vertical D-MOS transistor  
in a SOT23 SMD package.  
1
2
CAUTION  
Top view  
MAM273  
The device is supplied in an antistatic package.  
The gate-source input must be protected against static  
discharge during transport or handling.  
Marking code: M8p.  
Fig.1 Simplified outline and symbol.  
QUICK REFERENCE DATA  
SYMBOL  
VDS  
PARAMETER  
CONDITIONS  
MAX.  
50  
UNIT  
drain-source voltage (DC)  
drain current (DC)  
V
ID  
100  
15  
mA  
RDSon  
VGSth  
drain-source on-state resistance  
gate-source threshold voltage  
ID = 100 mA; VGS = 10 V  
ID = 1 mA; VGS = VDS  
1.8  
V
1997 Jun 18  
2
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
VDS  
VGSO  
ID  
PARAMETER  
drain-source voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
CONDITIONS  
MIN.  
MAX.  
50  
UNIT  
V
V
open drain  
±20  
100  
300  
300  
250  
+150  
150  
mA  
mA  
mW  
mW  
°C  
IDM  
Ptot  
peak drain current  
total power dissipation  
up to Tamb = 25 °C; note 1  
up to Tamb = 25 °C; note 2  
Tstg  
Tj  
storage temperature  
junction temperature  
65  
°C  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
thermal resistance from junction to ambient note 1  
note 2  
CONDITIONS  
VALUE  
UNIT  
K/W  
K/W  
Rth j-a  
430  
500  
Notes to the Limiting values and Thermal characteristics  
1. Device mounted on a ceramic substrate, 10 × 8 × 0.7 mm.  
2. Device mounted on a printed-circuit board.  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
50  
TYP. MAX. UNIT  
V(BR)DSS  
VGSth  
IDSS  
drain-source breakdown voltage VGS = 0; ID = 10 µA  
V
gate-source threshold voltage  
drain-source leakage current  
gate-source leakage current  
VDS = VGS; ID = 1 mA  
VGS = 0; VDS = 40 V  
VDS = 0; VGS = ±20 V  
0.4  
1.8  
1
V
µA  
IGSS  
±100 nA  
RDSon  
drain-source on-state resistance VGS = 10 V; ID = 100 mA  
VGS = 5 V; ID = 100 mA  
8
15  
20  
30  
14  
18  
80  
8
VGS = 2.5 V; ID = 10 mA  
yfs  
Ciss  
Coss  
Crss  
forward transfer admittance  
input capacitance  
VDS = 10 V; ID = 100 mA  
40  
mS  
pF  
pF  
pF  
VGS = 0; VDS = 10 V; f = 1 MHz  
VGS = 0; VDS = 10 V; f = 1 MHz  
VGS = 0; VDS = 10 V; f = 1 MHz  
15  
15  
5
output capacitance  
7
reverse transfer capacitance  
2
Switching times  
ton turn-on time  
VGS = 0 to 10 V; VDD = 20 V;  
ID = 100 mA  
2
5
5
ns  
ns  
toff  
turn-off time  
VGS = 10 to 0 V; VDD = 20 V;  
ID = 100 mA  
10  
1997 Jun 18  
3
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
MBB755  
MRA781  
0.4  
30  
handbook, halfpage  
handbook, halfpage  
C
(pF)  
P
tot  
(W)  
(1)  
20  
(2)  
0.2  
10  
(1)  
(2)  
(3)  
0
0
0
5
10  
15  
20  
V
25  
(V)  
0
50  
100  
150  
T
200  
o
( C)  
DS  
amb  
VGS = 0; Tj = 25 °C; f = 1 MHz.  
(1) Cis.  
(2) Cos  
.
(3) Crs.  
(1) Mounted on a ceramic substrate.  
(2) Mounted on a printed-circuit board.  
Fig.3 Capacitance as a function of drain source  
voltage; typical values.  
Fig.2 Power derating curves.  
MRA782  
MRA783  
handbook, halfpage  
500  
handbook, halfpage  
V
= 10 V  
7 V  
GS  
500  
I
I
D
D
(mA)  
(mA)  
400  
400  
5 V  
4 V  
300  
200  
100  
0
300  
200  
100  
3 V  
2.5 V  
0
0
0
2
4
6
8
10  
(V)  
4
8
12  
V
(V)  
DS  
V
GS  
VDS = 10 V; Tj = 25 °C.  
Tj = 25 °C.  
Fig.4 Typical output characteristics.  
Fig.5 Typical transfer characteristics.  
1997 Jun 18  
4
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
MDA162  
MDA163  
24  
80  
handbook, halfpage  
handbook, halfpage  
R
DSon  
()  
R
DSon  
()  
(1)  
(2)  
60  
16  
40  
20  
(3)  
8
0
0
0
2
3
1
10  
10  
10  
2
4
6
8
10  
(V)  
I
(mA)  
D
V
GS  
Tj = 25 °C.  
(1) VGS = 2.5 V.  
(2) VGS = 5 V.  
VDS = 0.1 V; Tj = 25 °C.  
(3)  
VGS = 10 V.  
Fig.7 Drain-source on-state resistance as a  
function of gate-source voltage; typical  
values.  
Fig.6 Drain-source on-state resistance as a  
function of drain current; typical values.  
MRA785  
MRA784  
2
1.2  
handbook, halfpage  
handbook, halfpage  
k
k
(2)  
1.1  
1
1.6  
(1)  
1.2  
0.9  
0.8  
0.8  
0.4  
0.7  
50  
0
50  
100  
150  
50  
0
50  
100  
150  
o
o
T ( C)  
T ( C)  
j
j
RDSon at Tj  
VGSth at Tj  
--------------------------------------  
VGSth at 25°C  
k =  
-----------------------------------------  
RDSon at 25 °C  
k =  
(1) ID = 10 mA; VGS = 2.5 V.  
(2) ID = 100 mA; VGS = 10 V.  
Typical VGSth at 1 mA.  
Fig.8 Temperature coefficient of gate-source  
threshold voltage.  
Fig.9 Temperature coefficient of drain-source  
on-state resistance.  
1997 Jun 18  
5
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
PACKAGE OUTLINE  
Plastic surface mounted package; 3 leads  
SOT23  
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w M  
B
L
p
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
UNIT  
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.  
1.1  
0.9  
0.48  
0.38  
0.15  
0.09  
3.0  
2.8  
1.4  
1.2  
2.5  
2.1  
0.45  
0.15  
0.55  
0.45  
mm  
0.1  
1.9  
0.95  
0.2  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
SOT23  
1997 Jun 18  
6
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSN20  
DEFINITIONS  
Data Sheet Status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1997 Jun 18  
7
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1997  
SCA54  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
137107/00/02/pp8  
Date of release: 1997 Jun 18  
Document order number: 9397 750 02308  

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