HEF4511BPN [NXP]

BCD to 7-segment latch/decoder/driver; BCD至7段锁存器/解码器/驱动器
HEF4511BPN
型号: HEF4511BPN
厂家: NXP    NXP
描述:

BCD to 7-segment latch/decoder/driver
BCD至7段锁存器/解码器/驱动器

解码器 驱动器 锁存器 CD
文件: 总11页 (文件大小:112K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
The IC04 LOCMOS HE4000B Logic  
Family Specifications HEF, HEC  
The IC04 LOCMOS HE4000B Logic  
Package Outlines/Information HEF, HEC  
HEF4511B  
MSI  
BCD to 7-segment  
latch/decoder/driver  
January 1995  
Product specification  
File under Integrated Circuits, IC04  
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
When EL is LOW, the state of the segment outputs (Oa to  
Og) is determined by the data on DA to DD.  
DESCRIPTION  
The HEF4511B is a BCD to 7-segment  
When EL goes HIGH, the last data present on DA to  
DD are stored in the latches and the segment outputs  
remain stable. When LT is LOW, all the segment outputs  
are HIGH independent of all other input conditions. With  
LT HIGH, a LOW on BI forces all segment outputs LOW.  
The inputs LT and BI do not affect the latch circuit.  
latch/decoder/driver with four address inputs (DA to DD),  
an active LOW latch enable input (EL), an active LOW  
ripple blanking input (BI), an active LOW lamp test input  
(LT), and seven active HIGH n-p-n bipolar transistor  
segment outputs (Oa to Og).  
Fig.2 Pinning diagram.  
HEF4511BP(N):  
HEF4511BD(F):  
HEF4511BT(D):  
16-lead DIL; plastic (SOT38-1)  
16-lead DIL; ceramic (cerdip) (SOT74)  
16-lead SO; plastic (SOT109-1)  
( ): Package Designator North America  
Fig.1 Functional diagram.  
PINNING  
DA to DD  
EL  
address (data) inputs  
latch enable input (active LOW)  
ripple blanking input (active LOW)  
lamp test input (active LOW)  
segment outputs  
BI  
LT  
Oa to Og  
Fig.4 Segment  
designation.  
FAMILY DATA, IDD LIMITS category MSI  
See Family Specifications  
Fig.3 Schematic diagram of output stage.  
January 1995  
2
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Fig.5 Logic diagram; for one latch see Fig.6.  
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
Fig.6 Logic diagram (one latch); see also Fig.5.  
FUNCTION TABLE  
INPUTS  
DD  
OUTPUTS  
Od  
EL  
BI  
LT  
DC  
DB  
DA  
Oa  
Ob  
Oc  
Oe  
Of  
Og  
DISPLAY  
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
L
L
X
X
L
X
X
L
X
X
L
X
X
L
H
L
H
L
H
L
H
L
H
L
H
H
L
H
H
L
H
L
L
L
L
L
L
L
*
H
L
H
L
H
L
L
L
H
L
H
L
L
L
L
L
L
L
H
L
H
L
8
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
blank  
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
L
H
H
L
H
L
L
0
L
L
L
H
L
L
1
L
L
H
H
L
H
H
L
L
H
H
H
H
H
L
2
L
L
H
L
H
H
H
H
H
H
H
L
L
3
4
L
H
H
H
H
L
H
H
H
L
L
L
H
L
H
L
5
L
H
H
L
L
6
L
H
L
H
H
H
L
H
H
H
L
7
H
H
H
H
H
H
H
H
X
H
H
L
H
H
L
8
L
L
H
L
9
L
H
H
L
blank  
blank  
blank  
blank  
blank  
blank  
*
L
H
L
L
L
L
L
L
H
H
H
H
X
L
L
L
L
L
L
H
L
L
L
L
L
L
H
H
X
L
L
L
L
L
H
X
L
L
L
L
L
Note  
1. H = HIGH state (the more positive voltage)  
L = LOW state (the less positive voltage)  
X = state is immaterial  
* Depends upon the BCD code applied during the LOW to HIGH transition of EL.  
January 1995  
4
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
Fig.7 Display.  
RATINGS  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
Output (source) current HIGH  
IOH  
max.  
25 mA  
For other RATINGS see Family Specifications.  
Note  
1. A destructive high current mode may occur if VI and VO are not constrained to the range VSS VI or VO VDD  
.
January 1995  
5
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
DC CHARACTERISTICS  
VSS = 0 V  
Tamb (°C)  
+ 25  
VDD  
V
IOH  
mA  
HEF  
SYMBOL  
40  
MAX.  
+ 85  
MIN.  
MIN.  
4,10  
TYP.  
4,40  
9,40  
MIN.  
MAX.  
Output voltage  
HIGH  
5
10  
15  
5
0
0
4,10  
9,10  
4,10  
9,10  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VOH  
9,10  
0
14,10  
14,10  
14,40 14,10  
4,20  
Output voltage  
HIGH  
5
10  
15  
5
5
VOH  
9,20  
5
14,20  
Output voltage  
HIGH  
10  
3,60  
8,75  
3,60  
8,75  
4,05  
9,10  
3,30  
8,45  
10  
15  
5
10 VOH  
10  
13,75  
13,75  
14,10 13,45  
4,00  
Output voltage  
HIGH  
15  
10  
15  
5
15 VOH  
9,00  
15  
14,00  
Output voltage  
HIGH  
20  
2,80  
8,10  
2,80  
8,10  
3,80  
9,00  
2,50  
7,80  
10  
15  
5
20 VOH  
20  
13,10  
13,10  
14,00 12,80  
3,70  
Output voltage  
HIGH  
25  
10  
15  
25 VOH  
25  
8,90  
14,00  
January 1995  
6
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
Tamb (°C)  
+ 25  
VDD  
V
IOH  
mA  
HEC  
SYMBOL  
55  
MAX.  
+ 125  
MIN.  
MIN.  
4,10  
TYP.  
4,40  
9,90  
MIN.  
MAX.  
Output voltage  
HIGH  
5
10  
15  
5
0
0
4,10  
9,10  
4,10  
9,10  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VOH  
9,10  
0
14,10  
14,10  
14,40 14,40  
4,30  
Output voltage  
HIGH  
5
10  
15  
5
5
VOH  
9,30  
5
14,30  
Output voltage  
HIGH  
10  
3,60  
8,75  
3,60  
8,75  
4,25  
9,25  
3,20  
8,35  
10  
15  
5
10 VOH  
10  
13,75  
13,75  
14,25 13,35  
4,20  
Output voltage  
HIGH  
15  
10  
15  
5
15 VOH  
9,20  
15  
14,20  
Output voltage  
HIGH  
20  
2,80  
8,10  
2,80  
8,10  
4,20  
9,20  
2,30  
7,60  
10  
15  
5
20 VOH  
20  
13,10  
13,10  
14,20 12,60  
4,15  
Output voltage  
HIGH  
25  
10  
15  
25 VOH  
25  
9,20  
14,20  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; input transition times 20 ns  
VDD  
V
TYPICAL FORMULA FOR P (µW)  
2
Dynamic power  
5
1 000 fi + ∑ (foCL) × VDD  
where  
2
dissipation per  
package (P)  
10  
15  
4 000 fi + ∑ (foCL) × VDD  
fi = input freq. (MHz)  
2
10 000 fi + ∑ (foCL) × VDD  
fo = output freq. (MHz)  
CL = load capacitance (pF)  
(foCL) = sum of outputs  
V
DD = supply voltage (V)  
January 1995  
7
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns  
VDD  
TYPICAL EXTRAPOLATION  
FORMULA  
SYMBOL MIN. TYP. MAX.  
V
Propagation delays  
Dn On  
5
10  
15  
5
155  
60  
310 ns  
120 ns  
80 ns  
270 ns  
110 ns  
80 ns  
320 ns  
120 ns  
90 ns  
320 ns  
140 ns  
100 ns  
240 ns  
100 ns  
70 ns  
210 ns  
80 ns  
60 ns  
160 ns  
60 ns  
40 ns  
120 ns  
60 ns  
50 ns  
120 ns  
60 ns  
40 ns  
50 ns  
32 ns  
26 ns  
128 ns  
49 ns  
32 ns  
108 ns  
44 ns  
32 ns  
133 ns  
49 ns  
37 ns  
133 ns  
59 ns  
42 ns  
93 ns  
39 ns  
27 ns  
78 ns  
29 ns  
22 ns  
52 ns  
19 ns  
12 ns  
33 ns  
19 ns  
17 ns  
10 ns  
9 ns  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(1,0 ns/pF) CL  
(0,42 ns/pF) CL  
(0,28 ns/pF) CL  
(1,0 na/pF) CL  
(0,06 ns/pF) CL  
(0,06 ns/pF) CL  
HIGH to LOW  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tPLH  
tTHL  
tTLH  
40  
135  
55  
LOW to HIGH  
10  
15  
5
40  
EL On  
160  
60  
HIGH to LOW  
10  
15  
5
45  
160  
70  
LOW to HIGH  
10  
15  
5
50  
BI On  
120  
50  
HIGH to LOW  
10  
15  
5
35  
BI On  
105  
40  
LOW to HIGH  
10  
15  
5
30  
LT On  
80  
HIGH to LOW  
10  
15  
5
30  
20  
60  
LOW to HIGH  
10  
15  
5
30  
25  
Output transition times  
HIGH to LOW  
60  
10  
15  
5
30  
20  
6 ns  
25  
20 ns  
13 ns  
10 ns  
LOW to HIGH  
10  
15  
16  
13  
January 1995  
8
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
VDD  
V
TYPICAL EXTRAPOLATION  
FORMULA  
SYMBOL MIN. TYP. MAX.  
Minimum EL  
5
80  
40  
35  
50  
25  
20  
60  
30  
25  
40  
20  
17  
25  
12  
9
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pulse width; LOW  
10  
15  
5
tWELL  
Set-up time  
see also waveforms  
Fig.8  
Dn EL  
10  
15  
5
tsu  
Hold-time  
30  
15  
12  
Dn EL  
10  
15  
thold  
Conditions:  
DD = LOW  
DA = DB = BI = LT = HIGH  
Fig.8 Waveforms showing minimum EL pulse width, set-up and hold time for DC to EL.  
January 1995  
9
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
APPLICATION INFORMATION  
Some examples of applications for the HEF4511B are:  
Driving LED displays.  
Driving incandescent displays.  
Driving fluorescent displays.  
Driving LCD displays.  
Driving gas discharge displays.  
Fig.9 Connection to common cathode LED display readout.  
Fig.10 Connection to common anode LED display readout.  
January 1995  
10  
Philips Semiconductors  
Product specification  
HEF4511B  
MSI  
BCD to 7-segment latch/decoder/driver  
(1) A filament pre-warm resistor is recommended to  
reduce filament thermal shock and increase the  
effective cold resistance of the filament.  
Fig.11 Connection to incandescent display readout.  
Fig.12 Connection to fluorescent display readout.  
Fig.13 Connection to gas discharge display  
readout.  
Fig.14 Connection to liquid crystal (LCD) display  
readout. Direct d.c. drive of LCDs not  
recommended for life of LCD readouts.  
January 1995  
11  

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