IP4284CZ10-TBR,115 [NXP]

IP4284CZ10-TBR; IP4284CZ10-TT - ESD protection for ultra high-speed interfaces DFN 10-Pin;
IP4284CZ10-TBR,115
型号: IP4284CZ10-TBR,115
厂家: NXP    NXP
描述:

IP4284CZ10-TBR; IP4284CZ10-TT - ESD protection for ultra high-speed interfaces DFN 10-Pin

光电二极管
文件: 总17页 (文件大小:641K)
中文:  中文翻译
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IP4284CZ10-TBR;  
IP4284CZ10-TT  
ESD protection for ultra high-speed interfaces  
Rev. 3 — 19 May 2011  
Product data sheet  
1. Product profile  
1.1 General description  
The devices are designed to protect high-speed interfaces such as High-Definition  
Multimedia Interface (HDMI), DisplayPort, SuperSpeed USB, external Serial Advanced  
Technology Attachment (eSATA) and Low Voltage Differential Signaling (LVDS) interfaces  
against ElectroStatic Discharge (ESD).  
The devices include high-level ESD protection diodes for ultra high-speed signal lines and  
are available in two package variants: XSON10 and TSSOP10.  
All signal lines are protected by a special diode configuration offering ultra low line  
capacitance of only 0.5 pF. These diodes provide protection to downstream components  
from ESD voltages up to ±8 kV contact according to IEC 61000-4-2, level 4.  
1.2 Features and benefits  
„ Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen  
and antimony (Dark Green compliant)  
„ System ESD protection for USB 2.0 and USB SuperSpeed 3.0, HDMI 1.3 and  
HDMI 1.4, DisplayPort, eSATA and LVDS  
„ All signal lines with integrated rail-to-rail clamping diodes for downstream  
ESD protection of ±8 kV according to IEC 61000-4-2, level 4  
„ Matched 0.5 mm trace spacing  
„ Signal lines with 0.05 pF matching capacitance between signal pairs  
„ Line capacitance of only 0.5 pF for each channel  
„ 4-channel, XSON10 or TSSOP10 Pb-free package  
„ Design-friendly ’pass-thru’ signal routing  
1.3 Applications  
The devices are designed for high-speed receiver and transmitter port protection:  
„ TVs, monitors  
„ DVD recorders and players  
„ Notebooks, mother boards, graphic cards and ports  
„ Set-top boxes and game consoles  
 
 
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
2. Pinning information  
Table 1.  
Pinning  
Symbol  
Pin  
Description  
Simplified outline  
Graphic symbol  
IP4284CZ10-TBR (SOT1176-1)  
1
2
3
4
5
6
7
8
9
10  
CH1  
CH2  
GND  
CH3  
CH4  
n.c.  
channel 1 ESD protection  
channel 2 ESD protection  
ground  
10  
9
8
7
6
1
2
4
5
channel 3 ESD protection  
channel 4 ESD protection  
not connected  
1
2
3
4
5
Transparent top view  
XSON10  
3, 8  
018aaa001  
n.c.  
not connected  
GND  
n.c.  
ground  
not connected  
n.c.  
not connected  
IP4284CZ10-TT (SOT552-1)  
1
2
3
4
5
6
7
8
9
10  
CH1  
CH2  
GND  
CH3  
CH4  
n.c.  
channel 1 ESD protection  
channel 2 ESD protection  
ground  
1
2
4
5
10  
6
channel 3 ESD protection  
channel 4 ESD protection  
not connected  
3, 8  
018aaa001  
n.c.  
not connected  
GND  
n.c.  
ground  
1
5
not connected  
TSSOP10  
n.c.  
not connected  
3. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
IP4284CZ10-TBR XSON10  
Description  
plastic extremely thin small outline package;  
no leads; 10 terminals; body 1 × 2.5 × 0.5 mm  
Version  
SOT1176-1  
IP4284CZ10-TT  
TSSOP10 plastic thin shrink small outline package; 10 leads; SOT552-1  
body width 3 mm  
4. Marking  
Table 3.  
Marking codes  
Type number  
IP4284CZ10-TBR  
IP4284CZ10-TT  
Marking code  
84  
4284  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
2 of 17  
 
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
5. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VI  
Parameter  
Conditions  
Min  
Max  
Unit  
input voltage  
0.5  
+5.5  
V
[1]  
VESD  
electrostatic discharge  
voltage  
IEC 61000-4-2, level 4  
contact discharge  
air discharge  
-
±8  
kV  
kV  
°C  
°C  
-
±15  
+85  
+125  
Tamb  
Tstg  
ambient temperature  
storage temperature  
40  
55  
[1] All pins to ground.  
6. Characteristics  
Table 5.  
Characteristics  
Tamb = 25 °C unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min Typ Max Unit  
VBRzd  
Zener diode  
Itest = 1 mA  
6
-
9
V
breakdown voltage  
ILRzd  
Zener diode reverse  
leakage current  
per TMDS channel;  
VI = 3.0 V  
-
-
1
μA  
VF  
forward voltage  
-
0.7  
0.5  
-
V
[1]  
[1]  
Cch(TMDS)  
TMDS channel  
capacitance  
f = 1 MHz;  
Vbias = 2.5 V  
0.4  
0.7  
pF  
ΔCch(TMDS) TMDS channel  
capacitance difference  
f = 1 MHz;  
Vbias = 2.5 V  
-
-
0.05  
0.07  
-
-
pF  
pF  
[1][2]  
[3]  
Cch(mutual)  
mutual channel  
capacitance  
f = 1 MHz;  
Vbias = 2.5 V  
Rdyn  
dynamic resistance  
I = 1 A  
positive transient  
negative transient  
-
-
-
1
1
8
-
-
-
Ω
Ω
V
[4]  
VCL(ch)trt(pos) positive transient channel VESD = 8 kV  
clamping voltage  
[1] This parameter is guaranteed by design.  
[2] Between signal pin and pin n.c.  
[3] According to IEC 61000-4-5 and IEC 61000-4-9.  
[4] Human Body Model (HBM) according to JESD22-A-J114D.  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
3 of 17  
 
 
 
 
 
 
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
018aaa002  
018aaa003  
3
0
Sdd21;  
Scc21  
(dB)  
Sdd21;  
NEXT  
(dB)  
(1)  
3  
30  
60  
90  
(2)  
9  
15  
6
7
8
9
10  
8
9
10  
10  
10  
10  
10  
10  
10  
10  
10  
f (Hz)  
f (Hz)  
(1) Sdd21  
(2) Scc21  
Sdd21  
normalized to 100 Ω;  
differential pairs CH1/CH2 versus CH3/CH4  
normalized to 100 Ω;  
differential pairs at CH1/CH2 or at CH3/CH4  
Fig 1. Mixed-mode differential and common-mode  
insertion loss; typical values  
Fig 2. Mixed-mode differential NEXT crosstalk;  
typical values  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
4 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
018aaa004  
018aaa005  
5 Gbit/s; USB 3.0 CP0 pattern  
5 Gbit/s; USB 3.0 CP0 pattern  
Fig 3. Eye diagram using reference PCB  
Fig 4. Typical eye diagram for IP4284CZ10  
018aaa006  
0.4  
C
d
(pF)  
0.2  
(1)  
(2)  
0.0  
0.2  
0.4  
0.5  
1.5  
3.5  
5.5  
V
bias  
(V)  
(1) Pin 2  
(2) Pin 1  
Deviation from typical capacitance normalized at Vbias = 2.5 V  
Fig 5. Line capacitance as a function of bias voltage; typical values  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
5 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
018aaa008  
018aaa007  
8.5  
3.5  
V
(V)  
CL  
V
(V)  
CL  
3.0  
8.0  
2.5  
2.0  
1.5  
7.5  
7.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0.5  
1.0  
1.5  
2.0  
2.5  
I (A)  
I (A)  
IEC 61000-4-5; tp = 8/20 μs; positive pulse  
IEC 61000-4-5; tp = 8/20 μs; negative pulse  
Fig 6. Dynamic resistance with positive clamping  
Fig 7. Dynamic resistance with negative clamping  
018aaa009  
018aaa010  
18  
0
V
(V)  
CL  
V
(V)  
CL  
4  
12  
8  
12  
16  
6
0
0
2
4
6
8
10  
12  
I (A)  
14  
16  
12  
8  
4  
0
I (A)  
tp = 100 ns; Transmission Line Pulse (TLP)  
tp = 100 ns; Transmission Line Pulse (TLP)  
Fig 8. Dynamic resistance with positive clamping  
Fig 9. Dynamic resistance with negative clamping  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
6 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
7. Application information  
The devices are designed to provide high-level ESD protection for high-speed serial  
data buses such as HDMI, DisplayPort, eSATA and LVDS data lines.  
When designing the Printed-Circuit Board (PCB), careful consideration should be given to  
basic high-speed routing guidelines, impedance matching, and signal coupling.  
Basic application diagrams for the ESD protection of an HDMI interface are shown in  
Figure 10 and Figure 11.  
IP4284CZ10-TBR  
TMDS_D2+  
TMDS_CH2+  
5
TMDS_GND  
TMDS_CH2–  
4
TMDS_D2–  
GND  
8
3
2
1
TMDS_D1+  
TMDS_CH1+  
TMDS_CH1–  
TMDS_GND  
TMDS_D1–  
IP4284CZ10-TBR  
TMDS_D0+  
TMDS_CH2+  
TMDS_CH2–  
GND  
5
TMDS_GND  
TMDS_D0–  
4
3
8
TMDS_CLK+  
TMDS_GND  
HDMI  
CONNECTOR  
TMDS_CH1+  
2
1
TMDS_CH1–  
TMDS_CLK-  
CEC  
n.c.  
DDC_CLK  
DDC_DAT  
GND  
+5 V  
HOT PLUG DETECTION  
6
5
4
100 nF  
IP4221CZ6  
1
2
3
018aaa115  
Fig 10. Application diagram of HDMI ESD protection using IP4284CZ10-TBR  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
7 of 17  
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
IP4284CZ10-TT  
TMDS_D2+  
TMDS_GND  
TMDS_D2+  
TMDS_D2–  
TMDS_D2–  
TMDS_D1+  
TMDS_D1+  
TMDS_D1–  
TMDS_GND  
TMDS_D1–  
IP4284CZ10-TT  
TMDS_D0+  
TMDS_GND  
TMDS_D0–  
TMDS_D0+  
TMDS_D0–  
TMDS_CLK+  
TMDS_GND  
HDMI  
CONNECTOR  
TMDS_CLK+  
TMDS_CLK1–  
TMDS_CLK–  
CEC  
n.c.  
DDC_CLK  
DDC_DAT  
GND  
+5 V  
HOT PLUG DETECTION  
100 nF  
IP4220CZ6  
018aaa012  
Fig 11. Application diagram of HDMI ESD protection using IP4284CZ10-TT  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
8 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
8. Package outline  
XSON10: plastic extremely thin small outline package; no leads;  
10 terminals; body 1 x 2.5 x 0.5 mm  
SOT1176-1  
X
D
B
A
E
A
A
1
A
3
terminal 1  
index area  
detail X  
e
1
C
v
w
C A  
B
C
terminal 1  
index area  
e
b
y
C
1
y
1
5
L
1
k
L
10  
6
0
1
2 mm  
scale  
Dimensions  
(1)  
Unit  
A
A
1
A
3
b
D
E
e
e
1
k
L
L
1
v
w
y
y
1
max 0.5 0.05  
mm nom  
min  
0.25 2.6 1.1  
0.127 0.20 2.5 1.0 0.5  
0.15 2.4 0.9  
0.40 0.45  
0.35 0.40 0.1 0.05 0.05 0.05  
0.2 0.30 0.35  
2
0.00  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot1176-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
- - -  
JEDEC  
- - -  
JEITA  
- - -  
10-06-21  
10-06-22  
SOT1176-1  
Fig 12. Package outline SOT1176-1 (XSON10)  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
9 of 17  
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm  
SOT552-1  
D
E
A
X
c
y
H
v
M
A
E
Z
6
10  
A
(A )  
2
A
3
A
1
pin 1 index  
θ
L
p
L
1
5
detail X  
e
w M  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
A
A
A
b
c
D
E
e
H
L
L
UNIT  
v
w
y
Z
θ
1
2
3
p
E
p
max.  
0.15  
0.05  
0.95  
0.80  
0.30  
0.15  
0.23  
0.15  
3.1  
2.9  
3.1  
2.9  
5.0  
4.8  
0.7  
0.4  
0.67  
0.34  
6°  
0°  
mm  
1.1  
0.5  
0.25  
0.95  
0.1  
0.1  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-07-29  
03-02-18  
SOT552-1  
Fig 13. Package outline SOT552-1 (TSSOP10)  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
10 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
9. Soldering  
Footprint information for reflow soldering of XSON10 package  
SOT1176-1  
Hx  
C
Hy Ay By  
0.05  
D
P
0.05  
Generic footprint pattern  
Refer to the package outline drawing for actual layout  
solder land  
solder paste deposit  
solder land plus solder paste  
occupied area  
solder resist  
Dimensions in mm  
Remark:  
P
Ay  
By  
C
D
Hx  
2.45  
Hy  
Stencil of 75 μm is recommended.  
A stencil of 75 μm gives an aspect ratio of 0.77  
With a stencil of 100 μm one will obtain an aspect ratio of 0.58  
0.5  
1.25  
0.3  
0.475  
0.2  
1.5  
sot1176-1_fr  
Reflow soldering is the only recommended soldering method.  
Fig 14. Reflow soldering footprint SOT1176-1 (XSON10)  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
11 of 17  
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
Footprint information for reflow soldering of TSSOP10 package  
SOT552-1  
Hx  
Gx  
P2  
(0.125)  
(0.125)  
Hy Gy  
By Ay  
C
D2 (4x)  
P1  
D1  
Generic footprint pattern  
Refer to the package outline drawing for actual layout  
solder land  
occupied area  
DIMENSIONS in mm  
P1 P2 Ay  
By  
C
D1  
D2  
Gx  
Gy  
Hx  
Hy  
0.500 0.550 5.400 3.200 1.100 0.300 0.400 2.750 3.900 3.700 5.650  
sot552-1_fr  
Reflow soldering is the only recommended soldering method.  
Fig 15. Reflow soldering footprint SOT552-1 (TSSOP10)  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
12 of 17  
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
10. Abbreviations  
Table 6.  
Abbreviations  
Description  
Digital Versatile Disc  
Acronym  
DVD  
eSATA  
ESD  
external Serial Advanced Technology Attachment  
ElectroStatic Discharge  
HBM  
Human Body Model  
HDMI  
LVDS  
NEXT  
RoHS  
TLP  
High-Definition Multimedia Interface  
Low Voltage Differential Signaling  
Near End Crosstalk  
Restriction of Hazardous Substances  
Transmission Line Pulse  
TMDS  
UTLP  
Transition Minimized Differential Signaling  
Ultra Thin Leadless Package  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
13 of 17  
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
11. Revision history  
Table 7.  
Document ID  
IP4284CZ10-TBR_TT v.3 20110519  
Revision history  
Release date  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
IP4284CZ10-TB_TT v.2  
Modifications:  
Deleted type number IP4284CZ10-TB.  
Added type number IP4284CZ10-TBR.  
Section 4 “Marking”: added.  
Table 4 “Limiting values”: updated VESD values.  
Section 9 “Soldering”: added.  
Section 12 “Legal information”: updated.  
IP4284CZ10-TB_TT v.2  
IP4284CZ10-TB_TT v.1  
20100401  
Product data sheet  
-
-
IP4284CZ10-TB_TT v.1  
-
20100304  
Preliminary data sheet  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
14 of 17  
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
12. Legal information  
12.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
12.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
12.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
15 of 17  
 
 
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
non-automotive qualified products in automotive equipment or applications.  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
13. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
IP4284CZ10-TBR_TT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 19 May 2011  
16 of 17  
 
 
IP4284CZ10-TBR/TT  
NXP Semiconductors  
ESD protection for ultra high-speed interfaces  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
General description . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits. . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Application information. . . . . . . . . . . . . . . . . . . 7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14  
3
4
5
6
7
8
9
10  
11  
12  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
12.1  
12.2  
12.3  
12.4  
13  
14  
Contact information. . . . . . . . . . . . . . . . . . . . . 16  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2011.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 19 May 2011  
Document identifier: IP4284CZ10-TBR_TT  
 

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