IP4286CZ6 [NXP]

Integrated 4-channel ESD protection; 集成4通道ESD保护
IP4286CZ6
型号: IP4286CZ6
厂家: NXP    NXP
描述:

Integrated 4-channel ESD protection
集成4通道ESD保护

文件: 总12页 (文件大小:72K)
中文:  中文翻译
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IP4286CZ6  
Integrated 4-channel ESD protection  
Rev. 01 — 20 April 2009  
Objective data sheet  
1. Product profile  
1.1 General description  
The IP4286CZ6 is designed to protect the capacitive loads of Input/Output (I/O) ports  
(such as USB 2.0, Ethernet, DVI etc.) from being damaged by ElectroStatic Discharge  
(ESD).  
To provide ESD protection to downstream signal and supply components, the IP4286CZ6  
incorporates four pairs of ultra-low capacitance rail-to-rail diodes plus two Zener diodes.  
This provides protection against contact discharge voltages as high as ±8 kV in  
accordance with IEC 61000-4-2, level 4.  
The ESD protection is independent of the supply voltage due to the rail-to-rail diodes  
being connected to a Zener diode.  
The IP4286CZ6 is fabricated using monolithic silicon technology and integrates 4 ultra-low  
capacitance rail-to-rail ESD protection diodes plus two Zener diodes.  
1.2 Features  
I Pb-free and RoHS compliant  
I ESD IEC 61000-4-2 level 4, ±8 kV contact discharge compliant protection  
I Four input ESD rail-to-rail protection diodes with ultra-low input capacitance of 0.6 pF  
maximum  
I Low-voltage clamping due to integrated Zener diodes  
1.3 Applications  
General-purpose downstream ESD protection high frequency analog signals and  
high-speed serial data transmission for ports inside:  
I PC/Notebook USB 2.0/IEEE 1394 ports  
I Cellular and PCS mobile handsets  
I DVI interfaces  
I HDMI interfaces  
I Cordless telephones  
I Wireless data (WAN/LAN) systems  
I PDAs  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
2. Pinning information  
Table 1.  
Pinning  
Pin  
1
Description  
Simplified outline  
Graphic symbol  
ESD protection for I/O signals  
ground  
6
1
5
2
4
3
6
5
4
1
2
3
2
3
ESD protection for I/O signals  
ESD protection for I/O signals  
ground  
4
5
TSOP6/SC-88  
6
5
4
6
ESD protection for I/O signals  
bottom view  
1
2
3
XSON6  
001aaj836  
3. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
IP4286CZ6-TTD  
IP4286CZ6-TBF  
TSOP6  
XSON6  
plastic surface-mounted package (TSOP6); 6 leads  
SOT457  
plastic extremely thin small outline package; no leads; SOT886  
6 terminals; body 1 × 1.45 × 0.5 mm  
IP4286CZ6-TTY  
SC-88  
plastic surface-mounted package; 6 leads  
SOT363  
4. Limiting values  
Table 3.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
VESD  
electrostatic discharge  
voltage  
IEC 61000-4-2, level 4,  
contact discharge  
8  
+8  
kV  
Tstg  
VI  
storage temperature  
input voltage  
55  
+125  
+5.5  
°C  
0.5  
V
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
2 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
5. Characteristics  
Table 4.  
Characteristics  
Tamb = 25 °C unless otherwise specified.  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
[1]  
C(I/O-GND) input/output to ground  
capacitance  
pins 1, 3, 4 and 6 to ground;  
VI = 3.3 V; f = 1 MHz  
-
0.6  
-
pF  
ILR  
reverse leakage current  
pins 1, 3, 4 and 6 to ground;  
VI = 3.0 V  
-
-
100 nA  
[1]  
C(zd-GND) Zener diode to ground  
capacitance  
pin 5 and pin 2  
-
20  
-
-
pF  
V
VBRzd  
Zener diode breakdown  
voltage  
pin 5 and pin 2; I = 1 mA  
6
-
9
-
VF  
forward voltage  
0.7  
V
[1] Guaranteed by design.  
6. Application information  
6.1 Typical application  
The IP4286CZ6 is capable of protecting both USB data lines of a USB 2.0 port from  
Electrostatic Discharge and is optimized to protect two USB 2.0 ports simultaneously. A  
typical application is shown in Figure 1.  
V
BUS  
D
D
GND  
IP4286CZ6  
V
BUS  
D
D
GND  
001aaj837  
Fig 1. Application diagram for protecting two USB ports  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
3 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
7. Package outline  
Plastic surface-mounted package (TSOP6); 6 leads  
SOT457  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
c
1
2
3
L
p
e
b
p
w
M B  
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-11-07  
06-03-16  
SOT457  
SC-74  
Fig 2. Package outline SOT457 (TSOP6)  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
4 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm  
SOT886  
b
1
2
3
4×  
(2)  
L
L
1
e
6
5
4
e
1
e
1
6×  
(2)  
A
A
1
D
E
terminal 1  
index area  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
A
1
UNIT  
b
D
E
e
e
L
L
1
1
max max  
0.25  
0.17  
1.5  
1.4  
1.05  
0.95  
0.35 0.40  
0.27 0.32  
mm  
0.5 0.04  
0.6  
0.5  
Notes  
1. Including plating thickness.  
2. Can be visible in some manufacturing processes.  
REFERENCES  
JEDEC JEITA  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
04-07-15  
04-07-22  
SOT886  
MO-252  
Fig 3. Package outline SOT886 (XSON6)  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
5 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
Plastic surface-mounted package; 6 leads  
SOT363  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B  
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
UNIT  
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max  
0.30  
0.20  
1.1  
0.8  
0.25  
0.10  
2.2  
1.8  
1.35  
1.15  
2.2  
2.0  
0.45  
0.15  
0.25  
0.15  
mm  
0.1  
1.3  
0.65  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
04-11-08  
06-03-16  
SOT363  
SC-88  
Fig 4. Package outline SOT363 (SC-88)  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
6 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
8. Soldering of SMD packages  
This text provides a very brief insight into a complex technology. A more in-depth account  
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow  
soldering description”.  
8.1 Introduction to soldering  
Soldering is one of the most common methods through which packages are attached to  
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both  
the mechanical and the electrical connection. There is no single soldering method that is  
ideal for all IC packages. Wave soldering is often preferred when through-hole and  
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not  
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high  
densities that come with increased miniaturization.  
8.2 Wave and reflow soldering  
Wave soldering is a joining technology in which the joints are made by solder coming from  
a standing wave of liquid solder. The wave soldering process is suitable for the following:  
Through-hole components  
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board  
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless  
packages which have solder lands underneath the body, cannot be wave soldered. Also,  
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,  
due to an increased probability of bridging.  
The reflow soldering process involves applying solder paste to a board, followed by  
component placement and exposure to a temperature profile. Leaded packages,  
packages with solder balls, and leadless packages are all reflow solderable.  
Key characteristics in both wave and reflow soldering are:  
Board specifications, including the board finish, solder masks and vias  
Package footprints, including solder thieves and orientation  
The moisture sensitivity level of the packages  
Package placement  
Inspection and repair  
Lead-free soldering versus SnPb soldering  
8.3 Wave soldering  
Key characteristics in wave soldering are:  
Process issues, such as application of adhesive and flux, clinching of leads, board  
transport, the solder wave parameters, and the time during which components are  
exposed to the wave  
Solder bath specifications, including temperature and impurities  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
7 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
8.4 Reflow soldering  
Key characteristics in reflow soldering are:  
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to  
higher minimum peak temperatures (see Figure 5) than a SnPb process, thus  
reducing the process window  
Solder paste printing issues including smearing, release, and adjusting the process  
window for a mix of large and small components on one board  
Reflow temperature profile; this profile includes preheat, reflow (in which the board is  
heated to the peak temperature) and cooling down. It is imperative that the peak  
temperature is high enough for the solder to make reliable solder joints (a solder paste  
characteristic). In addition, the peak temperature must be low enough that the  
packages and/or boards are not damaged. The peak temperature of the package  
depends on package thickness and volume and is classified in accordance with  
Table 5 and 6  
Table 5.  
SnPb eutectic process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
350  
220  
< 2.5  
235  
220  
2.5  
220  
Table 6.  
Lead-free process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
260  
350 to 2000  
> 2000  
260  
< 1.6  
260  
250  
245  
1.6 to 2.5  
> 2.5  
260  
245  
250  
245  
Moisture sensitivity precautions, as indicated on the packing, must be respected at all  
times.  
Studies have shown that small packages reach higher temperatures during reflow  
soldering, see Figure 5.  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
8 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
maximum peak temperature  
= MSL limit, damage level  
temperature  
minimum peak temperature  
= minimum soldering temperature  
peak  
temperature  
time  
001aac844  
MSL: Moisture Sensitivity Level  
Fig 5. Temperature profiles for large and small components  
For further information on temperature profiles, refer to Application Note AN10365  
“Surface mount reflow soldering description”.  
9. Abbreviations  
Table 7.  
Abbreviations  
Description  
Acronym  
DVI  
Digital Visual Interface  
ESD  
ElectroStatic Discharge  
HDMI  
LAN  
High-Definition Multimedia Interface  
Local Area Network  
PCS  
Personal Communications Services  
Personal Digital Assistant  
Restriction of Hazardous Substances  
Universal Serial Bus  
PDA  
RoHS  
USB  
WAN  
Wide Area Network  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
9 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
10. Revision history  
Table 8.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
IP4286CZ6_1  
20090420  
Objective data sheet  
-
-
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
10 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
11. Legal information  
11.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
11.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
11.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
11.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
12. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
IP4286CZ6_1  
© NXP B.V. 2009. All rights reserved.  
Objective data sheet  
Rev. 01 — 20 April 2009  
11 of 12  
IP4286CZ6  
NXP Semiconductors  
Integrated 4-channel ESD protection  
13. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Application information. . . . . . . . . . . . . . . . . . . 3  
Typical application. . . . . . . . . . . . . . . . . . . . . . . 3  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 4  
3
4
5
6
6.1  
7
8
Soldering of SMD packages . . . . . . . . . . . . . . . 7  
Introduction to soldering . . . . . . . . . . . . . . . . . . 7  
Wave and reflow soldering . . . . . . . . . . . . . . . . 7  
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . 8  
8.1  
8.2  
8.3  
8.4  
9
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
10  
11  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
11.1  
11.2  
11.3  
11.4  
12  
13  
Contact information. . . . . . . . . . . . . . . . . . . . . 11  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 20 April 2009  
Document identifier: IP4286CZ6_1  

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