IRFP460 [NXP]
PowerMOS transistors Avalanche energy rated; 功率MOS晶体管的额定雪崩能量
| 型号： | IRFP460 |
| 厂家： | 
NXP |
| 描述： | PowerMOS transistors Avalanche energy rated |
| 文件： | 总7页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
FEATURES
SYMBOL
QUICK REFERENCE DATA
d
• Repetitive Avalanche Rated
• Fast switching
VDSS = 500 V
ID = 20 A
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
g
RDS(ON) ≤ 0.27 Ω
s
GENERAL DESCRIPTION
PINNING
SOT429 (TO247)
N-channel, enhancement mode
PIN
DESCRIPTION
field-effect
power
transistor,
intended for use in off-line switched
mode power supplies, T.V. and
computer monitor power supplies,
d.c.tod.c. converters, motorcontrol
circuits and general purpose
switching applications.
1
2
gate
drain
3
source
drain
tab
2
1
3
The IRFP460 is supplied in the
SOT429 (TO247) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDSS
VDGR
VGS
ID
Drain-source voltage
Tj = 25 ˚C to 150˚C
-
500
500
± 30
20
V
V
Drain-gate voltage
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
-
Gate-source voltage
Continuous drain current
-
V
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
-
A
-
12.4
80
A
IDM
PD
Tj, Tstg
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
-
-
A
Tmb = 25 ˚C
250
150
W
˚C
- 55
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
EAS
Non-repetitive avalanche
energy
Unclamped inductive load, IAS = 20 A;
tp = 0.2 ms; Tj prior to avalanche = 25˚C;
-
1300
mJ
V
DD ≤ 50 V; RGS = 50 Ω; VGS = 10 V
EAR
Repetitive avalanche energy1 IAR = 20 A; tp = 2.5 µs; Tj prior to
avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V
Repetitive and non-repetitive
-
-
32
20
mJ
A
IAS, IAR
avalanche current
1 pulse width and repetition rate limited by Tj max.
September 1999
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Rth j-mb
Rth j-a
Thermal resistance junction
to mounting base
Thermal resistance junction SOT429 package, in free air
to ambient
-
-
-
0.5
-
K/W
K/W
45
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
V(BR)DSS Drain-source breakdown
CONDITIONS
MIN. TYP. MAX. UNIT
VGS = 0 V; ID = 0.25 mA
VDS = VGS; ID = 0.25 mA
500
-
-
-
-
V
voltage
∆V(BR)DSS / Drain-source breakdown
0.1
%/K
∆Tj
voltage temperature
coefficient
RDS(ON)
VGS(TO)
gfs
Drain-source on resistance
Gate threshold voltage
Forward transconductance
VGS = 10 V; ID = 10 A
VDS = VGS; ID = 0.25 mA
VDS = 30 V; ID = 10 A
-
2.0
13
-
0.2
3.0
18
2
0.27
4.0
-
Ω
V
S
IDSS
Drain-source leakage current VDS = 500 V; VGS = 0 V
50
µA
µA
nA
VDS = 400 V; VGS = 0 V; Tj = 125 ˚C
-
100 1000
IGSS
Gate-source leakage current VGS = ±30 V; VDS = 0 V
-
10
200
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = 20 A; VDD = 400 V; VGS = 10 V
-
-
-
147
12
78
190
18
100
nC
nC
nC
td(on)
tr
td(off)
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 250 V; RD = 12 Ω;
RG = 3.9 Ω
-
-
-
-
23
72
150
75
-
-
-
-
ns
ns
ns
ns
Ld
Ld
Ls
Internal drain inductance
Internal drain inductance
Internal source inductance
Measured from tab to centre of die
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
-
-
-
3.5
4.5
7.5
-
-
-
nH
nH
nH
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
-
-
3000
480
270
-
-
-
pF
pF
pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IS
Continuous source current
(body diode)
Tmb = 25˚C
-
-
-
-
-
-
20
80
A
A
V
ISM
Pulsed source current (body Tmb = 25˚C
diode)
VSD
Diode forward voltage
IS = 20 A; VGS = 0 V
1.5
trr
Qrr
Reverse recovery time
Reverse recovery charge
IS = 20 A; VGS = 0 V; dI/dt = 100 A/µs
-
-
900
15
-
-
ns
µC
September 1999
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
Normalised Power Derating
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
PHW20N50E
Zth j-mb (K/W)
D = 0.5
1
0.1
0.2
0.1
0.05
0.02
P
D = tp/T
D
tp
0.01
single pulse
T
0.001
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
0
20
40
60
80
Tmb /
100
120
140
C
Fig.1. Normalised power dissipation.
PD% = 100 PD/PD 25 ˚C = f(Tmb)
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
Normalised Current Derating
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
Drain Current, ID (A)
Tj = 25 C
PHW20N50E
VGS = 10 V
20
18
16
14
12
10
8
8 V
5 V
4.8 V
4.6 V
6
4.4 V
4.2 V
4 V
4
2
0
0
1
2
3
4
5
0
20
40
60
80
Tmb /
100
120
140
Drain-Source Voltage, VDS (V)
C
Fig.2. Normalised continuous drain current.
ID% = 100 ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V
Fig.5. Typical output characteristics.
ID = f(VDS); parameter VGS
PHW20N50E
Tj = 25 C
Drain-Source On Resistance, RDS(on) (Ohms)
0.5
PHW20N50E
tp = 10 us
Peak Pulsed Drain Current, IDM (A)
4V
4.2V
4.4 V
4.6 V
100
10
1
5V
4.8V
0.45
0.4
100us
1 ms
0.35
0.3
RDS(on) = VDS/ ID
d.c.
10 ms
100 ms
VGS = 6 V
10V
0.25
0.2
0.1
10
100
1000
0
2
4
6
8
10
12
14
16
18
20
Drain Current, ID (A)
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance.
RDS(ON) = f(ID); parameter VGS
September 1999
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
VGS(TO) / V
Drain current, ID (A)
30
PHW20N50E
max.
4
3
2
1
0
VDS > ID X RDS(ON)
25
20
typ.
min.
15
150 C
Tj = 25 C
10
5
0
0
1
2
3
4
5
6
7
8
-60 -40 -20
0
20
40
Tj /
60
C
80 100 120 140
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter Tj
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
SUB-THRESHOLD CONDUCTION
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
PHW20N50E
Transconductance, gfs (S)
VDS > ID X RDS(ON)
20
18
16
14
12
10
8
Tj = 25 C
150 C
2 %
typ
98 %
6
4
2
0
0
5
10
15
20
25
30
0
1
2
3
4
Drain current, ID (A)
VGS / V
Fig.8. Typical transconductance.
gfs = f(ID); parameter Tj
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Normalised RDS(ON) = f(Tj)
a
PHW20N50E
Ciss
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
100
2
1
0
Coss
Crss
0.1
1
10
100
-60 -40 -20
0
20 40 60 80 100 120 140
Drain-Source Voltage, VDS (V)
Tj /
C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 10 A; VGS = 10 V
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
September 1999
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
Source-Drain Diode Current, IF (A)
VGS = 0 V
PHW20N50E
50
45
40
35
30
25
20
15
10
5
PHW20N50E
Gate-source voltage, VGS (V)
15
14 ID = 20A
13
Tj = 25 C
300V
12
11
10
9
200V
8
150 C
VDD = 400 V
Tj = 25 C
7
6
5
4
3
2
1
0
0
0
25
50
75
100
125
150
175
200
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1 1.1 1.2 1.3 1.4 1.5
Gate charge, QG (nC)
Drain-Source Voltage, VSDS (V)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
PHW20N50E
td(off)
Switching times, td(on), tr, td(off), tf (ns)
Non-repetitive Avalanche current, IAS (A)
Tj prior to avalanche = 25 C
600
500
400
300
200
100
0
100
10
1
125 C
tr, tf
VDS
tp
td(on)
ID
PHW20N50E
0
5
10
15
20
25
30
1E-06
1E-05
1E-04
1E-03
1E-02
Gate resistance, RG (Ohms)
Avalanche time, tp (s)
Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG)
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
1.15
Maximum Repetitive Avalanche Current, IAR (A)
100
V(BR)DSS @ 25 C
1.1
1.05
1
Tj prior to avalanche = 25 C
10
125 C
1
0.95
0.9
PHW20N50E
1E-03
0.1
1E-06
1E-05
1E-04
1E-02
0.85
-100
-50
0
50
100
150
Avalanche time, tp (s)
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
September 1999
5
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
MECHANICAL DATA
Plastic single-ended through-hole package; heatsink mounted; 1 mounting hole; 3-lead TO-247
SOT429
α
E
P
A
A
1
β
q
S
R
D
Y
(1)
L
1
Q
b
2
L
1
2
3
c
b
1
w
M
b
e
e
0
10
20 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
β
A
A
b
b
b
2
c
D
E
e
L
L
1
P
Q
q
R
S
w
Y
α
UNIT
mm
1
1
1.9
1.7
1.2
0.9
3.7
3.3
2.6
2.4
7.5
7.1
15.7
15.3
6°
4°
17°
13°
5.3
4.7
2.2
1.8
3.2
2.8
0.9
0.6
21
20
16
15
16
15
4.0
3.6
3.5
3.3
5.45
5.3
0.4
Note
1. Tinning of terminals are uncontrolled within zone L
.
1
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
EIAJ
98-04-07
99-08-04
SOT429
TO-247
Fig.19. SOT429; pin 2 connected to mounting base
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for SOT429 envelope.
3. Epoxy meets UL94 V0 at 1/8".
September 1999
6
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
IRFP460
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
September 1999
7
Rev 1.000
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