PBSS302ND,115_技术文档

PBSS302ND

40 V, 4 A NPN low V_CEsat(BISS) transistor

Rev. 02 — 18 February 2008

Product data sheet

1. Product proﬁle

1.1 General description

NPN low V_CEsatBreakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74)

small Surface-Mounted Device (SMD) plastic package.

PNP complement: PBSS302PD.

1.2 Features

I Ultra low collector-emitter saturation voltage V_CEsat

I 4 A continuous collector current capability I_C

I Up to 15 A peak current

I Very low collector-emitter saturation resistance

I High efﬁciency due to less heat generation

1.3 Applications

I Power management functions

I Charging circuits

I DC-to-DC conversion

I MOSFET gate driving

I Power switches (e.g. motors, fans)

I Thin Film Transistor (TFT) backlight inverter

1.4 Quick reference data

Table 1.

Symbol

V_CEO

I_C

Quick reference data

Parameter

Conditions

Min

Typ

Max

40

4

Unit

V

collector-emitter voltage open base

collector current

-

[1]

[2]

A

I_CM

peak collector current

single pulse;

t_p≤ 1 ms

15

A

R_CEsat

collector-emitter

I_C= 6 A;

-

55

75

mΩ

saturation resistance

I_B= 600 mA

[1] Device mounted on a ceramic Printed-Circuit Board (PCB), Al₂O₃, standard footprint.

[2] Pulse test: t_p≤ 300 µs; δ ≤ 0.02.

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

2. Pinning information

Table 2.

Pinning

1

Description

collector

base

Simpliﬁed outline

Symbol

6

5

4

1, 2, 5, 6

2

3

4

emitter

1

2

3

4

5

collector

sym014

6

3. Ordering information

Table 3.

Ordering information

Type number

Package

Name

Description

Version

PBSS302ND

SC-74

plastic surface-mounted package (TSOP6); 6 leads

SOT457

4. Marking

Table 4.

Marking codes

Type number

Marking code

PBSS302ND

C7

5. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_CBO

V_CEO

V_EBO

I_C

Parameter

Conditions

Min

Max

60

40

5

Unit

V

collector-base voltage

open emitter

-

collector-emitter voltage open base

V

emitter-base voltage

collector current

open collector

V

[1]

4

A

I_CM

peak collector current

single pulse;

15

A

t_p≤ 1 ms

I_B

base current

-

0.8

2

A

I_BM

peak base current

single pulse;

t_p≤ 1 ms

[2]

[3]

P_tot

total power dissipation

T_amb≤ 25 °C

-

360

600

750

1.1

mW

W

[4]

[1]

[2][5]

2.5

W

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

2 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

Table 5.

Limiting values …continued

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

T_j

Parameter

Conditions

Min

-

Max

150

Unit

°C

junction temperature

ambient temperature

storage temperature

T_amb

T_stg

−65

+150

°C

[1] Device mounted on a ceramic PCB, Al₂O₃, standard footprint.

[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm².

[4] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm².

[5] Operated under pulsed conditions: Duty cycle δ ≤ 10 % and pulse width t_p≤ 10 ms.

006aaa270

1600

P

tot

(mW)

1200

(1)

(2)

(3)

800

400

0

(4)

−75

−25

25

75

125

175

(°C)

T

amb

(1) Ceramic PCB, Al₂O₃, standard footprint

(2) FR4 PCB, mounting pad for collector 6 cm²

(3) FR4 PCB, mounting pad for collector 1 cm²

(4) FR4 PCB, standard footprint

Fig 1. Power derating curves

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

3 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

6. Thermal characteristics

Table 6.

Thermal characteristics

Symbol Parameter

Conditions

Min

Typ

Max

350

208

167

113

50

Unit

K/W

[1]

[2]

R_th(j-a)

thermal resistance from

in free air

-

junction to ambient

[3]

[4]

[1][5]

R_th(j-sp)

thermal resistance from

junction to solder point

45

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm².

[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm².

[4] Device mounted on a ceramic PCB, Al₂O₃, standard footprint.

[5] Operated under pulsed conditions: Duty cycle δ ≤ 10 % and pulse width t_p≤ 10 ms.

006aaa271

3

10

duty cycle =

Z

th(j-a)

1

(K/W)

0.75

0.5

2

0.33

10

0.2

0.1

0.05

10

0.02

0.01

1

0

−1

10

−5

−4

−3

−2

−1

2

3

10

1

10

t

(s)

p

FR4 PCB, standard footprint

Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

4 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

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3

10

Z

th(j-a)

duty cycle =

(K/W)

1

0.75

2

10

0.5

0.33

0.2

0.1

10

0.05

0.02

0.01

1

0

−1

10

−5

−4

−3

−2

−1

2

3

10

1

10

t

(s)

p

FR4 PCB, mounting pad for collector 1 cm²

Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values

006aaa273

3

10

Z

th(j-a)

(K/W)

duty cycle =

1

2

10

0.75

0.5

0.33

0.2

0.1

10

0.05

0.02

0.01

1

0

−1

10

−5

−4

−3

−2

−1

2

3

10

1

10

t

(s)

p

FR4 PCB, mounting pad for collector 6 cm²

Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

5 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

7. Characteristics

Table 7.

Characteristics

T_amb= 25 °C unless otherwise speciﬁed.

Symbol Parameter Conditions

collector-basecut-off V_CB= 40 V; I_E= 0 A

Min

Typ

Max

0.1

50

Unit

µA

I_CBO

-

current

V_CB= 40 V; I_E= 0 A;

µA

T_j= 150 °C

I_CES

I_EBO

h_FE

collector-emitter

cut-off current

V_CE= 30 V; V_BE= 0 V

-

0.1

µA

emitter-base cut-off V_EB= 5 V; I_C= 0 A

current

DC current gain

V_CE= 2 V; I_C= 0.5 A

V_CE= 2 V; I_C= 1 A

V_CE= 2 V; I_C= 2 A

V_CE= 2 V; I_C= 4 A

V_CE= 2 V; I_C= 6 A

I_C= 0.5 A; I_B= 50 mA

I_C= 1 A; I_B= 50 mA

I_C= 2 A; I_B= 200 mA

I_C= 4 A; I_B= 400 mA

I_C= 6 A; I_B= 600 mA

300

500

475

385

190

100

35

-

[1]

300

-

250

-

100

-

50

-

V_CEsat

collector-emitter

saturation voltage

60

110

180

300

450

75

mV

mΩ

-

65

-

115

220

330

55

[1]

-

R_CEsat

V_BEsat

collector-emitter

saturation resistance

-

base-emitter

saturation voltage

I_C= 0.5 A; I_B= 50 mA

I_C= 1 A; I_B= 50 mA

I_C= 1 A; I_B= 100 mA

I_C= 4 A; I_B= 400 mA

-

0.79

0.81

0.83

1.0

0.85

0.9

1

V

[1]

1.1

1.0

V_BEon

base-emitter turn-on V_CE= 2 V; I_C= 2 A

voltage

0.79

t_d

t_r

delay time

rise time

V_CC= 10 V; I_C= 2 A;

-

12

-

ns

I_Bon= 0.1 A;

52

ns

I_Boff= −0.1 A

t_on

t_s

turn-on time

storage time

fall time

64

ns

390

120

510

150

ns

t_f

ns

t_off

f_T

turn-off time

ns

transition frequency V_CE= 10 V; I_C= 0.1 A;

f = 100 MHz

MHz

C_c

collector capacitance V_CB= 10 V; I_E= i_e= 0 A;

f = 1 MHz

-

30

-

pF

[1] Pulse test: t_p≤ 300 µs; δ ≤ 0.02.

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

6 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

006aaa280

006aaa274

14

12

10

8

1000

I

C

h

FE

(A)

I

(mA) = 400

B

360

320

280

240

200

160

800

(1)

(2)

600

400

200

0

120

80

6

40

(3)

4

2

0

−1

2

3

4

5

0

0.4

0.8

1.2

1.6

2.0

(V)

10

1

10

(mA)

V

I

CE

C

V_CE= 2 V

T_amb= 25 °C

(1) T_amb= 100 °C

(2) T_amb= 25 °C

(3) T_amb= −55 °C

Fig 5. DC current gain as a function of collector

current; typical values

Fig 6. Collector current as a function of

collector-emitter voltage; typical values

006aaa275

006aaa344

1.6

V

BE

BEsat

(V)

1.2

0.8

0.4

0

(1)

(2)

(3)

(1)

0.8

(2)

(3)

0.4

0

10

−1

2

3

4

5

−1

2

3

4

5

1

10

(mA)

10

1

10

(mA)

I

C

V_CE= 2 V

I_C/I_B= 20

(1) T_amb= −55 °C

(2) T_amb= 25 °C

(3) T_amb= 100 °C

(1) T_amb= −55 °C

(2) T_amb= 25 °C

(3) T_amb= 100 °C

Fig 7. Base-emitter voltage as a function of collector

current; typical values

Fig 8. Base-emitter saturation voltage as a function of

collector current; typical values

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

7 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

006aaa276

006aaa277

1

V

CEsat

(V)

(1)

(2)

(3)

(V)

−1

−2

−3

10

(1)

(2)

−2

10

(3)

−3

10

−1

2

3

4

5

−1

2

3

4

5

10

1

10

(mA)

10

1

10

I (mA)

C

I

C

I_C/I_B= 20

T_amb= 25 °C

(1) T_amb= 100 °C

(2) T_amb= 25 °C

(3) T_amb= −55 °C

(1) I_C/I_B= 100

(2) I_C/I_B= 50

(3) I_C/I_B= 10

Fig 9. Collector-emitter saturation voltage as a

function of collector current; typical values

Fig 10. Collector-emitter saturation voltage as a

function of collector current; typical values

006aaa281

006aaa326

3

10

R

CEsat

R

CEsat

(Ω)

2

10

(1)

(2)

10

(3)

1

(1)

(2)

(3)

−1

10

−2

10

−1

2

3

4

5

−1

2

3

4

5

10

1

10

(mA)

10

1

10

(A)

I

C

I_C/I_B= 20

T_amb= 25 °C

(1) I_C/I_B= 100

(2) I_C/I_B= 50

(3) I_C/I_B= 10

(1) T_amb= 100 °C

(2) T_amb= 25 °C

(3) T_amb= −55 °C

Fig 11. Collector-emitter saturation resistance as a

function of collector current; typical values

Fig 12. Collector-emitter saturation resistance as a

function of collector current; typical values

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

8 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

8. Test information

I

B

input pulse

90 %

(idealized waveform)

I

(100 %)

Bon

10 %

I

Boff

output pulse

(idealized waveform)

I

C

90 %

I

(100 %)

C

10 %

t

f

t

r

s

d

t

off

on

006aaa003

Fig 13. BISS transistor switching time deﬁnition

V

CC

BB

R

B

R

C

V

o

(probe)

oscilloscope

450 Ω

R2

V

I

DUT

R1

mlb826

V_CC= 10 V; I_C= 2 A; I_Bon= 0.1 A; I_Boff= −0.1 A

Fig 14. Test circuit for switching times

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

9 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

9. Package outline

3.1

2.7

1.1

0.9

6

5

4

0.6

0.2

3.0 1.7

2.5 1.3

pin 1 index

1

2

3

0.26

0.10

0.40

0.25

0.95

1.9

Dimensions in mm

04-11-08

Fig 15. Package outline SOT457 (SC-74)

10. Packing information

Table 8.

Packing methods

The indicated -xxx are the last three digits of the 12NC ordering code.^[1]

Type number

Package

Description

Packing quantity

3000

10000

-135

[2]

[3]

PBSS302ND

SOT457

4 mm pitch, 8 mm tape and reel; T1

4 mm pitch, 8 mm tape and reel; T2

-115

-125

-165

[1] For further information and the availability of packing methods, see Section 14.

[2] T1: normal taping

[3] T2: reverse taping

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

10 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

11. Soldering

3.45

1.95

solder lands

0.95

solder resist

0.45 0.55

2.825

3.30

occupied area

solder paste

1.60

1.70

3.10

3.20

msc422

Dimensions in mm

Fig 16. Reﬂow soldering footprint SOT457 (SC-74)

5.30

solder lands

solder resist

occupied area

5.05

0.45 1.45 4.45

msc423

1.40

4.30

Dimensions in mm

Fig 17. Wave soldering footprint SOT457 (SC-74)

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

11 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

12. Revision history

Table 9.

Revision history

Document ID

PBSS302ND_2

Modiﬁcations:

Release date

Data sheet status

Change notice

Supersedes

20080218

Product data sheet

-

PBSS302ND_1

• The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Section 1.1 “General description”: amended

• Section 1.4 “Quick reference data”: I_CMconditions amended

• Figure 2, 3, 4, and 6: amended

• Table 5: I_CMconditions amended

• Table 5: I_BMconditions amended

• Table 6: typing error for maximum value on 6 cm²footprint amended

• Table 7: typical values for h_FEadded

• Section 8 “Test information”: added

• Section 11 “Soldering”: added

• Section 13 “Legal information”: updated

PBSS302ND_1

20050419

Product data sheet

-

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

12 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

13. Legal information

13.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Deﬁnition

Objective [short] data sheet

This document contains data from the objective speciﬁcation for product development.

This document contains data from the preliminary speciﬁcation.

This document contains the product speciﬁcation.

Preliminary [short] data sheet Qualiﬁcation

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Deﬁnitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

13.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

13.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

13.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

14. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

PBSS302ND_2

Product data sheet

Rev. 02 — 18 February 2008

13 of 14

PBSS302ND

NXP Semiconductors

40 V, 4 A NPN low V_CEsat(BISS) transistor

15. Contents

1

Product proﬁle . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1

1.2

1.3

1.4

General description. . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6

Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

Packing information. . . . . . . . . . . . . . . . . . . . . 10

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

3

4

5

6

7

8

9

10

11

12

13

Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

13.1

13.2

13.3

13.4

14

15

Contact information. . . . . . . . . . . . . . . . . . . . . 13

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 18 February 2008

Document identifier: PBSS302ND_2


型号：	PBSS302ND,115
厂家：	NXP
描述：	PBSS302ND - 40 V, 4 A NPN low VCEsat (BISS) transistor TSOP 6-Pin
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PBSS302ND,115 [NXP]

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