PHX10N40E [NXP]
PowerMOS transistors Avalanche energy rated; 功率MOS晶体管的额定雪崩能量![PHX10N40E](http://pdffile.icpdf.com/pdf1/p00044/img/icpdf/PHX10N40E_229360_icpdf.jpg)
型号: | PHX10N40E |
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描述: | PowerMOS transistors Avalanche energy rated |
文件: | 总8页 (文件大小:78K) |
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Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
FEATURES
SYMBOL
QUICK REFERENCE DATA
d
• Repetitive Avalanche Rated
• Fast switching
VDSS = 400 V
ID = 5.3 A
• Stable off-state characteristics
• High thermal cycling performance
• Isolated package
g
RDS(ON) ≤ 0.55 Ω
s
GENERAL DESCRIPTION
PINNING
SOT186A
N-channel, enhancement mode
PIN
DESCRIPTION
case
field-effect
power
transistor,
intended for use in off-line switched
mode power supplies, T.V. and
computer monitor power supplies,
d.c.tod.c. converters, motorcontrol
circuits and general purpose
switching applications.
1
2
3
gate
drain
source
case isolated
1
2 3
The PHX10N40E is supplied in the
SOT186A full pack, isolated
package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDSS
VDGR
VGS
ID
Drain-source voltage
Tj = 25 ˚C to 150˚C
-
-
-
-
-
-
-
400
400
± 30
5.3
3.4
42
V
V
Drain-gate voltage
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
Gate-source voltage
Continuous drain current
V
Ths = 25 ˚C; VGS = 10 V
Ths = 100 ˚C; VGS = 10 V
Ths = 25 ˚C
A
A
IDM
PD
Tj, Tstg
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
A
Ths = 25 ˚C
37
W
˚C
- 55
150
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
EAS
Non-repetitive avalanche
energy
Unclamped inductive load, IAS = 8.8 A;
tp = 0.23 ms; Tj prior to avalanche = 25˚C;
-
526
mJ
V
DD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer
to fig:17
EAR
Repetitive avalanche energy1 IAR = 10.6 A; tp = 2.5 µs; Tj prior to
avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V;
refer to fig:18
Repetitive and non-repetitive
avalanche current
-
-
13
mJ
A
IAS, IAR
10.6
1 pulse width and repetition rate limited by Tj max.
December 1998
1
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Visol
Cisol
R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal
-
2500
V
three terminals to external
heatsink
waveform;
R.H. ≤ 65% ; clean and dustfree
Capacitance from T2 to external f = 1 MHz
heatsink
-
10
-
pF
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Rth j-hs
Rth j-a
Thermal resistance junction with heatsink compound
-
-
-
3.4
-
K/W
K/W
to heatsink
Thermal resistance junction
to ambient
55
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
V(BR)DSS Drain-source breakdown
CONDITIONS
MIN. TYP. MAX. UNIT
VGS = 0 V; ID = 0.25 mA
VDS = VGS; ID = 0.25 mA
400
-
-
-
-
V
voltage
∆V(BR)DSS / Drain-source breakdown
0.1
%/K
∆Tj
voltage temperature
coefficient
RDS(ON)
VGS(TO)
gfs
Drain-source on resistance
Gate threshold voltage
Forward transconductance
Drain-source leakage current VDS = 400 V; VGS = 0 V
VDS = 320 V; VGS = 0 V; Tj = 125 ˚C
Gate-source leakage current VGS = ±30 V; VDS = 0 V
VGS = 10 V; ID = 5.3 A
VDS = VGS; ID = 0.25 mA
VDS = 30 V; ID = 5.3 A
-
2.0
3.5
-
0.42 0.55
Ω
V
3.0
6
4.0
-
S
IDSS
1
25
250
200
µA
µA
nA
-
30
10
IGSS
-
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = 10.6 A; VDD = 320 V; VGS = 10 V
-
-
-
90
7
49
110
9
60
nC
nC
nC
td(on)
tr
td(off)
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 200 V; RD = 18 Ω;
RG = 9.1 Ω
-
-
-
-
13
65
108
70
-
-
-
-
ns
ns
ns
ns
Ld
Ls
Internal drain inductance
Internal source inductance
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
-
-
4.5
7.5
-
-
nH
nH
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
-
-
1080
190
110
-
-
-
pF
pF
pF
December 1998
2
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IS
Continuous source current
(body diode)
Ths = 25˚C
-
-
-
-
-
-
10.6
42
A
A
V
ISM
VSD
Pulsed source current (body Ths = 25˚C
diode)
Diode forward voltage
IS = 10.6 A; VGS = 0 V
1.2
trr
Qrr
Reverse recovery time
Reverse recovery charge
IS = 10.6 A; VGS = 0 V; dI/dt = 100 A/µs
-
-
330
4.8
-
-
ns
µC
December 1998
3
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
Normalised Power Derating
with heatsink compound
PD%
Zth j-hs, Transient thermal impedance (K/W)
120
110
100
90
80
70
60
50
40
30
20
10
0
10
1
D = 0.5
0.2
0.1
0.05
0.02
0.1
t
T
p
t
P
p
D =
D
0.01
single pulse
t
T
0.001
1us
10us
100us
1ms
1s
10ms
100ms
0
20
40
60
80
Ths /
100
120
140
C
tp, pulse width (s)
Fig.1. Normalised power dissipation.
PD% = 100 PD/PD 25 ˚C = f(Ths)
Fig.4. Transient thermal impedance.
Zth j-hs = f(t); parameter D = tp/T
Normalised Current Derating
ID%
ID, Drain current (Amps)
Tj = 25 C
10 V
40
30
20
10
0
120
110
100
90
80
70
60
50
40
30
20
10
0
with heatsink compound
7 V
6.5 V
6 V
5.5 V
5 V
VGS = 4.5 V
0
20
40
60
80
Ths /
100
120
140
0
5
10
15
20
25
30
VDS, Drain-Source voltage (Volts)
C
Fig.2. Normalised continuous drain current.
ID% = 100 ID/ID 25 ˚C = f(Ths); conditions: VGS ≥ 10 V
Fig.5. Typical output characteristics.
ID = f(VDS); parameter VGS
HP0N4
ID, Drain current (Amps)
RDS(on), Drain-Source on resistance (Ohms)
1
100
4.5 V 5 V 5.5 V
6 V 6.5 V
VGS = 7 V
Tj = 25 C
tp = 10 us
0.8
0.6
0.4
0.2
0
10
100 us
10 V
RDS(ON) = VDS/ID
1 ms
1
0.1
10 ms
100 ms
DC
0.01
1
10
100
1000
10000
0
5
10
15
20
25
30
35
VDS, Drain-source voltage (Volts)
ID, Drain current (Amps)
Fig.3. Safe operating area. Ths = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance.
RDS(ON) = f(ID); parameter VGS
December 1998
4
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
VGS(TO) / V
ID, Drain current (Amps)
40
Tj = 150 C
VDS > ID x RDS(on)max
max.
4
3
2
1
0
Tj = 25 C
30
20
10
0
typ.
min.
-60 -40 -20
0
20
40
60
80 100 120 140
0
2
4
6
8
10
VGS, Gate-Source voltage (Volts)
Tj /
C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter Tj
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
SUB-THRESHOLD CONDUCTION
ID / A
gfs, Transconductance (S)
VDS > ID x RDS(on)max
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
10
8
150 C
Tj = 25 C
2 %
typ
98 %
6
4
2
0
0
1
2
3
4
0
10
20
ID, Drain current (A)
30
40
VGS / V
Fig.8. Typical transconductance.
gfs = f(ID); parameter Tj
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Normalised RDS(ON) = f(Tj)
a
Junction capacitances (pF)
10000
1000
100
2
Ciss
1
0
Coss
Crss
10
-60 -40 -20
0
20 40 60 80 100 120 140
1
10
100
1000
Tj /
C
VDS, Drain-Source voltage (Volts)
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5.3 A; VGS = 10 V
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
December 1998
5
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
VGS, Gate-Source voltage (Volts)
15
IF, Source-Drain diode current (Amps)
VGS = 0 V
20
15
10
5
ID = 10.6 A
200 V
Tj = 25 C
80 V
VDD = 320 V
10
5
150 C
Tj = 25 C
0
0
0
50
100
150
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Qg, Gate charge (nC)
VSDS, Source-Drain voltage (Volts)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
Switching times (ns)
1000
100
10
VDD = 200 V
VGS = 10 V
RD = 18 Ohms
Tj = 25 C
Non-repetitive Avalanche current, IAS (A)
Tj prior to avalanche = 25 C
100
10
1
td(off)
125 C
tf
tr
VDS
tp
ID
PHP10N40E
0.1
td(on)
1E-06
1E-05
1E-04
1E-03
1E-02
0
10
20
30
40
50
60
Avalanche time, tp (s)
RG, Gate resistance (Ohms)
Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG)
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
1.15
Maximum Repetitive Avalanche Current, IAR (A)
100
V(BR)DSS @ 25 C
1.1
10
1
Tj prior to avalanche = 25 C
1.05
1
125 C
0.95
0.9
0.1
PHP10N40E
1E-03 1E-02
0.01
1E-06
1E-05
1E-04
Avalanche time, tp (s)
0.85
-100
-50
0
50
100
150
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
December 1998
6
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10.3
max
4.6
max
3.2
3.0
2.9 max
2.8
Recesses (2x)
2.5
6.4
0.8 max. depth
15.8
max
seating
plane
15.8
max.
19
max.
3 max.
not tinned
3
2.5
13.5
min.
1
2
3
M
0.4
1.0 (2x)
0.6
2.5
0.9
0.7
2.54
0.5
5.08
1.3
Fig.19. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
December 1998
7
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHX10N40E
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
December 1998
8
Rev 1.200
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PHX10N40E127
TRANSISTOR 5.3 A, 400 V, 0.55 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220, TO-220, 3 PIN, FET General Purpose Power
NXP
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