PMDPB55XP [NXP]

3400mA, 20V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, 2 X 2 MM, 0.65 MM HEIGHT, LEADLESS, ULTRA THIN, PLASTIC, DFN2020-6, 6 PIN;
PMDPB55XP
型号: PMDPB55XP
厂家: NXP    NXP
描述:

3400mA, 20V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, 2 X 2 MM, 0.65 MM HEIGHT, LEADLESS, ULTRA THIN, PLASTIC, DFN2020-6, 6 PIN

开关 光电二极管 晶体管
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中文:  中文翻译
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PMDPB55XP  
DFN2020-6  
20 V, dual P-channel Trench MOSFET  
Rev. 3 — 4 June 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Dual P-channel enhancement mode Field-Effect Transistor (FET) in a small and leadless  
ultra thin DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package using  
Trench MOSFET technology.  
1.2 Features and benefits  
Very fast switching  
Small and leadless ultra thin SMD  
plastic package: 2 x 2 x 0.65 mm  
Trench MOSFET technology  
Exposed drain pad for excellent  
thermal conduction  
1.3 Applications  
Charging switch for portable devices  
DC/DC converters  
Power management in battery-driven  
portables  
Hard disc and computing power  
Small brushless DC motor drive  
management  
1.4 Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor  
VDS  
VGS  
ID  
drain-source voltage  
gate-source voltage  
drain current  
Tj = 25 °C  
-
-
-
-
-20  
12  
V
V
A
-12  
-
[1]  
VGS = -4.5 V; Tamb = 25 °C; t 5 s  
VGS = -4.5 V; ID = -3.4 A; Tj = 25 °C  
-4.5  
Static characteristics (per transistor)  
RDSon  
drain-source on-state  
resistance  
-
55  
70  
mΩ  
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2.  
 
 
 
 
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
S1  
G1  
D2  
S2  
G2  
D1  
D1  
D2  
source TR1  
gate TR1  
drain TR2  
source TR2  
gate TR2  
drain TR1  
drain TR1  
drain TR2  
D1  
D2  
6
5
4
2
3
7
8
4
5
1
2
3
6
S2 G2  
G1 S1  
017aaa258  
Transparent top view  
7
SOT1118 (DFN2020-6)  
8
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PMDPB55XP  
DFN2020-6  
plastic thermal enhanced ultra thin small outline package;  
no leads; 6 terminals  
SOT1118  
4. Marking  
Table 4.  
Marking codes  
Type number  
PMDPB55XP  
Marking code  
1Z  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
2 of 15  
 
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
5. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
Per transistor  
VDS  
VGS  
ID  
drain-source voltage  
gate-source voltage  
drain current  
Tj = 25 °C  
-
-20  
V
-12  
12  
V
[1]  
[1]  
[1]  
VGS = -4.5 V; Tamb = 25 °C; t 5 s  
VGS = -4.5 V; Tamb = 25 °C  
VGS = -4.5 V; Tamb = 100 °C  
Tamb = 25 °C; single pulse; tp 10 µs  
Tamb = 25 °C  
-
-
-
-
-
-
-
-4.5  
-3.4  
-2.2  
-14  
A
A
A
IDM  
Ptot  
peak drain current  
A
[2]  
[1]  
total power dissipation  
490  
1170  
mW  
mW  
Tsp = 25 °C  
8300 mW  
Source-drain diode  
[1]  
IS  
source current  
Tamb = 25 °C  
-
-1.2  
A
Per device  
Tj  
junction temperature  
ambient temperature  
storage temperature  
-55  
-55  
-65  
150  
150  
150  
°C  
°C  
°C  
Tamb  
Tstg  
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2.  
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.  
017aaa123  
017aaa124  
120  
120  
P
der  
I
der  
(%)  
(%)  
80  
80  
40  
40  
0
75  
0
75  
25  
25  
75  
125  
175  
25  
25  
75  
125  
175  
T (°C)  
j
T (°C)  
j
Fig 1. Normalized total power dissipation as a  
function of junction temperature  
Fig 2. Normalized continuous drain current as a  
function of junction temperature  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
3 of 15  
 
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
017aaa410  
2
-10  
I
D
Limit R  
= V /I  
DS D  
DSon  
(A)  
-10  
(1)  
(2)  
-1  
-1  
(3)  
(4)  
(5)  
-10  
(6)  
-2  
-10  
-10  
-1  
2
-1  
-10  
-10  
V
(V)  
DS  
IDM = single pulse  
(1) tp = 10 µs  
(2) tp = 100 µs  
(3) DC; Tsp = 25 °C  
(4) tp = 10 ms  
(5) tp = 100 ms  
(6) DC; Tamb = 25 °C; drain mounting pad 6 cm2  
Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source  
voltage  
6. Thermal characteristics  
Table 6.  
Symbol  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor  
[1]  
[2]  
[2]  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
in free air  
-
-
-
-
223  
93  
256  
107  
63  
K/W  
K/W  
K/W  
K/W  
in free air; t 5 s  
55  
Rth(j-sp)  
thermal resistance  
from junction to solder  
point  
in free air  
10  
15  
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm2.  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
4 of 15  
 
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
017aaa398  
3
10  
Z
th(j-a)  
duty cycle = 1  
(K/W)  
0.75  
0.5  
2
10  
0.33  
0.2  
0.1  
0.25  
0.05  
0.02  
0.01  
10  
1
0
-1  
10  
10  
-5  
-4  
-3  
-2  
-1  
2
3
10  
10  
10  
10  
1
10  
10  
10  
t
p
(s)  
FR4 PCB, standard footprint  
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
017aaa399  
3
10  
Z
th(j-a)  
(K/W)  
duty cycle = 1  
2
10  
0.75  
0.5  
0.33  
0.25  
0.2  
0.1  
10  
0.05  
0.02  
0.01  
0
1
-1  
10  
10  
-5  
-4  
-3  
-2  
-1  
2
3
10  
10  
10  
10  
1
10  
10  
10  
t
p
(s)  
FR4 PCB, mounting pad for drain 6 cm2  
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
5 of 15  
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
7. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics (per transistor)  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = -250 µA; VGS = 0 V; Tj = 25 °C  
-20  
-
-
V
V
VGSth  
gate-source threshold ID = -250 µA; VDS = VGS; Tj = 25 °C  
voltage  
-0.47 -0.65 -0.9  
IDSS  
drain leakage current  
VDS = -20 V; VGS = 0 V; Tj = 25 °C  
VDS = -20 V; VGS = 0 V; Tj = 150 °C  
VGS = 12 V; VDS = 0 V; Tj = 25 °C  
VGS = -12 V; VDS = 0 V; Tj = 25 °C  
VGS = -4.5 V; ID = -3.4 A; Tj = 25 °C  
VGS = -4.5 V; ID = -3.4 A; Tj = 150 °C  
VGS = -2.5 V; ID = -1.6 A; Tj = 25 °C  
VGS = -1.8 V; ID = -1.5 A; Tj = 25 °C  
VDS = -10 V; ID = -3.4 A; Tj = 25 °C  
-
-
-
-
-
-
-
-
-
-
-1  
µA  
µA  
nA  
nA  
mΩ  
mΩ  
mΩ  
mΩ  
S
-
-10  
100  
100  
70  
IGSS  
gate leakage current  
-
-
RDSon  
drain-source on-state  
resistance  
55  
78  
75  
110  
15  
99  
90  
135  
-
gfs  
forward  
transconductance  
Dynamic characteristics (per transistor)  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
VDS = -10 V; ID = -3.4 A; VGS = -5 V;  
Tj = 25 °C  
-
-
-
-
-
-
16.5  
1
25  
-
nC  
nC  
nC  
pF  
pF  
pF  
1.65  
785  
80  
-
VDS = -10 V; f = 1 MHz; VGS = 0 V;  
Tj = 25 °C  
-
Coss  
Crss  
-
reverse transfer  
capacitance  
64  
-
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = -10 V; ID = -3.4 A; VGS = -5 V;  
RG(ext) = 6 ; Tj = 25 °C  
-
-
-
-
4
-
-
-
-
ns  
ns  
ns  
ns  
14  
135  
68  
turn-off delay time  
fall time  
Source-drain diode (per transistor)  
VSD  
source-drain voltage  
IS = -1.2 A; VGS = 0 V; Tj = 25 °C  
-
-0.8  
-1.2  
V
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
6 of 15  
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
017aaa411  
017aaa412  
-3  
-4  
-5  
-4  
-10  
-4.5 V  
I
D
-2.5 V  
-1.8 V  
-1.4 V  
(A)  
I
D
-3  
-2  
-1  
0
(A)  
(1)  
(2)  
(3)  
V
= -1.2 V  
GS  
-10  
-1.0 V  
-2  
-10  
0
-1  
-3  
0
-0.25  
-0.50  
-0.75  
-1.00  
V
-1.25  
(V)  
GS  
V
(V)  
DS  
Tj = 25 °C  
Tj = 25 °C; VDS = 5 V  
(1) minimum values  
(2) typical values  
(3) maximum values  
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 7. Sub-threshold drain current as a function of  
gate-source voltage  
017aaa413  
017aaa414  
-0.24  
1.0  
R
DSon  
(Ω)  
R
DSon  
(Ω)  
-1.2 V  
0.8  
0.6  
0.4  
0.2  
0
-0.16  
-0.08  
0
V
GS  
= -1.4 V  
(1)  
(2)  
-1.6 V  
-2.5 V  
-4.5 V  
-3  
0
-1  
-2  
-4  
0
-1  
-2  
-3  
-4  
I
D
(A)  
V
(V)  
GS  
Tj = 25 °C  
ID = -1 A  
(1) Tj = 150 °C  
(2) Tj = 25 °C  
Fig 8. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 9. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
7 of 15  
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
017aaa415  
017aaa416  
-4  
2.0  
1.5  
1.0  
0.5  
0
I
a
D
(A)  
-3  
-2  
-1  
0
(2)  
(1)  
0
-0.5  
-1.0  
-1.5  
-2.0  
-60  
0
60  
120  
180  
V
GS  
(V)  
T (°C)  
j
VDS > ID × RDSon  
(1) Tj = 25 °C  
(2) Tj = 150 °C  
Fig 10. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig 11. Normalized drain-source on-state resistance as  
a function of junction temperature; typical  
values  
017aaa417  
017aaa418  
4
-1.5  
10  
C
(pF)  
V
GS(th)  
(V)  
3
-1.0  
-0.5  
0
10  
(1)  
(1)  
(2)  
(3)  
2
10  
(2)  
(3)  
10  
2
-60  
0
60  
120  
180  
0
-1  
-10  
-10  
T (°C)  
j
V
(V)  
DS  
ID = -0.25 mA; VDS = VGS  
(1) maximum values  
(2) typical values  
f = 1 MHz; VGS = 0 V  
(1) Ciss  
(2) Coss  
(3) minimum values  
(3) Crss  
Fig 12. Gate-source threshold voltage as a function of  
junction temperature  
Fig 13. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
8 of 15  
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
017aaa419  
-6  
V
DS  
V
GS  
(V)  
I
D
-4  
-2  
0
V
GS(pl)  
V
GS(th)  
GS  
V
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
017aaa137  
0
2
4
6
Q
G
(nC)  
ID = 3.3 A; VDS = 10 V; Tamb = 25 °C  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values  
Fig 15. Gate charge waveform definitions  
017aaa420  
-4.0  
I
S
(A)  
-3.0  
-2.0  
-1.0  
0
(1)  
(2)  
0
-0.4  
-0.8  
-1.2  
V
(V)  
SD  
VGS = 0 V  
(1) Tamb = 150 °C  
(2) Tamb = 25 °C  
Fig 16. Source current as a function of source-drain voltage; typical values  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
9 of 15  
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
8. Test information  
t
t
1
2
P
duty cycle δ =  
t
2
t
1
t
006aaa812  
Fig 17. Duty cycle definition  
9. Package outline  
2.1  
1.9  
0.65  
max  
1.1  
0.9  
0.04  
max  
0.77  
0.57  
(2×)  
3
1
4
6
0.65  
(4×)  
2.1  
1.9  
0.54  
0.44  
(2×)  
0.35  
0.25  
(6×)  
0.3  
0.2  
Dimensions in mm  
10-05-31  
Fig 18. Package outline SOT1118 (DFN2020-6)  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
10 of 15  
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
10. Soldering  
2.1  
0.65  
0.49  
0.65  
0.49  
0.3 0.4  
(6×) (6×)  
solder lands  
solder paste  
0.875  
1.05 1.15  
(2×) (2×)  
2.25  
solder resist  
0.875  
occupied area  
Dimensions in mm  
0.35  
0.72  
(6×)  
(2×)  
0.45  
0.82  
(6×)  
(2×)  
sot1118_fr  
Fig 19. Reflow soldering footprint for SOT1118 (DFN2020-6)  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
11 of 15  
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
11. Revision history  
Table 8.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
PMDPB55XP v.3  
Modifications:  
20120604  
Product data sheet  
-
PMDPB55XP v.2  
Table 7.: VGSth values updated  
PMDPB55XP v.2  
PMDPB55XP v.1  
20120502  
20120309  
Product data sheet  
Product data sheet  
-
-
PMDPB55XP v.1  
-
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
12 of 15  
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
12. Legal information  
12.1 Data sheet status  
Document status[1] [2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URLhttp://www.nxp.com.  
Right to make changes — NXP Semiconductors reserves the right to make  
12.2 Definitions  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
12.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with theTerms and conditions of commercial sale of NXP Semiconductors.  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
13 of 15  
 
 
 
 
 
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published athttp://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G  
reenChip,HiPerSmart,HITAG,I²C-bus  
logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE  
Ultralight,MoReUse,QLPAK,Silicon  
Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia  
andUCODE — are trademarks of NXP B.V.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
non-automotive qualified products in automotive equipment or applications.  
HD Radio andHD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
13. Contact information  
For more information, please visit:http://www.nxp.com  
For sales office addresses, please send an email to:salesaddresses@nxp.com  
PMDPB55XP  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 4 June 2012  
14 of 15  
 
 
PMDPB55XP  
NXP Semiconductors  
20 V, dual P-channel Trench MOSFET  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Test information. . . . . . . . . . . . . . . . . . . . . . . . .10  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12  
3
4
5
6
7
8
9
10  
11  
12  
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14  
12.1  
12.2  
12.3  
12.4  
13  
Contact information. . . . . . . . . . . . . . . . . . . . . .14  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 4 June 2012  
Document identifier: PMDPB55XP  

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