PRTR5V0U4ADT/R [NXP]
TRANSIENT SUPPRESSOR DIODE ARRAY,UNIDIRECTIONAL,SOT-457;
| 型号： | PRTR5V0U4ADT/R |
| 厂家： | 
NXP |
| 描述： | TRANSIENT SUPPRESSOR DIODE ARRAY,UNIDIRECTIONAL,SOT-457 瞬态抑制器 二极管 光电二极管 局域网 |
| 文件： | 总7页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
Rev. 01 — 17 December 2007
Product data sheet
1. Product profile
1.1 General description
The PRTR5V0U4AD is designed to protect Input/Output (I/O) ports that are sensitive
concerning capacitive load, such as USB 2.0, Ethernet, Digital Video Interface (DVI), etc.
from destruction by ElectroStatic Discharges (ESD). It provides protection to downstream
signal and supply components from ESD voltages as high as ±8 kV (contact discharge).
The PRTR5V0U4AD incorporates four pairs of ultra-low capacitance rail-to-rail diodes
plus an additional Zener diode. The rail-to-rail diodes are connected to the Zener diode
which allows ESD protection to be independent of the availability of a supply voltage.
The PRTR5V0U4AD is fabricated using thin film-on-silicon technology integrating four
ultra-low capacitance rail-to-rail ESD protection diodes in a miniature 6-lead SOT457
package.
1.2 Features
I ESD protection compliant to IEC 61000-4-2 level 4, ±8 kV contact discharge
I Low voltage clamping due to integrated Zener diode
I Four ultra-low input capacitance (1 pF typical) rail-to-rail ESD protection diodes
I Small 6-lead SOT457 package
1.3 Applications
I General-purpose downstream ESD protection of high frequency analog signals and
high-speed serial data transmission for ports inside:
N Cellular mobile handsets
N USB 2.0 and IEEE 1394 ports in PC or notebook
N Interfaces: DVI and High Definition Multimedia Interface (HDMI)
N Cordless telephones
N Wireless data systems: Wide Area Network (WAN) and Local Area Network (LAN)
N Personal Digital Assistants (PDAs)
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
2. Pinning information
Table 1.
Pinning
Pin
1
Description
Simplified outline
Symbol
ESD protection I/O 1
2
supply voltage (VCC)
6
1
5
2
4
3
6
5
4
3
ESD protection I/O 2
ESD protection I/O 3
ground (GND)
4
5
6
ESD protection I/O 4
1
2
3
001aah445
3. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
plastic surface-mounted package (TSOP6); 6 leads
Version
PRTR5V0U4AD TSOP6
SOT457
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VI
input voltage
0
5.5
V
Vesd
electrostatic discharge
voltage
all pins; IEC 61000-4-2 level 4
contact discharge
−8
+8
kV
kV
°C
air discharge
−15
−55
+15
+125
Tstg
storage temperature
5. Recommended operating conditions
Table 4.
Symbol Parameter
Tamb ambient temperature
Operating conditions
Conditions
Min
Typ
Max Unit
+85 °C
−40
-
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
2 of 7
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
6. Characteristics
Table 5.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max Unit
[1]
C(I/O-GND) input/output to ground
capacitance
V(I/O-GND) = 0 V;
-
1.0
-
pF
VCC = 3.0 V;
f = 1 MHz
[1]
[2]
ILR
reverse leakage current
breakdown voltage
V(I/O-GND) = 3.0 V
II = 1 mA
-
-
100
nA
V
VBR
Csup
6
-
-
9
-
supply pin to ground
capacitance
V(I/O-GND) = 0 V;
40
pF
VCC = 3.0 V;
f = 1 MHz
VF
forward voltage
-
0.7
-
V
[1] Measured from pins 1, 3, 4 and 6 to ground (GND).
[2] Measured from pin 2 to ground (GND).
7. Application information
The PRTR5V0U4AD is optimized to protect e.g. two USB 2.0 ports against ESD. Each
device is capable to protect both USB data lines and the VBUS supply.
A typical application is shown in Figure 1.
V
BUS
V
BUS
D+
D−
GND
1
2
3
6
5
4
USB 2.0
IEEE 1394
CONTROLLER
V
BUS
D+
D−
GND
001aah446
Fig 1. Typical application of PRTR5V0U4AD
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
3 of 7
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
8. Package outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
c
1
2
3
L
p
e
b
p
w
M B
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-11-07
06-03-16
SOT457
SC-74
Fig 2. Package outline SOT457 (TSOP6)
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
4 of 7
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
9. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PRTR5V0U4AD_1
20071217
Product data sheet
-
-
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
5 of 7
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
10.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
10.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
11. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
6 of 7
PRTR5V0U4AD
NXP Semiconductors
Integrated quad ultra-low capacitance ESD protection
12. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
3
4
5
6
7
8
9
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Recommended operating conditions. . . . . . . . 2
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Application information. . . . . . . . . . . . . . . . . . . 3
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 4
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 5
10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 6
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 6
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
10.1
10.2
10.3
10.4
11
12
Contact information. . . . . . . . . . . . . . . . . . . . . . 6
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 December 2007
Document identifier: PRTR5V0U4AD_1
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