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PSMN7R0-60YS [NXP]

N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET; N沟道LFPAK 60 V 6.4 mΩ的标准电平MOSFET
PSMN7R0-60YS
型号： PSMN7R0-60YS
厂家： NXP    NXP
描述：

N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET
N沟道LFPAK 60 V 6.4 mΩ的标准电平MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲
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PSMN7R0-60YS  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
Rev. 02 — 30 March 2010  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is  
designed and qualified for use in a wide range of industrial, communications and domestic  
equipment.  
1.2 Features and benefits  
„ Advanced TrenchMOS provides low  
„ Improved mechanical and thermal  
RDSon and low gate charge  
characteristics  
„ High efficiency gains in switching  
„ LFPAK provides maximum power  
power converters  
density in a Power SO8 package  
1.3 Applications  
„ DC-to-DC converters  
„ Lithium-ion battery protection  
„ Load switching  
„ Motor control  
„ Server power supplies  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C  
Min  
Typ  
Max Unit  
VDS  
ID  
-
-
-
-
60  
89  
V
A
drain current  
Tmb = 25 °C; VGS = 10 V;  
see Figure 1  
Ptot  
total power  
dissipation  
Tmb = 25 °C; see Figure 2  
-
-
-
117  
175  
W
Tj  
junction temperature  
-55  
°C  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
drain-source  
VGS = 10 V; Tj(init) = 25 °C;  
ID = 89.1 A; Vsup ≤ 60 V;  
RGS = 50 Ω; unclamped  
-
-
143  
mJ  
avalanche energy  
Dynamic characteristics  
QGD  
gate-drain charge  
total gate charge  
VGS = 10 V; ID = 60 A;  
VDS = 30 V; see Figure 14  
and 15  
-
-
9.6  
45  
-
-
nC  
nC  
QG(tot)  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
Table 1.  
Quick reference …continued  
Symbol Parameter  
Static characteristics  
Conditions  
Min  
Typ  
Max Unit  
RDSon  
drain-source  
on-state resistance  
VGS = 10 V; ID = 15 A;  
Tj = 100 °C; see Figure 12  
-
-
-
10.2 mΩ  
VGS = 10 V; ID = 15 A;  
4.95 6.4  
mΩ  
Tj = 25 °C; see Figure 13  
2. Pinning information  
Table 2.  
Pinning information  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
S
S
S
G
D
source  
source  
source  
gate  
mb  
D
2
3
G
4
mbb076  
S
mb  
mounting base; connected to  
drain  
1
2 3 4  
SOT669 (LFPAK)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN7R0-60YS LFPAK  
plastic single-ended surface-mounted package (LFPAK); 4 leads  
SOT669  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
2 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
60  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ  
-
VDGR  
VGS  
-
60  
V
-20  
20  
V
ID  
VGS = 10 V; Tmb = 100 °C; see Figure 1  
VGS = 10 V; Tmb = 25 °C; see Figure 1  
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3  
-
63  
A
-
89  
A
IDM  
peak drain current  
-
356  
117  
175  
175  
260  
A
Ptot  
Tstg  
Tj  
total power dissipation Tmb = 25 °C; see Figure 2  
storage temperature  
-
W
°C  
°C  
°C  
-55  
-55  
-
junction temperature  
Tsld(M)  
peak soldering  
temperature  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
89  
A
A
ISM  
tp ≤ 10 µs; pulsed; Tmb = 25 °C  
356  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
VGS = 10 V; Tj(init) = 25 °C; ID = 89.1 A; Vsup ≤ 60 V;  
-
143  
mJ  
drain-source avalanche RGS = 50 Ω; unclamped  
energy  
03aa16  
003aae053  
120  
100  
I
D
(A)  
P
der  
(%)  
80  
80  
60  
40  
20  
0
40  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
( C)  
T
°
T
mb  
(°C)  
mb  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
3 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
003aae054  
103  
I
D
(A)  
Limit R  
DSon  
= V / I  
DS D  
102  
10  
1
t =10  
s
μ
p
100  
s
μ
DC  
1 ms  
10 ms  
100 ms  
10-1  
10-1  
1
10  
102  
103  
V
(V)  
DS  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
4 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from junction to  
mounting base  
see Figure 4  
-
0.54  
1.28  
K/W  
003aae093  
1
Z
th  
(K/W)  
δ
= 0.5  
10-1  
10-2  
10-3  
0.2  
0.1  
0.05  
0.02  
tp  
δ =  
P
T
single shot  
t
tp  
T
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical  
values  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
5 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
54  
60  
2
-
-
V
V
V
-
-
VGS(th)  
VGSth  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10  
voltage  
3
4
and 11  
ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11  
ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 11  
VDS = 60 V; VGS = 0 V; Tj = 25 °C  
VDS = 60 V; VGS = 0 V; Tj = 125 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
VGS = 10 V; ID = 15 A; Tj = 175 °C; see Figure 12  
VGS = 10 V; ID = 15 A; Tj = 100 °C; see Figure 12  
VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 13  
f = 1 MHz  
-
1
-
-
-
-
-
-
-
-
-
4.7  
-
V
-
V
IDSS  
drain leakage current  
gate leakage current  
0.04  
-
2
µA  
µA  
nA  
nA  
mΩ  
mΩ  
mΩ  
Ω
100  
100  
100  
14.7  
10.2  
6.4  
1.5  
IGSS  
2
2
RDSon  
drain-source on-state  
resistance  
9.3  
-
4.95  
0.65  
RG  
gate resistance  
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 60 A; VDS = 30 V; VGS = 10 V; see Figure 14  
and 15  
-
45  
-
nC  
ID = 0 A; VDS = 0 V; VGS = 10 V  
-
-
-
37.6  
14.8  
7.9  
-
-
-
nC  
nC  
nC  
QGS  
gate-source charge  
ID = 60 A; VDS = 30 V; VGS = 10 V; see Figure 14  
QGS(th)  
pre-threshold  
gate-source charge  
QGS(th-pl)  
QGD  
post-threshold  
gate-source charge  
-
-
-
6.8  
9.6  
4.9  
-
-
-
nC  
nC  
V
gate-drain charge  
ID = 60 A; VDS = 30 V; VGS = 10 V; see Figure 14  
and 15  
VGS(pl)  
gate-source plateau  
voltage  
VDS = 30 V; see Figure 14 and 15  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 30 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C;  
see Figure 16  
-
-
-
2712  
366  
-
-
-
pF  
pF  
pF  
reverse transfer  
capacitance  
202  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 30 V; RL = 0.5 Ω; VGS = 10 V;  
RG(ext) = 4.7 Ω  
-
-
-
-
19.9  
20.3  
37.9  
12.6  
-
-
-
-
ns  
ns  
ns  
ns  
turn-off delay time  
fall time  
Source-drain diode  
VSD  
trr  
source-drain voltage  
IS = 15 A; VGS = 0 V; Tj = 25 °C; see Figure 17  
-
-
-
0.8  
1.2  
V
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
VDS = 30 V  
41.9  
57.3  
-
-
ns  
nC  
Qr  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
6 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
003aae058  
003aae057  
100  
80  
g
(S)  
fs  
I
D
(A)  
80  
60  
60  
40  
20  
0
40  
20  
T = 175 C  
T = 25 C  
°
°
j
j
0
0
20  
40  
60  
80  
0
2
4
6
I
(A)  
V
(V)  
D
GS  
Fig 5. Forward transconductance as a function of  
drain current; typical values  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
003aae059  
003aae062  
5000  
20  
C
(pF)  
R
(mΩ)  
DSon  
4000  
C
15  
iss  
3000  
10  
5
C
rss  
2000  
1000  
0
0
0
2.5  
5
7.5  
10  
0
5
10  
15  
20  
V
(V)  
GS  
V
(V)  
GS  
Fig 7. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
Fig 8. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
7 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
03aa35  
003aae056  
−1  
10  
100  
I
I
D
D
10 6.5 6 5.5  
(A)  
(A)  
min  
typ  
max  
5
−2  
−3  
−4  
−5  
−6  
10  
10  
10  
10  
10  
80  
60  
40  
20  
0
4.8  
4.6  
V
(V) = 4.5  
GS  
0
2
4
6
0
0.5  
1
1.5  
2
V
(V)  
DS  
V
GS  
(V)  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 9. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
003aad280  
003aad696  
5
2.4  
V
GS(th)  
(V)  
a
2
4
3
2
1
0
max  
1.6  
1.2  
0.8  
0.4  
0
typ  
min  
−60  
0
60  
120  
180  
-60  
0
60  
120  
180  
T ( C)  
°
T (°C)  
j
j
Fig 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
Fig 11. Gate-source threshold voltage as a function of  
junction temperature  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
8 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
003aae061  
10  
V
(V) = 5  
V
DS  
R
GS  
DSon  
(mΩ)  
9
8
7
6
5
4
I
D
V
GS(pl)  
5.5  
V
GS(th)  
6
V
GS  
Q
GS1  
Q
GS2  
6.5  
Q
GS  
Q
GD  
8
Q
G(tot)  
10  
003aaa508  
0
20  
40  
60  
80  
100  
I
(A)  
D
Fig 13. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 14. Gate charge waveform definitions  
003aae063  
003aae060  
10  
104  
V
GS  
(V)  
48V  
8
C
(pF)  
C
is s  
V
= 30V  
DS  
12V  
6
4
2
0
103  
C
oss  
C
rs s  
102  
10-1  
0
20  
40  
60  
1
10  
102  
Q
(nC)  
V
(V)  
G
DS  
Fig 15. Gate-source voltage as a function of gate  
charge; typical values  
Fig 16. Drain-source on-state resistance as a function  
of drain current; typical values  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
9 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
003aae064  
80  
60  
40  
20  
0
I
S
(A)  
T = 175  
j
C
T = 25 C  
°
j
°
0
0.3  
0.6  
0.9  
1.2  
V
(V)  
SD  
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
10 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
7. Package outline  
Plastic single-ended surface-mounted package (LFPAK); 4 leads  
SOT669  
A
2
E
A
C
c
E
b
b
2
1
2
L
3
1
mounting  
base  
b
4
D
1
D
H
L
2
1
2
3
4
X
e
w
M
c
A
b
1/2 e  
A
(A )  
3
C
A
1
θ
L
detail X  
y
C
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
D
(1)  
D
(1)  
(1)  
1
A
A
A
H
L
L
L
2
w
y
θ
UNIT  
A
b
b
b
b
c
c
E
E
1
e
1
2
3
1
2
3
4
2
max  
1.20 0.15 1.10  
1.01 0.00 0.95  
0.50 4.41 2.2 0.9 0.25 0.30 4.10  
0.35 3.62 2.0 0.7 0.19 0.24 3.80  
5.0 3.3  
4.8 3.1  
6.2 0.85 1.3 1.3  
5.8 0.40 0.8 0.8  
8°  
0°  
mm  
0.25  
4.20  
1.27  
0.25 0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
04-10-13  
06-03-16  
SOT669  
MO-235  
Fig 18. Package outline SOT669 (LFPAK)  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
11 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
PSMN7R0-60YS_2  
Modifications:  
20100330  
Product data sheet  
-
PSMN7R0-60YS_1  
• Status changed from objective to product.  
• Various changes to content.  
PSMN7R0-60YS_1  
20100112  
Objective data sheet  
-
-
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
12 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
9. Legal information  
9.1 Data sheet status  
Document status [1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Suitability for use — NXP Semiconductors products are not designed,  
9.2 Definitions  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on a weakness or default in the  
customer application/use or the application/use of customer’s third party  
customer(s) (hereinafter both referred to as “Application”). It is customer’s  
sole responsibility to check whether the NXP Semiconductors product is  
suitable and fit for the Application planned. Customer has to do all necessary  
testing for the Application in order to avoid a default of the Application and the  
product. NXP Semiconductors does not accept any liability in this respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
9.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
13 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
9.4 Trademarks  
non-automotive qualified products in automotive equipment or applications.  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
TrenchMOS — is a trademark of NXP B.V.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
PSMN7R0-60YS_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 30 March 2010  
14 of 15  
PSMN7R0-60YS  
NXP Semiconductors  
N-channel LFPAK 60 V 6.4 mΩ standard level MOSFET  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .14  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2010.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 30 March 2010  
Document identifier: PSMN7R0-60YS_2  

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