TDA8579T/N1,112 [NXP]

TDA8579T - Dual common-mode rejection differential line receiver SOIC 8-Pin;
TDA8579T/N1,112
型号: TDA8579T/N1,112
厂家: NXP    NXP
描述:

TDA8579T - Dual common-mode rejection differential line receiver SOIC 8-Pin

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TDA8579T  
Dual common-mode rejection differential line receiver  
Rev. 4 — 23 September 2013  
Product data sheet  
1. General description  
The TDA8579T is a two channel differential amplifier with 0 dB gain and low distortion.  
The device has been primarily developed for car radio applications where long  
connections between signal sources and amplifiers (or boosters) are necessary and  
where ground noise has to be eliminated. The device is intended to be used to receive line  
inputs in audio applications that require a high level of common-mode rejection. The  
device is contained in an 8-pin Small Outline (SO) package.  
2. Features and benefits  
Excellent common-mode rejection, up to high frequencies  
Elimination of source resistance dependency in the common-mode rejection  
Few external components  
High supply voltage ripple rejection  
Low noise  
Low distortion  
All pins protected against electrostatic discharge  
AC and DC short-circuit safe to ground and VCC  
Fast DC settling  
3. Quick reference data  
Table 1.  
Symbol  
VCC  
Quick reference data  
Parameter  
Conditions  
Min  
5.0  
-
Typ Max Unit  
supply voltage  
8.5 18  
V
ICC  
supply current  
VCC = 8.5 V  
11  
0
14  
mA  
GV  
voltage gain  
0.5  
55  
-
+0.5 dB  
SVRR  
Vno  
supply voltage ripple rejection  
noise output voltage  
input impedance  
60  
-
dB  
V  
k  
dB  
3.7 5.0  
|Zi|  
100  
-
240  
80  
-
-
CMRR  
common-mode rejection ratio  
Rs = 0   
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
4. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
SO8  
Description  
plastic small outline package; 8 leads; body width 3.9 mm  
Version  
TDA8579T  
SOT96-1  
5. Block diagram  
V
CC  
8
1
2
3
7
4
6
INL+  
IN-  
OUTL  
SVRR  
V
CC  
TDA8579T  
OUTR  
INR+  
5
GND  
aaa-008045  
Fig 1. Block diagram  
6. Pinning information  
6.1 Pinning  
1
2
3
4
8
INL+  
VCC  
7
6
5
IN-  
OUTL  
OUTR  
GND  
TDA8579T  
INR+  
SVRR  
aaa-008040  
Fig 2. Pin configuration  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
2 of 16  
 
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
6.2 Pin description  
Table 3.  
Symbol  
INL+  
Pin description  
Pin Description  
1
2
3
4
5
6
7
8
positive input left  
common negative input  
IN  
INR+  
SVRR  
GND  
positive input right  
half supply voltage  
ground  
OUTR  
OUTL  
Vcc  
output right  
output left  
supply voltage  
7. Functional description  
The TDA8579T contains two identical differential amplifiers with a voltage gain of 0 dB.  
The device is intended to receive line input signals for audio applications. The TDA8579T  
has a very high level of common-mode rejection and thus eliminates ground noise. The  
common-mode rejection remains constant up to high frequencies (the amplifier gain is  
fixed at 0 dB). The inputs have a high input impedance. The output stage is a class AB  
stage with a low output impedance. For a large common-mode rejection, also at low  
frequencies, an electrolytic capacitor connected to the negative input is advised. Because  
the input impedance is relatively high, this results in a large settling time of the DC input  
voltage. Therefore a quick-charge circuit is included to charge the input capacitor within  
0.2 seconds.  
All input and output pins are protected against high electrostatic discharge conditions  
(4000 V, 150 pF, 150 ).  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
3 of 16  
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
8. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages and currents  
are referenced to GND unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Max  
18  
Unit  
V
VCC  
IORM  
Vsc  
supply voltage  
-
repetitive peak output current  
AC and DC short-circuit safe voltage  
storage temperature  
-
40  
mA  
V
-
18  
Tstg  
Tamb  
Tj  
55  
40  
-
+150  
+85  
150  
C  
C  
C  
ambient temperature  
maximum junction temperature  
9. Thermal characteristics  
Table 5.  
Thermal characteristics  
According to IEC 60747-1.  
Symbol Parameter  
Conditions  
Value  
160  
Unit  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient in free air  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
4 of 16  
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
10. Characteristics  
Table 6.  
Electrical characteristics  
VCC = 8.5 V; Tamb = 25 C; test circuit (see Figure 3); unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ  
8.5  
11  
4.3  
0.2  
0
Max Unit  
VCC  
supply voltage  
5.0  
18  
14  
-
V
ICC  
VO  
supply current  
-
mA  
V
[1]  
[2]  
[3]  
output voltage  
-
tset  
DC input voltage settling time  
voltage gain  
-
-
s
Gv  
0.5  
+0.5 dB  
cs  
|Gv|  
fL  
channel separation  
channel unbalance  
LOW frequency roll-off  
HIGH frequency roll-off  
input impedance  
Rs = 5 k  
70  
80  
-
-
dB  
dB  
Hz  
kHz  
k  
-
0.5  
-
1 dB  
1 dB  
20  
-
fH  
20  
-
-
|Zi|  
100  
240  
-
-
|Zo|  
Vi(max)  
Vno  
output impedance  
maximum input voltage  
noise output voltage  
-
-
-
-
10  
-
THD = 1 %  
2.0  
3.7  
-
V
Rs = 0   
5.0  
1.0  
V  
V
VCM(rms) common-mode input voltage  
(RMS value)  
CMRR common-mode rejection ratio  
Rs = 5 k  
Rs = 0   
66  
-
70  
80  
65  
60  
0.02  
-
-
dB  
dB  
dB  
dB  
%
[4]  
[5]  
[6]  
-
SVRR  
THD  
supply voltage ripple rejection  
total harmonic distortion  
55  
-
-
-
Vi = 1 V;  
-
-
Vi = 1 V;  
-
0.1  
%
f = 20 Hz to 20 kHz  
THDmax total harmonic distortion at  
maximum output current  
Vi = 1 V; RL = 150   
-
-
1
%
[1] The DC output voltage with respect to ground is approximately 0.5VCC  
.
[2] The input coupling capacitors set the frequency response externally.  
[3] The noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz (unweighted).  
[4] The common-mode rejection ratio is measured at the output with a voltage source 1 V (RMS) in  
accordance with the test circuit (see Figure 3). VINL and VINR are short-circuited. Frequencies are between  
100 Hz and 100 kHz.  
[5] The ripple rejection is measured at the output, with Rs = 2 k, f = 1 kHz and a ripple amplitude of 2 V (p-p).  
[6] The ripple rejection is measured at the output. Rs = 0 to 2 k, f = 100 Hz to 20 kHz and a maximum  
ripple amplitude of 2 V (p-p).  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
5 of 16  
 
 
 
 
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
11. Application information  
V
CC  
100 nF  
R
s
220 nF  
5 kΩ  
8
1
2
2.2 μF  
47 μF  
2.2 μF  
7
4
6
+
-
OUTL  
V
CC  
V
INL  
TDA8579T  
C2  
SVRR  
V
V
INR  
CM  
-
+
R
s
OUTR  
220 nF  
5 kΩ  
3
R
R
L
L
5
10 kΩ  
10 kΩ  
aaa-007782  
C2 = nominal 22 F  
Fig 3. Test and application circuit  
mbd215  
-1  
10  
THD  
(%)  
-2  
10  
-3  
10  
2
3
4
5
10  
10  
10  
10  
10  
f (Hz)  
Fig 4. Total harmonic distortion as a function of frequency; Vi = 1 V (RMS)  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
6 of 16  
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
mbd216  
0
CMR  
(dB)  
-20  
-40  
-60  
-80  
(1)  
(2)  
(3)  
-100  
10  
2
3
4
5
10  
10  
10  
10  
f (Hz)  
(1) Rs = 5 k  
(2) Rs = 2 k  
(3) Rs = 0 k  
Fig 5. Common-mode rejection ratio as a function of frequency; VCM = 1 V (RMS)  
mbd213  
1
THD  
(%)  
-1  
10  
-2  
10  
-3  
10  
2
3
4
10  
10  
10  
10  
V
(mV)  
i(rms)  
Fig 6. Total harmonic distortion as a function of input voltage; f = 1 kHz  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
7 of 16  
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
mbd214  
-40  
CMR  
(dB)  
-50  
-60  
-70  
-80  
-90  
100  
300  
500  
700  
900  
1100  
1300  
V
(mV)  
CM(rms)  
Fig 7. Common-mode rejection ratio as a function of common-mode input voltage; f = 1 kHz, Rs = 0  
mbd211  
0
CMR  
(dB)  
-20  
-40  
(1)  
(2)  
(3)  
-60  
-80  
-100  
2
3
4
5
10  
10  
10  
10  
10  
f (Hz)  
(1) C2 = 22 F  
(2) C2 = 47 F  
(3) C2 = 100 F  
Fig 8. Common-mode rejection ratio as a function of frequency; VCM = 1 V (RMS)  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
8 of 16  
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
mbd212  
-30  
SVR  
(dB)  
-40  
-50  
-60  
-70  
10  
2
3
4
10  
10  
10  
f (Hz)  
Fig 9. Supply voltage ripple rejection as a function of frequency; Vripple = 2 V (p-p), Rs = 2 k  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
9 of 16  
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
12. Package outline  
SO8: plastic small outline package; 8 leads; body width 3.9 mm  
SOT96-1  
D
E
A
X
v
c
y
H
M
A
E
Z
5
8
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
4
e
w
M
detail X  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
5.0  
4.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.20  
0.014 0.0075 0.19  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches 0.069  
0.01 0.004  
Notes  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT96-1  
076E03  
MS-012  
Fig 10. Package outline SOT96-1 (SO8)  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
10 of 16  
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
13. Handling information  
All input and output pins are protected against ElectroStatic Discharge (ESD) under  
normal handling. When handling ensure that the appropriate precautions are taken as  
described in JESD625-A or equivalent standards.  
14. Soldering of SMD packages  
This text provides a very brief insight into a complex technology. A more in-depth account  
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow  
soldering description”.  
14.1 Introduction to soldering  
Soldering is one of the most common methods through which packages are attached to  
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both  
the mechanical and the electrical connection. There is no single soldering method that is  
ideal for all IC packages. Wave soldering is often preferred when through-hole and  
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not  
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high  
densities that come with increased miniaturization.  
14.2 Wave and reflow soldering  
Wave soldering is a joining technology in which the joints are made by solder coming from  
a standing wave of liquid solder. The wave soldering process is suitable for the following:  
Through-hole components  
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board  
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless  
packages which have solder lands underneath the body, cannot be wave soldered. Also,  
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,  
due to an increased probability of bridging.  
The reflow soldering process involves applying solder paste to a board, followed by  
component placement and exposure to a temperature profile. Leaded packages,  
packages with solder balls, and leadless packages are all reflow solderable.  
Key characteristics in both wave and reflow soldering are:  
Board specifications, including the board finish, solder masks and vias  
Package footprints, including solder thieves and orientation  
The moisture sensitivity level of the packages  
Package placement  
Inspection and repair  
Lead-free soldering versus SnPb soldering  
14.3 Wave soldering  
Key characteristics in wave soldering are:  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
11 of 16  
 
 
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
Process issues, such as application of adhesive and flux, clinching of leads, board  
transport, the solder wave parameters, and the time during which components are  
exposed to the wave  
Solder bath specifications, including temperature and impurities  
14.4 Reflow soldering  
Key characteristics in reflow soldering are:  
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to  
higher minimum peak temperatures (see Figure 11) than a SnPb process, thus  
reducing the process window  
Solder paste printing issues including smearing, release, and adjusting the process  
window for a mix of large and small components on one board  
Reflow temperature profile; this profile includes preheat, reflow (in which the board is  
heated to the peak temperature) and cooling down. It is imperative that the peak  
temperature is high enough for the solder to make reliable solder joints (a solder paste  
characteristic). In addition, the peak temperature must be low enough that the  
packages and/or boards are not damaged. The peak temperature of the package  
depends on package thickness and volume and is classified in accordance with  
Table 7 and 8  
Table 7.  
SnPb eutectic process (from J-STD-020D)  
Package thickness (mm) Package reflow temperature (C)  
Volume (mm3)  
< 350  
350  
220  
< 2.5  
235  
220  
2.5  
220  
Table 8.  
Lead-free process (from J-STD-020D)  
Package thickness (mm) Package reflow temperature (C)  
Volume (mm3)  
< 350  
260  
350 to 2000  
> 2000  
260  
< 1.6  
260  
250  
245  
1.6 to 2.5  
> 2.5  
260  
245  
250  
245  
Moisture sensitivity precautions, as indicated on the packing, must be respected at all  
times.  
Studies have shown that small packages reach higher temperatures during reflow  
soldering, see Figure 11.  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
12 of 16  
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
maximum peak temperature  
= MSL limit, damage level  
temperature  
minimum peak temperature  
= minimum soldering temperature  
peak  
temperature  
time  
001aac844  
MSL: Moisture Sensitivity Level  
Fig 11. Temperature profiles for large and small components  
For further information on temperature profiles, refer to Application Note AN10365  
“Surface mount reflow soldering description”.  
15. Revision history  
Table 9.  
Revision history  
Document ID  
TDA8579T v.4  
Modifications:  
TDA8579T v.3  
Modifications:  
Release date  
Data sheet status  
Change notice  
Supersedes  
20130923  
Product data sheet  
-
TDA8579 v.3  
Security status changed from company confidential to company public.  
20130606 Product data sheet  
-
TDA8579 v.2  
The format of this document has been redesigned to comply with the new identity guidelines of  
NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
TDA8579 v.2  
TDA8579 v.1  
19951215  
Product data sheet  
-
TDA8579 v.1  
19940125  
Product data sheet  
-
-
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
13 of 16  
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use — NXP Semiconductors products are not designed,  
16.2 Definitions  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
16.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
14 of 16  
 
 
 
 
 
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
17. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
TDA8579T  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 23 September 2013  
15 of 16  
 
 
TDA8579T  
NXP Semiconductors  
Dual common-mode rejection differential line receiver  
18. Contents  
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Thermal characteristics . . . . . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Application information. . . . . . . . . . . . . . . . . . . 6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10  
Handling information. . . . . . . . . . . . . . . . . . . . 11  
8
9
10  
11  
12  
13  
14  
Soldering of SMD packages . . . . . . . . . . . . . . 11  
Introduction to soldering . . . . . . . . . . . . . . . . . 11  
Wave and reflow soldering . . . . . . . . . . . . . . . 11  
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 11  
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 12  
14.1  
14.2  
14.3  
14.4  
15  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2013.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 23 September 2013  
Document identifier: TDA8579T  
 

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