TDA8716T [NXP]
8-bit high-speed analog-to-digital converter; 8位高速模拟数字转换器![TDA8716T](http://pdffile.icpdf.com/pdf1/p00079/img/icpdf/TDA8716_417852_icpdf.jpg)
型号: | TDA8716T |
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描述: | 8-bit high-speed analog-to-digital converter |
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INTEGRATED CIRCUITS
DATA SHEET
TDA8716
8-bit high-speed analog-to-digital
converter
1996 Aug 26
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital
converter
TDA8716
FEATURES
GENERAL DESCRIPTION
• 8-bit resolution
The TDA8716 is an 8-bit high-speed Analog-to-Digital
Converter (ADC) designed for HDTV and professional
applications. The device converts the analog input signal
into 8-bit binary coded digital words at a sampling rate of
120 MHz. All digital outputs are ECL compatible.
• Sampling rate up to 120 MHz
• ECL (10 K family) compatible digital inputs and outputs
• Overflow/Underflow output
• Low power dissipation
• Low input capacitance (13 pF typ.).
APPLICATIONS
• High speed analog-to-digital convertion
• Video signal digitizing
• Radar pulse analysis
• Transient signal analysis
• High energy physics research
• Medical systems
• Industrial instrumentation.
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS
VEEA analog supply voltage
MIN.
TYP.
−5.2
MAX.
UNIT
−5.45
−4.95
−4.95
55
V
VEED
IEEA
IEED
IEEO
VRB
VRT
ILE
digital supply voltage
analog supply current
digital supply current
output supply current
reference voltage BOTTOM
reference voltage TOP
DC integral linearity error
DC differential linearity error
effective bit
−5.45
−5.2
50
V
−
−
−
−
−
−
−
−
mA
mA
mA
V
100
110
25
RL = 2.2 kΩ
20
−3.130
−1.870
±0.5
±0.25
7
−
−
V
see Fig.8
see Fig.9
±1
LSB
LSB
bits
DLE
EB
±0.45
−
fi = 20 MHz;
fCLK = 100 MHz
fCLK
Ptot
maximum clock frequency
total power dissipation
120
−
−
MHz
mW
excluding load
−
780
900
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
DESCRIPTION
plastic dual in-line package; 24 leads (600 mil)
plastic small outline package; 32 leads; body width 7.5 mm
NAME
VERSION
SOT101-1
SOT287-1
TDA8716
DIP24
TDA8716T
SO32L
1996 Aug 26
2
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
BLOCK DIAGRAM
analog input
8
voltage
reference top
10
9
7
analog ground
LSB ANALOG
PROCESSING
11
voltage
reference middle
MSB ANALOG
PROCESSING
6
voltage
reference bottom
folding and interpolation
5
analog negative
supply voltage
(– 5.2 V)
SAMPLE LATCHES
DIGITAL PROCESSING
LATCHES
1
2
CLK input
CLKinput
13
24
CLOCK
BUFFER
digital ground
digital negative
supply voltage
(– 5.2 V)
3
12
LSB BINARY
ENCODER
MSB BINARY
ENCODER
4
two's complement
output select
6
3
OUTPUT LATCHES
TDA8716
19
output ground
supply voltage
(0 V)
ECL BUFFERS
14 15 16 17 18 20 21 22 23
MCD265 - 2
digital outputs
D0 to D7
IN range
Fig.1 Block diagram; TDA8716.
3
1996 Aug 26
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
PINNING TDA8716
SYMBOL PIN
DESCRIPTION
complementary clock input
clock input
CLK
1
2
3
CLK
VEED1
digital negative supply voltage
(−5.2 V)
CPLT2
VEEA
4
5
two's complement output select
(active HIGH)
handbook, halfpage
1
2
24 DGND2
23 IR
analog negative supply voltage
(−5.2 V)
CLK
CLK
VRB
6
7
8
9
reference voltage BOTTOM
analog ground 1
V
3
22 D7
EED1
AGND1
VI
C
4
21 D6
PLT2
analog input
V
20
5
D5
EEA
VRM
reference voltage MIDDLE
decoupling
V
6
19 OGND
18 D4
RB
TDA8716
VRT
10 reference voltage TOP
11 analog ground 2
AGND1
7
AGND2
VEED2
V
I
8
17 D3
12 digital negative supply voltage
V
9
16 D2
RM
(−5.2 V)
V
10
15
D1
DGND1
D0
13 digital ground 1
14 digital output (LSB)
15 digital output
RT
AGND2 11
14 D0
D1
V
12
13 DGND1
EED2
D2
16 digital output
MCD259
D3
17 digital output
D4
18 digital output
OGND
D5
19 output ground supply voltage (0 V)
20 digital output
D6
21 digital output
D7
22 digital output (MSB)
23 IN range
IR
Fig.2 Pin configuration; TDA8716.
DGND2
24 digital ground 2
1996 Aug 26
4
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
PINNING TDA8716T
SYMBOL PIN
DESCRIPTION
complementary clock input
clock input
CLK
1
2
3
CLK
VEED1
digital negative supply voltage
(−5.2 V)
n.c.
4
5
6
not connected
not connected
n.c.
CPLT2
two's complement output select
(active HIGH)
handbook, halfpage
VEEA
7
analog negative supply voltage
1
2
CLK
CLK
32 DGND2
31 IR
(−5.2 V)
VRB
8
9
reference voltage BOTTOM
analog ground 1
V
3
30
D7
EED1
AGND1
VI
10 analog input
4
29 n.c.
28 n.c.
27 D6
n.c.
n.c.
VRM
11 reference voltage MIDDLE
decoupling
5
C
6
PLT2
n.c.
12 not connected
V
7
26
D5
EEA
n.c.
13 not connected
V
8
25 OGND
24 D4
RB
VRT
14 reference voltage TOP
15 analog ground 2
TDA8716T
AGND1
9
AGND2
VEED2
16 digital negative supply voltage
V
I
D3
22 D2
10
11
12
23
(−5.2 V)
V
RM
DGND1
D0
17 digital ground 1
18 digital output (LSB)
19 digital output
21
20
19
18
n.c.
n.c.
n.c.
n.c.
D1
13
14
15
16
D1
V
RT
n.c.
n.c.
D2
20 not connected
21 not connected
22 digital output
AGND2
D0
V
17 DGND1
EED2
D3
23 digital output
MBC742 - 2
D4
24 digital output
OGND
D5
25 output ground supply voltage (0 V)
26 digital output
D6
27 digital output
n.c.
n.c.
D7
28 not connected
29 not connected
30 digital output (MSB)
31 IN range
IR
Fig.3 Pin configuration; TDA8716T.
DGND2
32 digital ground 2
1996 Aug 26
5
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VEEA
VEED1,VEED2
PARAMETER
analog supply voltage
CONDITIONS
MIN.
−7.0
MAX.
+0.3
UNIT
V
V
V
digital supply voltage
−7.0
−1
+0.3
+1
VEEA − VEED1
EEA − VEED2
;
supply voltage differences
V
VI
input voltage
referenced to
AGND
VEEA
0
V
V
VCLK; CLK(p-p)
input voltage for differential clock drive
(peak-to-peak value)
note 1
−
2.0
IO
output current (each output stage)
storage temperature
−
10
mA
°C
°C
°C
Tstg
Tamb
Tj
−55
0
+150
+70
+150
operating ambient temperature
junction temperature
−
Note
1. The circuit has two clock inputs: CLK and CLK. Sampling takes place on the rising edge of the clock input signal:
CLK and CLK are two's complementary ECL signals.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
from junction to ambient
CONDITIONS
in free air
VALUE
UNIT
SOT101
35
65
K/W
K/W
SOT287 (see Fig.4)
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
1996 Aug 26
6
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
CHARACTERISTICS
VEEA = −4.95 to −5.45 V; VEED1, VEED2 = −4.95 to −5.45 V; AGND, DGND and OGND shorted together;
Tamb = 0 to +70 °C; unless otherwise specified. (Typical values taken at VEEA = −5.2 V; VEED1, VEED2 = −5.2 V;
Tamb = 25 °C).
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VEEA
analog supply voltage
−5.45
−5.2
−4.95
V
V
VEED1,VEED2 digital supply voltage
−5.45
−5.2
50
−4.95
55
IEEA
analog supply current
digital supply current
output supply current
supply voltage differential
−
−
−
mA
mA
mA
V
IEED1,IEED2
IEE
100
20
110
25
RL = 2.2 kΩ
Vdiff
V
EEA − VEED1; VEEA − VEED2 −0.5
0
+0.5
Reference voltages for the resistor ladder
VRB
VRT
Vref
reference voltage BOTTOM
reference voltage TOP
reference voltage differential
voltage offset BOTTOM
voltage offset TOP
−3.5
−3.13
−1.87
1.26
130
−
V
−
−1.5
−
V
V
RT − VRB
−
V
VOB
VOT
VI(p-p)
note 1
note 1
−
−
mV
mV
V
−
130
−
input voltage amplitude
(peak-to-peak value)
0.95
1.0
1.5
Iref
reference current
resistor ladder
−
−
−
15
−
−
−
mA
Ω
RLAD
TCRL
85
temperature coefficient of the
resistor ladder
0.18
Ω/K
Inputs
CLK and CLK input
VIL
LOW level input voltage
−1850
−1770
−880
1
−1650
mV
mV
µA
µA
kΩ
pF
VIH
IIL
HIGH level input voltage
LOW level input current
HIGH level input current
input resistance
−960
−810
VCLK = −1.77 V
VCLK = −0.88 V
−
−
−
−
−
−
−
−
−
−
IIH
10
RI
20
CI
input capacitance
2
VCLK(p-p)
differential clock input
900
mV
V
CLK − VCLK
(peak-to-peak value)
Analog input; note 2
IIB
IIT
RI
CI
input current BOTTOM
VRB = −3.13 V
VRT = −1.87 V
−
−
−
−
0
−
µA
µA
kΩ
pF
input current TOP
input resistance
input capacitance
170
7
−
−
13
20
1996 Aug 26
7
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Outputs (RL = 2.2 kΩ)
Digital 10K ECL outputs (D0 to D7; IR)
VOL
VOH
IOL
LOW level output voltage
HIGH level output voltage
LOW level output current
HIGH level output current
−1850
−1770
−880
1.8
−1600
−810
4.0
mV
−960
mV
mA
mA
−
−
IOH
2.0
4.0
Timing (fCLK = 100 MHz; RL = 2.2 kΩ; see Fig.5)
tds
tHD
td
sampling delay
output hold time
output delay time
−
1
3
ns
ns
4
−
−
note 3
CL = 3.3 pF
CL = 7.5 pF
−
−
−
−
7.5
9
ns
ns
ps
−
taj
aperture jitter
15
−
Switching characteristics
fCLK; fCLK
maximum clock frequency
120
−
−
MHz
Analog signal processing (fCLK = 100 MHz)
Gdiff
differential gain
note 4
note 4
−
−
0.3
0.4
−
−
%
φdiff
differential phase
°C
Harmonics (full scale); fi = 10 MHz; fCLK = 100 MHz
f1
f2
f3
fundamental
−
−
−
0
−
−
−
dB
dB
dB
even harmonics
odd harmonics
−60
−50
Transfer function
ILE
DC integral linearity error
−
−
−
±0.5
±0.25
±1
±1
LSB
LSB
LSB
DLE
AILE
EB
DC differential linearity error
AC integral linearity error
effective bits
±0.45
±1.5
note 4
Figs 13 and 14; note 5;
fCLK = 100 MHz
fi = 4.43 MHz
fi = 10 MHz
fi = 20 MHz
fi = 30 MHz
bit error rate
see Fig.10
see Fig.11
see Fig.12
−
−
−
−
−
7.7
−
−
−
−
−
bits
bits
bits
bits
7.5
7.0
6.5
10−11
BER
fCLK = 100 MHz;
times/
fi = 10 MHz; Vi = ±8 LSB at
code 128; 50% clock duty
factor
samples
1996 Aug 26
8
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
Notes
1. Voltage offset BOTTOM (VOB) is the difference between the analog input which produces data outputs equal to 00
and the reference voltage BOTTOM (VRB), at Tamb = 25 °C. Voltage offset TOP (VOT) is the difference between
reference voltage TOP (VRT) and the analog input which produces data outputs equal to FF, at Tamb = 25 °C.
2. The analog input is not internally biased. It should be externally biased between VRB and VRT levels.
3. The TDA8716 can only withstand one or two 10K or 100K ECL loads in order to work-out timings at the maximum
sampling frequency. It is therefore recommended to minimize the printed-circuit board load by implementing the load
device as close as possible to the TDA8716.
4. Full-scale sinewave; fi = 4.43 MHz; fCLK, fCLK = 100 MHz.
5. Effective bits are obtained via a Fast Fourier Transformer (FFT) treatment taking 4 K acquisition points per period.
The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency).
Conversion to SNR: SNR = EB (dB) × 6.02 + 1.76.
MEA540
0
percent
change
(R
)
th j–a
–10
–20
–30
–40
–50
–60
SOL
0
200
400
600
800
1000
air flow (LFPM)
Fig.4 Average effect of air flow on thermal resistance.
1996 Aug 26
9
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
Table 1 Output coding (CPLT2 HIGH)
Table 2 Two's complement coding
CPLT2 D7 (MSB)
1 (VIH)
BINARY
STEP
VI (TYP.)
OUTPUTS
D7 to D0
IR
non inverted
inverted
0 (VIL)
Underflow
< −3 V
00000000
00000000
00000001
......
0
1
1
.
0
−3 V
1
.
.
.
.
.
.
......
.
.
.
......
.
254
11111110
11111111
11111111
1
1
0
255
−2 V
> −2 V
Overflow
50 %
CLK
sample N
sample N + 1
sample N + 2
ANALOG
INPUT
V
l
t
HD
t
d
DATA
OUTPUT
D0 - D7
DATA
N - 1
DATA
N
DATA
N + 1
50 %
MSA654
Fig.5 Timing diagram.
1996 Aug 26
10
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
APPLICATION INFORMATION
Additional application information will be supplied upon request, please quote reference number FTV/AN 9109.
DGND2
IR
1
2
24
23
22
21
20
19
18
17
16
15
14
13
CLK
CLK
D7
D6
D5
V
(– 5.2 V)
3
EED1
C
4
PLT2
V
(– 5.2 V)
5
EEA
OGND (0 V)
V
(– 3.13 V)
6
RB
100 nF
TDA8716
D4
7
AGND1
D3
8
analog input
V
RM
D2
9
100 nF
D1
V
(– 1.87 V)
10
11
12
RT
100 nF
D0
V
EED
AGND2
(– 5.2 V)
DGND1
V
EED2
MCD260 - 2
Typical value for resistors = 2.2 kΩ.
Lower resistor values can be used down to 500 Ω to obtain higher sampling frequencies in the 150 MSPS range (limited by td and tHD timings). In this
configuration a DC shift of the ECL output levels VOL and VOH will occur.
VRB, VRT and VM are decoupled to AGND.
Analog, digital and output supplies should be separated and decoupled.
The external voltage regulator must be constructed in such a way that a good supply voltage ripple rejection is achieved with respect to the LSB value.
Fig.6 Application diagram; TDA8716.
1996 Aug 26
11
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
13, 24
DGND
7, 11
AGND
handbook, halfpage
handbook, halfpage
1, 2
8
5
V
I
x 80
CLK; CLK
3
V
V
CCD1
CCA
MCD261
MCD262 - 1
7, 11
AGND
handbook, halfpage
13, 24
DGND
handbook, halfpage
10
9
V
RT
4
C
PLT2
resistor
ladder
V
RM
6
V
12
RB
V
CCD2
MCD263
5
V
CCA
MCD264
7, 11
10
9
AGND
handbook, halfpage
V
RT
resistor
ladder
V
RM
6
V
RB
5
V
CCA
MCD264
Fig.7 Internal pin configuration diagram.
12
1996 Aug 26
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
MEA537
1.0
LSB
0.5
0
–0.5
–1.0
0
16
32
48
64
80
96
112
128
144
160
176
192
208
224
240
256
CODE
Fig.8 DC Integral Linearity Error (ILE).
MEA536
1.0
LSB
0.5
0
–0.5
–1.0
0
16
32
48
64
80
96
112
128
144
160
176
192
208
224
240
256
CODE
Fig.9 DC Differential Linearity Error (DLE).
13
1996 Aug 26
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
MEA535
0
amplitude
(dB)
–20
–40
–60
–80
–100
–120
0
6.25
12.5
18.7
25.0
31.2
37.5
43.7
frequency (MHz)
50.0
Effective bits: 7.74; Harmonic levels (in dB): 2nd = −69.34; 3rd = −58.85; 4th = −82.55; 5th = −68.16 and 6th = −63.01.
Fig.10 Fast fourier transformer (fCLK = 100 MHz; fi = 4.43 MHz).
1996 Aug 26
14
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
MEA534
0
amplitude
(dB)
–20
–40
–60
–80
–100
–120
0
6.25
12.5
18.7
25.0
31.2
37.5
43.7
50.0
frequency
(MHz)
Effective bits: 7.57; Harmonic levels (in dB): 2nd = −82.07; 3rd = −61.90; 4th = −75.70; 5th = −65.61 and 6th = −72.50.
Fig.11 Fast fourier transformer (fCLK = 100 MHz; fi = 10 MHz).
1996 Aug 26
15
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
MEA533
0
amplitude
(dB)
–20
–40
–60
–80
–100
–120
0
6.43
12.9
19.3
25.7
32.2
38.6
45.0
51.5
frequency (MHz)
Effective bits: 7.04; Harmonic levels (in dB): 2nd = −61.36; 3rd = −56.66; 4th = −61.97; 5th = −62.79 and 6th = −61.52.
Fig.12 Fast fourier transformer (fCLK = 100 MHz; fi = 20 MHz).
MEA539
8
effective
bits
7
6
5
4
0
5
10
15
20
25
30
35
40
4.43 MHz
f
(MHz)
i
Fig.13 Typical effective bit as a function of input signal at fCLK = 100 MHz.
1996 Aug 26
16
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
MEA538
8
effective
bits
7.5
7
6.5
6.0
0
10
20
30
40
50
60
70
80
90
100
110
(MHz)
120
f
clock
Fig.14 Typical effective bits as a function of clock frequency at fi = 10 MHz.
1996 Aug 26
17
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
PACKAGE OUTLINES
DIP24: plastic dual in-line package; 24 leads (600 mil)
SOT101-1
D
M
E
A
2
A
L
A
1
c
e
w M
Z
b
1
(e )
1
b
M
H
24
13
pin 1 index
E
1
12
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.7
1.3
0.53
0.38
0.32
0.23
32.0
31.4
14.1
13.7
3.9
3.4
15.80
15.24
17.15
15.90
5.1
0.51
4.0
2.54
0.10
15.24
0.60
0.25
0.01
2.2
0.066
0.051
0.021
0.015
0.013
0.009
1.26
1.24
0.56
0.54
0.15
0.13
0.62
0.60
0.68
0.63
inches
0.20
0.020
0.16
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-23
SOT101-1
051G02
MO-015AD
1996 Aug 26
18
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
SO32: plastic small outline package; 32 leads; body width 7.5 mm
SOT287-1
D
E
A
X
c
y
H
v
M
A
E
Z
17
32
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
16
1
w M
detail X
b
p
e
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.
0.3
0.1
2.45
2.25
0.49
0.36
0.27 20.7
0.18 20.3
7.6
7.4
10.65
10.00
1.1
0.4
1.2
1.0
0.95
0.55
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25
0.01
0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.086
0.02 0.011 0.81
0.01 0.007 0.80
0.30
0.29
0.42
0.39
0.043 0.047
0.016 0.039
0.037
0.022
inches 0.10
0.004
0.055
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-25
SOT287-1
1996 Aug 26
19
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 Aug 26
20
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8716
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Aug 26
21
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