TDA8730 [NXP]
PLL FM demodulator for DBS signals; 锁相环调频解调器DBS信号
| 型号： | TDA8730 |
| 厂家： | 
NXP |
| 描述： | PLL FM demodulator for DBS signals |
| 文件： | 总10页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8730
PLL FM demodulator for DBS
signals
March 1991
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
FEATURES
GENERAL DESCRIPTION
• Broadband IF amplifier
The TDA8730 is a sensitive PLL
demodulator for the second IF and
direct broadcasting satellite (DBS)
receivers. It provides AGC output and
threshold adjustment for optimal signal
level at the input of the demodulator.
• PLL demodulator, consisting of:
– a multiplier
– a voltage controlled oscillator
– a loop amplifier
• AGC detector and DC amplifier
• LOW impedance video and data output
• Power supply voltage stabilizer
QUICK REFERENCE DATA
SYMBOL
VDD
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
supply voltage
−
−
−
−
−
9
−
V
IDD
VI
supply current
75
−
−
−
−
mA
input voltage level
70
dBµV
MHz
MHz
fosc
fosc
minimum oscillator frequency
maximum oscillator frequency
130
720
video output signal amplitude (peak-to-peak
value)
VO
note 1
−
1.1
−
V
V
VAGC
AGC output voltage
1.8
−
VDD
Note
1. ∆f = 13.5 MHz (peak-to-peak value)
ORDERING AND PACKAGE INFORMATION
EXTENDED TYPE
PACKAGE
NUMBER
PINS
PIN POSITION
MATERIAL
plastic
CODE
TDA8730
16
DIL
SOT38GE(1)
Note
1. SOT38-1; 1996 December 4.
March 1991
2
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
PINNING
SYMBOL
PIN
DESCRIPTION
AGCO
AGCFC
OSCIN1
GND
1
AGC output
2
AGC frequency compensation
oscillator input 1
GND
3
4
OSCIN2
GND1
VDO
5
oscillator input 2
ground 1
6
7
variable capacitor drive output
feedback input
FI
8
VO
9
video output
GND2
SDN
10
11
12
13
14
15
16
ground 2
stabilizer decoupling node
supply voltage +9 V
RF input 2
VDD
RFIN2
RFIN1
RF input 1
RFGND
RF ground
Fig.1 Pinning diagram.
AGCTS
AGC threshold setting
APPLICATIONS
Direct broadcasting satellite (DBS) receivers.
March 1991
3
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
Fig.2 Block diagram.
March 1991
4
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
FUNCTIONAL DESCRIPTION
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER MIN.
VDD supply voltage −0.3
The TDA8730 is a PLL FM
demodulator intended for use in
satellite tuners. It can
MAX.
11
UNIT
demodulate frequency
V
deviations ranging from
IDD
input voltage
−0.3
−
VDD
10
V
13.5 MHz(p-p) (DBS services) up
to 25 MHz(p-p) (FSS services)
and offers a high demodulation
linearity. The circuit is optimized
for operation at 479.5 MHz (the
European IF for satellite tuners)
and can handle the various
broadcasting standards that are
in use (including MAC).
IO(source)
VAGC
tsc
output source current
AGC output voltage
max short circuit time of outputs
mA
V
−
11
10
−
s
VAGC(adj)
Tstg
AGC threshold adjustment voltage −0.3
VDD
150
150
85
V
storage temperature
−55
−
°C
°C
°C
Tj
junction temperature
Tamb
operating ambient temperature
−25
Due to the PLL principle,
demodulation noise threshold
extension is possible. The high
sensitivity of the balanced IF
input reduces the additional
gain, required in the tuner.
An on chip AGC circuit delivers a
gain control signal for use by the
tuner IF amplifier, and a voltage
regulator makes the circuit
insensitive supply voltage
changes.
THERMAL RESISTANCE
SYMBOL
PARAMETER
TYP.
MAX.
UNIT
Rth j-a
from-junction-to-ambient in free air
55
−
K/W
March 1991
5
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
CHARACTERISTICS
VDD = 9 V; Tamb = 25 °C; f = 480 MHz; Input level 70 dBµV; measured in circuit of Fig.4 unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX UNIT
.
Supply
VDD
IDD
supply voltage
supply current
Vpin 12 to pin 10 or pin15
Ipin 12; note 1
8.1
9.0
75
9.9
90
V
−
mA
Frequency demodulator
fosc
fosc
Vi
minimum oscillator frequency
−
−
−
−
130
720
70
−
MHz
MHz
dBµV
maximum oscillator frequency
operating input level
−
−
pin 13; note 2
74
input reflection coefficient S11
unbalanced; pin 14 decoupled (50 Ω
reference)
S11
pin 13; note 3
−
0.07
−
balanced; 100 Ω reference
phase detector constant
pin 13 to pin 14
−
−
−
−
−
−
−
−
−
0.11
0.45
12
−
Kd
(level at pin 13 is 70 dBµV)
−
V/rad.
MHz/V
dB
Ko
VCO constant
−
Ao
open loop gain of loop amplifier
open loop bandwidth of loop amplifier
input impedance of feedback input
output impedance of loop amplifier
pin 7 to pin 8
40
−
f-3 dB
Zin
2.8
930
30
−
MHz
Ω
pin 8
pin 7
−
Zout
le
50
−
Ω
VCO linearity error over ∆f = ±10 MHz note 4
1
%
shift of DC level at video output for
∆VDD = ±10%
pin 9
−
±50 mV
with unmodulated 480 MHz input signal
drift of DC level at video output for
Tamb = 25 to 50 °C
pin 9
−
−
+50 mV
with unmodulated 480 MHz input signal
VVCO
Gd
VCO capture range
differential gain
±14
−
−
−
MHz
note 5
note 5
note 6
−
±4
±2
−
%
φd
differential phase
intermodulation
−
−
deg.
dB
MOD
−
−70
AGC
AGC threshold (IAGC = 0 mA) as a
function of voltage applied to pin 16
pin 13
VIAGC
Vpin16 = 0.8 V
−
−
67
−
dBµV
dBµV
mA/dB
V
pin 16 = 9.0 V
note 7
73
−
−
AGC steepness
pin 1; note 8
18
−
AGC output saturation voltage HIGH at Vpin 1 to pin 10 or pin 15
I = −0.2 mA
VDD-0.5
−
VDD
2.3
V
V
AGC output saturation voltage LOW at
I = 0.2 mA
−
1.8
March 1991
6
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX UNIT
.
Video output
VO
video output signal amplitude
(∆f = 13.5 MHz p-p)
pin 9 to pin 10 or pin 15
−
1.1
3.5
−
V
V
VO(DC)
DC level of video output
pin 9 to pin 10 or pin 15;
note 9
3.1
3.9
ZO
ZL
output impedance
AC load impedance
pin 9
−
30
50
Ω
Ω
pin 9; note 10
600
−
−
Voltage regulator
Vref
Vreg
Iload
reference voltage for Iload ≤ 1 mA
pin 11; note 11
pin 11
−
7
−
−
0
V
line regulation 8.1 V ≤ VIN ≤ 9.9 V
−
70
−
mV
mA
allowable load current
pin 11
−1
Notes
1. The supply current is the consumption of the circuit only.
The current consumption of this application is given by the addition of the supply current of the circuit plus the current
consumption of external components in the application given. In this event (Fig.4) the typical current is 80 mA.
2. The circuit of Fig.4 is designed for an input level of 70 dBµV.
The maximum allowable input level for PLL design is 74 dBµV.
However, for levels other than 70 dBµV the optimum loop filter values will be different from those given in Fig.4.
3. In the application circuit of Fig.4 the RF input is asymmetrically driven.
In order to reduce the influence of oscillator signal coupling to the RF inputs, it is recommended to use a symmetrical
drive at both inputs.
4. The linearity is specified as the maximum difference between the slope df/dV at the channel centre frequency
(480 MHz) and the slope at 480 MHz ± 10 MHz.
5. Measurements with test signals in accordance with CCIR Rec. 473-3; Fm signal with DBS parameters: pre-and
de-emphasis in accordance with CCIR Rec. 405-1, 625 lines PAL TV system. Modulator sensitive 13.5 MHz/V at
pre-emphasis cross over frequency 1 V(p-p) video signal at pre-emphasis filter input.
6. For the intermodulation measurement, an FM test signal is applied having the following modulating components:
1.5 MHz reference sinewave with a deviation of 9.45 MHz(p-p), 5.5 and 5.75 MHz sinewaves with deviation
5.6 MHz(p-p) (so 4.5 dB below the reference, see Fig.3). At the demodulator output the 2nd order intermodulation is
defined according to Fig.3. The video output is loaded with 500 Ω resistor + DC blocking capacitor.
7. The voltage applied at pin 16 is allowed to be higher than the minimum supply voltage (8.1 V).
8. The voltage at the AGC output (pin 1) decreases when the RF input level at pin 13 increases above the adjusted
AGC threshold.
9. The DC level at the video output decreases when the RF input frequency increases.
The DC level at the video output (pin 9) is measured with the VCO switched off because when the oscillator is
operating, the DC level is dependent on the application (oscillator into the input).
10. The load impedance must have at least the minimum value for a frequency range from DC to the bandwidth of the
i.f. filter (usually 27 MHz) since wide-band noise components will also appear at the video output.
11. It is possible to use the regulator output voltage (pin 11). The maximum current allowed is 1 mA.
Possible application as voltage reference source for AFC circuit.
March 1991
7
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
Fig.3 IM2 product.
Fig.4 Application information.
March 1991
8
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
PACKAGE OUTLINE
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D
M
E
A
2
A
A
w
1
L
c
e
M
Z
b
1
(e )
1
b
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
1
1
E
max.
max.
min.
max.
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
8.25
7.80
9.5
8.3
4.7
0.51
3.7
2.54
0.10
7.62
0.30
0.254
0.01
2.2
0.021
0.015
0.013
0.009
0.86
0.84
0.32
0.31
0.055
0.045
0.26
0.24
0.15
0.13
0.37
0.33
inches
0.19
0.020
0.15
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-10-02
95-01-19
SOT38-1
050G09
MO-001AE
March 1991
9
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
SOLDERING
Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and
surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for
surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often
used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook” (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the
joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may
be necessary immediately after soldering to keep the temperature within the permissible limit.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more
than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
March 1991
10
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