TDA9860 [NXP]

Universal HiFi audio processor for TV; 通用的HiFi音频处理器,用于电视
TDA9860
型号: TDA9860
厂家: NXP    NXP
描述:

Universal HiFi audio processor for TV
通用的HiFi音频处理器,用于电视

音频控制集成电路 消费电路 商用集成电路 电视 光电二极管
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INTEGRATED CIRCUITS  
DATA SHEET  
TDA9860  
Universal HiFi audio processor for  
TV  
July 1994  
Preliminary specification  
File under Integrated Circuits, IC02  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
FEATURES  
Multi-source selector switches six AF inputs (three  
stereo sources or six mono sources)  
Each of the input signals can be switched to each of the  
outputs (crossbar switch)  
Outputs for loudspeaker channel, headphone channel  
and peri-TV connector (SCART)  
GENERAL DESCRIPTION  
Switchable spatial stereo and pseudo stereo effects  
Audio surround decoder can be added externally  
Two general purpose logic output ports  
I2C-bus control of all functions.  
The TDA9860 provides control facilities for the main, the  
headphone and the SCART channel of a TV set. Due to  
extended switching possibilities, signals from 3 stereo  
sources can be handled.  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
positive supply voltage (pin 6)  
MIN.  
7.2  
TYP.  
8.0  
MAX.  
8.8  
UNIT  
VP  
IP  
V
supply current  
2
2
25  
mA  
V
Vi  
input signal levels for 0 dB gain (RMS value)  
output signal levels for 0 dB gain (RMS value)  
gain in main channel  
Vo  
Gv  
V
volume control (1 dB steps, balance included)  
bass control (1.5 dB steps)  
treble control (3 dB steps)  
63  
12  
12  
+15  
+15  
+12  
dB  
dB  
dB  
gain in headphone channel  
volume control (2 dB steps)  
gain for muting in all channels  
total harmonic distortion  
70  
80  
0
dB  
dB  
%
THD  
S/N  
0.1  
85  
signal-to-noise ratio  
dB  
°C  
Tamb  
operating ambient temperature  
0
+70  
ORDERING INFORMATION  
PACKAGE  
EXTENDED  
TYPE NUMBER  
PINS  
PIN POSITION  
MATERIAL  
CODE  
SOT232(1)  
TDA9860  
32  
SDIL  
plastic  
Note  
1. SOT232-1; 1996 November 21.  
July 1994  
2
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
July 1994  
3
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
PINNING  
SYMBOL  
PIN  
DESCRIPTION  
SCART input signal LEFT  
Vi 3  
P1  
1
2
port 1 output  
Vi 5  
3
MAIN input signal LEFT  
smoothing capacitor of reference voltage  
MAIN input signal RIGHT  
positive supply voltage  
CSMO  
Vi 6  
4
5
VP  
6
Vo 6  
GND  
Vo 2  
Vi 8  
7
SCART output signal RIGHT  
ground  
8
9
MAIN output signal RIGHT  
input signal RIGHT to loudspeaker channel  
bass capacitor RIGHT 1  
bass capacitor RIGHT 2  
headphone output signal RIGHT  
treble capacitor RIGHT  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
CBR1  
CBR2  
Vo 8  
CTR  
Vo 4  
SCL  
SDA  
Vo 3  
CTL  
loudspeaker channel output signal RIGHT  
I2C-bus clock line  
I2C-bus data line  
loudspeaker channel output signal LEFT  
treble capacitor LEFT  
Vo 7  
CBL2  
CBL1  
Vi 7  
headphone output signal LEFT  
bass capacitor LEFT 2  
bass capacitor LEFT 1  
input signal LEFT to loudspeaker channel  
MAIN output signal LEFT  
module address select input  
SCART output signal LEFT  
pseudo stereo capacitor 2  
AUX input signal LEFT  
Vo 1  
MAD  
Vo 5  
CPS2  
Vi 1  
CPS1  
Vi 2  
pseudo stereo capacitor 1  
AUX input signal RIGHT  
port 2 output  
P2  
Fig.2 Pin configuration.  
Vi 4  
SCART input signal RIGHT  
July 1994  
4
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
controls volume and balance of left and right channels  
independently. Treble control provides a control range  
from 12 to +12 dB and bass control from 12 to +15 dB.  
Extended bass control can be provided by an external  
T-network (Fig.1) from 15 to +19 dB (2 dB steps).  
FUNCTIONAL DESCRIPTION  
The TDA9860 consists of the following functions:  
source select switching block  
loudspeaker channel with effect controls  
headphone channel  
Effect controls  
two port outputs for general purpose  
I2C-bus control  
‘Linear stereo’, ‘stereo with spatial effect (30% or 52%  
anti-phase crosstalk)’ and ‘forced mono with or without  
pseudo-stereo effect’ are controlled by three bits. A muting  
of 85 dB is provided.  
Source select switching block  
The TDA9860 selects and switches the input signals from  
three stereo or six mono sources as there are MAIN, AUX  
and SCART (Fig.1) to one of the outputs SCART,  
loudspeaker and headphone (crossbar-switching Table 3).  
Due to the fact, that the main channel (LINE outputs) is  
looped outside the circuit (from pins 9 and 24 to pins 10  
and 23), signals can be used as LINE output or to insert a  
‘surround sound decoder’.  
Headphone channel  
The headphone channel is only equipped with volume /  
balance control. A muting of 85 dB is provided.  
I2C-bus control  
All settings of control are stored in subaddress registers.  
Data transmission is simplified by auto-incrementing the  
subaddresses. The on-chip power on reset sets the mute  
bit to active, so all 3 stereo outputs are muted.  
The muting can be switched off by writing a ‘0’ (non-muted)  
into the mute control bits.  
Loudspeaker channel  
Volume control is divided into the parts volume 1 and  
volume 2 / balance. The first part (55 dB) controls left and  
right channels simultaneously; the second part (23 dB)  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
PARAMETER  
MIN.  
MAX.  
10  
UNIT  
VP  
Vn  
IO  
supply voltage (pin 6)  
0
0
V
V
voltage on all pins, ground excluded  
output current  
VP  
at pins 15, 18, 13, 20, 7 and 26  
at pins 2 and 31  
2.5  
mA  
mA  
mW  
°C  
°C  
V
1.5  
Ptot  
total power dissipation  
850  
Tstg  
storage temperature  
25  
0
+150  
+70  
Tamb  
VESD  
operating ambient temperature  
electrostatic handling for all pins (note 1)  
electrostatic handling for all pins (note 2)  
±300  
±2000  
V
Notes to the Limiting Values  
1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor.  
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kseries resistor.  
THERMAL RESISTANCE  
SYMBOL  
Rth j-a  
PARAMETER  
THERMAL RESISTANCE  
from junction to ambient in free air  
60 K/W  
July 1994  
5
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
CHARACTERISTICS  
VP = 8 V; Tamb = +25 °C; treble and bass in linear positions; balance in mid position; spatial function, pseudo-stereo  
function and forced-mono function in off position and measurements taken in Fig.1 unless otherwise specified.  
SYMBOL  
PARAMETER  
supply voltage (pin 6)  
CONDITIONS  
MIN.  
7.2  
TYP.  
8.0  
MAX. UNIT  
VP  
IP  
8.8  
V
supply current (pin 6)  
internal reference voltage  
voltage (pin 4)  
25  
mA  
V
Vref  
V4  
VP/2  
VP 0.1  
V
DC voltage on pins  
Vl  
DC input voltage (pins 1, 3, 5, 10, 23,  
28, 30 and 32)  
VP/2  
VP/2  
VP/2  
V
V
V
VO  
VC  
DC output voltage (pins 7, 9, 13, 15, 18,  
20, 24 and 26)  
DC voltage on capacitors (pins 11, 12,  
14, 19, 21, 22, 27 and 29)  
Audio select switch. Line, SCART and headphone outputs (controlled via I2C-bus, Table 3)  
Vi  
maximum AF input signal on pins 1, 3,  
5, 28, 30, 32 (RMS value)  
THD 0.5%  
on output pins  
2
V
Ri  
f
input resistance (pins 1, 3, 5, 28, 30, 32)  
frequency response for all AF outputs  
20  
20  
2
30  
40  
kΩ  
0.5 dB  
20000 Hz  
Vo  
maximum AF output signal on pins 7, 9,  
24, 26 (RMS value)  
THD 0.5%  
V
RL  
allowed external load resistance  
on output (pins 9 and 24)  
on output (pins 7 and 26)  
gain for all signal arms  
10  
5
kΩ  
kΩ  
dB  
dB  
Gv  
0
αcr  
switch crosstalk on outputs between  
AF inputs at f = 10 kHz  
unused inputs  
connected to ground  
90  
LOUDSPEAKER CHANNEL (controlled via I2C-bus, Table 3)  
f = 1 kHz, 55 steps  
Volume control 1 (LEFT and RIGHT simultaneously)  
Vi  
maximum input signal  
Gv = 0; THD 0.5% on  
2
V
(RMS value; pins 10 and 23)  
output pins 15 and 18  
Ri  
input resistance (pins 10 and 23)  
nominal volume control  
minimum volume control  
step width  
7.5  
40  
38  
0.5  
0.25  
10  
kΩ  
dB  
dB  
dB  
dB  
dB  
dB  
Gv  
+15  
+14  
1.5  
1.75  
1
Gv  
Gv = 32 to +15 dB  
Gv = 40 to 33 dB  
Gv = 32 to +15 dB  
Gv = 40 to 33 dB  
1.0  
1.0  
gain set error  
2
July 1994  
6
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
f = 1 kHz, 24 steps  
Volume 2 / balance control  
Gv  
nominal volume control  
24  
0
dB  
dB  
dB  
dB  
dB  
minimum volume control  
gain in mute position  
step width  
23  
80  
0.5  
1  
85  
1.0  
Gv  
1.5  
2
gain tracking error  
Bass control  
Gv  
controllable bass  
CB = 33 nF  
f = 40 Hz  
f = 40 Hz  
maximum boost  
14  
11  
1
15  
12  
1.5  
16  
13  
2
dB  
dB  
dB  
maximum attenuation  
step width  
Gv  
Gv  
controllable enhanced bass  
maximum boost  
Fig.1  
f = 60 Hz  
f = 60 Hz  
18  
14  
1
19  
15  
2
20  
16  
3
dB  
dB  
dB  
maximum attenuation  
step width  
Gv  
Treble control  
Gv  
controllable treble  
maximum boost  
f = 15 kHz  
f = 15 kHz  
11  
12  
12  
3
13  
13  
3.5  
dB  
dB  
dB  
maximum attenuation  
step width (resolution)  
11  
Gv  
2.5  
Effect controls  
αspat1  
αspat2  
ϕ
anti-phase crosstalk by spatial effect  
52  
%
%
30  
phase shift by pseudo-stereo  
Fig.3  
Loudspeaker channel outputs (pins 15 and 18)  
Vo  
maximum output signal  
THD 0.5%;  
2
V
(RMS value; pins 15 and 18)  
RL > 10 k; CL < 1.5 nF  
V15, 18  
maximum DC offset voltage  
for volume control  
between adjoining step and any step to mute  
Gv = 0 to +15 dB/mute  
Gv = 64 to 0 dB/mute  
Gv = 0 to +15 dB/mute  
Gv = 12 to 0 dB/mute  
Gv = 12 to +12 dB/mute  
2
15  
10  
15  
10  
10  
100  
mV  
mV  
mV  
mV  
mV  
0.5  
2
for bass control  
0.5  
0.5  
for treble control  
Ro  
RL  
CL  
output resistance (pins 15 and 18)  
allowed output load resistor  
allowed output load capacitor  
10  
kΩ  
nF  
1.5  
July 1994  
7
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
SYMBOL  
PARAMETER  
CONDITIONS  
CCIR468-3  
MIN.  
TYP.  
MAX. UNIT  
VN(W)  
weighted noise voltage at output  
(quasi-peak level)  
for +15 dB gain  
for 0 dB gain  
102  
µV  
µV  
µV  
µV  
Hz  
32  
27  
20  
for 40 dB gain  
for mute position  
AF bandwidth  
Gv = 80 dB  
1 dB  
B
20 to  
20000  
THD  
total harmonic distortion  
for Vi = 0.2 V (RMS value)  
for Vi = 1 V (RMS value)  
for Vi = 2 V (RMS value)  
stereo channel separation  
f = 20 to 12500 Hz  
Gv = 30 to +15 dB  
Gv = 30 to 0 dB  
Gv = 30 to 6 dB  
0.1  
0.1  
0.1  
75  
0.3  
0.3  
0.3  
%
%
%
dB  
αsp  
f = 10 kHz; Gv = 0 dB;  
opposite input grounded  
by 1 kresistor  
αbus  
crosstalk of I2C-bus  
Gv = 0 dB; note 1  
100  
55  
dB  
dB  
RR100  
ripple rejection with 100 Hz ripple on VP  
Gv = 0 dB;  
VR < 200 mV RMS  
HEADPHONE CHANNEL (controlled via I2C-bus, Table 3)  
f = 1 kHz, 36 steps  
Volume control headphone channel  
Gv  
nominal volume control  
minimum volume control  
gain in mute position  
step width (resolution)  
70  
67  
80  
1.5  
1
0
dB  
dB  
dB  
dB  
dB  
dB  
dB  
mV  
1  
85  
2
Gv  
Gv = 36 to 0 dB  
Gv = 70 to 36 dB  
Gv = 36 to 0 dB  
Gv = 70 to 36 dB  
2.5  
3
2
gain set error  
1
3
V13, 20  
DC offset voltage  
for adjoining step and  
step to mute  
0.5  
10  
Gv = 70 to 0 dB  
Headphone channel output (pins 13 and 20)  
Vo  
maximum output signal (RMS value)  
THD 0.5%; RL > 10 k; 2  
CL < 1.5 nF  
V
Ro  
output resistance  
100  
RL  
allowed output load resistor  
allowed output load capacitor  
weighted noise voltage at output (quasi-peak level) CCIR468-3  
for 0 dB gain  
10  
kΩ  
nF  
CL  
1.5  
VN(W)  
20  
15  
12  
µV  
µV  
µV  
for 16 dB gain  
for mute position  
Gv = 80 dB  
July 1994  
8
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
SYMBOL  
PARAMETER  
CONDITIONS  
1 dB  
MIN.  
TYP.  
20 to  
MAX. UNIT  
B
AF bandwidth  
Hz  
20000  
THD  
total harmonic distortion  
for Vi = 1 V (RMS value)  
stereo channel separation  
f = 20 to 12500 Hz  
Gv = 40 to 0 dB  
0.08  
75  
0.25  
%
αsp  
f = 10 kHz; Gv = 0 dB;  
opposite input grounded  
by 1 kresistor  
dB  
αbus  
crosstalk of I2C-bus  
Gv = 0 dB; note 1  
100  
55  
dB  
dB  
RR100  
ripple rejection with 100 Hz ripple on VP  
Gv = 0 dB;  
VR < 200 mV RMS  
SCART output (pins 7 and 26)  
Vo  
RL  
maximum output signal (RMS value)  
admissible output load resistor  
THD 0.5%; RL > 5 kΩ  
2
5
V
kΩ  
Power on reset  
VPONR increasing supply voltage  
start of reset  
2.5  
6.8  
6.0  
V
V
V
end of reset  
5.2  
4.4  
6.0  
5.2  
VPONR  
decreasing supply voltage start of reset  
I2C-bus, SCL and SDA (pins 16 and 17, observe I2C-bus specification)  
V16, 17  
input voltage HIGH-level  
input voltage LOW-level  
input current  
3
0
VP  
V
1.5  
±10  
0.4  
V
I16, 17  
VACK  
µA  
V
output voltage at acknowledge (pin 17)  
I17 = 3 mA  
Module address (pin 25)  
VIL  
VIH  
LOW level input voltage  
HIGH level input voltage  
0
3
1.5  
VP  
V
V
Port outputs P1 and P2 (open-collector outputs pins 2 and 31)  
VOL  
LOW level output voltage  
port output current  
I2, 31 = 1 mA (sink)  
sink current  
0.3  
1
V
I2, 31  
mA  
Note to the characteristics  
1. αbus = 20 log Vbus / Vo (Vbus = spurious bus signal voltage on AF output pin).  
July 1994  
9
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
I2C-BUS FORMAT  
S
SLAVE ADDRESS  
= start condition  
= 1000 0000 (V25 = LOW) or 1000 0010 (V25 = HIGH)  
A
SUBADDRESS  
A
DATA  
P
S
SLAVE ADDRESS  
A
= acknowledge, generated by the slave or by the master  
= subaddress byte, see Table 1  
= data byte, see Table 1  
SUBADDRESS  
DATA  
P
= stop condition  
This circuit only operates as a slave transmitter.  
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.  
Byte organisation  
Table 1 I2C-bus transmission.  
DATA  
FUNCTION  
SUBADDRESS HEX  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
loudspeaker channel  
volume control both  
volume/balance left  
0000 0000  
0000 0001  
00  
01  
02  
03  
04  
0
0
0
0
0
0
0
0
0
0
V05  
V04  
V03  
V02  
V01  
V00  
VL0  
VR0  
BA0  
TR0  
0
0
0
0
VL4  
VR4  
BA4  
0
VL3  
VR3  
BA3  
TR3  
VL2  
VR2  
BA2  
TR2  
VL1  
VR1  
BA1  
TR1  
volume/balance right 0000 0010  
bass control byte  
treble control byte  
0000 0011  
0000 0100  
headphone channel  
volume control left  
volume control right  
0000 0101  
0000 0110  
05  
06  
0
0
0
0
VHL5 VHL4 VHL3 VHL2 VHL1 VHL0  
VHR5 VHR4 VHR3 VHR2 VHR1 VHR0  
switching control byte  
headphone output  
SCART output  
0000 0111  
0000 1000  
0000 1001  
07  
08  
09  
0
0
MU0  
MU1  
MU2  
0
0
I03  
I13  
I23  
I02  
I12  
I22  
I01  
I11  
I21  
I00  
I10  
I20  
P1  
EF1  
P2  
ST  
loudspeaker output  
EF2  
July 1994  
10  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Table 2 Bits of data bytes.  
FUNCTION OF THE BITS IN TABLE 1  
DESCRIPTION  
V00 to V05  
volume control common for loudspeaker channel  
volume control LEFT for loudspeaker channel  
volume control RIGHT for loudspeaker channel  
bass control for LEFT and RIGHT loudspeaker channel  
treble control for LEFT and RIGHT loudspeaker channel  
volume control LEFT for headphone channel  
volume control RIGHT for headphone channel  
input selection for headphone channel  
VL0 to VL4  
VR0 to VR4  
BA0 to BA4  
TR0 to TR3  
VHL0 to VHL5  
VHR0 to VHR5  
I00 to I03  
I10 to I13  
input selection for SCART channel  
I20 to I23  
input selection for loudspeaker channel  
MU0, MU1 and MU2  
EF1, EF2 and ST  
P1 and P2  
mute control bits: 0 = non-muted; 1 = muted  
special mode control bits  
control bits for port P1 (pin 2) and P2 (pin 31):  
output levels: 0 = LOW; 1 = HIGH  
Table 3 Output and input selection by subaddress bytes 07, 08 and 09.  
OUTPUT AND INPUT CONTROL BYTES, MUTE INCLUDED (EFFECTS TABLE 4)  
INPUT  
SELECT OUTPUT PINS  
INPUT GROUP  
ADDR  
DATA BYTE TO SUBADDRESS  
SIGNAL  
Loudspeaker channels  
output pin 18 output pin 15  
SCART channels  
09  
08  
EF2 MU2 EF1 ST I23 I22 I21 I20  
output pin 26 output pin 7  
headphone channels  
0
0
MU1 P1  
MU0 0  
P2 I13 I12 I11 I10  
output pin 20 output pin 13  
07  
0
I03 I02 I01 I00  
SELECT INPUT SIGNAL  
PINS  
HEX  
BITS OF DATA BYTE  
28  
30  
28  
1
28  
30  
30  
1
AUX LEFT  
Vi 1  
Vi 2  
XB  
X9  
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
1
0
1
0
1
1
0
1
0
0
0
1
1
1
0
1
0
0
1
0
AUX RIGHT  
AUX STEREO  
SCART LEFT  
SCART RIGHT  
SCART STEREO  
MAIN LEFT  
V
I 1 and Vi 2 X7  
Vi 3  
Vi 4  
XA  
X5  
32  
1
32  
32  
3
V
i 3 and Vi 4 X6  
3
Vi 5  
Vi 6  
XC  
XD  
5
5
MAIN RIGHT  
MAIN STEREO  
3
5
Vi 5 and Vi 6 X8  
Note  
1. X = don’t care  
July 1994  
11  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Table 4 Effect controls.  
DATA BYTE TO SUBADDRESS 09  
EF1 ST I23 I22  
SETTING SPECIAL MODES  
HEX  
BX  
EF2  
MU2  
I21  
I20  
stereo with spatial (52%)  
1
0
0
0
0
0
1
1
0
1
0
1
1
1
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
stereo with spatial (30%)  
3X  
1X  
2X  
0X  
0
0
0
0
stereo without spatial  
forced mono with pseudo stereo  
forced mono without pseudo stereo  
Table 5 Volume 2 / balance control LEFT.  
Table 6 Volume 2 / balance control RIGHT.  
Gv  
DATA  
HEX VL4 VL3 VL2 VL1 VL0  
Gv  
DATA  
HEX VR4 VR3 VR2 VR1 VR0  
(dB)  
(dB)  
0
1F  
1E  
1D  
1C  
1B  
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1F  
1E  
1D  
1C  
1B  
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1  
1  
2  
2  
3  
3  
4  
4  
5  
5  
6  
6  
7  
7  
8  
8  
9  
9  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
07  
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
07  
mute left  
mute right  
July 1994  
12  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Table 7 Volume 1 to control both channels.  
Gv  
DATA  
Gv  
DATA  
HEX V05 V04 V03 V02 V01 V00  
(dB)  
HEX V05 V04 V03 V02 V01 V00  
(dB)  
+15  
3F  
3E  
3D  
3C  
3B  
3A  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
2F  
2E  
2D  
2C  
2B  
2A  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
17  
1F  
1E  
1D  
1C  
1B  
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
+14  
+13  
+12  
+11  
+10  
+9  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
+8  
+7  
+6  
+5  
+4  
+3  
+2  
+1  
0
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
1  
2  
3  
4  
5  
6  
7  
8  
9  
10  
11  
12  
13  
14  
15  
16  
July 1994  
13  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Table 8 Bass control LEFT and RIGHT.  
Table 9 Treble control LEFT and RIGHT.  
Gv  
DATA  
Gv  
DATA  
(dB)  
HEX BA4 BA3 BA2 BA1 BA0  
(dB)  
HEX  
0
TR3 TR2 TR1 TR0  
+15  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
+12  
+9  
+6  
+3  
0
0A  
09  
08  
07  
06  
05  
04  
03  
02  
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
+13.5  
+12  
+10.5  
+9  
+7.5  
+6  
3  
6  
9  
12  
+4.5  
+3  
+1.5  
0
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
07  
06  
0
1.5  
3  
4.5  
6  
7.5  
9  
10.5  
12  
July 1994  
14  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Table 10 Volume control of headphone LEFT.  
Table 11 Volume control of headphone RIGHT.  
Gv  
DATA  
Gv  
DATA  
HEX VHR VHR VHR VHR VHR VHR  
(dB) HEX VHL VHL VHL VHL VHL VHL  
(dB)  
5
4
3
2
1
0
5
4
3
2
1
0
0
3F  
3E  
3D  
3C  
3B  
3A  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
2F  
2E  
2D  
2C  
2B  
2A  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
1F  
1E  
1D  
1C  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
3F  
3E  
3D  
3C  
3B  
3A  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
2F  
2E  
2D  
2C  
2B  
2A  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
1F  
1E  
1D  
1C  
1B  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2  
2  
4  
4  
6  
6  
8  
8  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
66  
68  
70  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
66  
68  
70  
mute 1B  
left  
mute  
right  
July 1994  
15  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
Fig.3 Pseudo (phase) as a function of frequency.  
CAPACITANCE AT PIN 29  
(nF)  
CAPACITANCE AT PIN 27  
(nF)  
CURVE  
EFFECT  
1
2
3
15  
47  
68  
15  
5.6  
5.6  
normal  
intensified  
more intensified  
July 1994  
16  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
PACKAGE OUTLINE  
SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)  
SOT232-1  
D
M
E
A
2
A
A
L
1
c
(e )  
w M  
e
Z
1
b
1
M
H
b
32  
17  
pin 1 index  
E
1
16  
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
max.  
A
A
2
max.  
(1)  
(1)  
Z
1
w
UNIT  
b
b
c
D
E
e
e
L
M
M
H
1
1
E
min.  
max.  
1.3  
0.8  
0.53  
0.40  
0.32  
0.23  
29.4  
28.5  
9.1  
8.7  
3.2  
2.8  
10.7  
10.2  
12.2  
10.5  
mm  
4.7  
0.51  
3.8  
1.778  
10.16  
0.18  
1.6  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-02-04  
SOT232-1  
July 1994  
17  
Philips Semiconductors  
Preliminary specification  
Universal HiFi audio processor for TV  
TDA9860  
with the joint for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
SOLDERING  
Introduction  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg max). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
Repairing soldered joints  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
Apply a low voltage soldering iron (less than 24 V) to the  
lead(s) of the package, below the seating plane or not  
more than 2 mm above it. If the temperature of the  
soldering iron bit is less than 300 °C it may remain in  
contact for up to 10 seconds. If the bit temperature is  
between 300 and 400 °C, contact may be up to 5 seconds.  
Soldering by dipping or by wave  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
July 1994  
18  

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