TDA9873HS [NXP]
Multistandard dual carrier stereo sound decoder; 多标准双载波立体声解码器
| 型号： | TDA9873HS |
| 厂家： | 
NXP |
| 描述： | Multistandard dual carrier stereo sound decoder |
| 文件： | 总40页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9873H
Multistandard dual carrier stereo
sound decoder
Product specification
2000 Apr 04
Supersedes data of 1999 Dec 03
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
FEATURES
• Low power consumption
• Alignment-free multistandard FM sound demodulation
• No external intercarrier sound band-pass filters required
• Auto mute switchable via I2C-bus
• Multistandard A2 stereo sound decoder
GENERAL DESCRIPTION
The TDA9873H is an economic multistandard dual
• No adjustment for reduced channel separation
requirement
FM demodulator and analog carrier stereo decoder with
I2C-bus control.
• De-emphasis time constant related to standard
• Very reliable digital identification of sound transmission
mode via I2C-bus, alignment-free
• No external filter for pilot input required
• I2C-bus transceiver with MAD (Module ADdress)
• I2C-bus control for all functions
• Stabilizer circuit for ripple rejection and constant output
level
• Additional mono output
• Pin aligned with TDA9874AH
• ESD protection on all pins.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA9873H
QFP44
plastic quad flat package; 44 leads (lead length 2.35 mm);
SOT205-1
body 14 × 14 × 2.2 mm
TDA9873HS
QFP44
plastic quad flat package; 44 leads (lead length 1.3 mm);
SOT307-2
body 10 × 10 × 1.75 mm
2000 Apr 04
2
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
QUICK REFERENCE DATA
VCC = 5 V; Tamb = 25 °C; B/G standard (fSC1 = 5.5 MHz, fSC2 = 5.742 MHz, SC1/SC2 = 7 dB, ∆fAF = 27 kHz,
mod = 1 kHz, L = R, stereo mode); input level for first sound carrier Vi(FM)(rms) = 50 mV; fref = 4.000 MHz; measured in
application circuits of Figs 7 and 8; unless otherwise specified.
SYMBOL PARAMETER
VCC supply voltage
f
CONDITIONS
MIN.
4.5
TYP. MAX. UNIT
5
6.6
75
600
−
V
ICC
supply current
40
60
500
−
mA
mV
mV
Vo(rms)
Vo(cl)(rms)
AF output level (RMS value)
54% modulation; note 1
THD < 1.5%
400
1400
AF output clipping level
(RMS value)
fi(FM)
FM-PLL operating frequencies
(switchable)
first sound carrier
M standard
−
−
−
−
4.5
5.5
6.0
6.5
−
−
−
−
MHz
MHz
MHz
MHz
B/G standard
I standard
D/K standard
second sound carrier
M standard
−
−
−
−
−
4.72
5.74
6.26
6.74
5.74
56
−
−
−
−
−
−
MHz
MHz
MHz
MHz
MHz
dB
B/G standard
D/K (1) standard
D/K (2) standard
D/K (3) standard
S/NW
weighted signal-to-noise ratio
(complete signal path)
CCIR 468-4 weighted; quasi 52
peak; dual mode;
B/G standard; note 1
tident(on)
total identification time on for
identification mode change
normal mode; note 2
fast mode; note 2
0.35
−
−
2
s
s
0.1
0.5
Vi(FM)(rms)
FM-PLL input voltage (RMS value) sensitivity for pull-in
first sound carrier
−
−
−
−
6
1
mV
mV
second sound carrier
αcs(AF)(stereo)
AF channel separation (stereo
mode; complete signal path)
B/G standard; note 3
without alignment
I2C-bus alignment
25
40
65
30
45
70
−
−
−
dB
dB
dB
αct(AF)(dual)
AF crosstalk attenuation (dual
mode; complete signal path)
Notes
1. Condition for B/G, I and D/K standard: VCC = 5 V and ∆f = 27 kHz (m = 54%). Condition for M standard: VCC = 5 V
and ∆f = 13.5 kHz; 6 dB gain added internally to compensate smaller deviation.
2. The maximum total system identification time ‘on’ for a channel change is equal to maximum value of tident(on) plus
tI2C(read-out). The maximum total system identification time ‘off’ for a channel change is equal to maximum value of
tident(off) plus tI2C(read-out). The fast mode is proposed mainly during search tuning, program or channel select. If the
channel is selected, the identification response should be switched to normal mode for improved reliability. However
due to the transition from fast to normal mode, the identification bits are not valid for one integrator period. Therefore
the transmitter mode detected during the fast mode has to be stored before changing to normal mode. The storage
has to be kept for two seconds (maximum value of tident(on) in the normal mode) from the moment of transition.
The identification can now operate in the normal mode until the next tuning action.
3. R modulated and L monitored.
2000 Apr 04
3
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
a
loop filter
external AF
mono stereo
M
R
L
LF1
14
AF1O AF2O
32
AF2I AF1I
33
CDE1 CDE2
EXTM EXTR EXTL
38 39 40
8
3
6
10
1
OUTL
OUTR
OUTM
FM DEMODULATOR
NARROW-BAND PLL
SC1
AF
AMPLIFIER
1
STEREO DECODER
STEREO ADJUST
2
AF SWITCH
43
B/G, D/K, I, M (Korea)
STANDARD
V
41
7
ref
IF
AGND
POWER
SUPPLY
intercarrier
input
25
IFINT
TDA9873H
V
CC
28
4.5, 5.5, 6.0, 6.5
4.72, 5.74, 6.26,
6.74 MHz
DIGITAL
ACQUISITION
DIGITAL
IDENTIFICATION
27 DGND
21 MAD
2
I C-BUS
FM DEMODULATOR
NARROW-BAND PLL
SC2
AF
AMPLIFIER
2
n.c.
TRANSCEIVER
PILOT
NARROW-BAND PLL
OSCILLATOR
CLOCK
4, 5, 9, 11, 12,
16, 17, 19, 20,
22, 23, 36, 44
18
13
AFR
26
24
15
31
35
34
30
29
37 42
LF2
CAF2
CAF1 XTAL
4 MHz
LPF CID CTRIG
SDA SCL P1 P2
MHB429
pilot
loop
loop filter
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
PINNING
SYMBOL
PIN
DESCRIPTION
not connected
SYMBOL
PIN
DESCRIPTION
left audio output
n.c.
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
OUTL
OUTR
CDE1
n.c.
1
2
n.c.
not connected
right audio output
de-emphasis 1 capacitor
not connected
CAF1
IFINT
CAF2
DGND
VCC
audio 1 (AF1) capacitor
IF intercarrier input
audio 2 (AF2) capacitor
digital ground
3
4
n.c.
5
not connected
CDE2
AGND
AF1I
n.c.
6
de-emphasis 2 capacitor
analog ground
supply voltage (+5 V)
serial clock input (I2C-bus)
serial data input/output (I2C-bus)
pilot loop filter
7
SCL
SDA
LPF
8
audio 1 input
9
not connected
AF1O
n.c.
10
11
12
13
14
15
16
17
18
19
20
21
audio 1 output
AF2O
AF2I
CTRIG
CID
audio 2 output
not connected
audio 2 input
n.c.
not connected
trigger capacitor
AFR
LF1
AF1 and AF2 signal return
loop filter 1
identification capacitor
not connected
n.c.
XTAL
n.c.
4 MHz reference input
not connected
P1
output port 1
EXTM
EXTR
EXTL
Vref
external audio input mono
external audio input right
external audio input left
n.c.
not connected
LF2
loop filter 2
reference voltage (1⁄2VCC
)
n.c.
not connected
n.c.
not connected
P2
output port 2
MAD
programmable address bit
(module address)
OUTM
n.c.
mono output
not connected
2000 Apr 04
5
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
1
2
3
4
5
6
7
8
9
33 AF2I
AF2O
OUTL
OUTR
CDE1
n.c.
32
31 LPF
30 SDA
n.c.
29 SCL
V
28
CDE2
AGND
CC
TDA9873H
27 DGND
26 CAF2
25 IFINT
24 CAF1
23 n.c.
AF1I
n.c.
AF1O 10
n.c. 11
MHB430
Fig.2 Pin configuration.
2000 Apr 04
6
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
FUNCTIONAL DESCRIPTION
FM demodulators
In an endless circle the VCO of the next PLL will be
connected to the down-counter and the described
procedure starts again.
The FM demodulators are Narrow-Band Phase-Locked
Loops (NBPLLs) with external loop filters, to provide the
required selectivity. To achieve good selectivity, linear
Phase Detectors (PDs) and constant input levels are
required. The intercarrier signal from the input terminal is
fed via high-pass filters and gain controlled amplifiers to
the phase detectors. A carrier cancellation circuit placed
before the amplifier for the second PLL is used to reduce
the first sound carrier. The PD output signals control the
integrated relaxation oscillators via the loop filters.
The frequency range is approximately 4 to 7 MHz. As a
result of locking, the oscillator frequency tracks with the
modulation of the input signal and the oscillator control
voltages are superimposed by the AF voltages. Using this
method, the FM-PLLs operate as FM demodulators.
The AF voltages are present at the loop filters and fed via
buffers with 0 dB gain to the audio amplifiers.
The whole tracing as well as the counting time itself is
derived from the external frequency reference. The cycle
time is 256 µs.
Auto mute
If a sound carrier is missed, acquisition pulses are
generated when the NBPLL frequency leaves the window
edges. To avoid noise at the audio output, an I2C-bus
switchable mute-enable stage is built in. If auto mute is
enabled via the I2C-bus, the circuit mutes immediately
after the first acquisition pulse. If a sound carrier occurs
(no further acquisition pulses), the mute stage
automatically returns to active mode after 40 ms.
If the first sound carrier is not present, the second audio
channel will also be muted.
The supported standards and their characteristics are
given in Table 1.
Audio preamplifier
The AF preamplifiers are operational amplifiers with
internal feedback, high gain and high common mode
rejection. The AF voltages from the PLL demodulators
(small output signals) are amplified by approximately
34 dB. Using a DC operating point control circuit, the
AF amplifiers are decoupled from the PLL DC voltage.
The amplified AF signals are available at the output
terminals and fed via external decoupling capacitors to the
stereo decoder input terminals.
Digital acquisition help
A narrow-band PLL requires a measure to lock to the
wanted input signal. Each relaxation oscillator of the three
integrated PLLs (first and second sound carriers and pilot
carrier) has a wide frequency range. To guarantee correct
locking of the PLL with respect to the catching range, the
digital acquisition help provides individual control until the
VCO frequency is within the standard and PLL dependent
lock-in window, related to the standard dependent carriers.
It ensures that the oscillator frequency of the FM-PLL is
within ±225 kHz of the sound carrier to be demodulated.
The pilot carrier frequency window is ±150 Hz.
Stereo decoder
The input circuit incorporates a soft-mute stage which is
controlled by the FM-PLL acquisition circuit. The auto
mute function can be disabled via the I2C-bus.
The working principal of the digital acquisition help is as
follows. The VCOs are connected, one at a time, to a
down-counter. The counter start value is standard
dependent and predefined for each of the three PLLs.
After a given counting time the stop value of the
down-counter is probed.
The AF output voltage is 500 mV (RMS) for 54%
modulation, clipping therefore may occur at high
over-modulation. If more headroom is required the input
signal can be attenuated by 6 dB via the I2C-bus.
A stereo adjustment (see Fig.6) is incorporated to correct
the FM demodulator output voltage spread (see Table 19).
If no I2C-bus adjustment is required (potentiometer
adjustment or no adjustment) the default value should be
0 dB for B/G, M and D/K (2) standard. For the standards
D/K (1) and D/K (3) the second sound carrier frequency is
below the first sound carrier which results in a lower
AF output level for the second sound carrier. In this state,
a gain of +0.1 dB for D/K (1) and +0.2 dB for D/K (3) is
preferred.
If the stop value is lower (higher) than the expected value
range, the VCO frequency is higher (lower) than the lock-in
window. A negative (positive) control current is injected
into the loop filter for a short time, thereby decreasing
(increasing) the VCO frequency by a proportional value.
If the stop value meets the expected value range, the VCO
frequency is within the defined lock-in window and no
control current is injected into the loop filter.
2000 Apr 04
7
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
In the following dematrix, the modes stereo, mono and
dual are processed for the different standards. The 6 dB
level difference between B/G and M standard is
automatically compensated in the dematrix, therefore no
further level adaption is needed.
The identification stages consist of two digital PLL circuits
and digital integrators to generate the stereo or dual sound
identification bits, which can be read out via the I2C-bus.
A 4 MHz crystal oscillator provides the reference clock
frequency. The corresponding detection bandwidth is
larger than ±50 Hz for the pilot carrier signal, so that
De-emphasis is performed by two RC low-pass filter
networks with internal resistors and external capacitors.
The time constant is automatically switched to 50 µs or
75 µs according to the chosen standard.
fpilot variations from the transmitter can be tracked in the
event of missing synchronization with the horizontal
frequency fH. However, the detection bandwidth for the
identification signal is limited to approximately ±1 Hz for
high identification reliability.
Due to some frequency response peaking of the
FM demodulation, compensation is necessary. This is
done by having a slightly larger time constant for the
de-emphasis.
I2C-bus transceiver
The TDA9873H is microcontroller controlled via a 2-wire
I2C-bus.
All other settings such as AF switch, stereo channel
adjustment values or default corrections have to be
controlled via the I2C-bus depending on the identification
or user definition.
Two wires, serial data (SDA) and serial clock (SCL) carry
information between the devices connected to the bus.
The TDA9873H has an I2C-bus slave transceiver with
auto-increment.
AF switch
The circuit incorporates a single stereo and mono
AF output. Using rail-to-rail operational amplifiers, the
clipping level is set to 1.4 V (RMS) for VCC = 5 V.
To avoid conflicts in applications with other ICs providing
similar or complementary functions, two slave addresses
are available, selected on the pin MAD. A slave address is
sent from the master to the slave receiver.
As well as the internal stereo decoder output signal, one
external stereo and one mono input can be switched to the
AF outputs. Both the mono and stereo outputs can be
switched independent of the internal or external sources
(see Tables 13 and 25). Fig.6 shows the switch
configurations.
In the TV sound processor family several devices are
available. To identify the TDA9873H device, the master
sends a slave address with R/W bit = 0. The slave then
generates an acknowledge and the master sends the data
subaddress 254 to the slave, followed by an acknowledge
from the slave to the master. The master then sends the
slave address with R/W bit = 1. The slave then transmits
the device identification code 80H to the master, followed
by an acknowledge NOT and a STOP condition generated
by the master.
A nominal gain of 0 dB for the signals from the external
inputs to the outputs is built-in.
Stereo/dual sound identification
The pilot signal is fed to the input of a NBPLL. The PLL
circuit generates the synchronized pilot carrier. This carrier
is used for the synchronous AM demodulation to get the
low-pass filtered identification signal.
Control ports
Two digital open-collector output ports P1 and P2 provide
external switching functions in the receiver front-end or
IF demodulators. The ports are controlled by the I2C-bus
(see Tables 22 and 23) and are freely programmable.
A Schmitt trigger circuit performs pulse shaping of the
identification signal when the signal level is higher than the
Schmitt trigger threshold. For smaller signal levels there is
no AC output signal, thus protecting against
mis-identification caused by spurious signal components.
2000 Apr 04
8
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
Power supply
Analog ground (AGND, pin 7) and digital ground
(DGND, pin 27) should be connected directly to the IC.
The different supply voltages and currents required for the
analog and digital circuits are derived from two internal
band gap reference circuits. One of the band gap circuits
internally generates a voltage of approximately 2.4 V,
independent of the supply voltage and temperature.
A voltage regulator circuit, connected to this voltage,
produces a constant voltage of 3.55 V which is used as an
internal reference voltage. The AF reference voltage Vref is
1⁄2VCC. Good ripple rejection is achieved with the external
capacitor Cref = 47 µF (16 V) in combination with an
internal resistor at pin 6. No additional DC load for 1⁄2VCC
is allowed.
Pin 13 is internal analog ground.
Power-on reset
When a Power-on reset is activated by switching on the
supply voltage or because of a supply voltage breakdown,
the 117/274 Hz DPLL, 117/274 Hz integrator and the
registers will be reset. Both AF channels (main and mono)
are muted. The ports are in position HIGH. Gain stereo
adjustment is 0 dB. Auto mute is active. For detailed
information see Table 12.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS
VCC supply voltage (pin 28) maximum chip
MIN.
MAX.
6.8
UNIT
0
0
V
temperature of 125 °C;
note 1
Vi
input voltage at:
pins 1 to 6, 8 to 12, 14 to 26 and 31 to 44
pins 29 to 30
VCC
V
V
−0.3
−25
VCC
Tstg
Tamb
Ves
storage temperature
+150
+70
°C
°C
V
ambient temperature
−20
electrostatic handling voltage
note 2
note 3
−150
−2500
+150
+2500
V
Notes
1. ICC = 60 mA; Tamb = 70 °C.
2. Machine model class B: C = 200 pF; L = 0.75 µH; R = 0 Ω.
3. Human body model class B: C = 100 pF; R = 1.5 kΩ.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
TDA9873H
70
65
K/W
K/W
TDA9873HS
2000 Apr 04
9
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
CHARACTERISTICS
VCC = 5 V; Tamb = 25 °C; B/G standard (fSC1 = 5.5 MHz, fSC2 = 5.742 MHz, SC1/SC2 = 7 dB, ∆fAF = 27 kHz,
mod = 1 kHz, L = R, stereo mode); input level for first sound carrier Vi(FM)(rms) = 50 mV; fref = 4.000 MHz; measured in
application circuits of Figs 7 and 8; unless otherwise specified.
f
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin 28)
VCC
ICC
supply voltage
supply current
4.5
5
6.6
75
V
40
60
mA
FM-PLL demodulator (pin 25); note 1
Vi(FM)(rms)
FM-PLL input voltage
(RMS value)
sensitivity for pull-in
first sound carrier
−
−
−
−
6
1
mV
mV
second sound carrier
level for gain controlled
operation; note 2
first sound carrier
second sound carrier
see Fig.3
6
1
−
−
150
100
mV
mV
Vi(vid)(p-p)
allowable interference video
level (peak-to-peak value)
Vi(FM1)(rms) = 6 mV
−
−
4
−
−
5
160
2
mV
V
V
i(FM1)(rms) = 150 mV
Ri
input resistance
6
kΩ
fi(FM)
FM-PLL operating frequencies first sound carrier
(switchable)
M standard
−
−
−
−
4.5
5.5
6.0
6.5
−
−
−
−
MHz
MHz
MHz
MHz
B/G standard
I standard
D/K standard
second sound carrier
M standard
−
−
−
−
−
−
−
−
−
−
4.72
5.74
6.26
6.74
5.74
±225
±450
−
−
MHz
MHz
MHz
MHz
MHz
kHz
kHz
kHz
kHz
kHz
B/G standard
−
D/K (1) standard
D/K (2) standard
D/K (3) standard
−
−
−
∆fFM
∆fAF
frequency windows of digital
acquisition help
narrow; note 3
−
wide; note 3
−
frequency deviation
THD < 1.5%; normal gain
THD < 1.5%; reduced gain
±62
±124
±125
−
∆fAF(ident)
frequency deviation for safe
identification
VCC = 5 V; stereo: 1 kHz L,
400 Hz R
−
αAM
AM suppression
AM: fmod = 1 kHz; m = 0.3
referenced to 27 kHz
FM deviation
40
46
−
dB
KO(FM)
KD(FM)
VCO steepness ∆fFM/∆VLF1,2 note 4
phase detector steepness note 4
∆ILF1,2/∆ϕ(VFM
−
−
3.3
4
−
−
MHz/V
µA/rad
)
2000 Apr 04
10
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SYMBOL
VCAF
PARAMETER
CONDITIONS
MIN.
0.6
TYP.
MAX.
UNIT
DC voltage at CAF1 and
CAF2
dependent on intercarrier
frequency fFM
−
2.6
V
BAF(−3dB)
−3 dB audio frequency
bandwidth
measured at AF1O and
AF2O; see Figs 7 and 8
upper limit dependent on 65
loop filter; note 4
80
−
−
kHz
Hz
lower limit dependent on
AF; CAF = 470 nF; note 5
−
20
−
C
Vo(FM)(rms)
output level (RMS value)
measured at
−
250
mV
AF1O and AF2O
Audio processing (pins 1, 2, 8 and 33)
Vo(rms)
AF output level (RMS value)
fmod = 300 Hz;
54% modulation;
switchable by I2C-bus;
note 6
normal gain
400
500
250
−
600
300
−
mV
mV
mV
reduced gain
200
Vo(cl)(rms)
AF output clipping level
(RMS value)
VCC = 5 V; THD = 1.5%
1400
RL
allowable load resistance
allowable load capacitance
allowable DC load resistance
output resistance
AC coupled
10
−
−
−
kΩ
nF
kΩ
Ω
CL
−
1.5
−
RL(DC)
Ro
100
70
−
−
150
0.2
300
0.5
THD
total harmonic distortion
Vo(rms) = 0.5 V; fAF = 1 kHz
%
αcs(AF)(stereo) AF channel separation (stereo without alignment; note 7
mode; complete signal path)
B/G or M (Korea)
25
30
−
dB
standard
D/K standard
23
35
27
40
−
−
dB
dB
potentiometer alignment;
B/G, M and D/K standard;
notes 7 and 8
I2C-bus alignment;
notes 7 and 9
B/G and D/K standard
M standard
40
35
45
40
−
−
dB
dB
αct(AF)(dual)
AF crosstalk attenuation (dual fi = 1 kHz for signal A;
mode)
fi = 400 Hz for signal B;
∆f = ±50 kHz
complete signal path
stereo decoder only
65
70
75
70
75
80
−
−
−
dB
dB
dB
αmute(AF)
mute attenuation of AF signal
2000 Apr 04
11
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SYMBOL
S/NW
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
weighted signal-to-noise ratio CCIR 468-4 weighted;
(complete signal path)
quasi peak; dual mode;
note 6
50 µs de-emphasis;
B/G, I and D/K standard
52
56
−
−
−
dB
75 µs de-emphasis;
M standard
48
70
52
75
dB
dB
S/NW(d)
signal-to-noise ratio at
external AF with stereo
decoder only
CCIR 468-4 weighted;
quasi peak;
Vo(rms) = 500 mV
tDEP(B/G)
tDEP(M)
fro
de-emphasis time constant for note 10; see Fig.4
B/G, D/K and I standard
−
−
50
75
−
−
µs
µs
de-emphasis time constant for note 10; see Fig.4
M standard
roll-off frequency
470 nF at AF1I and AF2I;
without de-emphasis
low frequency (−3 dB)
−
−
20
−
Hz
high frequency (−0.5 dB) 20
−
kHz
dB
PSRR
power supply ripple rejection
at OUTL and OUTR (overall
performance)
f
ripple = 70 Hz;
20
26
−
Vripple(p-p) = 100 mV;
dual mode; see Fig.5
Ri(AF1)
Ri(AF2)
AF1I input resistance
AF2I input resistance
32
32
40
40
48
48
kΩ
kΩ
External additional inputs (pins 38 to 40)
Vi(nom)(rms)
nominal input signal voltage
(RMS value)
−
0.5
−
−
V
V
Vi(cl)(rms)
clipping voltage level
(RMS value)
THD ≤ 1.5%; VCC = 5 V
1.4
−
Gv
Ri
AF signal voltage gain
input resistance
G = Vo/Vi
−1
40
−
0
+1
60
20
−
dB
kΩ
Hz
kHz
dB
50
−
fro
roll-off frequency
low frequency (−3 dB)
high frequency (−0.5 dB)
20
70
−
αct(ext)
AF crosstalk attenuation
(external input)
fi(EXTL) = 1 kHz;
fi(EXTR) = 400 Hz
75
−
Mono output OUTM (pin 43)
Ro
output resistance
70
10
100
−
200
−
350
−
Ω
RL
load resistance
AC coupled
kΩ
kΩ
nF
dB
RL(DC)
CL
allowable DC load resistance
load capacitance
−
−
−
1.5
−
αmute
mute attenuation
60
−
2000 Apr 04
12
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Pilot processing (pin 31)
fpilot
pilot operating frequency
(3.5fH)
fH1 = 15625 Hz
H2 = 15734 Hz
−
−
−
−
54688
55070
26
−
−
−
−
Hz
f
Hz
KO(pilot)
KD(pilot)
VCO steepness ∆fpilot/∆VLPF
note 11
kHz/V
µA/rad
phase detector steepness
∆fpilot window ±150 Hz;
2
∆ILPF/∆ϕ(pilot)
note 11
∆fSC2(pilot)
second sound carrier pilot
frequency deviation
unmodulated pilot
1.5
25
2.5
50
3.5
75
kHz
%
mAM(pilot)
pilot AM modulation depth
Identification (pins 34 and 35)
fLP(CID) low-pass frequency response −3 dB point
at pin CID
450
−
600
750
Hz
Hz
Hz
Hz
Hz
fstereo
fstereo(h)
fdual
fdual(h)
tident(on)
identification operating stereo B/G and D/K standard;
117.48 −
149.85 −
274.12 −
276.04 −
1
frequency
⁄133fH1
identification operating
stereo (h) frequency
M standard; 1⁄105 H2
f
−
identification operating dual
frequency
B/G and D/K standard;
1⁄57fH1
−
identification operating
dual (h) frequency
M standard; 1⁄57fH2
−
total identification time on for normal mode; note 12
0.35
0.1
0.6
0.15
−
−
2
s
identification mode change
fast mode; note 12
−
0.5
1.6
0.4
−
s
tident(off)
total identification time off for normal mode; note 12
−
s
identification mode change
fast mode; note 12
−
s
∆fident
identification window width
normal mode; note 13
fast mode; note 13
2
Hz
−
8
−
Hz
C/Npilot
fdet
pilot sideband carrier-to-noise
ratio for start of identification
−
33
−
dBc/Hz
pull-in frequency range of
identification PLL (referred to
normal mode lower side
normal mode upper side
fast mode lower side
fast mode upper side
−0.63
0.63
−
−
−
−
−0.63
0.63
Hz
Hz
Hz
Hz
fstereo = 117.48 Hz and
−2.05
2.05
−2.05
2.05
fdual = 274.12 Hz)
Reference input (operation as crystal oscillator; pin 15)
fsr(xtal)
series resonant frequency of
crystal
fundamental mode;
CL = 20 to 30 pF during
crystal production
−
−
4.0
−
MHz
∆fw(max)
allowed maximum spread of
oscillator working frequency
over operating temperature
range including ageing and
influence of drive circuit;
note 3
−
±300 × 10−6
∆fR
∆fd
cutting frequency tolerance
frequency drift
−
−
−
−
±50 × 10−6
±50 × 10−6
2000 Apr 04
13
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SYMBOL
Rs(eq)
PARAMETER
CONDITIONS
MIN.
TYP.
60
MAX.
200
UNIT
equivalent crystal series
resistance
−
Ω
Rs(um)
crystal series resistance of
unwanted mode
2 × Rs(eq)
−
−
Ω
Reference input (operation as input terminal; pin 15)
fω
working frequency
DC input voltage
input resistance
−
4
−
MHz
V
VI
2.3
2.5
−
2.6
3.0
−
2.9
Ri
3.5
±300 × 10−6
kΩ
∆fref
tolerance of reference
frequency
notes 3 and 14
Vref(rms)
Vo(ref)
CK
amplitude of reference source operation as input terminal 80
(RMS value)
−
400
4.7
−
mV
kΩ
pF
output resistance of reference
source
−
−
decoupling capacitance to
external reference source
operation as input terminal 22
100
I2C-bus transceiver (pins 29 and 30); note 15
fclk
clock frequency
0
3
−
−
−
−
−
−
−
−
100
VCC
+1.5
+10
+10
0.4
kHz
V
VIH
HIGH-level input voltage
LOW-level input voltage
HIGH-level input current
LOW-level input current
LOW-level output voltage
output sink current
VIL
−0.3
V
IIH
−10
−10
−
µA
µA
V
IIL
VOL
Io(sink)
Io(source)
IOL = 3 mA
VCC = 0 V
VCC = 0 V
−
10
µA
µA
output source current
−
10
Port outputs P1 and P2 (open-collector outputs; pins 37 and 42)
VOL
LOW-level output voltage
port output sink current
Io = 1 mA (sink)
−
−
−
−
0.3
1
V
Io(sink)(port)
port at LOW level
mA
Power-on reset
VCC(sr) supply voltage for start of
reset
decreasing supply voltage
2.5
3
3.5
4.5
V
V
VCC(er)
supply voltage for end of reset increasing supply voltage;
−
−
I2C-bus transmission
enabled
Notes
1. Input level for IF intercarrier from an external generator with 50 Ω source impedance, fmod = 400 Hz, 27 kHz
deviation of audio references: level for SC1 is 50 mV (RMS), SC1/SC2 = 7 dB. S/N and THD measurements are
taken at 50 µs de-emphasis.
2. For higher input voltages a series resistor connected to pin 25 is recommended.
3. The tolerance of the reference frequency determines the accuracy of the FM demodulator centre frequencies,
maximum FM deviation, pilot window width and pilot window mid-frequency error.
2000 Apr 04
14
-
--------
-------
-
-------
-
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
4. Approximate calculation of the FM-PLL loop filter can be done using the following formula:
K
O × K D
1
1
BL(–3dB)
=
-------------------- 1.55 –
------
2π
----------------------------------------------------
4R2 × KO × KD × CP
C P
rad
V
Hz
V
with KO = VCO steepness
or 2π
-------
µA
-------
rad
KD = phase detector steepness
R = loop resistor.
CS = series capacitor.
CP = parallel capacitor.
BL(−3dB) = loop bandwidth for −3 dB.
Example for BL(−3dB) = 80 kHz: CS = 3.3 nF; CP = 680 pF; R = 5.6 kΩ.
5. The lower limit of audio bandwidth depends on the value of the capacitors at pins 24 and 26. A value of CAF = 470 nF
leads to BAF(−3dB) < 20 Hz and a value of CAF = 220 nF leads to BAF(−3dB) < 40 Hz.
6. S/N decreases by 4 dB if no second sound carrier is present; auto mute enabled.
Condition for B/G, I and D/K standard: VCC = 5 V and ∆f = 27 kHz (m = 54%).
Condition for M standard: VCC = 5 V and ∆f = 13.5 kHz; 6 dB gain added internally to compensate for smaller
deviation.
7. R modulated and L monitored. The I2C-bus stereo adjustment has to be set to a default value. For B/G, D/K (2) and
M standard the default value is 0 dB, for D/K (1) standard the default value is 0.1 dB and for D/K (3) standard the
default value is 0.2 dB.
8. Using potentiometer adjustment, the AF output voltage is reduced by 1.3 dB because of the series resistor
(see Fig.8).
9. Separate alignment for each standard necessary. Minimum value for D/K (3) standard is 37 dB.
10. Because the loop transfer function is not flat, the de-emphasis is superimposed by an amplitude response correction
that compensates for an influence from the FM demodulators.
11. Approximate calculation of the pilot PLL loop filter can be done using the following formulae:
BL(−3dB) ≈ 1.89fn
K
O × K D
1
fn
=
--------------------
C
------
2π
R
---
2
ϑ =
C × KO × KD
with fn = natural frequency of PLL.
rad
V
Hz
-------
V
KO = VCO steepness
or 2π
µA
rad
KD = phase detector steepness
R = loop resistor.
C = loop capacitor.
BL(−3dB) = loop bandwidth for −3 dB.
ϑ = damping factor.
The formulae are only valid under the condition: 0.5 ≤ ϑ ≤ 0.8
Example for BL(−3dB) = 544 Hz: C = 100 nF; R = 7.5 kΩ; ϑ = 0.67; fn = 288 Hz.
2000 Apr 04
15
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
12. The maximum total system identification time ‘on’ for a channel change is equal to the maximum value of tident(on)
plus tI2C(read-out). The maximum total system identification time ‘off’ for a channel change is equal to the maximum
value of tident(off) plus tI2C(read-out). The fast mode is mainly for use during search tuning, program or channel select.
If the channel is selected, the identification response should be switched to normal mode for improved reliability.
However due to the transition from fast to normal mode, the identification bits are not valid for one integrator period.
Therefore the transmitter mode detected during the fast mode must be stored before changing to the normal mode.
The storage must be kept for two seconds (maximum value of tident(on) in the normal mode) from the moment of
transition. The identification can now operate in the normal mode until the next tuning action.
13. Identification window is defined as total pull-in frequency range (lower plus upper side) of identification PLL (steady
detection) plus window increase due to integrator (fluctuating detection).
14. Window width dependent on fω.
15. The AC characteristics are in accordance with the I2C-bus specification. The maximum clock frequency is 100 kHz.
Information about the I2C-bus can be found in the brochure “The I2C-bus and how to use it”
(order number 9398 393 40011).
Table 1 TV standard settings
STEREO
DUAL
PILOT
FREQUENCY
fSC1
(MHz)
fSC2
(MHz)
IDENTIFICATION IDENTIFICATION DE-EMPHASIS
FREQUENCY
STANDARD
FREQUENCY
tDEP (µs)
f
pilot (kHz)
f
stereo (Hz)
149.85
117.48
−
f
dual (Hz)
276.04
274.12
−
M
4.5
5.5
6
4.724
5.742
−
55.0699
54.6875
−
75
50
50
50
50
50
B/G
I
D/K (1)
D/K (2)
D/K (3)
6.5
6.5
6.5
6.268
6.742
5.742
54.6875
54.6875
54.6875
117.48
117.48
117.48
274.12
274.12
274.12
MHB433
2
V
i(vid)(p-p)
(V)
1
0.5
0.16
0
6
12
25
50
150
V
(mV)
i(FM)(rms)
SC1
SC1
SC2
= 7 dB
-----------
video: colour-bar
Fig.3 Allowable interference video level.
16
2000 Apr 04
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
MHB431
+3
V
o(AF)
(dB)
+2
R: −15%
C: −5%
+1
0
−1
−2
R: +15%
C: +5%
2
3
4
5
10
10
10
10
10
f
(Hz)
o(AF)
Fig.4 Tolerance scheme of AF frequency response; de-emphasis with CDE1 = CDE2 = 10 nF ±5%.
V
= 5 V
CC
V
= 5 V
100 mV (f
= 70 Hz)
ripple
CC
TDA9873H
MHB432
t
Vripple at OUTR
PSRR = 20 log
----------------------------------------
Vripple at VCC
Fig.5 Ripple rejection condition.
17
2000 Apr 04
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
uflpagewihdt
OUTL
SWITCH
6 dB
CDE1
1
2
3
4
5
6
1
2
3
4
5
6
LEVEL + STEREO ADJUST
DE-MATRIX
DE-EMPHASIS
B4 = 0
0/−6 dB
+ MUTE
1
AF1I
L + R
2
, M, A
B4 = 1
0/6 dB
(mute)
OUTM
(E3, E4, E5)
+
S
6
5
4
3
2
1
6
5
4
3
2
1
(L)
STANDARD
DEPENDENT
DE-MATRIXING
B5, B7
+
acquisition
6 dB
for
standard M
S is open
for
standard M
(R)
stereo
S
separation
adjust
−0.6 to +0.7 dB
B4 = 1
2
0/−6 dB
+ MUTE
AF2I
d
EXTM
EXTL
B4 = 0
0/6 dB
L − R
R,
, B
d
2
d
EXTR
CDE2
6 dB
d = 6 dB attenuation
MHB434
OUTR
Example: For stereo mode (B4 = 1), OUTL is switched to position 4 and OUTR switched to position 5. For mono mode (B4 = 0), OUTL and OUTR are both switched to position 4.
This means: For mono/stereo switching, not only B4 but also the switch (stereo and mono output) must be set (see Tables 13 and 25).
Stereo output: internal/external source: B0 and B1; output switching: B2 and B3.
Fig.6 Audio part.
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
I2C-BUS PROTOCOL
I2C-bus format to read (device identification code)
S
SLAVE ADDRESS R/W = 0
A
SUBADDRESS A S SLAVE ADDRESS R/W = 1
A
DATA AN P
Table 2 Explanation of I2C-bus format to read (device identification code)
NAME
DESCRIPTION
S
START condition; generated by the master
101 101 1; pin MAD not connected (standard)
SLAVE ADDRESS
101 101 0; pin MAD connected to ground (pin programmable)
logic 0 (write); generated by the master
logic 1 (read); generated by the master
acknowledge; generated by the slave
R/W
A
SUBADDRESS
111 111 10 (254)
DATA
AN
P
slave transmits the device identification code 80H; note 1
acknowledge not; generated by the master
STOP condition; generated by the master
Note
1. This data word H80 (device identification code) is read from the subaddress 254 which is set in the last write transfer.
I2C-bus format to read (slave transmits data)
S
SLAVE ADDRESS
R/W = 1
A
DATA
AN
P
Table 3 Explanation of I2C-bus format to read (slave transmits data)
NAME
DESCRIPTION
S
START condition; generated by the master
101 101 1; pin MAD not connected (standard)
SLAVE ADDRESS
101 101 0; pin MAD connected to ground (pin programmable)
logic 1 (read); generated by the master
acknowledge; generated by the slave
R/W
A
DATA
AN
P
slave transmits an 8-bit data word
acknowledge not; generated by the master
STOP condition; generated by the master
Table 4 Definition of the transmitted byte after read condition
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
Y
Y
DS
ST
PONR
2000 Apr 04
19
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
Table 5 Bit functions of Table 4
BIT
FUNCTION
PONR
ST
Power-on reset; if PONR = 1, then Power-on reset is detected
stereo sound; if ST = 1, then stereo sound is identified
dual sound; if DS = 1, then dual sound is identified
indefinite
DS
Y
Table 6 Interpretation of identification bits
ST
DS
FUNCTION
0
0
1
1
0
1
0
1
mono
dual sound
stereo sound
incorrect identification
Table 7 Power-on reset
PONR
FUNCTION
after successful reading of the status register
after Power-on reset or after supply breakdown
0
1
If the master generates an acknowledge not and a STOP condition when it has received the data word READ, the master
terminates the bus transfer. On the other hand, if the master generates an acknowledge then the slave started a second
transfer with the READ byte and so on until the master generates an acknowledge not and STOP condition.
I2C-bus format to write (slave receives data)
S
SLAVE ADDRESS
R/W = 0
A
SUBADDRESS
A
DATA
A
P
Table 8 Explanation of I2C-bus format to write (slave receives data)
NAME
DESCRIPTION
S
START condition
101 101 1; pin MAD not connected (standard)
SLAVE ADDRESS
101 101 0; pin MAD connected to ground (pin programmable)
R/W
logic 0 (write)
A
acknowledge; generated by slave
see Table 9
SUBADDRESS
DATA
P
note 1; see Table 10
STOP condition
Note
1. If more than 1 byte of DATA is transmitted, auto-increment is performed, starting from the transmitted subaddress
and auto-increment of the subaddress is performed in accordance with the order of Table 9.
2000 Apr 04
20
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
Table 9 Subaddress definition (second byte after slave address)
MSB
LSB
FUNCTION
D7
D6
D5
D4
D3
D2
D1(1)
D0(1)
Switching
Adjust/standard
Port
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
Note
1. Significant subaddress bits.
Table 10 Data definition (third byte after slave address)
MSB
LSB
D0
FUNCTION
D7
D6
D5
D4
D3
D2
D1
Switching data
Adjust/standard data
Port data
B7
C7
0
B6
C6
0
B5
C5
E5
B4
C4
E4
B3
C3
E3
B2
C2
E2
B1
C1
E1
B0
C0
E0
Table 11 Bit functions of Table 10
BITS
FUNCTION
B0 and B1
B2 and B3
B4
signal source select; see Table 14
output signal select; see Table 13
stereo setting bit; see Table 13
output level switching; see Table 16
mute bit; see Table 17
B5
B6
B7
auto mute enable; see Table 18
stereo adjust; see Table 19
C0 to C3
C4 to C6
C7
standard switching; see Table 20
identification response time; see Table 21
port 1; see Table 22
E0
E1
port 2; see Table 23
E2
test mode; see Table 24 (not for customer)
mono output setting; see Table 25
E3 to E5
Table 12 Data setting of third byte after Power-on reset; see note 1
MSB
LSB
FUNCTION
D7
1
D6
1
D5
X
D4
X
D3
X
D2
X
D1
X
D0
X
Switching data
Adjust/standard data
Port data
0
0
0
0
0
1
1
0
0
0
1
1
1
0
1
1
Note
1. X = don’t care.
2000 Apr 04
21
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SWITCHING DATA BITS
Table 13 Mode and output switching; data byte to select AF inputs and AF outputs
TRANSMISSION MODE
SELECTED MODE
OUTL
OUTR
B4
B3
B2
Mono
M
M
M
M
M
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
0
1
1
1
1
0
1
0
1
0
1
0
0
1
0
1
Stereo
forced mono
ST
L
R
R
L
Dual
AB
A
B
AA
A
A
BB
B
B
BA
B
A
External mono
External stereo
EXTM
EXTM
EXTL
EXTL
EXTR
EXTR
EXTM
EXTR
EXTL
EXTR
EXTL
EXTL, EXTR
EXTL, EXTL
EXTR, EXTR
EXTR, EXTL
Table 14 Source switching
Table 17 Mute switching of AF outputs
SIGNAL SOURCE
Internal
B1
0
B0
0
OUTL AND OUTR
Not muted
B6
0
External stereo
External mono
1
0
Muted
1
1
1
Table 18 Auto mute activating
Table 15 Stereo decoder outputs (CDE1 and CDE2)
AUTO MUTE
B7
TRANSMISSION MODE
OUTPUTS
B4
Disabled
Active
0
1
Stereo
Stereo
Mono
Dual
stereo
mono
mono
dual
1
0
0
0
Table 16 Output level switching
OUTPUT LEVEL
B5
Normal gain
1
0
Reduced gain
2000 Apr 04
22
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
ADJUST AND STANDARD DATA BITS
Table 19 Stereo adjustment, gain adjust in R channel
GAIN STEREO
PORT DATA BITS
Table 22 Port 1 output
PORT 1
E0
C3
C2
C1
C0
ADJUSTMENT (dB)
LOW level
HIGH level
0
1
−0.6
−0.5
−0.4
−0.3
−0.2
−0.1
0.0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Table 23 Port 2 output
PORT 2
E1
LOW level
HIGH level
0
1
Table 24 Test mode; note 1
+0.1
+0.2
+0.3
+0.4
+0.5
+0.6
+0.7
TEST MODE
E2
Off
On
0
1
Note
1. Not for customer; for Philips Semiconductors only.
Table 20 Standard switching
STANDARD
C6
C5
C4
B/G
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
M
D/K (1)
D/K (2)
D/K (3)
I
Table 21 Identification response time
RESPONSE TIME
C7
Normal
Fast
0
1
2000 Apr 04
23
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
Table 25 Mono output
TRANSMISSION MODE
STEREO DECODER
mono
OUTM
E5
E4
E3
B4
Mono
mono
mono
dual A
dual B
mono
EXTM
EXTL
EXTR
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
0
0
0
1
−
−
−
−
−
Stereo
forced mono
Dual
dual
Dual
dual
Stereo
stereo
−
−
−
−
−
−
−
−
−
−
EXTL/R; 1⁄2(L + R)
mute
2000 Apr 04
24
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
APPLICATION INFORMATION
external inputs
P2
P1
V
V
CC
CC
4.7
kΩ
4.7
kΩ
47
µF
470
nF
470
nF
2.2
µF
470
nF
4.7
nF
470
nF
V
n.c.
36
n.c.
OUTM P2
43 42
ref
EXTL EXTR EXTM P1
CID
CTRIG
44
41
40
39
38
37
35
34
2.2 µF
470 nF
OUTL
AF2I
AF2O
LPF
1
2
33
32
31
30
29
28
27
2.2 µF
OUTR
CDE1
n.c.
100 nF
10 nF
7.5 kΩ
3
4
SDA
SCL
SDA
n.c.
SCL
5
6
470 nF
10 nF
V
CDE2
CC
V
TDA9873H
CC
DGND
AGND
AF1I
7
8
470 nF
47 pF
CAF2
IFINT
CAF1
n.c.
26
25
24
23
n.c.
470
nF
IF
9
intercarrier
470 nF
AF1O
10
n.c.
11
12
n.c.
13
14
15
16
17
n.c.
18
LF2
19
n.c.
20
n.c.
21
22
AFR LF1
XTAL n.c.
MAD n.c.
MHB435
680 pF
680 pF
5.6 kΩ
3.3 nF
5.6 kΩ
3.3 nF
Fig.7 Application circuit without potentiometer alignment.
25
2000 Apr 04
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
external inputs
P2
P1
V
V
CC
CC
4.7
kΩ
4.7
kΩ
47
µF
470
nF
470
nF
2.2
µF
470
nF
4.7
nF
470
nF
V
n.c.
36
n.c.
OUTM P2
43 42
ref
EXTL EXTR EXTM P1
CID
CTRIG
44
41
40
39
38
37
35
34
2.2 µF
470 nF
OUTL
AF2I
AF2O
LPF
1
2
33
32
31
30
29
28
27
2.2 µF
OUTR
CDE1
n.c.
100 nF
10 nF
7.5 kΩ
3
4
SDA
SCL
SDA
n.c.
SCL
5
6
470 nF
10 nF
V
CDE2
CC
V
TDA9873H
CC
DGND
AGND
AF1I
7
8
470 nF
47 pF
CAF2
IFINT
CAF1
n.c.
26
25
24
23
n.c.
470
nF
IF
9
intercarrier
470 nF
AF1O
10
n.c.
4.7
kΩ
11
10 kΩ
12
n.c.
13
14
15
16
17
n.c.
18
LF2
19
n.c.
20
n.c.
21
22
AFR LF1
XTAL n.c.
MAD n.c.
MHB436
680 pF
680 pF
5.6 kΩ
3.3 nF
5.6 kΩ
3.3 nF
Fig.8 Application circuit with potentiometer alignment.
26
2000 Apr 04
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
INTERNAL PIN CONFIGURATION
handbook, halfpage
1, 2
handbook, halfpage
3, 6
+
2.5 V
+
2.5 V
10 kΩ
10 kΩ
15 kΩ
7.5 kΩ
8 kΩ
MHB438
MHB437
Fig.9 Pin 1; OUTL and pin 2; OUTR.
Fig.10 Pin 3; CDE1 and pin 6; CDE2.
handbook, halfpage
10, 32
handbook, halfpage
8, 33
+
+
50 kΩ
2.5 V
240 µA
5 kΩ
MHB439
34 kΩ
MHB440
Fig.11 Pin 8; AF1I and pin 33; AF2I.
Fig.12 Pin 10; AF1O and pin 32; AF2O.
2000 Apr 04
27
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
handbook, halfpage
FM DEMODULATOR
NARROW-BAND PLL
SC1
AF
AMPLIFIER
1
handbook, halfpage
14, 18
AF
AMPLIFIER
2
FM DEMODULATOR
NARROW-BAND PLL
SC2
1.5 V
+
2 kΩ
+
+
+
23 kΩ
2 kΩ
13 AFR
24 CAF1 26 CAF2
470 nF 470 nF
7
AGND
MHB442
MGU118
Fig.13 Pin 13; AFR (internal analog ground).
Fig.14 Pin 14; LF1 and pin 18; LF2.
handbook, halfpage
15
handbook, halfpage
21
+
+
1.5 kΩ
MHB444
100 µA
MHB443
Fig.15 Pin 15; XTAL.
Fig.16 Pin 21; MAD.
2000 Apr 04
28
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
handbook, halfpage
25
handbook, halfpage
24, 26
3 V
2.5 V
+
+
80
µA
5 kΩ
+
30 kΩ
3.3 kΩ
5 kΩ
500 µA
4.8 pF
4.8 pF
3.05 kΩ
2 kΩ
MHB445
MHB446
Fig.17 Pin 24; CAF1 and pin 26; CAF2.
Fig.18 Pin 25; IFINT.
handbook, halfpage
28
handbook, halfpage
29
+
1.8 kΩ
5 V
2.5 V
MHB448
MHB447
Fig.19 Pin 28; VCC
.
Fig.20 Pin 29; SCL.
2000 Apr 04
29
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
handbook, halfpage
31, 35
2.5 V
+
+
handbook, halfpage
30
80
µA
4
kΩ
4
kΩ
1.8 kΩ
2.5 V
56
kΩ
MHB449
2
kΩ
MHB450
Fig.21 Pin 30; SDA.
Fig.22 Pin 31; LPF and pin 35; CID.
handbook, halfpage
34
2.5 V
handbook, halfpage
37, 42
+
56 kΩ
+
MHB452
3.33 kΩ
MHB451
Fig.23 Pin 34; CTRIG.
Fig.24 Pin 37; P1 and pin 42; P2.
2000 Apr 04
30
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
handbook, halfpage
handbook, halfpage
41
38, 39, 40
1
2
3
4
+
+
25 kΩ
25 kΩ
100 Ω
5.9 kΩ
6.8 kΩ
MHB454
MHB453
Fig.25 Pin 38; EXTM; pin 39; EXTR and pin 40;
EXTL.
Fig.26 Pin 41; Vref.
handbook, halfpage
43
+
2.5 V
10 kΩ
10 kΩ
8 kΩ
MHB455
Fig.27 Pin 43; OUTM.
2000 Apr 04
31
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
PACKAGE OUTLINES
QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm
SOT205-1
y
X
A
33
23
Z
34
22
E
e
A
H
2
E
E
A
(A )
3
A
1
w M
p
θ
b
L
p
pin 1 index
L
44
12
detail X
1
11
Z
v
M
D
A
e
w M
b
p
D
B
H
v
M
B
D
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.25 2.3
0.05 2.1
0.50 0.25 14.1 14.1
0.35 0.14 13.9 13.9
19.2 19.2
18.2 18.2
2.0
1.2
2.4
1.8
2.4
1.8
mm
1
2.60
0.25
2.35
0.3 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-08-01
99-12-27
SOT205-1
133E01
2000 Apr 04
32
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SOT307-2
y
X
A
33
23
34
22
Z
E
e
H
E
E
A
2
A
(A )
3
A
1
w M
θ
b
p
L
p
pin 1 index
L
12
44
detail X
1
11
w M
Z
v
M
A
D
b
p
e
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
θ
1
2
3
p
E
p
D
E
max.
10o
0o
0.25 1.85
0.05 1.65
0.40 0.25 10.1 10.1
0.20 0.14 9.9 9.9
12.9 12.9
12.3 12.3
0.95
0.55
1.2
0.8
1.2
0.8
mm
2.10
0.25
0.8
1.3
0.15 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-08-01
SOT307-2
2000 Apr 04
33
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
2000 Apr 04
34
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Apr 04
35
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound
decoder
TDA9873H
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2000 Apr 04
36
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
NOTES
2000 Apr 04
37
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
NOTES
2000 Apr 04
38
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
NOTES
2000 Apr 04
39
Philips Semiconductors – a worldwide company
Argentina: see South America
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
Tel. +61 2 9704 8141, Fax. +61 2 9704 8139
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773
Pakistan: see Singapore
Belgium: see The Netherlands
Brazil: see South America
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Colombia: see South America
Czech Republic: see Austria
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Hungary: see Austria
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Middle East: see Italy
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/03/pp40
Date of release: 2000 Apr 04
Document order number: 9397 750 06932
相关型号：
©2020 ICPDF网 联系我们和版权申明